1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #ifndef _IONIC_DEV_H_ 5 #define _IONIC_DEV_H_ 6 7 #include <linux/atomic.h> 8 #include <linux/mutex.h> 9 #include <linux/workqueue.h> 10 #include <linux/skbuff.h> 11 #include <linux/bpf_trace.h> 12 13 #include "ionic_if.h" 14 #include "ionic_regs.h" 15 #include "ionic_api.h" 16 17 #define IONIC_MAX_TX_DESC 8192 18 #define IONIC_MAX_RX_DESC 16384 19 #define IONIC_MIN_TXRX_DESC 64 20 #define IONIC_DEF_TXRX_DESC 1024 21 #define IONIC_RX_FILL_THRESHOLD 16 22 #define IONIC_RX_FILL_DIV 8 23 #define IONIC_TSO_DESCS_NEEDED 44 /* 64K TSO @1500B */ 24 #define IONIC_LIFS_MAX 1024 25 #define IONIC_WATCHDOG_SECS 5 26 #define IONIC_ITR_COAL_USEC_DEFAULT 64 27 28 #define IONIC_DEV_CMD_REG_VERSION 1 29 #define IONIC_DEV_INFO_REG_COUNT 32 30 #define IONIC_DEV_CMD_REG_COUNT 32 31 32 #define IONIC_NAPI_DEADLINE (HZ) /* 1 sec */ 33 #define IONIC_ADMIN_DOORBELL_DEADLINE (HZ / 2) /* 500ms */ 34 #define IONIC_TX_DOORBELL_DEADLINE (HZ / 100) /* 10ms */ 35 #define IONIC_RX_MIN_DOORBELL_DEADLINE (HZ / 100) /* 10ms */ 36 #define IONIC_RX_MAX_DOORBELL_DEADLINE (HZ * 4) /* 4s */ 37 38 #define IONIC_EXPDB_64B_WQE_LG2 6 39 #define IONIC_EXPDB_128B_WQE_LG2 7 40 #define IONIC_EXPDB_256B_WQE_LG2 8 41 #define IONIC_EXPDB_512B_WQE_LG2 9 42 43 struct ionic_dev_bar { 44 void __iomem *vaddr; 45 phys_addr_t bus_addr; 46 unsigned long len; 47 int res_index; 48 }; 49 50 #ifndef __CHECKER__ 51 /* Registers */ 52 static_assert(sizeof(struct ionic_intr) == 32); 53 54 static_assert(sizeof(struct ionic_doorbell) == 8); 55 static_assert(sizeof(struct ionic_intr_status) == 8); 56 static_assert(sizeof(union ionic_dev_regs) == 4096); 57 static_assert(sizeof(union ionic_dev_info_regs) == 2048); 58 static_assert(sizeof(union ionic_dev_cmd_regs) == 2048); 59 static_assert(sizeof(struct ionic_lif_stats) == 1024); 60 61 static_assert(sizeof(struct ionic_admin_cmd) == 64); 62 static_assert(sizeof(struct ionic_admin_comp) == 16); 63 static_assert(sizeof(struct ionic_nop_cmd) == 64); 64 static_assert(sizeof(struct ionic_nop_comp) == 16); 65 66 /* Device commands */ 67 static_assert(sizeof(struct ionic_dev_identify_cmd) == 64); 68 static_assert(sizeof(struct ionic_dev_identify_comp) == 16); 69 static_assert(sizeof(struct ionic_dev_init_cmd) == 64); 70 static_assert(sizeof(struct ionic_dev_init_comp) == 16); 71 static_assert(sizeof(struct ionic_dev_reset_cmd) == 64); 72 static_assert(sizeof(struct ionic_dev_reset_comp) == 16); 73 static_assert(sizeof(struct ionic_dev_getattr_cmd) == 64); 74 static_assert(sizeof(struct ionic_dev_getattr_comp) == 16); 75 static_assert(sizeof(struct ionic_dev_setattr_cmd) == 64); 76 static_assert(sizeof(struct ionic_dev_setattr_comp) == 16); 77 static_assert(sizeof(struct ionic_lif_setphc_cmd) == 64); 78 79 /* Port commands */ 80 static_assert(sizeof(struct ionic_port_identify_cmd) == 64); 81 static_assert(sizeof(struct ionic_port_identify_comp) == 16); 82 static_assert(sizeof(struct ionic_port_init_cmd) == 64); 83 static_assert(sizeof(struct ionic_port_init_comp) == 16); 84 static_assert(sizeof(struct ionic_port_reset_cmd) == 64); 85 static_assert(sizeof(struct ionic_port_reset_comp) == 16); 86 static_assert(sizeof(struct ionic_port_getattr_cmd) == 64); 87 static_assert(sizeof(struct ionic_port_getattr_comp) == 16); 88 static_assert(sizeof(struct ionic_port_setattr_cmd) == 64); 89 static_assert(sizeof(struct ionic_port_setattr_comp) == 16); 90 91 /* LIF commands */ 92 static_assert(sizeof(struct ionic_lif_init_cmd) == 64); 93 static_assert(sizeof(struct ionic_lif_init_comp) == 16); 94 static_assert(sizeof(struct ionic_lif_reset_cmd) == 64); 95 static_assert(sizeof(ionic_lif_reset_comp) == 16); 96 static_assert(sizeof(struct ionic_lif_getattr_cmd) == 64); 97 static_assert(sizeof(struct ionic_lif_getattr_comp) == 16); 98 static_assert(sizeof(struct ionic_lif_setattr_cmd) == 64); 99 static_assert(sizeof(struct ionic_lif_setattr_comp) == 16); 100 101 static_assert(sizeof(struct ionic_q_init_cmd) == 64); 102 static_assert(sizeof(struct ionic_q_init_comp) == 16); 103 static_assert(sizeof(struct ionic_q_control_cmd) == 64); 104 static_assert(sizeof(ionic_q_control_comp) == 16); 105 static_assert(sizeof(struct ionic_q_identify_cmd) == 64); 106 static_assert(sizeof(struct ionic_q_identify_comp) == 16); 107 108 static_assert(sizeof(struct ionic_rx_mode_set_cmd) == 64); 109 static_assert(sizeof(ionic_rx_mode_set_comp) == 16); 110 static_assert(sizeof(struct ionic_rx_filter_add_cmd) == 64); 111 static_assert(sizeof(struct ionic_rx_filter_add_comp) == 16); 112 static_assert(sizeof(struct ionic_rx_filter_del_cmd) == 64); 113 static_assert(sizeof(ionic_rx_filter_del_comp) == 16); 114 115 /* RDMA commands */ 116 static_assert(sizeof(struct ionic_rdma_reset_cmd) == 64); 117 static_assert(sizeof(struct ionic_rdma_queue_cmd) == 64); 118 119 /* Events */ 120 static_assert(sizeof(struct ionic_notifyq_cmd) == 4); 121 static_assert(sizeof(union ionic_notifyq_comp) == 64); 122 static_assert(sizeof(struct ionic_notifyq_event) == 64); 123 static_assert(sizeof(struct ionic_link_change_event) == 64); 124 static_assert(sizeof(struct ionic_reset_event) == 64); 125 static_assert(sizeof(struct ionic_heartbeat_event) == 64); 126 static_assert(sizeof(struct ionic_log_event) == 64); 127 128 /* I/O */ 129 static_assert(sizeof(struct ionic_txq_desc) == 16); 130 static_assert(sizeof(struct ionic_txq_sg_desc) == 128); 131 static_assert(sizeof(struct ionic_txq_sg_desc_v1) == 256); 132 static_assert(sizeof(struct ionic_txq_comp) == 16); 133 134 static_assert(sizeof(struct ionic_rxq_desc) == 16); 135 static_assert(sizeof(struct ionic_rxq_sg_desc) == 128); 136 static_assert(sizeof(struct ionic_rxq_comp) == 16); 137 static_assert(sizeof(struct ionic_rxq_comp) == sizeof(struct ionic_txq_comp)); 138 139 /* SR/IOV */ 140 static_assert(sizeof(struct ionic_vf_setattr_cmd) == 64); 141 static_assert(sizeof(struct ionic_vf_setattr_comp) == 16); 142 static_assert(sizeof(struct ionic_vf_getattr_cmd) == 64); 143 static_assert(sizeof(struct ionic_vf_getattr_comp) == 16); 144 static_assert(sizeof(struct ionic_vf_ctrl_cmd) == 64); 145 static_assert(sizeof(struct ionic_vf_ctrl_comp) == 16); 146 #endif /* __CHECKER__ */ 147 148 struct ionic_devinfo { 149 u8 asic_type; 150 u8 asic_rev; 151 char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN + 1]; 152 char serial_num[IONIC_DEVINFO_SERIAL_BUFLEN + 1]; 153 }; 154 155 struct ionic_dev { 156 union ionic_dev_info_regs __iomem *dev_info_regs; 157 union ionic_dev_cmd_regs __iomem *dev_cmd_regs; 158 struct ionic_hwstamp_regs __iomem *hwstamp_regs; 159 160 atomic_long_t last_check_time; 161 unsigned long last_hb_time; 162 u32 last_fw_hb; 163 bool fw_hb_ready; 164 bool fw_status_ready; 165 u8 fw_generation; 166 u8 opcode; 167 168 u64 __iomem *db_pages; 169 dma_addr_t phy_db_pages; 170 171 struct ionic_intr __iomem *intr_ctrl; 172 u64 __iomem *intr_status; 173 174 struct mutex cmb_inuse_lock; /* for cmb_inuse */ 175 unsigned long *cmb_inuse; 176 dma_addr_t phy_cmb_pages; 177 u32 cmb_npages; 178 179 dma_addr_t phy_cmb_expdb64_pages; 180 dma_addr_t phy_cmb_expdb128_pages; 181 dma_addr_t phy_cmb_expdb256_pages; 182 dma_addr_t phy_cmb_expdb512_pages; 183 184 u32 port_info_sz; 185 struct ionic_port_info *port_info; 186 dma_addr_t port_info_pa; 187 188 struct ionic_devinfo dev_info; 189 }; 190 191 struct ionic_queue; 192 struct ionic_qcq; 193 194 #define IONIC_MAX_BUF_LEN ((u16)-1) 195 #define IONIC_PAGE_SIZE MIN(PAGE_SIZE, IONIC_MAX_BUF_LEN) 196 197 #define IONIC_XDP_MAX_LINEAR_MTU (IONIC_PAGE_SIZE - \ 198 (VLAN_ETH_HLEN + \ 199 XDP_PACKET_HEADROOM + \ 200 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))) 201 202 struct ionic_buf_info { 203 struct page *page; 204 dma_addr_t dma_addr; 205 u32 page_offset; 206 u32 len; 207 }; 208 209 #define IONIC_TX_MAX_FRAGS (1 + IONIC_TX_MAX_SG_ELEMS_V1) 210 #define IONIC_RX_MAX_FRAGS (1 + IONIC_RX_MAX_SG_ELEMS) 211 212 struct ionic_tx_desc_info { 213 unsigned int bytes; 214 unsigned int nbufs; 215 struct sk_buff *skb; 216 struct xdp_frame *xdpf; 217 enum xdp_action act; 218 struct ionic_buf_info bufs[MAX_SKB_FRAGS + 1]; 219 }; 220 221 struct ionic_rx_desc_info { 222 unsigned int nbufs; 223 struct ionic_buf_info bufs[IONIC_RX_MAX_FRAGS]; 224 }; 225 226 struct ionic_admin_desc_info { 227 void *ctx; 228 }; 229 230 #define IONIC_QUEUE_NAME_MAX_SZ 16 231 232 struct ionic_queue { 233 struct device *dev; 234 struct ionic_lif *lif; 235 union { 236 void *info; 237 struct ionic_tx_desc_info *tx_info; 238 struct ionic_rx_desc_info *rx_info; 239 struct ionic_admin_desc_info *admin_info; 240 }; 241 u64 dbval; 242 unsigned long dbell_deadline; 243 unsigned long dbell_jiffies; 244 u16 head_idx; 245 u16 tail_idx; 246 unsigned int index; 247 unsigned int num_descs; 248 unsigned int max_sg_elems; 249 250 u64 features; 251 unsigned int hw_type; 252 bool xdp_flush; 253 union { 254 void *base; 255 struct ionic_txq_desc *txq; 256 struct ionic_rxq_desc *rxq; 257 struct ionic_admin_cmd *adminq; 258 }; 259 union { 260 void *sg_base; 261 struct ionic_txq_sg_desc *txq_sgl; 262 struct ionic_txq_sg_desc_v1 *txq_sgl_v1; 263 struct ionic_rxq_sg_desc *rxq_sgl; 264 }; 265 struct xdp_rxq_info *xdp_rxq_info; 266 struct bpf_prog *xdp_prog; 267 struct page_pool *page_pool; 268 struct ionic_queue *partner; 269 270 union { 271 void __iomem *cmb_base; 272 struct ionic_txq_desc __iomem *cmb_txq; 273 struct ionic_rxq_desc __iomem *cmb_rxq; 274 }; 275 unsigned int type; 276 unsigned int hw_index; 277 dma_addr_t base_pa; 278 dma_addr_t cmb_base_pa; 279 dma_addr_t sg_base_pa; 280 u64 drop; 281 unsigned int desc_size; 282 unsigned int sg_desc_size; 283 unsigned int pid; 284 char name[IONIC_QUEUE_NAME_MAX_SZ]; 285 } ____cacheline_aligned_in_smp; 286 287 struct ionic_cq { 288 struct ionic_lif *lif; 289 struct ionic_queue *bound_q; 290 struct ionic_intr_info *bound_intr; 291 u16 tail_idx; 292 bool done_color; 293 unsigned int num_descs; 294 unsigned int desc_size; 295 void *base; 296 dma_addr_t base_pa; 297 struct ionic_dev *idev; 298 } ____cacheline_aligned_in_smp; 299 300 struct ionic; 301 302 static inline void ionic_intr_init(struct ionic_dev *idev, 303 struct ionic_intr_info *intr, 304 unsigned long index) 305 { 306 ionic_intr_clean(idev->intr_ctrl, index); 307 intr->index = index; 308 } 309 310 static inline unsigned int ionic_q_space_avail(struct ionic_queue *q) 311 { 312 unsigned int avail = q->tail_idx; 313 314 if (q->head_idx >= avail) 315 avail += q->num_descs - q->head_idx - 1; 316 else 317 avail -= q->head_idx + 1; 318 319 return avail; 320 } 321 322 static inline bool ionic_q_has_space(struct ionic_queue *q, unsigned int want) 323 { 324 return ionic_q_space_avail(q) >= want; 325 } 326 327 void ionic_init_devinfo(struct ionic *ionic); 328 int ionic_dev_setup(struct ionic *ionic); 329 void ionic_dev_teardown(struct ionic *ionic); 330 331 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd); 332 u8 ionic_dev_cmd_status(struct ionic_dev *idev); 333 bool ionic_dev_cmd_done(struct ionic_dev *idev); 334 void ionic_dev_cmd_comp(struct ionic_dev *idev, union ionic_dev_cmd_comp *comp); 335 336 void ionic_dev_cmd_identify(struct ionic_dev *idev, u8 ver); 337 void ionic_dev_cmd_init(struct ionic_dev *idev); 338 void ionic_dev_cmd_reset(struct ionic_dev *idev); 339 340 void ionic_dev_cmd_port_identify(struct ionic_dev *idev); 341 void ionic_dev_cmd_port_init(struct ionic_dev *idev); 342 void ionic_dev_cmd_port_reset(struct ionic_dev *idev); 343 void ionic_dev_cmd_port_state(struct ionic_dev *idev, u8 state); 344 void ionic_dev_cmd_port_speed(struct ionic_dev *idev, u32 speed); 345 void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable); 346 void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type); 347 void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type); 348 349 int ionic_set_vf_config(struct ionic *ionic, int vf, 350 struct ionic_vf_setattr_cmd *vfc); 351 352 void ionic_dev_cmd_queue_identify(struct ionic_dev *idev, 353 u16 lif_type, u8 qtype, u8 qver); 354 void ionic_vf_start(struct ionic *ionic); 355 void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver); 356 void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index, 357 dma_addr_t addr); 358 void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index); 359 void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq, 360 u16 lif_index, u16 intr_index); 361 362 int ionic_db_page_num(struct ionic_lif *lif, int pid); 363 364 void ionic_dev_cmd_discover_cmb(struct ionic_dev *idev); 365 void ionic_map_cmb(struct ionic *ionic); 366 367 int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq, 368 struct ionic_intr_info *intr, 369 unsigned int num_descs, size_t desc_size); 370 void ionic_cq_map(struct ionic_cq *cq, void *base, dma_addr_t base_pa); 371 void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q); 372 typedef bool (*ionic_cq_cb)(struct ionic_cq *cq); 373 typedef void (*ionic_cq_done_cb)(void *done_arg); 374 unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do, 375 ionic_cq_cb cb, ionic_cq_done_cb done_cb, 376 void *done_arg); 377 unsigned int ionic_tx_cq_service(struct ionic_cq *cq, 378 unsigned int work_to_do, 379 bool in_napi); 380 381 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev, 382 struct ionic_queue *q, unsigned int index, const char *name, 383 unsigned int num_descs, size_t desc_size, 384 size_t sg_desc_size, unsigned int pid); 385 void ionic_q_post(struct ionic_queue *q, bool ring_doorbell); 386 bool ionic_q_is_posted(struct ionic_queue *q, unsigned int pos); 387 388 int ionic_heartbeat_check(struct ionic *ionic); 389 bool ionic_is_fw_running(struct ionic_dev *idev); 390 void ionic_doorbell_napi_work(struct work_struct *work); 391 void ionic_queue_doorbell_check(struct ionic *ionic, int delay); 392 393 bool ionic_adminq_poke_doorbell(struct ionic_queue *q); 394 bool ionic_txq_poke_doorbell(struct ionic_queue *q); 395 bool ionic_rxq_poke_doorbell(struct ionic_queue *q); 396 397 #endif /* _IONIC_DEV_H_ */ 398