1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #ifndef _IONIC_DEV_H_ 5 #define _IONIC_DEV_H_ 6 7 #include <linux/atomic.h> 8 #include <linux/mutex.h> 9 #include <linux/workqueue.h> 10 #include <linux/skbuff.h> 11 #include <linux/bpf_trace.h> 12 13 #include "ionic_if.h" 14 #include "ionic_regs.h" 15 #include "ionic_api.h" 16 17 #define IONIC_MAX_TX_DESC 8192 18 #define IONIC_MAX_RX_DESC 16384 19 #define IONIC_MIN_TXRX_DESC 64 20 #define IONIC_DEF_TXRX_DESC 1024 21 #define IONIC_RX_FILL_THRESHOLD 16 22 #define IONIC_RX_FILL_DIV 8 23 #define IONIC_TSO_DESCS_NEEDED 44 /* 64K TSO @1500B */ 24 #define IONIC_LIFS_MAX 1024 25 #define IONIC_WATCHDOG_SECS 5 26 #define IONIC_ITR_COAL_USEC_DEFAULT 64 27 28 #define IONIC_DEV_CMD_REG_VERSION 1 29 #define IONIC_DEV_INFO_REG_COUNT 32 30 #define IONIC_DEV_CMD_REG_COUNT 32 31 32 #define IONIC_NAPI_DEADLINE (HZ) /* 1 sec */ 33 #define IONIC_ADMIN_DOORBELL_DEADLINE (HZ / 2) /* 500ms */ 34 #define IONIC_TX_DOORBELL_DEADLINE (HZ / 100) /* 10ms */ 35 #define IONIC_RX_MIN_DOORBELL_DEADLINE (HZ / 100) /* 10ms */ 36 #define IONIC_RX_MAX_DOORBELL_DEADLINE (HZ * 4) /* 4s */ 37 38 #define IONIC_EXPDB_64B_WQE_LG2 6 39 #define IONIC_EXPDB_128B_WQE_LG2 7 40 #define IONIC_EXPDB_256B_WQE_LG2 8 41 #define IONIC_EXPDB_512B_WQE_LG2 9 42 43 struct ionic_dev_bar { 44 void __iomem *vaddr; 45 phys_addr_t bus_addr; 46 unsigned long len; 47 int res_index; 48 }; 49 50 #ifndef __CHECKER__ 51 /* Registers */ 52 static_assert(sizeof(struct ionic_intr) == 32); 53 54 static_assert(sizeof(struct ionic_doorbell) == 8); 55 static_assert(sizeof(struct ionic_intr_status) == 8); 56 static_assert(sizeof(union ionic_dev_regs) == 4096); 57 static_assert(sizeof(union ionic_dev_info_regs) == 2048); 58 static_assert(sizeof(union ionic_dev_cmd_regs) == 2048); 59 static_assert(sizeof(struct ionic_lif_stats) == 1024); 60 61 static_assert(sizeof(struct ionic_admin_cmd) == 64); 62 static_assert(sizeof(struct ionic_admin_comp) == 16); 63 static_assert(sizeof(struct ionic_nop_cmd) == 64); 64 static_assert(sizeof(struct ionic_nop_comp) == 16); 65 66 /* Device commands */ 67 static_assert(sizeof(struct ionic_dev_identify_cmd) == 64); 68 static_assert(sizeof(struct ionic_dev_identify_comp) == 16); 69 static_assert(sizeof(struct ionic_dev_init_cmd) == 64); 70 static_assert(sizeof(struct ionic_dev_init_comp) == 16); 71 static_assert(sizeof(struct ionic_dev_reset_cmd) == 64); 72 static_assert(sizeof(struct ionic_dev_reset_comp) == 16); 73 static_assert(sizeof(struct ionic_dev_getattr_cmd) == 64); 74 static_assert(sizeof(struct ionic_dev_getattr_comp) == 16); 75 static_assert(sizeof(struct ionic_dev_setattr_cmd) == 64); 76 static_assert(sizeof(struct ionic_dev_setattr_comp) == 16); 77 static_assert(sizeof(struct ionic_lif_setphc_cmd) == 64); 78 79 /* Port commands */ 80 static_assert(sizeof(struct ionic_port_identify_cmd) == 64); 81 static_assert(sizeof(struct ionic_port_identify_comp) == 16); 82 static_assert(sizeof(struct ionic_port_init_cmd) == 64); 83 static_assert(sizeof(struct ionic_port_init_comp) == 16); 84 static_assert(sizeof(struct ionic_port_reset_cmd) == 64); 85 static_assert(sizeof(struct ionic_port_reset_comp) == 16); 86 static_assert(sizeof(struct ionic_port_getattr_cmd) == 64); 87 static_assert(sizeof(struct ionic_port_getattr_comp) == 16); 88 static_assert(sizeof(struct ionic_port_setattr_cmd) == 64); 89 static_assert(sizeof(struct ionic_port_setattr_comp) == 16); 90 91 /* LIF commands */ 92 static_assert(sizeof(struct ionic_lif_init_cmd) == 64); 93 static_assert(sizeof(struct ionic_lif_init_comp) == 16); 94 static_assert(sizeof(struct ionic_lif_reset_cmd) == 64); 95 static_assert(sizeof(ionic_lif_reset_comp) == 16); 96 static_assert(sizeof(struct ionic_lif_getattr_cmd) == 64); 97 static_assert(sizeof(struct ionic_lif_getattr_comp) == 16); 98 static_assert(sizeof(struct ionic_lif_setattr_cmd) == 64); 99 static_assert(sizeof(struct ionic_lif_setattr_comp) == 16); 100 101 static_assert(sizeof(struct ionic_q_init_cmd) == 64); 102 static_assert(sizeof(struct ionic_q_init_comp) == 16); 103 static_assert(sizeof(struct ionic_q_control_cmd) == 64); 104 static_assert(sizeof(ionic_q_control_comp) == 16); 105 static_assert(sizeof(struct ionic_q_identify_cmd) == 64); 106 static_assert(sizeof(struct ionic_q_identify_comp) == 16); 107 108 static_assert(sizeof(struct ionic_rx_mode_set_cmd) == 64); 109 static_assert(sizeof(ionic_rx_mode_set_comp) == 16); 110 static_assert(sizeof(struct ionic_rx_filter_add_cmd) == 64); 111 static_assert(sizeof(struct ionic_rx_filter_add_comp) == 16); 112 static_assert(sizeof(struct ionic_rx_filter_del_cmd) == 64); 113 static_assert(sizeof(ionic_rx_filter_del_comp) == 16); 114 115 /* RDMA commands */ 116 static_assert(sizeof(struct ionic_rdma_reset_cmd) == 64); 117 static_assert(sizeof(struct ionic_rdma_queue_cmd) == 64); 118 119 /* Events */ 120 static_assert(sizeof(struct ionic_notifyq_cmd) == 4); 121 static_assert(sizeof(union ionic_notifyq_comp) == 64); 122 static_assert(sizeof(struct ionic_notifyq_event) == 64); 123 static_assert(sizeof(struct ionic_link_change_event) == 64); 124 static_assert(sizeof(struct ionic_reset_event) == 64); 125 static_assert(sizeof(struct ionic_heartbeat_event) == 64); 126 static_assert(sizeof(struct ionic_log_event) == 64); 127 128 /* I/O */ 129 static_assert(sizeof(struct ionic_txq_desc) == 16); 130 static_assert(sizeof(struct ionic_txq_sg_desc) == 128); 131 static_assert(sizeof(struct ionic_txq_sg_desc_v1) == 256); 132 static_assert(sizeof(struct ionic_txq_comp) == 16); 133 134 static_assert(sizeof(struct ionic_rxq_desc) == 16); 135 static_assert(sizeof(struct ionic_rxq_sg_desc) == 128); 136 static_assert(sizeof(struct ionic_rxq_comp) == 16); 137 static_assert(sizeof(struct ionic_rxq_comp) == sizeof(struct ionic_txq_comp)); 138 139 /* SR/IOV */ 140 static_assert(sizeof(struct ionic_vf_setattr_cmd) == 64); 141 static_assert(sizeof(struct ionic_vf_setattr_comp) == 16); 142 static_assert(sizeof(struct ionic_vf_getattr_cmd) == 64); 143 static_assert(sizeof(struct ionic_vf_getattr_comp) == 16); 144 static_assert(sizeof(struct ionic_vf_ctrl_cmd) == 64); 145 static_assert(sizeof(struct ionic_vf_ctrl_comp) == 16); 146 #endif /* __CHECKER__ */ 147 148 struct ionic_devinfo { 149 u8 asic_type; 150 u8 asic_rev; 151 char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN + 1]; 152 char serial_num[IONIC_DEVINFO_SERIAL_BUFLEN + 1]; 153 }; 154 155 struct ionic_dev { 156 union ionic_dev_info_regs __iomem *dev_info_regs; 157 union ionic_dev_cmd_regs __iomem *dev_cmd_regs; 158 struct ionic_hwstamp_regs __iomem *hwstamp_regs; 159 160 atomic_long_t last_check_time; 161 unsigned long last_hb_time; 162 u32 last_fw_hb; 163 bool fw_hb_ready; 164 bool fw_status_ready; 165 u8 fw_generation; 166 u8 opcode; 167 168 u64 __iomem *db_pages; 169 dma_addr_t phy_db_pages; 170 171 struct ionic_intr __iomem *intr_ctrl; 172 u64 __iomem *intr_status; 173 174 struct mutex cmb_inuse_lock; /* for cmb_inuse */ 175 unsigned long *cmb_inuse; 176 dma_addr_t phy_cmb_pages; 177 u32 cmb_npages; 178 179 dma_addr_t phy_cmb_expdb64_pages; 180 dma_addr_t phy_cmb_expdb128_pages; 181 dma_addr_t phy_cmb_expdb256_pages; 182 dma_addr_t phy_cmb_expdb512_pages; 183 184 u32 port_info_sz; 185 struct ionic_port_info *port_info; 186 dma_addr_t port_info_pa; 187 struct ionic_port_extra_stats port_extra_stats_cache; 188 bool link_down_count_init; 189 u16 link_down_count_last; 190 u32 link_down_count_total; 191 192 struct ionic_devinfo dev_info; 193 }; 194 195 struct ionic_queue; 196 struct ionic_qcq; 197 198 #define IONIC_MAX_BUF_LEN ((u16)-1) 199 #define IONIC_PAGE_SIZE MIN(PAGE_SIZE, IONIC_MAX_BUF_LEN) 200 201 #define IONIC_XDP_MAX_LINEAR_MTU (IONIC_PAGE_SIZE - \ 202 (VLAN_ETH_HLEN + \ 203 XDP_PACKET_HEADROOM + \ 204 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))) 205 206 struct ionic_buf_info { 207 struct page *page; 208 dma_addr_t dma_addr; 209 u32 page_offset; 210 u32 len; 211 }; 212 213 #define IONIC_TX_MAX_FRAGS (1 + IONIC_TX_MAX_SG_ELEMS_V1) 214 #define IONIC_RX_MAX_FRAGS (1 + IONIC_RX_MAX_SG_ELEMS) 215 216 struct ionic_tx_desc_info { 217 unsigned int bytes; 218 unsigned int nbufs; 219 struct sk_buff *skb; 220 struct xdp_frame *xdpf; 221 enum xdp_action act; 222 struct ionic_buf_info bufs[MAX_SKB_FRAGS + 1]; 223 }; 224 225 struct ionic_rx_desc_info { 226 unsigned int nbufs; 227 struct ionic_buf_info bufs[IONIC_RX_MAX_FRAGS]; 228 }; 229 230 struct ionic_admin_desc_info { 231 void *ctx; 232 }; 233 234 #define IONIC_QUEUE_NAME_MAX_SZ 16 235 236 struct ionic_queue { 237 struct device *dev; 238 struct ionic_lif *lif; 239 union { 240 void *info; 241 struct ionic_tx_desc_info *tx_info; 242 struct ionic_rx_desc_info *rx_info; 243 struct ionic_admin_desc_info *admin_info; 244 }; 245 u64 dbval; 246 unsigned long dbell_deadline; 247 unsigned long dbell_jiffies; 248 u16 head_idx; 249 u16 tail_idx; 250 unsigned int index; 251 unsigned int num_descs; 252 unsigned int max_sg_elems; 253 254 u64 features; 255 unsigned int hw_type; 256 bool xdp_flush; 257 union { 258 void *base; 259 struct ionic_txq_desc *txq; 260 struct ionic_rxq_desc *rxq; 261 struct ionic_admin_cmd *adminq; 262 }; 263 union { 264 void *sg_base; 265 struct ionic_txq_sg_desc *txq_sgl; 266 struct ionic_txq_sg_desc_v1 *txq_sgl_v1; 267 struct ionic_rxq_sg_desc *rxq_sgl; 268 }; 269 struct xdp_rxq_info *xdp_rxq_info; 270 struct bpf_prog *xdp_prog; 271 struct page_pool *page_pool; 272 struct ionic_queue *partner; 273 274 union { 275 void __iomem *cmb_base; 276 struct ionic_txq_desc __iomem *cmb_txq; 277 struct ionic_rxq_desc __iomem *cmb_rxq; 278 }; 279 unsigned int type; 280 unsigned int hw_index; 281 dma_addr_t base_pa; 282 dma_addr_t cmb_base_pa; 283 dma_addr_t sg_base_pa; 284 u64 drop; 285 unsigned int desc_size; 286 unsigned int sg_desc_size; 287 unsigned int pid; 288 char name[IONIC_QUEUE_NAME_MAX_SZ]; 289 } ____cacheline_aligned_in_smp; 290 291 struct ionic_cq { 292 struct ionic_lif *lif; 293 struct ionic_queue *bound_q; 294 struct ionic_intr_info *bound_intr; 295 u16 tail_idx; 296 bool done_color; 297 unsigned int num_descs; 298 unsigned int desc_size; 299 void *base; 300 dma_addr_t base_pa; 301 struct ionic_dev *idev; 302 } ____cacheline_aligned_in_smp; 303 304 struct ionic; 305 306 static inline void ionic_intr_init(struct ionic_dev *idev, 307 struct ionic_intr_info *intr, 308 unsigned long index) 309 { 310 ionic_intr_clean(idev->intr_ctrl, index); 311 intr->index = index; 312 } 313 314 static inline unsigned int ionic_q_space_avail(struct ionic_queue *q) 315 { 316 unsigned int avail = q->tail_idx; 317 318 if (q->head_idx >= avail) 319 avail += q->num_descs - q->head_idx - 1; 320 else 321 avail -= q->head_idx + 1; 322 323 return avail; 324 } 325 326 static inline bool ionic_q_has_space(struct ionic_queue *q, unsigned int want) 327 { 328 return ionic_q_space_avail(q) >= want; 329 } 330 331 void ionic_init_devinfo(struct ionic *ionic); 332 int ionic_dev_setup(struct ionic *ionic); 333 void ionic_dev_teardown(struct ionic *ionic); 334 335 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd); 336 u8 ionic_dev_cmd_status(struct ionic_dev *idev); 337 bool ionic_dev_cmd_done(struct ionic_dev *idev); 338 void ionic_dev_cmd_comp(struct ionic_dev *idev, union ionic_dev_cmd_comp *comp); 339 340 void ionic_dev_cmd_identify(struct ionic_dev *idev, u8 ver); 341 void ionic_dev_cmd_init(struct ionic_dev *idev); 342 void ionic_dev_cmd_reset(struct ionic_dev *idev); 343 344 void ionic_dev_cmd_port_identify(struct ionic_dev *idev); 345 void ionic_dev_cmd_port_init(struct ionic_dev *idev); 346 void ionic_dev_cmd_port_reset(struct ionic_dev *idev); 347 void ionic_dev_cmd_port_state(struct ionic_dev *idev, u8 state); 348 void ionic_dev_cmd_port_speed(struct ionic_dev *idev, u32 speed); 349 void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable); 350 void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type); 351 void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type); 352 353 int ionic_set_vf_config(struct ionic *ionic, int vf, 354 struct ionic_vf_setattr_cmd *vfc); 355 356 void ionic_dev_cmd_queue_identify(struct ionic_dev *idev, 357 u16 lif_type, u8 qtype, u8 qver); 358 void ionic_vf_start(struct ionic *ionic); 359 void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver); 360 void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index, 361 dma_addr_t addr); 362 void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index); 363 void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq, 364 u16 lif_index, u16 intr_index); 365 366 int ionic_db_page_num(struct ionic_lif *lif, int pid); 367 368 void ionic_dev_cmd_discover_cmb(struct ionic_dev *idev); 369 void ionic_map_cmb(struct ionic *ionic); 370 371 int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq, 372 struct ionic_intr_info *intr, 373 unsigned int num_descs, size_t desc_size); 374 void ionic_cq_map(struct ionic_cq *cq, void *base, dma_addr_t base_pa); 375 void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q); 376 typedef bool (*ionic_cq_cb)(struct ionic_cq *cq); 377 typedef void (*ionic_cq_done_cb)(void *done_arg); 378 unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do, 379 ionic_cq_cb cb, ionic_cq_done_cb done_cb, 380 void *done_arg); 381 unsigned int ionic_tx_cq_service(struct ionic_cq *cq, 382 unsigned int work_to_do, 383 bool in_napi); 384 385 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev, 386 struct ionic_queue *q, unsigned int index, const char *name, 387 unsigned int num_descs, size_t desc_size, 388 size_t sg_desc_size, unsigned int pid); 389 void ionic_q_post(struct ionic_queue *q, bool ring_doorbell); 390 bool ionic_q_is_posted(struct ionic_queue *q, unsigned int pos); 391 392 int ionic_heartbeat_check(struct ionic *ionic); 393 bool ionic_is_fw_running(struct ionic_dev *idev); 394 void ionic_doorbell_napi_work(struct work_struct *work); 395 void ionic_queue_doorbell_check(struct ionic *ionic, int delay); 396 397 bool ionic_adminq_poke_doorbell(struct ionic_queue *q); 398 bool ionic_txq_poke_doorbell(struct ionic_queue *q); 399 bool ionic_rxq_poke_doorbell(struct ionic_queue *q); 400 401 void ionic_reset_link_down_count(struct ionic_dev *idev); 402 403 #endif /* _IONIC_DEV_H_ */ 404