1 /* 2 * Copyright (C) 2015-2017 Netronome Systems, Inc. 3 * 4 * This software is dual licensed under the GNU General License Version 2, 5 * June 1991 as shown in the file COPYING in the top-level directory of this 6 * source tree or the BSD 2-Clause License provided below. You have the 7 * option to license this software under the complete terms of either license. 8 * 9 * The BSD 2-Clause License: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * 2. Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 /* 35 * nfp_net.h 36 * Declarations for Netronome network device driver. 37 * Authors: Jakub Kicinski <jakub.kicinski@netronome.com> 38 * Jason McMullan <jason.mcmullan@netronome.com> 39 * Rolf Neugebauer <rolf.neugebauer@netronome.com> 40 */ 41 42 #ifndef _NFP_NET_H_ 43 #define _NFP_NET_H_ 44 45 #include <linux/interrupt.h> 46 #include <linux/list.h> 47 #include <linux/netdevice.h> 48 #include <linux/pci.h> 49 #include <linux/io-64-nonatomic-hi-lo.h> 50 51 #include "nfp_net_ctrl.h" 52 53 #define nn_err(nn, fmt, args...) netdev_err((nn)->netdev, fmt, ## args) 54 #define nn_warn(nn, fmt, args...) netdev_warn((nn)->netdev, fmt, ## args) 55 #define nn_info(nn, fmt, args...) netdev_info((nn)->netdev, fmt, ## args) 56 #define nn_dbg(nn, fmt, args...) netdev_dbg((nn)->netdev, fmt, ## args) 57 #define nn_warn_ratelimit(nn, fmt, args...) \ 58 do { \ 59 if (unlikely(net_ratelimit())) \ 60 netdev_warn((nn)->netdev, fmt, ## args); \ 61 } while (0) 62 63 /* Max time to wait for NFP to respond on updates (in seconds) */ 64 #define NFP_NET_POLL_TIMEOUT 5 65 66 /* Interval for reading offloaded filter stats */ 67 #define NFP_NET_STAT_POLL_IVL msecs_to_jiffies(100) 68 69 /* Bar allocation */ 70 #define NFP_NET_CTRL_BAR 0 71 #define NFP_NET_Q0_BAR 2 72 #define NFP_NET_Q1_BAR 4 /* OBSOLETE */ 73 74 /* Max bits in DMA address */ 75 #define NFP_NET_MAX_DMA_BITS 40 76 77 /* Default size for MTU and freelist buffer sizes */ 78 #define NFP_NET_DEFAULT_MTU 1500 79 80 /* Maximum number of bytes prepended to a packet */ 81 #define NFP_NET_MAX_PREPEND 64 82 83 /* Interrupt definitions */ 84 #define NFP_NET_NON_Q_VECTORS 2 85 #define NFP_NET_IRQ_LSC_IDX 0 86 #define NFP_NET_IRQ_EXN_IDX 1 87 #define NFP_NET_MIN_PORT_IRQS (NFP_NET_NON_Q_VECTORS + 1) 88 89 /* Queue/Ring definitions */ 90 #define NFP_NET_MAX_TX_RINGS 64 /* Max. # of Tx rings per device */ 91 #define NFP_NET_MAX_RX_RINGS 64 /* Max. # of Rx rings per device */ 92 #define NFP_NET_MAX_R_VECS (NFP_NET_MAX_TX_RINGS > NFP_NET_MAX_RX_RINGS ? \ 93 NFP_NET_MAX_TX_RINGS : NFP_NET_MAX_RX_RINGS) 94 #define NFP_NET_MAX_IRQS (NFP_NET_NON_Q_VECTORS + NFP_NET_MAX_R_VECS) 95 96 #define NFP_NET_MIN_TX_DESCS 256 /* Min. # of Tx descs per ring */ 97 #define NFP_NET_MIN_RX_DESCS 256 /* Min. # of Rx descs per ring */ 98 #define NFP_NET_MAX_TX_DESCS (256 * 1024) /* Max. # of Tx descs per ring */ 99 #define NFP_NET_MAX_RX_DESCS (256 * 1024) /* Max. # of Rx descs per ring */ 100 101 #define NFP_NET_TX_DESCS_DEFAULT 4096 /* Default # of Tx descs per ring */ 102 #define NFP_NET_RX_DESCS_DEFAULT 4096 /* Default # of Rx descs per ring */ 103 104 #define NFP_NET_FL_BATCH 16 /* Add freelist in this Batch size */ 105 106 /* Offload definitions */ 107 #define NFP_NET_N_VXLAN_PORTS (NFP_NET_CFG_VXLAN_SZ / sizeof(__be16)) 108 109 #define NFP_NET_RX_BUF_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN) 110 #define NFP_NET_RX_BUF_NON_DATA (NFP_NET_RX_BUF_HEADROOM + \ 111 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 112 113 /* Forward declarations */ 114 struct nfp_cpp; 115 struct nfp_net; 116 struct nfp_net_r_vector; 117 118 /* Convenience macro for writing dma address into RX/TX descriptors */ 119 #define nfp_desc_set_dma_addr(desc, dma_addr) \ 120 do { \ 121 __typeof(desc) __d = (desc); \ 122 dma_addr_t __addr = (dma_addr); \ 123 \ 124 __d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr)); \ 125 __d->dma_addr_hi = upper_32_bits(__addr) & 0xff; \ 126 } while (0) 127 128 /* TX descriptor format */ 129 130 #define PCIE_DESC_TX_EOP BIT(7) 131 #define PCIE_DESC_TX_OFFSET_MASK GENMASK(6, 0) 132 #define PCIE_DESC_TX_MSS_MASK GENMASK(13, 0) 133 134 /* Flags in the host TX descriptor */ 135 #define PCIE_DESC_TX_CSUM BIT(7) 136 #define PCIE_DESC_TX_IP4_CSUM BIT(6) 137 #define PCIE_DESC_TX_TCP_CSUM BIT(5) 138 #define PCIE_DESC_TX_UDP_CSUM BIT(4) 139 #define PCIE_DESC_TX_VLAN BIT(3) 140 #define PCIE_DESC_TX_LSO BIT(2) 141 #define PCIE_DESC_TX_ENCAP BIT(1) 142 #define PCIE_DESC_TX_O_IP4_CSUM BIT(0) 143 144 struct nfp_net_tx_desc { 145 union { 146 struct { 147 u8 dma_addr_hi; /* High bits of host buf address */ 148 __le16 dma_len; /* Length to DMA for this desc */ 149 u8 offset_eop; /* Offset in buf where pkt starts + 150 * highest bit is eop flag. 151 */ 152 __le32 dma_addr_lo; /* Low 32bit of host buf addr */ 153 154 __le16 mss; /* MSS to be used for LSO */ 155 u8 l4_offset; /* LSO, where the L4 data starts */ 156 u8 flags; /* TX Flags, see @PCIE_DESC_TX_* */ 157 158 __le16 vlan; /* VLAN tag to add if indicated */ 159 __le16 data_len; /* Length of frame + meta data */ 160 } __packed; 161 __le32 vals[4]; 162 }; 163 }; 164 165 /** 166 * struct nfp_net_tx_buf - software TX buffer descriptor 167 * @skb: sk_buff associated with this buffer 168 * @dma_addr: DMA mapping address of the buffer 169 * @fidx: Fragment index (-1 for the head and [0..nr_frags-1] for frags) 170 * @pkt_cnt: Number of packets to be produced out of the skb associated 171 * with this buffer (valid only on the head's buffer). 172 * Will be 1 for all non-TSO packets. 173 * @real_len: Number of bytes which to be produced out of the skb (valid only 174 * on the head's buffer). Equal to skb->len for non-TSO packets. 175 */ 176 struct nfp_net_tx_buf { 177 union { 178 struct sk_buff *skb; 179 void *frag; 180 }; 181 dma_addr_t dma_addr; 182 short int fidx; 183 u16 pkt_cnt; 184 u32 real_len; 185 }; 186 187 /** 188 * struct nfp_net_tx_ring - TX ring structure 189 * @r_vec: Back pointer to ring vector structure 190 * @idx: Ring index from Linux's perspective 191 * @qcidx: Queue Controller Peripheral (QCP) queue index for the TX queue 192 * @qcp_q: Pointer to base of the QCP TX queue 193 * @cnt: Size of the queue in number of descriptors 194 * @wr_p: TX ring write pointer (free running) 195 * @rd_p: TX ring read pointer (free running) 196 * @qcp_rd_p: Local copy of QCP TX queue read pointer 197 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer 198 * (used for .xmit_more delayed kick) 199 * @txbufs: Array of transmitted TX buffers, to free on transmit 200 * @txds: Virtual address of TX ring in host memory 201 * @dma: DMA address of the TX ring 202 * @size: Size, in bytes, of the TX ring (needed to free) 203 */ 204 struct nfp_net_tx_ring { 205 struct nfp_net_r_vector *r_vec; 206 207 u32 idx; 208 int qcidx; 209 u8 __iomem *qcp_q; 210 211 u32 cnt; 212 u32 wr_p; 213 u32 rd_p; 214 u32 qcp_rd_p; 215 216 u32 wr_ptr_add; 217 218 struct nfp_net_tx_buf *txbufs; 219 struct nfp_net_tx_desc *txds; 220 221 dma_addr_t dma; 222 unsigned int size; 223 } ____cacheline_aligned; 224 225 /* RX and freelist descriptor format */ 226 227 #define PCIE_DESC_RX_DD BIT(7) 228 #define PCIE_DESC_RX_META_LEN_MASK GENMASK(6, 0) 229 230 /* Flags in the RX descriptor */ 231 #define PCIE_DESC_RX_RSS cpu_to_le16(BIT(15)) 232 #define PCIE_DESC_RX_I_IP4_CSUM cpu_to_le16(BIT(14)) 233 #define PCIE_DESC_RX_I_IP4_CSUM_OK cpu_to_le16(BIT(13)) 234 #define PCIE_DESC_RX_I_TCP_CSUM cpu_to_le16(BIT(12)) 235 #define PCIE_DESC_RX_I_TCP_CSUM_OK cpu_to_le16(BIT(11)) 236 #define PCIE_DESC_RX_I_UDP_CSUM cpu_to_le16(BIT(10)) 237 #define PCIE_DESC_RX_I_UDP_CSUM_OK cpu_to_le16(BIT(9)) 238 #define PCIE_DESC_RX_BPF cpu_to_le16(BIT(8)) 239 #define PCIE_DESC_RX_EOP cpu_to_le16(BIT(7)) 240 #define PCIE_DESC_RX_IP4_CSUM cpu_to_le16(BIT(6)) 241 #define PCIE_DESC_RX_IP4_CSUM_OK cpu_to_le16(BIT(5)) 242 #define PCIE_DESC_RX_TCP_CSUM cpu_to_le16(BIT(4)) 243 #define PCIE_DESC_RX_TCP_CSUM_OK cpu_to_le16(BIT(3)) 244 #define PCIE_DESC_RX_UDP_CSUM cpu_to_le16(BIT(2)) 245 #define PCIE_DESC_RX_UDP_CSUM_OK cpu_to_le16(BIT(1)) 246 #define PCIE_DESC_RX_VLAN cpu_to_le16(BIT(0)) 247 248 #define PCIE_DESC_RX_CSUM_ALL (PCIE_DESC_RX_IP4_CSUM | \ 249 PCIE_DESC_RX_TCP_CSUM | \ 250 PCIE_DESC_RX_UDP_CSUM | \ 251 PCIE_DESC_RX_I_IP4_CSUM | \ 252 PCIE_DESC_RX_I_TCP_CSUM | \ 253 PCIE_DESC_RX_I_UDP_CSUM) 254 #define PCIE_DESC_RX_CSUM_OK_SHIFT 1 255 #define __PCIE_DESC_RX_CSUM_ALL le16_to_cpu(PCIE_DESC_RX_CSUM_ALL) 256 #define __PCIE_DESC_RX_CSUM_ALL_OK (__PCIE_DESC_RX_CSUM_ALL >> \ 257 PCIE_DESC_RX_CSUM_OK_SHIFT) 258 259 struct nfp_net_rx_desc { 260 union { 261 struct { 262 u8 dma_addr_hi; /* High bits of the buf address */ 263 __le16 reserved; /* Must be zero */ 264 u8 meta_len_dd; /* Must be zero */ 265 266 __le32 dma_addr_lo; /* Low bits of the buffer address */ 267 } __packed fld; 268 269 struct { 270 __le16 data_len; /* Length of the frame + meta data */ 271 u8 reserved; 272 u8 meta_len_dd; /* Length of meta data prepended + 273 * descriptor done flag. 274 */ 275 276 __le16 flags; /* RX flags. See @PCIE_DESC_RX_* */ 277 __le16 vlan; /* VLAN if stripped */ 278 } __packed rxd; 279 280 __le32 vals[2]; 281 }; 282 }; 283 284 #define NFP_NET_META_FIELD_MASK GENMASK(NFP_NET_META_FIELD_SIZE - 1, 0) 285 286 struct nfp_net_rx_hash { 287 __be32 hash_type; 288 __be32 hash; 289 }; 290 291 /** 292 * struct nfp_net_rx_buf - software RX buffer descriptor 293 * @frag: page fragment buffer 294 * @dma_addr: DMA mapping address of the buffer 295 */ 296 struct nfp_net_rx_buf { 297 void *frag; 298 dma_addr_t dma_addr; 299 }; 300 301 /** 302 * struct nfp_net_rx_ring - RX ring structure 303 * @r_vec: Back pointer to ring vector structure 304 * @cnt: Size of the queue in number of descriptors 305 * @wr_p: FL/RX ring write pointer (free running) 306 * @rd_p: FL/RX ring read pointer (free running) 307 * @idx: Ring index from Linux's perspective 308 * @fl_qcidx: Queue Controller Peripheral (QCP) queue index for the freelist 309 * @rx_qcidx: Queue Controller Peripheral (QCP) queue index for the RX queue 310 * @qcp_fl: Pointer to base of the QCP freelist queue 311 * @qcp_rx: Pointer to base of the QCP RX queue 312 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer 313 * (used for free list batching) 314 * @rxbufs: Array of transmitted FL/RX buffers 315 * @rxds: Virtual address of FL/RX ring in host memory 316 * @dma: DMA address of the FL/RX ring 317 * @size: Size, in bytes, of the FL/RX ring (needed to free) 318 * @bufsz: Buffer allocation size for convenience of management routines 319 * (NOTE: this is in second cache line, do not use on fast path!) 320 */ 321 struct nfp_net_rx_ring { 322 struct nfp_net_r_vector *r_vec; 323 324 u32 cnt; 325 u32 wr_p; 326 u32 rd_p; 327 328 u16 idx; 329 u16 wr_ptr_add; 330 331 int fl_qcidx; 332 int rx_qcidx; 333 u8 __iomem *qcp_fl; 334 u8 __iomem *qcp_rx; 335 336 struct nfp_net_rx_buf *rxbufs; 337 struct nfp_net_rx_desc *rxds; 338 339 dma_addr_t dma; 340 unsigned int size; 341 unsigned int bufsz; 342 } ____cacheline_aligned; 343 344 /** 345 * struct nfp_net_r_vector - Per ring interrupt vector configuration 346 * @nfp_net: Backpointer to nfp_net structure 347 * @napi: NAPI structure for this ring vec 348 * @tx_ring: Pointer to TX ring 349 * @rx_ring: Pointer to RX ring 350 * @xdp_ring: Pointer to an extra TX ring for XDP 351 * @irq_entry: MSI-X table entry (use for talking to the device) 352 * @rx_sync: Seqlock for atomic updates of RX stats 353 * @rx_pkts: Number of received packets 354 * @rx_bytes: Number of received bytes 355 * @rx_drops: Number of packets dropped on RX due to lack of resources 356 * @hw_csum_rx_ok: Counter of packets where the HW checksum was OK 357 * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK 358 * @hw_csum_rx_error: Counter of packets with bad checksums 359 * @tx_sync: Seqlock for atomic updates of TX stats 360 * @tx_pkts: Number of Transmitted packets 361 * @tx_bytes: Number of Transmitted bytes 362 * @hw_csum_tx: Counter of packets with TX checksum offload requested 363 * @hw_csum_tx_inner: Counter of inner TX checksum offload requests 364 * @tx_gather: Counter of packets with Gather DMA 365 * @tx_lso: Counter of LSO packets sent 366 * @tx_errors: How many TX errors were encountered 367 * @tx_busy: How often was TX busy (no space)? 368 * @irq_vector: Interrupt vector number (use for talking to the OS) 369 * @handler: Interrupt handler for this ring vector 370 * @name: Name of the interrupt vector 371 * @affinity_mask: SMP affinity mask for this vector 372 * 373 * This structure ties RX and TX rings to interrupt vectors and a NAPI 374 * context. This currently only supports one RX and TX ring per 375 * interrupt vector but might be extended in the future to allow 376 * association of multiple rings per vector. 377 */ 378 struct nfp_net_r_vector { 379 struct nfp_net *nfp_net; 380 struct napi_struct napi; 381 382 struct nfp_net_tx_ring *tx_ring; 383 struct nfp_net_rx_ring *rx_ring; 384 385 u16 irq_entry; 386 387 struct u64_stats_sync rx_sync; 388 u64 rx_pkts; 389 u64 rx_bytes; 390 u64 rx_drops; 391 u64 hw_csum_rx_ok; 392 u64 hw_csum_rx_inner_ok; 393 u64 hw_csum_rx_error; 394 395 struct nfp_net_tx_ring *xdp_ring; 396 397 struct u64_stats_sync tx_sync; 398 u64 tx_pkts; 399 u64 tx_bytes; 400 u64 hw_csum_tx; 401 u64 hw_csum_tx_inner; 402 u64 tx_gather; 403 u64 tx_lso; 404 u64 tx_errors; 405 u64 tx_busy; 406 407 u32 irq_vector; 408 irq_handler_t handler; 409 char name[IFNAMSIZ + 8]; 410 cpumask_t affinity_mask; 411 } ____cacheline_aligned; 412 413 /* Firmware version as it is written in the 32bit value in the BAR */ 414 struct nfp_net_fw_version { 415 u8 minor; 416 u8 major; 417 u8 class; 418 u8 resv; 419 } __packed; 420 421 static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver, 422 u8 resv, u8 class, u8 major, u8 minor) 423 { 424 return fw_ver->resv == resv && 425 fw_ver->class == class && 426 fw_ver->major == major && 427 fw_ver->minor == minor; 428 } 429 430 struct nfp_stat_pair { 431 u64 pkts; 432 u64 bytes; 433 }; 434 435 /** 436 * struct nfp_net - NFP network device structure 437 * @pdev: Backpointer to PCI device 438 * @netdev: Backpointer to net_device structure 439 * @is_vf: Is the driver attached to a VF? 440 * @bpf_offload_skip_sw: Offloaded BPF program will not be rerun by cls_bpf 441 * @bpf_offload_xdp: Offloaded BPF program is XDP 442 * @ctrl: Local copy of the control register/word. 443 * @fl_bufsz: Currently configured size of the freelist buffers 444 * @rx_offset: Offset in the RX buffers where packet data starts 445 * @xdp_prog: Installed XDP program 446 * @fw_ver: Firmware version 447 * @cap: Capabilities advertised by the Firmware 448 * @max_mtu: Maximum support MTU advertised by the Firmware 449 * @rss_cfg: RSS configuration 450 * @rss_key: RSS secret key 451 * @rss_itbl: RSS indirection table 452 * @rx_filter: Filter offload statistics - dropped packets/bytes 453 * @rx_filter_prev: Filter offload statistics - values from previous update 454 * @rx_filter_change: Jiffies when statistics last changed 455 * @rx_filter_stats_timer: Timer for polling filter offload statistics 456 * @rx_filter_lock: Lock protecting timer state changes (teardown) 457 * @max_tx_rings: Maximum number of TX rings supported by the Firmware 458 * @max_rx_rings: Maximum number of RX rings supported by the Firmware 459 * @num_tx_rings: Currently configured number of TX rings 460 * @num_stack_tx_rings: Number of TX rings used by the stack (not XDP) 461 * @num_rx_rings: Currently configured number of RX rings 462 * @txd_cnt: Size of the TX ring in number of descriptors 463 * @rxd_cnt: Size of the RX ring in number of descriptors 464 * @tx_rings: Array of pre-allocated TX ring structures 465 * @rx_rings: Array of pre-allocated RX ring structures 466 * @max_r_vecs: Number of allocated interrupt vectors for RX/TX 467 * @num_r_vecs: Number of used ring vectors 468 * @r_vecs: Pre-allocated array of ring vectors 469 * @irq_entries: Pre-allocated array of MSI-X entries 470 * @lsc_handler: Handler for Link State Change interrupt 471 * @lsc_name: Name for Link State Change interrupt 472 * @exn_handler: Handler for Exception interrupt 473 * @exn_name: Name for Exception interrupt 474 * @shared_handler: Handler for shared interrupts 475 * @shared_name: Name for shared interrupt 476 * @me_freq_mhz: ME clock_freq (MHz) 477 * @reconfig_lock: Protects HW reconfiguration request regs/machinery 478 * @reconfig_posted: Pending reconfig bits coming from async sources 479 * @reconfig_timer_active: Timer for reading reconfiguration results is pending 480 * @reconfig_sync_present: Some thread is performing synchronous reconfig 481 * @reconfig_timer: Timer for async reading of reconfig results 482 * @link_up: Is the link up? 483 * @link_status_lock: Protects @link_up and ensures atomicity with BAR reading 484 * @rx_coalesce_usecs: RX interrupt moderation usecs delay parameter 485 * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter 486 * @tx_coalesce_usecs: TX interrupt moderation usecs delay parameter 487 * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter 488 * @vxlan_ports: VXLAN ports for RX inner csum offload communicated to HW 489 * @vxlan_usecnt: IPv4/IPv6 VXLAN port use counts 490 * @qcp_cfg: Pointer to QCP queue used for configuration notification 491 * @ctrl_bar: Pointer to mapped control BAR 492 * @tx_bar: Pointer to mapped TX queues 493 * @rx_bar: Pointer to mapped FL/RX queues 494 * @debugfs_dir: Device directory in debugfs 495 * @ethtool_dump_flag: Ethtool dump flag 496 * @port_list: Entry on device port list 497 * @cpp: CPP device handle if available 498 */ 499 struct nfp_net { 500 struct pci_dev *pdev; 501 struct net_device *netdev; 502 503 unsigned is_vf:1; 504 unsigned bpf_offload_skip_sw:1; 505 unsigned bpf_offload_xdp:1; 506 507 u32 ctrl; 508 u32 fl_bufsz; 509 510 u32 rx_offset; 511 512 struct bpf_prog *xdp_prog; 513 514 struct nfp_net_tx_ring *tx_rings; 515 struct nfp_net_rx_ring *rx_rings; 516 517 struct nfp_net_fw_version fw_ver; 518 u32 cap; 519 u32 max_mtu; 520 521 u32 rss_cfg; 522 u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ]; 523 u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ]; 524 525 struct nfp_stat_pair rx_filter, rx_filter_prev; 526 unsigned long rx_filter_change; 527 struct timer_list rx_filter_stats_timer; 528 spinlock_t rx_filter_lock; 529 530 unsigned int max_tx_rings; 531 unsigned int max_rx_rings; 532 533 unsigned int num_tx_rings; 534 unsigned int num_stack_tx_rings; 535 unsigned int num_rx_rings; 536 537 int stride_tx; 538 int stride_rx; 539 540 int txd_cnt; 541 int rxd_cnt; 542 543 unsigned int max_r_vecs; 544 unsigned int num_r_vecs; 545 struct nfp_net_r_vector r_vecs[NFP_NET_MAX_R_VECS]; 546 struct msix_entry irq_entries[NFP_NET_MAX_IRQS]; 547 548 irq_handler_t lsc_handler; 549 char lsc_name[IFNAMSIZ + 8]; 550 551 irq_handler_t exn_handler; 552 char exn_name[IFNAMSIZ + 8]; 553 554 irq_handler_t shared_handler; 555 char shared_name[IFNAMSIZ + 8]; 556 557 u32 me_freq_mhz; 558 559 bool link_up; 560 spinlock_t link_status_lock; 561 562 spinlock_t reconfig_lock; 563 u32 reconfig_posted; 564 bool reconfig_timer_active; 565 bool reconfig_sync_present; 566 struct timer_list reconfig_timer; 567 568 u32 rx_coalesce_usecs; 569 u32 rx_coalesce_max_frames; 570 u32 tx_coalesce_usecs; 571 u32 tx_coalesce_max_frames; 572 573 __be16 vxlan_ports[NFP_NET_N_VXLAN_PORTS]; 574 u8 vxlan_usecnt[NFP_NET_N_VXLAN_PORTS]; 575 576 u8 __iomem *qcp_cfg; 577 578 u8 __iomem *ctrl_bar; 579 u8 __iomem *tx_bar; 580 u8 __iomem *rx_bar; 581 582 struct dentry *debugfs_dir; 583 u32 ethtool_dump_flag; 584 585 struct list_head port_list; 586 587 struct nfp_cpp *cpp; 588 }; 589 590 struct nfp_net_ring_set { 591 unsigned int n_rings; 592 unsigned int mtu; 593 unsigned int dcnt; 594 void *rings; 595 }; 596 597 /* Functions to read/write from/to a BAR 598 * Performs any endian conversion necessary. 599 */ 600 static inline u16 nn_readb(struct nfp_net *nn, int off) 601 { 602 return readb(nn->ctrl_bar + off); 603 } 604 605 static inline void nn_writeb(struct nfp_net *nn, int off, u8 val) 606 { 607 writeb(val, nn->ctrl_bar + off); 608 } 609 610 static inline u16 nn_readw(struct nfp_net *nn, int off) 611 { 612 return readw(nn->ctrl_bar + off); 613 } 614 615 static inline void nn_writew(struct nfp_net *nn, int off, u16 val) 616 { 617 writew(val, nn->ctrl_bar + off); 618 } 619 620 static inline u32 nn_readl(struct nfp_net *nn, int off) 621 { 622 return readl(nn->ctrl_bar + off); 623 } 624 625 static inline void nn_writel(struct nfp_net *nn, int off, u32 val) 626 { 627 writel(val, nn->ctrl_bar + off); 628 } 629 630 static inline u64 nn_readq(struct nfp_net *nn, int off) 631 { 632 return readq(nn->ctrl_bar + off); 633 } 634 635 static inline void nn_writeq(struct nfp_net *nn, int off, u64 val) 636 { 637 writeq(val, nn->ctrl_bar + off); 638 } 639 640 /* Flush posted PCI writes by reading something without side effects */ 641 static inline void nn_pci_flush(struct nfp_net *nn) 642 { 643 nn_readl(nn, NFP_NET_CFG_VERSION); 644 } 645 646 /* Queue Controller Peripheral access functions and definitions. 647 * 648 * Some of the BARs of the NFP are mapped to portions of the Queue 649 * Controller Peripheral (QCP) address space on the NFP. A QCP queue 650 * has a read and a write pointer (as well as a size and flags, 651 * indicating overflow etc). The QCP offers a number of different 652 * operation on queue pointers, but here we only offer function to 653 * either add to a pointer or to read the pointer value. 654 */ 655 #define NFP_QCP_QUEUE_ADDR_SZ 0x800 656 #define NFP_QCP_QUEUE_OFF(_x) ((_x) * NFP_QCP_QUEUE_ADDR_SZ) 657 #define NFP_QCP_QUEUE_ADD_RPTR 0x0000 658 #define NFP_QCP_QUEUE_ADD_WPTR 0x0004 659 #define NFP_QCP_QUEUE_STS_LO 0x0008 660 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask 0x3ffff 661 #define NFP_QCP_QUEUE_STS_HI 0x000c 662 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask 0x3ffff 663 664 /* The offset of a QCP queues in the PCIe Target */ 665 #define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff))) 666 667 /* nfp_qcp_ptr - Read or Write Pointer of a queue */ 668 enum nfp_qcp_ptr { 669 NFP_QCP_READ_PTR = 0, 670 NFP_QCP_WRITE_PTR 671 }; 672 673 /* There appear to be an *undocumented* upper limit on the value which 674 * one can add to a queue and that value is either 0x3f or 0x7f. We 675 * go with 0x3f as a conservative measure. 676 */ 677 #define NFP_QCP_MAX_ADD 0x3f 678 679 static inline void _nfp_qcp_ptr_add(u8 __iomem *q, 680 enum nfp_qcp_ptr ptr, u32 val) 681 { 682 u32 off; 683 684 if (ptr == NFP_QCP_READ_PTR) 685 off = NFP_QCP_QUEUE_ADD_RPTR; 686 else 687 off = NFP_QCP_QUEUE_ADD_WPTR; 688 689 while (val > NFP_QCP_MAX_ADD) { 690 writel(NFP_QCP_MAX_ADD, q + off); 691 val -= NFP_QCP_MAX_ADD; 692 } 693 694 writel(val, q + off); 695 } 696 697 /** 698 * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue 699 * 700 * @q: Base address for queue structure 701 * @val: Value to add to the queue pointer 702 * 703 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed. 704 */ 705 static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val) 706 { 707 _nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val); 708 } 709 710 /** 711 * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue 712 * 713 * @q: Base address for queue structure 714 * @val: Value to add to the queue pointer 715 * 716 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed. 717 */ 718 static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val) 719 { 720 _nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val); 721 } 722 723 static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr) 724 { 725 u32 off; 726 u32 val; 727 728 if (ptr == NFP_QCP_READ_PTR) 729 off = NFP_QCP_QUEUE_STS_LO; 730 else 731 off = NFP_QCP_QUEUE_STS_HI; 732 733 val = readl(q + off); 734 735 if (ptr == NFP_QCP_READ_PTR) 736 return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask; 737 else 738 return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask; 739 } 740 741 /** 742 * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue 743 * @q: Base address for queue structure 744 * 745 * Return: Value read. 746 */ 747 static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q) 748 { 749 return _nfp_qcp_read(q, NFP_QCP_READ_PTR); 750 } 751 752 /** 753 * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue 754 * @q: Base address for queue structure 755 * 756 * Return: Value read. 757 */ 758 static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q) 759 { 760 return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR); 761 } 762 763 /* Globals */ 764 extern const char nfp_driver_version[]; 765 766 /* Prototypes */ 767 void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver, 768 void __iomem *ctrl_bar); 769 770 struct nfp_net * 771 nfp_net_netdev_alloc(struct pci_dev *pdev, 772 unsigned int max_tx_rings, unsigned int max_rx_rings); 773 void nfp_net_netdev_free(struct nfp_net *nn); 774 int nfp_net_netdev_init(struct net_device *netdev); 775 void nfp_net_netdev_clean(struct net_device *netdev); 776 void nfp_net_set_ethtool_ops(struct net_device *netdev); 777 void nfp_net_info(struct nfp_net *nn); 778 int nfp_net_reconfig(struct nfp_net *nn, u32 update); 779 void nfp_net_rss_write_itbl(struct nfp_net *nn); 780 void nfp_net_rss_write_key(struct nfp_net *nn); 781 void nfp_net_coalesce_write_cfg(struct nfp_net *nn); 782 783 unsigned int 784 nfp_net_irqs_alloc(struct pci_dev *pdev, struct msix_entry *irq_entries, 785 unsigned int min_irqs, unsigned int want_irqs); 786 void nfp_net_irqs_disable(struct pci_dev *pdev); 787 void 788 nfp_net_irqs_assign(struct nfp_net *nn, struct msix_entry *irq_entries, 789 unsigned int n); 790 int 791 nfp_net_ring_reconfig(struct nfp_net *nn, struct bpf_prog **xdp_prog, 792 struct nfp_net_ring_set *rx, struct nfp_net_ring_set *tx); 793 794 #ifdef CONFIG_NFP_DEBUG 795 void nfp_net_debugfs_create(void); 796 void nfp_net_debugfs_destroy(void); 797 struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev); 798 void nfp_net_debugfs_port_add(struct nfp_net *nn, struct dentry *ddir, int id); 799 void nfp_net_debugfs_dir_clean(struct dentry **dir); 800 #else 801 static inline void nfp_net_debugfs_create(void) 802 { 803 } 804 805 static inline void nfp_net_debugfs_destroy(void) 806 { 807 } 808 809 static inline struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev) 810 { 811 return NULL; 812 } 813 814 static inline void 815 nfp_net_debugfs_port_add(struct nfp_net *nn, struct dentry *ddir, int id) 816 { 817 } 818 819 static inline void nfp_net_debugfs_dir_clean(struct dentry **dir) 820 { 821 } 822 #endif /* CONFIG_NFP_DEBUG */ 823 824 void nfp_net_filter_stats_timer(unsigned long data); 825 int nfp_net_bpf_offload(struct nfp_net *nn, struct tc_cls_bpf_offload *cls_bpf); 826 827 #endif /* _NFP_NET_H_ */ 828