1 /* 2 * Copyright (C) 2015-2017 Netronome Systems, Inc. 3 * 4 * This software is dual licensed under the GNU General License Version 2, 5 * June 1991 as shown in the file COPYING in the top-level directory of this 6 * source tree or the BSD 2-Clause License provided below. You have the 7 * option to license this software under the complete terms of either license. 8 * 9 * The BSD 2-Clause License: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * 2. Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 /* 35 * nfp_net.h 36 * Declarations for Netronome network device driver. 37 * Authors: Jakub Kicinski <jakub.kicinski@netronome.com> 38 * Jason McMullan <jason.mcmullan@netronome.com> 39 * Rolf Neugebauer <rolf.neugebauer@netronome.com> 40 */ 41 42 #ifndef _NFP_NET_H_ 43 #define _NFP_NET_H_ 44 45 #include <linux/interrupt.h> 46 #include <linux/list.h> 47 #include <linux/netdevice.h> 48 #include <linux/pci.h> 49 #include <linux/io-64-nonatomic-hi-lo.h> 50 #include <net/xdp.h> 51 52 #include "nfp_net_ctrl.h" 53 54 #define nn_pr(nn, lvl, fmt, args...) \ 55 ({ \ 56 struct nfp_net *__nn = (nn); \ 57 \ 58 if (__nn->dp.netdev) \ 59 netdev_printk(lvl, __nn->dp.netdev, fmt, ## args); \ 60 else \ 61 dev_printk(lvl, __nn->dp.dev, "ctrl: " fmt, ## args); \ 62 }) 63 64 #define nn_err(nn, fmt, args...) nn_pr(nn, KERN_ERR, fmt, ## args) 65 #define nn_warn(nn, fmt, args...) nn_pr(nn, KERN_WARNING, fmt, ## args) 66 #define nn_info(nn, fmt, args...) nn_pr(nn, KERN_INFO, fmt, ## args) 67 #define nn_dbg(nn, fmt, args...) nn_pr(nn, KERN_DEBUG, fmt, ## args) 68 69 #define nn_dp_warn(dp, fmt, args...) \ 70 ({ \ 71 struct nfp_net_dp *__dp = (dp); \ 72 \ 73 if (unlikely(net_ratelimit())) { \ 74 if (__dp->netdev) \ 75 netdev_warn(__dp->netdev, fmt, ## args); \ 76 else \ 77 dev_warn(__dp->dev, fmt, ## args); \ 78 } \ 79 }) 80 81 /* Max time to wait for NFP to respond on updates (in seconds) */ 82 #define NFP_NET_POLL_TIMEOUT 5 83 84 /* Interval for reading offloaded filter stats */ 85 #define NFP_NET_STAT_POLL_IVL msecs_to_jiffies(100) 86 87 /* Bar allocation */ 88 #define NFP_NET_CTRL_BAR 0 89 #define NFP_NET_Q0_BAR 2 90 #define NFP_NET_Q1_BAR 4 /* OBSOLETE */ 91 92 /* Max bits in DMA address */ 93 #define NFP_NET_MAX_DMA_BITS 40 94 95 /* Default size for MTU and freelist buffer sizes */ 96 #define NFP_NET_DEFAULT_MTU 1500 97 98 /* Maximum number of bytes prepended to a packet */ 99 #define NFP_NET_MAX_PREPEND 64 100 101 /* Interrupt definitions */ 102 #define NFP_NET_NON_Q_VECTORS 2 103 #define NFP_NET_IRQ_LSC_IDX 0 104 #define NFP_NET_IRQ_EXN_IDX 1 105 #define NFP_NET_MIN_VNIC_IRQS (NFP_NET_NON_Q_VECTORS + 1) 106 107 /* Queue/Ring definitions */ 108 #define NFP_NET_MAX_TX_RINGS 64 /* Max. # of Tx rings per device */ 109 #define NFP_NET_MAX_RX_RINGS 64 /* Max. # of Rx rings per device */ 110 #define NFP_NET_MAX_R_VECS (NFP_NET_MAX_TX_RINGS > NFP_NET_MAX_RX_RINGS ? \ 111 NFP_NET_MAX_TX_RINGS : NFP_NET_MAX_RX_RINGS) 112 #define NFP_NET_MAX_IRQS (NFP_NET_NON_Q_VECTORS + NFP_NET_MAX_R_VECS) 113 114 #define NFP_NET_MIN_TX_DESCS 256 /* Min. # of Tx descs per ring */ 115 #define NFP_NET_MIN_RX_DESCS 256 /* Min. # of Rx descs per ring */ 116 #define NFP_NET_MAX_TX_DESCS (256 * 1024) /* Max. # of Tx descs per ring */ 117 #define NFP_NET_MAX_RX_DESCS (256 * 1024) /* Max. # of Rx descs per ring */ 118 119 #define NFP_NET_TX_DESCS_DEFAULT 4096 /* Default # of Tx descs per ring */ 120 #define NFP_NET_RX_DESCS_DEFAULT 4096 /* Default # of Rx descs per ring */ 121 122 #define NFP_NET_FL_BATCH 16 /* Add freelist in this Batch size */ 123 #define NFP_NET_XDP_MAX_COMPLETE 2048 /* XDP bufs to reclaim in NAPI poll */ 124 125 /* Offload definitions */ 126 #define NFP_NET_N_VXLAN_PORTS (NFP_NET_CFG_VXLAN_SZ / sizeof(__be16)) 127 128 #define NFP_NET_RX_BUF_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN) 129 #define NFP_NET_RX_BUF_NON_DATA (NFP_NET_RX_BUF_HEADROOM + \ 130 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 131 132 /* Forward declarations */ 133 struct nfp_cpp; 134 struct nfp_eth_table_port; 135 struct nfp_net; 136 struct nfp_net_r_vector; 137 struct nfp_port; 138 139 /* Convenience macro for wrapping descriptor index on ring size */ 140 #define D_IDX(ring, idx) ((idx) & ((ring)->cnt - 1)) 141 142 /* Convenience macro for writing dma address into RX/TX descriptors */ 143 #define nfp_desc_set_dma_addr(desc, dma_addr) \ 144 do { \ 145 __typeof(desc) __d = (desc); \ 146 dma_addr_t __addr = (dma_addr); \ 147 \ 148 __d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr)); \ 149 __d->dma_addr_hi = upper_32_bits(__addr) & 0xff; \ 150 } while (0) 151 152 /* TX descriptor format */ 153 154 #define PCIE_DESC_TX_EOP BIT(7) 155 #define PCIE_DESC_TX_OFFSET_MASK GENMASK(6, 0) 156 #define PCIE_DESC_TX_MSS_MASK GENMASK(13, 0) 157 158 /* Flags in the host TX descriptor */ 159 #define PCIE_DESC_TX_CSUM BIT(7) 160 #define PCIE_DESC_TX_IP4_CSUM BIT(6) 161 #define PCIE_DESC_TX_TCP_CSUM BIT(5) 162 #define PCIE_DESC_TX_UDP_CSUM BIT(4) 163 #define PCIE_DESC_TX_VLAN BIT(3) 164 #define PCIE_DESC_TX_LSO BIT(2) 165 #define PCIE_DESC_TX_ENCAP BIT(1) 166 #define PCIE_DESC_TX_O_IP4_CSUM BIT(0) 167 168 struct nfp_net_tx_desc { 169 union { 170 struct { 171 u8 dma_addr_hi; /* High bits of host buf address */ 172 __le16 dma_len; /* Length to DMA for this desc */ 173 u8 offset_eop; /* Offset in buf where pkt starts + 174 * highest bit is eop flag. 175 */ 176 __le32 dma_addr_lo; /* Low 32bit of host buf addr */ 177 178 __le16 mss; /* MSS to be used for LSO */ 179 u8 lso_hdrlen; /* LSO, TCP payload offset */ 180 u8 flags; /* TX Flags, see @PCIE_DESC_TX_* */ 181 union { 182 struct { 183 u8 l3_offset; /* L3 header offset */ 184 u8 l4_offset; /* L4 header offset */ 185 }; 186 __le16 vlan; /* VLAN tag to add if indicated */ 187 }; 188 __le16 data_len; /* Length of frame + meta data */ 189 } __packed; 190 __le32 vals[4]; 191 }; 192 }; 193 194 /** 195 * struct nfp_net_tx_buf - software TX buffer descriptor 196 * @skb: sk_buff associated with this buffer 197 * @dma_addr: DMA mapping address of the buffer 198 * @fidx: Fragment index (-1 for the head and [0..nr_frags-1] for frags) 199 * @pkt_cnt: Number of packets to be produced out of the skb associated 200 * with this buffer (valid only on the head's buffer). 201 * Will be 1 for all non-TSO packets. 202 * @real_len: Number of bytes which to be produced out of the skb (valid only 203 * on the head's buffer). Equal to skb->len for non-TSO packets. 204 */ 205 struct nfp_net_tx_buf { 206 union { 207 struct sk_buff *skb; 208 void *frag; 209 }; 210 dma_addr_t dma_addr; 211 short int fidx; 212 u16 pkt_cnt; 213 u32 real_len; 214 }; 215 216 /** 217 * struct nfp_net_tx_ring - TX ring structure 218 * @r_vec: Back pointer to ring vector structure 219 * @idx: Ring index from Linux's perspective 220 * @qcidx: Queue Controller Peripheral (QCP) queue index for the TX queue 221 * @qcp_q: Pointer to base of the QCP TX queue 222 * @cnt: Size of the queue in number of descriptors 223 * @wr_p: TX ring write pointer (free running) 224 * @rd_p: TX ring read pointer (free running) 225 * @qcp_rd_p: Local copy of QCP TX queue read pointer 226 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer 227 * (used for .xmit_more delayed kick) 228 * @txbufs: Array of transmitted TX buffers, to free on transmit 229 * @txds: Virtual address of TX ring in host memory 230 * @dma: DMA address of the TX ring 231 * @size: Size, in bytes, of the TX ring (needed to free) 232 * @is_xdp: Is this a XDP TX ring? 233 */ 234 struct nfp_net_tx_ring { 235 struct nfp_net_r_vector *r_vec; 236 237 u32 idx; 238 int qcidx; 239 u8 __iomem *qcp_q; 240 241 u32 cnt; 242 u32 wr_p; 243 u32 rd_p; 244 u32 qcp_rd_p; 245 246 u32 wr_ptr_add; 247 248 struct nfp_net_tx_buf *txbufs; 249 struct nfp_net_tx_desc *txds; 250 251 dma_addr_t dma; 252 unsigned int size; 253 bool is_xdp; 254 } ____cacheline_aligned; 255 256 /* RX and freelist descriptor format */ 257 258 #define PCIE_DESC_RX_DD BIT(7) 259 #define PCIE_DESC_RX_META_LEN_MASK GENMASK(6, 0) 260 261 /* Flags in the RX descriptor */ 262 #define PCIE_DESC_RX_RSS cpu_to_le16(BIT(15)) 263 #define PCIE_DESC_RX_I_IP4_CSUM cpu_to_le16(BIT(14)) 264 #define PCIE_DESC_RX_I_IP4_CSUM_OK cpu_to_le16(BIT(13)) 265 #define PCIE_DESC_RX_I_TCP_CSUM cpu_to_le16(BIT(12)) 266 #define PCIE_DESC_RX_I_TCP_CSUM_OK cpu_to_le16(BIT(11)) 267 #define PCIE_DESC_RX_I_UDP_CSUM cpu_to_le16(BIT(10)) 268 #define PCIE_DESC_RX_I_UDP_CSUM_OK cpu_to_le16(BIT(9)) 269 #define PCIE_DESC_RX_BPF cpu_to_le16(BIT(8)) 270 #define PCIE_DESC_RX_EOP cpu_to_le16(BIT(7)) 271 #define PCIE_DESC_RX_IP4_CSUM cpu_to_le16(BIT(6)) 272 #define PCIE_DESC_RX_IP4_CSUM_OK cpu_to_le16(BIT(5)) 273 #define PCIE_DESC_RX_TCP_CSUM cpu_to_le16(BIT(4)) 274 #define PCIE_DESC_RX_TCP_CSUM_OK cpu_to_le16(BIT(3)) 275 #define PCIE_DESC_RX_UDP_CSUM cpu_to_le16(BIT(2)) 276 #define PCIE_DESC_RX_UDP_CSUM_OK cpu_to_le16(BIT(1)) 277 #define PCIE_DESC_RX_VLAN cpu_to_le16(BIT(0)) 278 279 #define PCIE_DESC_RX_CSUM_ALL (PCIE_DESC_RX_IP4_CSUM | \ 280 PCIE_DESC_RX_TCP_CSUM | \ 281 PCIE_DESC_RX_UDP_CSUM | \ 282 PCIE_DESC_RX_I_IP4_CSUM | \ 283 PCIE_DESC_RX_I_TCP_CSUM | \ 284 PCIE_DESC_RX_I_UDP_CSUM) 285 #define PCIE_DESC_RX_CSUM_OK_SHIFT 1 286 #define __PCIE_DESC_RX_CSUM_ALL le16_to_cpu(PCIE_DESC_RX_CSUM_ALL) 287 #define __PCIE_DESC_RX_CSUM_ALL_OK (__PCIE_DESC_RX_CSUM_ALL >> \ 288 PCIE_DESC_RX_CSUM_OK_SHIFT) 289 290 struct nfp_net_rx_desc { 291 union { 292 struct { 293 u8 dma_addr_hi; /* High bits of the buf address */ 294 __le16 reserved; /* Must be zero */ 295 u8 meta_len_dd; /* Must be zero */ 296 297 __le32 dma_addr_lo; /* Low bits of the buffer address */ 298 } __packed fld; 299 300 struct { 301 __le16 data_len; /* Length of the frame + meta data */ 302 u8 reserved; 303 u8 meta_len_dd; /* Length of meta data prepended + 304 * descriptor done flag. 305 */ 306 307 __le16 flags; /* RX flags. See @PCIE_DESC_RX_* */ 308 __le16 vlan; /* VLAN if stripped */ 309 } __packed rxd; 310 311 __le32 vals[2]; 312 }; 313 }; 314 315 #define NFP_NET_META_FIELD_MASK GENMASK(NFP_NET_META_FIELD_SIZE - 1, 0) 316 317 struct nfp_meta_parsed { 318 u8 hash_type; 319 u8 csum_type; 320 u32 hash; 321 u32 mark; 322 u32 portid; 323 __wsum csum; 324 }; 325 326 struct nfp_net_rx_hash { 327 __be32 hash_type; 328 __be32 hash; 329 }; 330 331 /** 332 * struct nfp_net_rx_buf - software RX buffer descriptor 333 * @frag: page fragment buffer 334 * @dma_addr: DMA mapping address of the buffer 335 */ 336 struct nfp_net_rx_buf { 337 void *frag; 338 dma_addr_t dma_addr; 339 }; 340 341 /** 342 * struct nfp_net_rx_ring - RX ring structure 343 * @r_vec: Back pointer to ring vector structure 344 * @cnt: Size of the queue in number of descriptors 345 * @wr_p: FL/RX ring write pointer (free running) 346 * @rd_p: FL/RX ring read pointer (free running) 347 * @idx: Ring index from Linux's perspective 348 * @fl_qcidx: Queue Controller Peripheral (QCP) queue index for the freelist 349 * @qcp_fl: Pointer to base of the QCP freelist queue 350 * @rxbufs: Array of transmitted FL/RX buffers 351 * @rxds: Virtual address of FL/RX ring in host memory 352 * @dma: DMA address of the FL/RX ring 353 * @size: Size, in bytes, of the FL/RX ring (needed to free) 354 * @xdp_rxq: RX-ring info avail for XDP 355 */ 356 struct nfp_net_rx_ring { 357 struct nfp_net_r_vector *r_vec; 358 359 u32 cnt; 360 u32 wr_p; 361 u32 rd_p; 362 363 u32 idx; 364 365 int fl_qcidx; 366 unsigned int size; 367 u8 __iomem *qcp_fl; 368 369 struct nfp_net_rx_buf *rxbufs; 370 struct nfp_net_rx_desc *rxds; 371 372 dma_addr_t dma; 373 struct xdp_rxq_info xdp_rxq; 374 } ____cacheline_aligned; 375 376 /** 377 * struct nfp_net_r_vector - Per ring interrupt vector configuration 378 * @nfp_net: Backpointer to nfp_net structure 379 * @napi: NAPI structure for this ring vec 380 * @tx_ring: Pointer to TX ring 381 * @rx_ring: Pointer to RX ring 382 * @xdp_ring: Pointer to an extra TX ring for XDP 383 * @irq_entry: MSI-X table entry (use for talking to the device) 384 * @rx_sync: Seqlock for atomic updates of RX stats 385 * @rx_pkts: Number of received packets 386 * @rx_bytes: Number of received bytes 387 * @rx_drops: Number of packets dropped on RX due to lack of resources 388 * @hw_csum_rx_ok: Counter of packets where the HW checksum was OK 389 * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK 390 * @hw_csum_rx_error: Counter of packets with bad checksums 391 * @tx_sync: Seqlock for atomic updates of TX stats 392 * @tx_pkts: Number of Transmitted packets 393 * @tx_bytes: Number of Transmitted bytes 394 * @hw_csum_tx: Counter of packets with TX checksum offload requested 395 * @hw_csum_tx_inner: Counter of inner TX checksum offload requests 396 * @tx_gather: Counter of packets with Gather DMA 397 * @tx_lso: Counter of LSO packets sent 398 * @tx_errors: How many TX errors were encountered 399 * @tx_busy: How often was TX busy (no space)? 400 * @rx_replace_buf_alloc_fail: Counter of RX buffer allocation failures 401 * @irq_vector: Interrupt vector number (use for talking to the OS) 402 * @handler: Interrupt handler for this ring vector 403 * @name: Name of the interrupt vector 404 * @affinity_mask: SMP affinity mask for this vector 405 * 406 * This structure ties RX and TX rings to interrupt vectors and a NAPI 407 * context. This currently only supports one RX and TX ring per 408 * interrupt vector but might be extended in the future to allow 409 * association of multiple rings per vector. 410 */ 411 struct nfp_net_r_vector { 412 struct nfp_net *nfp_net; 413 union { 414 struct napi_struct napi; 415 struct { 416 struct tasklet_struct tasklet; 417 struct sk_buff_head queue; 418 struct spinlock lock; 419 }; 420 }; 421 422 struct nfp_net_tx_ring *tx_ring; 423 struct nfp_net_rx_ring *rx_ring; 424 425 u16 irq_entry; 426 427 struct u64_stats_sync rx_sync; 428 u64 rx_pkts; 429 u64 rx_bytes; 430 u64 rx_drops; 431 u64 hw_csum_rx_ok; 432 u64 hw_csum_rx_inner_ok; 433 u64 hw_csum_rx_error; 434 435 struct nfp_net_tx_ring *xdp_ring; 436 437 struct u64_stats_sync tx_sync; 438 u64 tx_pkts; 439 u64 tx_bytes; 440 u64 hw_csum_tx; 441 u64 hw_csum_tx_inner; 442 u64 tx_gather; 443 u64 tx_lso; 444 445 u64 rx_replace_buf_alloc_fail; 446 u64 tx_errors; 447 u64 tx_busy; 448 449 u32 irq_vector; 450 irq_handler_t handler; 451 char name[IFNAMSIZ + 8]; 452 cpumask_t affinity_mask; 453 } ____cacheline_aligned; 454 455 /* Firmware version as it is written in the 32bit value in the BAR */ 456 struct nfp_net_fw_version { 457 u8 minor; 458 u8 major; 459 u8 class; 460 u8 resv; 461 } __packed; 462 463 static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver, 464 u8 resv, u8 class, u8 major, u8 minor) 465 { 466 return fw_ver->resv == resv && 467 fw_ver->class == class && 468 fw_ver->major == major && 469 fw_ver->minor == minor; 470 } 471 472 struct nfp_stat_pair { 473 u64 pkts; 474 u64 bytes; 475 }; 476 477 /** 478 * struct nfp_net_dp - NFP network device datapath data structure 479 * @dev: Backpointer to struct device 480 * @netdev: Backpointer to net_device structure 481 * @is_vf: Is the driver attached to a VF? 482 * @bpf_offload_xdp: Offloaded BPF program is XDP 483 * @chained_metadata_format: Firemware will use new metadata format 484 * @rx_dma_dir: Mapping direction for RX buffers 485 * @rx_dma_off: Offset at which DMA packets (for XDP headroom) 486 * @rx_offset: Offset in the RX buffers where packet data starts 487 * @ctrl: Local copy of the control register/word. 488 * @fl_bufsz: Currently configured size of the freelist buffers 489 * @xdp_prog: Installed XDP program 490 * @tx_rings: Array of pre-allocated TX ring structures 491 * @rx_rings: Array of pre-allocated RX ring structures 492 * @ctrl_bar: Pointer to mapped control BAR 493 * 494 * @txd_cnt: Size of the TX ring in number of descriptors 495 * @rxd_cnt: Size of the RX ring in number of descriptors 496 * @num_r_vecs: Number of used ring vectors 497 * @num_tx_rings: Currently configured number of TX rings 498 * @num_stack_tx_rings: Number of TX rings used by the stack (not XDP) 499 * @num_rx_rings: Currently configured number of RX rings 500 * @mtu: Device MTU 501 */ 502 struct nfp_net_dp { 503 struct device *dev; 504 struct net_device *netdev; 505 506 u8 is_vf:1; 507 u8 bpf_offload_xdp:1; 508 u8 chained_metadata_format:1; 509 510 u8 rx_dma_dir; 511 u8 rx_offset; 512 513 u32 rx_dma_off; 514 515 u32 ctrl; 516 u32 fl_bufsz; 517 518 struct bpf_prog *xdp_prog; 519 520 struct nfp_net_tx_ring *tx_rings; 521 struct nfp_net_rx_ring *rx_rings; 522 523 u8 __iomem *ctrl_bar; 524 525 /* Cold data follows */ 526 527 unsigned int txd_cnt; 528 unsigned int rxd_cnt; 529 530 unsigned int num_r_vecs; 531 532 unsigned int num_tx_rings; 533 unsigned int num_stack_tx_rings; 534 unsigned int num_rx_rings; 535 536 unsigned int mtu; 537 }; 538 539 /** 540 * struct nfp_net - NFP network device structure 541 * @dp: Datapath structure 542 * @fw_ver: Firmware version 543 * @cap: Capabilities advertised by the Firmware 544 * @max_mtu: Maximum support MTU advertised by the Firmware 545 * @rss_hfunc: RSS selected hash function 546 * @rss_cfg: RSS configuration 547 * @rss_key: RSS secret key 548 * @rss_itbl: RSS indirection table 549 * @xdp_flags: Flags with which XDP prog was loaded 550 * @xdp_prog: XDP prog (for ctrl path, both DRV and HW modes) 551 * @max_r_vecs: Number of allocated interrupt vectors for RX/TX 552 * @max_tx_rings: Maximum number of TX rings supported by the Firmware 553 * @max_rx_rings: Maximum number of RX rings supported by the Firmware 554 * @stride_rx: Queue controller RX queue spacing 555 * @stride_tx: Queue controller TX queue spacing 556 * @r_vecs: Pre-allocated array of ring vectors 557 * @irq_entries: Pre-allocated array of MSI-X entries 558 * @lsc_handler: Handler for Link State Change interrupt 559 * @lsc_name: Name for Link State Change interrupt 560 * @exn_handler: Handler for Exception interrupt 561 * @exn_name: Name for Exception interrupt 562 * @shared_handler: Handler for shared interrupts 563 * @shared_name: Name for shared interrupt 564 * @me_freq_mhz: ME clock_freq (MHz) 565 * @reconfig_lock: Protects HW reconfiguration request regs/machinery 566 * @reconfig_posted: Pending reconfig bits coming from async sources 567 * @reconfig_timer_active: Timer for reading reconfiguration results is pending 568 * @reconfig_sync_present: Some thread is performing synchronous reconfig 569 * @reconfig_timer: Timer for async reading of reconfig results 570 * @link_up: Is the link up? 571 * @link_status_lock: Protects @link_* and ensures atomicity with BAR reading 572 * @rx_coalesce_usecs: RX interrupt moderation usecs delay parameter 573 * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter 574 * @tx_coalesce_usecs: TX interrupt moderation usecs delay parameter 575 * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter 576 * @vxlan_ports: VXLAN ports for RX inner csum offload communicated to HW 577 * @vxlan_usecnt: IPv4/IPv6 VXLAN port use counts 578 * @qcp_cfg: Pointer to QCP queue used for configuration notification 579 * @tx_bar: Pointer to mapped TX queues 580 * @rx_bar: Pointer to mapped FL/RX queues 581 * @tlv_caps: Parsed TLV capabilities 582 * @debugfs_dir: Device directory in debugfs 583 * @vnic_list: Entry on device vNIC list 584 * @pdev: Backpointer to PCI device 585 * @app: APP handle if available 586 * @port: Pointer to nfp_port structure if vNIC is a port 587 * @app_priv: APP private data for this vNIC 588 */ 589 struct nfp_net { 590 struct nfp_net_dp dp; 591 592 struct nfp_net_fw_version fw_ver; 593 594 u32 cap; 595 u32 max_mtu; 596 597 u8 rss_hfunc; 598 u32 rss_cfg; 599 u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ]; 600 u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ]; 601 602 u32 xdp_flags; 603 struct bpf_prog *xdp_prog; 604 605 unsigned int max_tx_rings; 606 unsigned int max_rx_rings; 607 608 int stride_tx; 609 int stride_rx; 610 611 unsigned int max_r_vecs; 612 struct nfp_net_r_vector r_vecs[NFP_NET_MAX_R_VECS]; 613 struct msix_entry irq_entries[NFP_NET_MAX_IRQS]; 614 615 irq_handler_t lsc_handler; 616 char lsc_name[IFNAMSIZ + 8]; 617 618 irq_handler_t exn_handler; 619 char exn_name[IFNAMSIZ + 8]; 620 621 irq_handler_t shared_handler; 622 char shared_name[IFNAMSIZ + 8]; 623 624 u32 me_freq_mhz; 625 626 bool link_up; 627 spinlock_t link_status_lock; 628 629 spinlock_t reconfig_lock; 630 u32 reconfig_posted; 631 bool reconfig_timer_active; 632 bool reconfig_sync_present; 633 struct timer_list reconfig_timer; 634 635 u32 rx_coalesce_usecs; 636 u32 rx_coalesce_max_frames; 637 u32 tx_coalesce_usecs; 638 u32 tx_coalesce_max_frames; 639 640 __be16 vxlan_ports[NFP_NET_N_VXLAN_PORTS]; 641 u8 vxlan_usecnt[NFP_NET_N_VXLAN_PORTS]; 642 643 u8 __iomem *qcp_cfg; 644 645 u8 __iomem *tx_bar; 646 u8 __iomem *rx_bar; 647 648 struct nfp_net_tlv_caps tlv_caps; 649 650 struct dentry *debugfs_dir; 651 652 struct list_head vnic_list; 653 654 struct pci_dev *pdev; 655 struct nfp_app *app; 656 657 struct nfp_port *port; 658 659 void *app_priv; 660 }; 661 662 /* Functions to read/write from/to a BAR 663 * Performs any endian conversion necessary. 664 */ 665 static inline u16 nn_readb(struct nfp_net *nn, int off) 666 { 667 return readb(nn->dp.ctrl_bar + off); 668 } 669 670 static inline void nn_writeb(struct nfp_net *nn, int off, u8 val) 671 { 672 writeb(val, nn->dp.ctrl_bar + off); 673 } 674 675 static inline u16 nn_readw(struct nfp_net *nn, int off) 676 { 677 return readw(nn->dp.ctrl_bar + off); 678 } 679 680 static inline void nn_writew(struct nfp_net *nn, int off, u16 val) 681 { 682 writew(val, nn->dp.ctrl_bar + off); 683 } 684 685 static inline u32 nn_readl(struct nfp_net *nn, int off) 686 { 687 return readl(nn->dp.ctrl_bar + off); 688 } 689 690 static inline void nn_writel(struct nfp_net *nn, int off, u32 val) 691 { 692 writel(val, nn->dp.ctrl_bar + off); 693 } 694 695 static inline u64 nn_readq(struct nfp_net *nn, int off) 696 { 697 return readq(nn->dp.ctrl_bar + off); 698 } 699 700 static inline void nn_writeq(struct nfp_net *nn, int off, u64 val) 701 { 702 writeq(val, nn->dp.ctrl_bar + off); 703 } 704 705 /* Flush posted PCI writes by reading something without side effects */ 706 static inline void nn_pci_flush(struct nfp_net *nn) 707 { 708 nn_readl(nn, NFP_NET_CFG_VERSION); 709 } 710 711 /* Queue Controller Peripheral access functions and definitions. 712 * 713 * Some of the BARs of the NFP are mapped to portions of the Queue 714 * Controller Peripheral (QCP) address space on the NFP. A QCP queue 715 * has a read and a write pointer (as well as a size and flags, 716 * indicating overflow etc). The QCP offers a number of different 717 * operation on queue pointers, but here we only offer function to 718 * either add to a pointer or to read the pointer value. 719 */ 720 #define NFP_QCP_QUEUE_ADDR_SZ 0x800 721 #define NFP_QCP_QUEUE_AREA_SZ 0x80000 722 #define NFP_QCP_QUEUE_OFF(_x) ((_x) * NFP_QCP_QUEUE_ADDR_SZ) 723 #define NFP_QCP_QUEUE_ADD_RPTR 0x0000 724 #define NFP_QCP_QUEUE_ADD_WPTR 0x0004 725 #define NFP_QCP_QUEUE_STS_LO 0x0008 726 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask 0x3ffff 727 #define NFP_QCP_QUEUE_STS_HI 0x000c 728 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask 0x3ffff 729 730 /* The offset of a QCP queues in the PCIe Target */ 731 #define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff))) 732 733 /* nfp_qcp_ptr - Read or Write Pointer of a queue */ 734 enum nfp_qcp_ptr { 735 NFP_QCP_READ_PTR = 0, 736 NFP_QCP_WRITE_PTR 737 }; 738 739 /* There appear to be an *undocumented* upper limit on the value which 740 * one can add to a queue and that value is either 0x3f or 0x7f. We 741 * go with 0x3f as a conservative measure. 742 */ 743 #define NFP_QCP_MAX_ADD 0x3f 744 745 static inline void _nfp_qcp_ptr_add(u8 __iomem *q, 746 enum nfp_qcp_ptr ptr, u32 val) 747 { 748 u32 off; 749 750 if (ptr == NFP_QCP_READ_PTR) 751 off = NFP_QCP_QUEUE_ADD_RPTR; 752 else 753 off = NFP_QCP_QUEUE_ADD_WPTR; 754 755 while (val > NFP_QCP_MAX_ADD) { 756 writel(NFP_QCP_MAX_ADD, q + off); 757 val -= NFP_QCP_MAX_ADD; 758 } 759 760 writel(val, q + off); 761 } 762 763 /** 764 * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue 765 * 766 * @q: Base address for queue structure 767 * @val: Value to add to the queue pointer 768 * 769 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed. 770 */ 771 static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val) 772 { 773 _nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val); 774 } 775 776 /** 777 * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue 778 * 779 * @q: Base address for queue structure 780 * @val: Value to add to the queue pointer 781 * 782 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed. 783 */ 784 static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val) 785 { 786 _nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val); 787 } 788 789 static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr) 790 { 791 u32 off; 792 u32 val; 793 794 if (ptr == NFP_QCP_READ_PTR) 795 off = NFP_QCP_QUEUE_STS_LO; 796 else 797 off = NFP_QCP_QUEUE_STS_HI; 798 799 val = readl(q + off); 800 801 if (ptr == NFP_QCP_READ_PTR) 802 return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask; 803 else 804 return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask; 805 } 806 807 /** 808 * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue 809 * @q: Base address for queue structure 810 * 811 * Return: Value read. 812 */ 813 static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q) 814 { 815 return _nfp_qcp_read(q, NFP_QCP_READ_PTR); 816 } 817 818 /** 819 * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue 820 * @q: Base address for queue structure 821 * 822 * Return: Value read. 823 */ 824 static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q) 825 { 826 return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR); 827 } 828 829 static inline bool nfp_net_is_data_vnic(struct nfp_net *nn) 830 { 831 WARN_ON_ONCE(!nn->dp.netdev && nn->port); 832 return !!nn->dp.netdev; 833 } 834 835 static inline bool nfp_net_running(struct nfp_net *nn) 836 { 837 return nn->dp.ctrl & NFP_NET_CFG_CTRL_ENABLE; 838 } 839 840 static inline const char *nfp_net_name(struct nfp_net *nn) 841 { 842 return nn->dp.netdev ? nn->dp.netdev->name : "ctrl"; 843 } 844 845 static inline void nfp_ctrl_lock(struct nfp_net *nn) 846 __acquires(&nn->r_vecs[0].lock) 847 { 848 spin_lock_bh(&nn->r_vecs[0].lock); 849 } 850 851 static inline void nfp_ctrl_unlock(struct nfp_net *nn) 852 __releases(&nn->r_vecs[0].lock) 853 { 854 spin_unlock_bh(&nn->r_vecs[0].lock); 855 } 856 857 /* Globals */ 858 extern const char nfp_driver_version[]; 859 860 extern const struct net_device_ops nfp_net_netdev_ops; 861 862 static inline bool nfp_netdev_is_nfp_net(struct net_device *netdev) 863 { 864 return netdev->netdev_ops == &nfp_net_netdev_ops; 865 } 866 867 /* Prototypes */ 868 void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver, 869 void __iomem *ctrl_bar); 870 871 struct nfp_net * 872 nfp_net_alloc(struct pci_dev *pdev, bool needs_netdev, 873 unsigned int max_tx_rings, unsigned int max_rx_rings); 874 void nfp_net_free(struct nfp_net *nn); 875 876 int nfp_net_init(struct nfp_net *nn); 877 void nfp_net_clean(struct nfp_net *nn); 878 879 int nfp_ctrl_open(struct nfp_net *nn); 880 void nfp_ctrl_close(struct nfp_net *nn); 881 882 void nfp_net_set_ethtool_ops(struct net_device *netdev); 883 void nfp_net_info(struct nfp_net *nn); 884 int nfp_net_reconfig(struct nfp_net *nn, u32 update); 885 unsigned int nfp_net_rss_key_sz(struct nfp_net *nn); 886 void nfp_net_rss_write_itbl(struct nfp_net *nn); 887 void nfp_net_rss_write_key(struct nfp_net *nn); 888 void nfp_net_coalesce_write_cfg(struct nfp_net *nn); 889 890 unsigned int 891 nfp_net_irqs_alloc(struct pci_dev *pdev, struct msix_entry *irq_entries, 892 unsigned int min_irqs, unsigned int want_irqs); 893 void nfp_net_irqs_disable(struct pci_dev *pdev); 894 void 895 nfp_net_irqs_assign(struct nfp_net *nn, struct msix_entry *irq_entries, 896 unsigned int n); 897 898 struct nfp_net_dp *nfp_net_clone_dp(struct nfp_net *nn); 899 int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new, 900 struct netlink_ext_ack *extack); 901 902 #ifdef CONFIG_NFP_DEBUG 903 void nfp_net_debugfs_create(void); 904 void nfp_net_debugfs_destroy(void); 905 struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev); 906 void nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir, int id); 907 void nfp_net_debugfs_dir_clean(struct dentry **dir); 908 #else 909 static inline void nfp_net_debugfs_create(void) 910 { 911 } 912 913 static inline void nfp_net_debugfs_destroy(void) 914 { 915 } 916 917 static inline struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev) 918 { 919 return NULL; 920 } 921 922 static inline void 923 nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir, int id) 924 { 925 } 926 927 static inline void nfp_net_debugfs_dir_clean(struct dentry **dir) 928 { 929 } 930 #endif /* CONFIG_NFP_DEBUG */ 931 932 #endif /* _NFP_NET_H_ */ 933