xref: /linux/drivers/net/ethernet/netronome/nfp/nfp_asm.c (revision 6ebe6dbd6886af07b102aca42e44edbee94a22d9)
1 /*
2  * Copyright (C) 2016-2017 Netronome Systems, Inc.
3  *
4  * This software is dual licensed under the GNU General License Version 2,
5  * June 1991 as shown in the file COPYING in the top-level directory of this
6  * source tree or the BSD 2-Clause License provided below.  You have the
7  * option to license this software under the complete terms of either license.
8  *
9  * The BSD 2-Clause License:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      1. Redistributions of source code must retain the above
16  *         copyright notice, this list of conditions and the following
17  *         disclaimer.
18  *
19  *      2. Redistributions in binary form must reproduce the above
20  *         copyright notice, this list of conditions and the following
21  *         disclaimer in the documentation and/or other materials
22  *         provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33 
34 #include <linux/bitops.h>
35 #include <linux/errno.h>
36 #include <linux/kernel.h>
37 #include <linux/string.h>
38 #include <linux/types.h>
39 
40 #include "nfp_asm.h"
41 
42 const struct cmd_tgt_act cmd_tgt_act[__CMD_TGT_MAP_SIZE] = {
43 	[CMD_TGT_WRITE8_SWAP] =		{ 0x02, 0x42 },
44 	[CMD_TGT_WRITE32_SWAP] =	{ 0x02, 0x5f },
45 	[CMD_TGT_READ8] =		{ 0x01, 0x43 },
46 	[CMD_TGT_READ32] =		{ 0x00, 0x5c },
47 	[CMD_TGT_READ32_LE] =		{ 0x01, 0x5c },
48 	[CMD_TGT_READ32_SWAP] =		{ 0x02, 0x5c },
49 	[CMD_TGT_READ_LE] =		{ 0x01, 0x40 },
50 	[CMD_TGT_READ_SWAP_LE] =	{ 0x03, 0x40 },
51 };
52 
53 static u16 nfp_swreg_to_unreg(swreg reg, bool is_dst)
54 {
55 	bool lm_id, lm_dec = false;
56 	u16 val = swreg_value(reg);
57 
58 	switch (swreg_type(reg)) {
59 	case NN_REG_GPR_A:
60 	case NN_REG_GPR_B:
61 	case NN_REG_GPR_BOTH:
62 		return val;
63 	case NN_REG_NNR:
64 		return UR_REG_NN | val;
65 	case NN_REG_XFER:
66 		return UR_REG_XFR | val;
67 	case NN_REG_LMEM:
68 		lm_id = swreg_lm_idx(reg);
69 
70 		switch (swreg_lm_mode(reg)) {
71 		case NN_LM_MOD_NONE:
72 			if (val & ~UR_REG_LM_IDX_MAX) {
73 				pr_err("LM offset too large\n");
74 				return 0;
75 			}
76 			return UR_REG_LM | FIELD_PREP(UR_REG_LM_IDX, lm_id) |
77 				val;
78 		case NN_LM_MOD_DEC:
79 			lm_dec = true;
80 			/* fall through */
81 		case NN_LM_MOD_INC:
82 			if (val) {
83 				pr_err("LM offset in inc/dev mode\n");
84 				return 0;
85 			}
86 			return UR_REG_LM | UR_REG_LM_POST_MOD |
87 				FIELD_PREP(UR_REG_LM_IDX, lm_id) |
88 				FIELD_PREP(UR_REG_LM_POST_MOD_DEC, lm_dec);
89 		default:
90 			pr_err("bad LM mode for unrestricted operands %d\n",
91 			       swreg_lm_mode(reg));
92 			return 0;
93 		}
94 	case NN_REG_IMM:
95 		if (val & ~0xff) {
96 			pr_err("immediate too large\n");
97 			return 0;
98 		}
99 		return UR_REG_IMM_encode(val);
100 	case NN_REG_NONE:
101 		return is_dst ? UR_REG_NO_DST : REG_NONE;
102 	}
103 
104 	pr_err("unrecognized reg encoding %08x\n", reg);
105 	return 0;
106 }
107 
108 int swreg_to_unrestricted(swreg dst, swreg lreg, swreg rreg,
109 			  struct nfp_insn_ur_regs *reg)
110 {
111 	memset(reg, 0, sizeof(*reg));
112 
113 	/* Decode destination */
114 	if (swreg_type(dst) == NN_REG_IMM)
115 		return -EFAULT;
116 
117 	if (swreg_type(dst) == NN_REG_GPR_B)
118 		reg->dst_ab = ALU_DST_B;
119 	if (swreg_type(dst) == NN_REG_GPR_BOTH)
120 		reg->wr_both = true;
121 	reg->dst = nfp_swreg_to_unreg(dst, true);
122 
123 	/* Decode source operands */
124 	if (swreg_type(lreg) == swreg_type(rreg) &&
125 	    swreg_type(lreg) != NN_REG_NONE)
126 		return -EFAULT;
127 
128 	if (swreg_type(lreg) == NN_REG_GPR_B ||
129 	    swreg_type(rreg) == NN_REG_GPR_A) {
130 		reg->areg = nfp_swreg_to_unreg(rreg, false);
131 		reg->breg = nfp_swreg_to_unreg(lreg, false);
132 		reg->swap = true;
133 	} else {
134 		reg->areg = nfp_swreg_to_unreg(lreg, false);
135 		reg->breg = nfp_swreg_to_unreg(rreg, false);
136 	}
137 
138 	reg->dst_lmextn = swreg_lmextn(dst);
139 	reg->src_lmextn = swreg_lmextn(lreg) | swreg_lmextn(rreg);
140 
141 	return 0;
142 }
143 
144 static u16 nfp_swreg_to_rereg(swreg reg, bool is_dst, bool has_imm8, bool *i8)
145 {
146 	u16 val = swreg_value(reg);
147 	bool lm_id;
148 
149 	switch (swreg_type(reg)) {
150 	case NN_REG_GPR_A:
151 	case NN_REG_GPR_B:
152 	case NN_REG_GPR_BOTH:
153 		return val;
154 	case NN_REG_XFER:
155 		return RE_REG_XFR | val;
156 	case NN_REG_LMEM:
157 		lm_id = swreg_lm_idx(reg);
158 
159 		if (swreg_lm_mode(reg) != NN_LM_MOD_NONE) {
160 			pr_err("bad LM mode for restricted operands %d\n",
161 			       swreg_lm_mode(reg));
162 			return 0;
163 		}
164 
165 		if (val & ~RE_REG_LM_IDX_MAX) {
166 			pr_err("LM offset too large\n");
167 			return 0;
168 		}
169 
170 		return RE_REG_LM | FIELD_PREP(RE_REG_LM_IDX, lm_id) | val;
171 	case NN_REG_IMM:
172 		if (val & ~(0x7f | has_imm8 << 7)) {
173 			pr_err("immediate too large\n");
174 			return 0;
175 		}
176 		*i8 = val & 0x80;
177 		return RE_REG_IMM_encode(val & 0x7f);
178 	case NN_REG_NONE:
179 		return is_dst ? RE_REG_NO_DST : REG_NONE;
180 	case NN_REG_NNR:
181 		pr_err("NNRs used with restricted encoding\n");
182 		return 0;
183 	}
184 
185 	pr_err("unrecognized reg encoding\n");
186 	return 0;
187 }
188 
189 int swreg_to_restricted(swreg dst, swreg lreg, swreg rreg,
190 			struct nfp_insn_re_regs *reg, bool has_imm8)
191 {
192 	memset(reg, 0, sizeof(*reg));
193 
194 	/* Decode destination */
195 	if (swreg_type(dst) == NN_REG_IMM)
196 		return -EFAULT;
197 
198 	if (swreg_type(dst) == NN_REG_GPR_B)
199 		reg->dst_ab = ALU_DST_B;
200 	if (swreg_type(dst) == NN_REG_GPR_BOTH)
201 		reg->wr_both = true;
202 	reg->dst = nfp_swreg_to_rereg(dst, true, false, NULL);
203 
204 	/* Decode source operands */
205 	if (swreg_type(lreg) == swreg_type(rreg) &&
206 	    swreg_type(lreg) != NN_REG_NONE)
207 		return -EFAULT;
208 
209 	if (swreg_type(lreg) == NN_REG_GPR_B ||
210 	    swreg_type(rreg) == NN_REG_GPR_A) {
211 		reg->areg = nfp_swreg_to_rereg(rreg, false, has_imm8, &reg->i8);
212 		reg->breg = nfp_swreg_to_rereg(lreg, false, has_imm8, &reg->i8);
213 		reg->swap = true;
214 	} else {
215 		reg->areg = nfp_swreg_to_rereg(lreg, false, has_imm8, &reg->i8);
216 		reg->breg = nfp_swreg_to_rereg(rreg, false, has_imm8, &reg->i8);
217 	}
218 
219 	reg->dst_lmextn = swreg_lmextn(dst);
220 	reg->src_lmextn = swreg_lmextn(lreg) | swreg_lmextn(rreg);
221 
222 	return 0;
223 }
224 
225 #define NFP_USTORE_ECC_POLY_WORDS		7
226 #define NFP_USTORE_OP_BITS			45
227 
228 static const u64 nfp_ustore_ecc_polynomials[NFP_USTORE_ECC_POLY_WORDS] = {
229 	0x0ff800007fffULL,
230 	0x11f801ff801fULL,
231 	0x1e387e0781e1ULL,
232 	0x17cb8e388e22ULL,
233 	0x1af5b2c93244ULL,
234 	0x1f56d5525488ULL,
235 	0x0daf69a46910ULL,
236 };
237 
238 static bool parity(u64 value)
239 {
240 	return hweight64(value) & 1;
241 }
242 
243 int nfp_ustore_check_valid_no_ecc(u64 insn)
244 {
245 	if (insn & ~GENMASK_ULL(NFP_USTORE_OP_BITS, 0))
246 		return -EINVAL;
247 
248 	return 0;
249 }
250 
251 u64 nfp_ustore_calc_ecc_insn(u64 insn)
252 {
253 	u8 ecc = 0;
254 	int i;
255 
256 	for (i = 0; i < NFP_USTORE_ECC_POLY_WORDS; i++)
257 		ecc |= parity(nfp_ustore_ecc_polynomials[i] & insn) << i;
258 
259 	return insn | (u64)ecc << NFP_USTORE_OP_BITS;
260 }
261