1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Header file for sonic.c 4 * 5 * (C) Waldorf Electronics, Germany 6 * Written by Andreas Busse 7 * 8 * NOTE: most of the structure definitions here are endian dependent. 9 * If you want to use this driver on big endian machines, the data 10 * and pad structure members must be exchanged. Also, the structures 11 * need to be changed accordingly to the bus size. 12 * 13 * 981229 MSch: did just that for the 68k Mac port (32 bit, big endian) 14 * 15 * 990611 David Huggins-Daines <dhd@debian.org>: This machine abstraction 16 * does not cope with 16-bit bus sizes very well. Therefore I have 17 * rewritten it with ugly macros and evil inlines. 18 * 19 * 050625 Finn Thain: introduced more 32-bit cards and dhd's support 20 * for 16-bit cards (from the mac68k project). 21 */ 22 23 #ifndef SONIC_H 24 #define SONIC_H 25 26 27 /* 28 * SONIC register offsets 29 */ 30 31 #define SONIC_CMD 0x00 32 #define SONIC_DCR 0x01 33 #define SONIC_RCR 0x02 34 #define SONIC_TCR 0x03 35 #define SONIC_IMR 0x04 36 #define SONIC_ISR 0x05 37 38 #define SONIC_UTDA 0x06 39 #define SONIC_CTDA 0x07 40 41 #define SONIC_URDA 0x0d 42 #define SONIC_CRDA 0x0e 43 #define SONIC_EOBC 0x13 44 #define SONIC_URRA 0x14 45 #define SONIC_RSA 0x15 46 #define SONIC_REA 0x16 47 #define SONIC_RRP 0x17 48 #define SONIC_RWP 0x18 49 #define SONIC_RSC 0x2b 50 51 #define SONIC_CEP 0x21 52 #define SONIC_CAP2 0x22 53 #define SONIC_CAP1 0x23 54 #define SONIC_CAP0 0x24 55 #define SONIC_CE 0x25 56 #define SONIC_CDP 0x26 57 #define SONIC_CDC 0x27 58 59 #define SONIC_WT0 0x29 60 #define SONIC_WT1 0x2a 61 62 #define SONIC_SR 0x28 63 64 65 /* test-only registers */ 66 67 #define SONIC_TPS 0x08 68 #define SONIC_TFC 0x09 69 #define SONIC_TSA0 0x0a 70 #define SONIC_TSA1 0x0b 71 #define SONIC_TFS 0x0c 72 73 #define SONIC_CRBA0 0x0f 74 #define SONIC_CRBA1 0x10 75 #define SONIC_RBWC0 0x11 76 #define SONIC_RBWC1 0x12 77 #define SONIC_TTDA 0x20 78 #define SONIC_MDT 0x2f 79 80 #define SONIC_TRBA0 0x19 81 #define SONIC_TRBA1 0x1a 82 #define SONIC_TBWC0 0x1b 83 #define SONIC_TBWC1 0x1c 84 #define SONIC_LLFA 0x1f 85 86 #define SONIC_ADDR0 0x1d 87 #define SONIC_ADDR1 0x1e 88 89 /* 90 * Error counters 91 */ 92 93 #define SONIC_CRCT 0x2c 94 #define SONIC_FAET 0x2d 95 #define SONIC_MPT 0x2e 96 97 #define SONIC_DCR2 0x3f 98 99 /* 100 * SONIC command bits 101 */ 102 103 #define SONIC_CR_LCAM 0x0200 104 #define SONIC_CR_RRRA 0x0100 105 #define SONIC_CR_RST 0x0080 106 #define SONIC_CR_ST 0x0020 107 #define SONIC_CR_STP 0x0010 108 #define SONIC_CR_RXEN 0x0008 109 #define SONIC_CR_RXDIS 0x0004 110 #define SONIC_CR_TXP 0x0002 111 #define SONIC_CR_HTX 0x0001 112 113 /* 114 * SONIC data configuration bits 115 */ 116 117 #define SONIC_DCR_EXBUS 0x8000 118 #define SONIC_DCR_LBR 0x2000 119 #define SONIC_DCR_PO1 0x1000 120 #define SONIC_DCR_PO0 0x0800 121 #define SONIC_DCR_SBUS 0x0400 122 #define SONIC_DCR_USR1 0x0200 123 #define SONIC_DCR_USR0 0x0100 124 #define SONIC_DCR_WC1 0x0080 125 #define SONIC_DCR_WC0 0x0040 126 #define SONIC_DCR_DW 0x0020 127 #define SONIC_DCR_BMS 0x0010 128 #define SONIC_DCR_RFT1 0x0008 129 #define SONIC_DCR_RFT0 0x0004 130 #define SONIC_DCR_TFT1 0x0002 131 #define SONIC_DCR_TFT0 0x0001 132 133 /* 134 * Constants for the SONIC receive control register. 135 */ 136 137 #define SONIC_RCR_ERR 0x8000 138 #define SONIC_RCR_RNT 0x4000 139 #define SONIC_RCR_BRD 0x2000 140 #define SONIC_RCR_PRO 0x1000 141 #define SONIC_RCR_AMC 0x0800 142 #define SONIC_RCR_LB1 0x0400 143 #define SONIC_RCR_LB0 0x0200 144 145 #define SONIC_RCR_MC 0x0100 146 #define SONIC_RCR_BC 0x0080 147 #define SONIC_RCR_LPKT 0x0040 148 #define SONIC_RCR_CRS 0x0020 149 #define SONIC_RCR_COL 0x0010 150 #define SONIC_RCR_CRCR 0x0008 151 #define SONIC_RCR_FAER 0x0004 152 #define SONIC_RCR_LBK 0x0002 153 #define SONIC_RCR_PRX 0x0001 154 155 #define SONIC_RCR_LB_OFF 0 156 #define SONIC_RCR_LB_MAC SONIC_RCR_LB0 157 #define SONIC_RCR_LB_ENDEC SONIC_RCR_LB1 158 #define SONIC_RCR_LB_TRANS (SONIC_RCR_LB0 | SONIC_RCR_LB1) 159 160 /* default RCR setup */ 161 162 #define SONIC_RCR_DEFAULT (SONIC_RCR_BRD) 163 164 165 /* 166 * SONIC Transmit Control register bits 167 */ 168 169 #define SONIC_TCR_PINTR 0x8000 170 #define SONIC_TCR_POWC 0x4000 171 #define SONIC_TCR_CRCI 0x2000 172 #define SONIC_TCR_EXDIS 0x1000 173 #define SONIC_TCR_EXD 0x0400 174 #define SONIC_TCR_DEF 0x0200 175 #define SONIC_TCR_NCRS 0x0100 176 #define SONIC_TCR_CRLS 0x0080 177 #define SONIC_TCR_EXC 0x0040 178 #define SONIC_TCR_PMB 0x0008 179 #define SONIC_TCR_FU 0x0004 180 #define SONIC_TCR_BCM 0x0002 181 #define SONIC_TCR_PTX 0x0001 182 183 #define SONIC_TCR_DEFAULT 0x0000 184 185 /* 186 * Constants for the SONIC_INTERRUPT_MASK and 187 * SONIC_INTERRUPT_STATUS registers. 188 */ 189 190 #define SONIC_INT_BR 0x4000 191 #define SONIC_INT_HBL 0x2000 192 #define SONIC_INT_LCD 0x1000 193 #define SONIC_INT_PINT 0x0800 194 #define SONIC_INT_PKTRX 0x0400 195 #define SONIC_INT_TXDN 0x0200 196 #define SONIC_INT_TXER 0x0100 197 #define SONIC_INT_TC 0x0080 198 #define SONIC_INT_RDE 0x0040 199 #define SONIC_INT_RBE 0x0020 200 #define SONIC_INT_RBAE 0x0010 201 #define SONIC_INT_CRC 0x0008 202 #define SONIC_INT_FAE 0x0004 203 #define SONIC_INT_MP 0x0002 204 #define SONIC_INT_RFO 0x0001 205 206 207 /* 208 * The interrupts we allow. 209 */ 210 211 #define SONIC_IMR_DEFAULT ( SONIC_INT_BR | \ 212 SONIC_INT_LCD | \ 213 SONIC_INT_RFO | \ 214 SONIC_INT_PKTRX | \ 215 SONIC_INT_TXDN | \ 216 SONIC_INT_TXER | \ 217 SONIC_INT_RDE | \ 218 SONIC_INT_RBAE | \ 219 SONIC_INT_CRC | \ 220 SONIC_INT_FAE | \ 221 SONIC_INT_MP) 222 223 224 #define SONIC_EOL 0x0001 225 #define CAM_DESCRIPTORS 16 226 227 /* Offsets in the various DMA buffers accessed by the SONIC */ 228 229 #define SONIC_BITMODE16 0 230 #define SONIC_BITMODE32 1 231 #define SONIC_BUS_SCALE(bitmode) ((bitmode) ? 4 : 2) 232 /* Note! These are all measured in bus-size units, so use SONIC_BUS_SCALE */ 233 #define SIZEOF_SONIC_RR 4 234 #define SONIC_RR_BUFADR_L 0 235 #define SONIC_RR_BUFADR_H 1 236 #define SONIC_RR_BUFSIZE_L 2 237 #define SONIC_RR_BUFSIZE_H 3 238 239 #define SIZEOF_SONIC_RD 7 240 #define SONIC_RD_STATUS 0 241 #define SONIC_RD_PKTLEN 1 242 #define SONIC_RD_PKTPTR_L 2 243 #define SONIC_RD_PKTPTR_H 3 244 #define SONIC_RD_SEQNO 4 245 #define SONIC_RD_LINK 5 246 #define SONIC_RD_IN_USE 6 247 248 #define SIZEOF_SONIC_TD 8 249 #define SONIC_TD_STATUS 0 250 #define SONIC_TD_CONFIG 1 251 #define SONIC_TD_PKTSIZE 2 252 #define SONIC_TD_FRAG_COUNT 3 253 #define SONIC_TD_FRAG_PTR_L 4 254 #define SONIC_TD_FRAG_PTR_H 5 255 #define SONIC_TD_FRAG_SIZE 6 256 #define SONIC_TD_LINK 7 257 258 #define SIZEOF_SONIC_CD 4 259 #define SONIC_CD_ENTRY_POINTER 0 260 #define SONIC_CD_CAP0 1 261 #define SONIC_CD_CAP1 2 262 #define SONIC_CD_CAP2 3 263 264 #define SIZEOF_SONIC_CDA ((CAM_DESCRIPTORS * SIZEOF_SONIC_CD) + 1) 265 #define SONIC_CDA_CAM_ENABLE (CAM_DESCRIPTORS * SIZEOF_SONIC_CD) 266 267 /* 268 * Some tunables for the buffer areas. Power of 2 is required 269 * the current driver uses one receive buffer for each descriptor. 270 * 271 * MSch: use more buffer space for the slow m68k Macs! 272 */ 273 #define SONIC_NUM_RRS 16 /* number of receive resources */ 274 #define SONIC_NUM_RDS SONIC_NUM_RRS /* number of receive descriptors */ 275 #define SONIC_NUM_TDS 16 /* number of transmit descriptors */ 276 277 #define SONIC_RDS_MASK (SONIC_NUM_RDS-1) 278 #define SONIC_TDS_MASK (SONIC_NUM_TDS-1) 279 280 #define SONIC_RBSIZE 1520 /* size of one resource buffer */ 281 282 /* Again, measured in bus size units! */ 283 #define SIZEOF_SONIC_DESC (SIZEOF_SONIC_CDA \ 284 + (SIZEOF_SONIC_TD * SONIC_NUM_TDS) \ 285 + (SIZEOF_SONIC_RD * SONIC_NUM_RDS) \ 286 + (SIZEOF_SONIC_RR * SONIC_NUM_RRS)) 287 288 /* Information that need to be kept for each board. */ 289 struct sonic_local { 290 /* Bus size. 0 == 16 bits, 1 == 32 bits. */ 291 int dma_bitmode; 292 /* Register offset within the longword (independent of endianness, 293 and varies from one type of Macintosh SONIC to another 294 (Aarrgh)) */ 295 int reg_offset; 296 void *descriptors; 297 /* Crud. These areas have to be within the same 64K. Therefore 298 we allocate a desriptors page, and point these to places within it. */ 299 void *cda; /* CAM descriptor area */ 300 void *tda; /* Transmit descriptor area */ 301 void *rra; /* Receive resource area */ 302 void *rda; /* Receive descriptor area */ 303 struct sk_buff* volatile rx_skb[SONIC_NUM_RRS]; /* packets to be received */ 304 struct sk_buff* volatile tx_skb[SONIC_NUM_TDS]; /* packets to be transmitted */ 305 unsigned int tx_len[SONIC_NUM_TDS]; /* lengths of tx DMA mappings */ 306 /* Logical DMA addresses on MIPS, bus addresses on m68k 307 * (so "laddr" is a bit misleading) */ 308 dma_addr_t descriptors_laddr; 309 u32 cda_laddr; /* logical DMA address of CDA */ 310 u32 tda_laddr; /* logical DMA address of TDA */ 311 u32 rra_laddr; /* logical DMA address of RRA */ 312 u32 rda_laddr; /* logical DMA address of RDA */ 313 dma_addr_t rx_laddr[SONIC_NUM_RRS]; /* logical DMA addresses of rx skbuffs */ 314 dma_addr_t tx_laddr[SONIC_NUM_TDS]; /* logical DMA addresses of tx skbuffs */ 315 unsigned int rra_end; 316 unsigned int cur_rwp; 317 unsigned int cur_rx; 318 unsigned int cur_tx; /* first unacked transmit packet */ 319 unsigned int eol_rx; 320 unsigned int eol_tx; /* last unacked transmit packet */ 321 unsigned int next_tx; /* next free TD */ 322 int msg_enable; 323 struct device *device; /* generic device */ 324 struct net_device_stats stats; 325 }; 326 327 #define TX_TIMEOUT (3 * HZ) 328 329 /* Index to functions, as function prototypes. */ 330 331 static int sonic_open(struct net_device *dev); 332 static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev); 333 static irqreturn_t sonic_interrupt(int irq, void *dev_id); 334 static void sonic_rx(struct net_device *dev); 335 static int sonic_close(struct net_device *dev); 336 static struct net_device_stats *sonic_get_stats(struct net_device *dev); 337 static void sonic_multicast_list(struct net_device *dev); 338 static int sonic_init(struct net_device *dev); 339 static void sonic_tx_timeout(struct net_device *dev); 340 static void sonic_msg_init(struct net_device *dev); 341 342 /* Internal inlines for reading/writing DMA buffers. Note that bus 343 size and endianness matter here, whereas they don't for registers, 344 as far as we can tell. */ 345 /* OpenBSD calls this "SWO". I'd like to think that sonic_buf_put() 346 is a much better name. */ 347 static inline void sonic_buf_put(void* base, int bitmode, 348 int offset, __u16 val) 349 { 350 if (bitmode) 351 #ifdef __BIG_ENDIAN 352 ((__u16 *) base + (offset*2))[1] = val; 353 #else 354 ((__u16 *) base + (offset*2))[0] = val; 355 #endif 356 else 357 ((__u16 *) base)[offset] = val; 358 } 359 360 static inline __u16 sonic_buf_get(void* base, int bitmode, 361 int offset) 362 { 363 if (bitmode) 364 #ifdef __BIG_ENDIAN 365 return ((volatile __u16 *) base + (offset*2))[1]; 366 #else 367 return ((volatile __u16 *) base + (offset*2))[0]; 368 #endif 369 else 370 return ((volatile __u16 *) base)[offset]; 371 } 372 373 /* Inlines that you should actually use for reading/writing DMA buffers */ 374 static inline void sonic_cda_put(struct net_device* dev, int entry, 375 int offset, __u16 val) 376 { 377 struct sonic_local *lp = netdev_priv(dev); 378 sonic_buf_put(lp->cda, lp->dma_bitmode, 379 (entry * SIZEOF_SONIC_CD) + offset, val); 380 } 381 382 static inline __u16 sonic_cda_get(struct net_device* dev, int entry, 383 int offset) 384 { 385 struct sonic_local *lp = netdev_priv(dev); 386 return sonic_buf_get(lp->cda, lp->dma_bitmode, 387 (entry * SIZEOF_SONIC_CD) + offset); 388 } 389 390 static inline void sonic_set_cam_enable(struct net_device* dev, __u16 val) 391 { 392 struct sonic_local *lp = netdev_priv(dev); 393 sonic_buf_put(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE, val); 394 } 395 396 static inline __u16 sonic_get_cam_enable(struct net_device* dev) 397 { 398 struct sonic_local *lp = netdev_priv(dev); 399 return sonic_buf_get(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE); 400 } 401 402 static inline void sonic_tda_put(struct net_device* dev, int entry, 403 int offset, __u16 val) 404 { 405 struct sonic_local *lp = netdev_priv(dev); 406 sonic_buf_put(lp->tda, lp->dma_bitmode, 407 (entry * SIZEOF_SONIC_TD) + offset, val); 408 } 409 410 static inline __u16 sonic_tda_get(struct net_device* dev, int entry, 411 int offset) 412 { 413 struct sonic_local *lp = netdev_priv(dev); 414 return sonic_buf_get(lp->tda, lp->dma_bitmode, 415 (entry * SIZEOF_SONIC_TD) + offset); 416 } 417 418 static inline void sonic_rda_put(struct net_device* dev, int entry, 419 int offset, __u16 val) 420 { 421 struct sonic_local *lp = netdev_priv(dev); 422 sonic_buf_put(lp->rda, lp->dma_bitmode, 423 (entry * SIZEOF_SONIC_RD) + offset, val); 424 } 425 426 static inline __u16 sonic_rda_get(struct net_device* dev, int entry, 427 int offset) 428 { 429 struct sonic_local *lp = netdev_priv(dev); 430 return sonic_buf_get(lp->rda, lp->dma_bitmode, 431 (entry * SIZEOF_SONIC_RD) + offset); 432 } 433 434 static inline void sonic_rra_put(struct net_device* dev, int entry, 435 int offset, __u16 val) 436 { 437 struct sonic_local *lp = netdev_priv(dev); 438 sonic_buf_put(lp->rra, lp->dma_bitmode, 439 (entry * SIZEOF_SONIC_RR) + offset, val); 440 } 441 442 static inline __u16 sonic_rra_get(struct net_device* dev, int entry, 443 int offset) 444 { 445 struct sonic_local *lp = netdev_priv(dev); 446 return sonic_buf_get(lp->rra, lp->dma_bitmode, 447 (entry * SIZEOF_SONIC_RR) + offset); 448 } 449 450 static const char version[] = 451 "sonic.c:v0.92 20.9.98 tsbogend@alpha.franken.de\n"; 452 453 #endif /* SONIC_H */ 454