1ee61c10cSDong Yibo /* SPDX-License-Identifier: GPL-2.0 */ 2ee61c10cSDong Yibo /* Copyright(c) 2020 - 2025 Mucse Corporation. */ 3ee61c10cSDong Yibo 4ee61c10cSDong Yibo #ifndef _RNPGBE_H 5ee61c10cSDong Yibo #define _RNPGBE_H 6ee61c10cSDong Yibo 74543534cSDong Yibo #include <linux/types.h> 8c6d3f019SDong Yibo #include <linux/mutex.h> 94543534cSDong Yibo 10ee61c10cSDong Yibo enum rnpgbe_boards { 11ee61c10cSDong Yibo board_n500, 12ee61c10cSDong Yibo board_n210 13ee61c10cSDong Yibo }; 14ee61c10cSDong Yibo 154543534cSDong Yibo struct mucse_mbx_info { 164543534cSDong Yibo u32 timeout_us; 174543534cSDong Yibo u32 delay_us; 184543534cSDong Yibo u16 fw_req; 194543534cSDong Yibo u16 fw_ack; 20c6d3f019SDong Yibo /* lock for only one use mbx */ 21c6d3f019SDong Yibo struct mutex lock; 224543534cSDong Yibo /* fw <--> pf mbx */ 234543534cSDong Yibo u32 fwpf_shm_base; 244543534cSDong Yibo u32 pf2fw_mbx_ctrl; 254543534cSDong Yibo u32 fwpf_mbx_mask; 264543534cSDong Yibo u32 fwpf_ctrl_base; 274543534cSDong Yibo }; 284543534cSDong Yibo 29*2ee95ec1SDong Yibo /* Enum for firmware notification modes, 30*2ee95ec1SDong Yibo * more modes (e.g., portup, link_report) will be added in future 31*2ee95ec1SDong Yibo **/ 32*2ee95ec1SDong Yibo enum { 33*2ee95ec1SDong Yibo mucse_fw_powerup, 34*2ee95ec1SDong Yibo }; 35*2ee95ec1SDong Yibo 361b7f85f7SDong Yibo struct mucse_hw { 371b7f85f7SDong Yibo void __iomem *hw_addr; 38*2ee95ec1SDong Yibo struct pci_dev *pdev; 394543534cSDong Yibo struct mucse_mbx_info mbx; 40*2ee95ec1SDong Yibo int port; 41c6d3f019SDong Yibo u8 pfvfnum; 421b7f85f7SDong Yibo }; 431b7f85f7SDong Yibo 44*2ee95ec1SDong Yibo struct mucse_stats { 45*2ee95ec1SDong Yibo u64 tx_dropped; 46*2ee95ec1SDong Yibo }; 47*2ee95ec1SDong Yibo 481b7f85f7SDong Yibo struct mucse { 491b7f85f7SDong Yibo struct net_device *netdev; 501b7f85f7SDong Yibo struct pci_dev *pdev; 511b7f85f7SDong Yibo struct mucse_hw hw; 52*2ee95ec1SDong Yibo struct mucse_stats stats; 531b7f85f7SDong Yibo }; 541b7f85f7SDong Yibo 55*2ee95ec1SDong Yibo int rnpgbe_get_permanent_mac(struct mucse_hw *hw, u8 *perm_addr); 56*2ee95ec1SDong Yibo int rnpgbe_reset_hw(struct mucse_hw *hw); 57*2ee95ec1SDong Yibo int rnpgbe_send_notify(struct mucse_hw *hw, 58*2ee95ec1SDong Yibo bool enable, 59*2ee95ec1SDong Yibo int mode); 604543534cSDong Yibo int rnpgbe_init_hw(struct mucse_hw *hw, int board_type); 614543534cSDong Yibo 62ee61c10cSDong Yibo /* Device IDs */ 63ee61c10cSDong Yibo #define PCI_VENDOR_ID_MUCSE 0x8848 64ee61c10cSDong Yibo #define RNPGBE_DEVICE_ID_N500_QUAD_PORT 0x8308 65ee61c10cSDong Yibo #define RNPGBE_DEVICE_ID_N500_DUAL_PORT 0x8318 66ee61c10cSDong Yibo #define RNPGBE_DEVICE_ID_N210 0x8208 67ee61c10cSDong Yibo #define RNPGBE_DEVICE_ID_N210L 0x820a 68*2ee95ec1SDong Yibo 69*2ee95ec1SDong Yibo #define mucse_hw_wr32(hw, reg, val) \ 70*2ee95ec1SDong Yibo writel((val), (hw)->hw_addr + (reg)) 71ee61c10cSDong Yibo #endif /* _RNPGBE_H */ 72