1 // SPDX-License-Identifier: GPL-2.0+ 2 3 #include <linux/module.h> 4 #include <linux/if_bridge.h> 5 #include <linux/if_vlan.h> 6 #include <linux/iopoll.h> 7 #include <linux/ip.h> 8 #include <linux/of_platform.h> 9 #include <linux/of_net.h> 10 #include <linux/packing.h> 11 #include <linux/phy/phy.h> 12 #include <linux/reset.h> 13 #include <net/addrconf.h> 14 15 #include "lan966x_main.h" 16 17 #define XTR_EOF_0 0x00000080U 18 #define XTR_EOF_1 0x01000080U 19 #define XTR_EOF_2 0x02000080U 20 #define XTR_EOF_3 0x03000080U 21 #define XTR_PRUNED 0x04000080U 22 #define XTR_ABORT 0x05000080U 23 #define XTR_ESCAPE 0x06000080U 24 #define XTR_NOT_READY 0x07000080U 25 #define XTR_VALID_BYTES(x) (4 - (((x) >> 24) & 3)) 26 27 #define READL_SLEEP_US 10 28 #define READL_TIMEOUT_US 100000000 29 30 #define IO_RANGES 2 31 32 static const struct of_device_id lan966x_match[] = { 33 { .compatible = "microchip,lan966x-switch" }, 34 { } 35 }; 36 MODULE_DEVICE_TABLE(of, lan966x_match); 37 38 struct lan966x_main_io_resource { 39 enum lan966x_target id; 40 phys_addr_t offset; 41 int range; 42 }; 43 44 static const struct lan966x_main_io_resource lan966x_main_iomap[] = { 45 { TARGET_CPU, 0xc0000, 0 }, /* 0xe00c0000 */ 46 { TARGET_ORG, 0, 1 }, /* 0xe2000000 */ 47 { TARGET_GCB, 0x4000, 1 }, /* 0xe2004000 */ 48 { TARGET_QS, 0x8000, 1 }, /* 0xe2008000 */ 49 { TARGET_PTP, 0xc000, 1 }, /* 0xe200c000 */ 50 { TARGET_CHIP_TOP, 0x10000, 1 }, /* 0xe2010000 */ 51 { TARGET_REW, 0x14000, 1 }, /* 0xe2014000 */ 52 { TARGET_SYS, 0x28000, 1 }, /* 0xe2028000 */ 53 { TARGET_DEV, 0x34000, 1 }, /* 0xe2034000 */ 54 { TARGET_DEV + 1, 0x38000, 1 }, /* 0xe2038000 */ 55 { TARGET_DEV + 2, 0x3c000, 1 }, /* 0xe203c000 */ 56 { TARGET_DEV + 3, 0x40000, 1 }, /* 0xe2040000 */ 57 { TARGET_DEV + 4, 0x44000, 1 }, /* 0xe2044000 */ 58 { TARGET_DEV + 5, 0x48000, 1 }, /* 0xe2048000 */ 59 { TARGET_DEV + 6, 0x4c000, 1 }, /* 0xe204c000 */ 60 { TARGET_DEV + 7, 0x50000, 1 }, /* 0xe2050000 */ 61 { TARGET_QSYS, 0x100000, 1 }, /* 0xe2100000 */ 62 { TARGET_AFI, 0x120000, 1 }, /* 0xe2120000 */ 63 { TARGET_ANA, 0x140000, 1 }, /* 0xe2140000 */ 64 }; 65 66 static int lan966x_create_targets(struct platform_device *pdev, 67 struct lan966x *lan966x) 68 { 69 struct resource *iores[IO_RANGES]; 70 void __iomem *begin[IO_RANGES]; 71 int idx; 72 73 /* Initially map the entire range and after that update each target to 74 * point inside the region at the correct offset. It is possible that 75 * other devices access the same region so don't add any checks about 76 * this. 77 */ 78 for (idx = 0; idx < IO_RANGES; idx++) { 79 iores[idx] = platform_get_resource(pdev, IORESOURCE_MEM, 80 idx); 81 if (!iores[idx]) { 82 dev_err(&pdev->dev, "Invalid resource\n"); 83 return -EINVAL; 84 } 85 86 begin[idx] = devm_ioremap(&pdev->dev, 87 iores[idx]->start, 88 resource_size(iores[idx])); 89 if (!begin[idx]) { 90 dev_err(&pdev->dev, "Unable to get registers: %s\n", 91 iores[idx]->name); 92 return -ENOMEM; 93 } 94 } 95 96 for (idx = 0; idx < ARRAY_SIZE(lan966x_main_iomap); idx++) { 97 const struct lan966x_main_io_resource *iomap = 98 &lan966x_main_iomap[idx]; 99 100 lan966x->regs[iomap->id] = begin[iomap->range] + iomap->offset; 101 } 102 103 return 0; 104 } 105 106 static int lan966x_port_set_mac_address(struct net_device *dev, void *p) 107 { 108 struct lan966x_port *port = netdev_priv(dev); 109 struct lan966x *lan966x = port->lan966x; 110 const struct sockaddr *addr = p; 111 int ret; 112 113 /* Learn the new net device MAC address in the mac table. */ 114 ret = lan966x_mac_cpu_learn(lan966x, addr->sa_data, HOST_PVID); 115 if (ret) 116 return ret; 117 118 /* Then forget the previous one. */ 119 ret = lan966x_mac_cpu_forget(lan966x, dev->dev_addr, HOST_PVID); 120 if (ret) 121 return ret; 122 123 eth_hw_addr_set(dev, addr->sa_data); 124 return ret; 125 } 126 127 static int lan966x_port_get_phys_port_name(struct net_device *dev, 128 char *buf, size_t len) 129 { 130 struct lan966x_port *port = netdev_priv(dev); 131 int ret; 132 133 ret = snprintf(buf, len, "p%d", port->chip_port); 134 if (ret >= len) 135 return -EINVAL; 136 137 return 0; 138 } 139 140 static int lan966x_port_open(struct net_device *dev) 141 { 142 struct lan966x_port *port = netdev_priv(dev); 143 struct lan966x *lan966x = port->lan966x; 144 int err; 145 146 /* Enable receiving frames on the port, and activate auto-learning of 147 * MAC addresses. 148 */ 149 lan_rmw(ANA_PORT_CFG_LEARNAUTO_SET(1) | 150 ANA_PORT_CFG_RECV_ENA_SET(1) | 151 ANA_PORT_CFG_PORTID_VAL_SET(port->chip_port), 152 ANA_PORT_CFG_LEARNAUTO | 153 ANA_PORT_CFG_RECV_ENA | 154 ANA_PORT_CFG_PORTID_VAL, 155 lan966x, ANA_PORT_CFG(port->chip_port)); 156 157 err = phylink_fwnode_phy_connect(port->phylink, port->fwnode, 0); 158 if (err) { 159 netdev_err(dev, "Could not attach to PHY\n"); 160 return err; 161 } 162 163 phylink_start(port->phylink); 164 165 return 0; 166 } 167 168 static int lan966x_port_stop(struct net_device *dev) 169 { 170 struct lan966x_port *port = netdev_priv(dev); 171 172 lan966x_port_config_down(port); 173 phylink_stop(port->phylink); 174 phylink_disconnect_phy(port->phylink); 175 176 return 0; 177 } 178 179 static int lan966x_port_inj_status(struct lan966x *lan966x) 180 { 181 return lan_rd(lan966x, QS_INJ_STATUS); 182 } 183 184 static int lan966x_port_inj_ready(struct lan966x *lan966x, u8 grp) 185 { 186 u32 val; 187 188 return readx_poll_timeout_atomic(lan966x_port_inj_status, lan966x, val, 189 QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp), 190 READL_SLEEP_US, READL_TIMEOUT_US); 191 } 192 193 static int lan966x_port_ifh_xmit(struct sk_buff *skb, 194 __be32 *ifh, 195 struct net_device *dev) 196 { 197 struct lan966x_port *port = netdev_priv(dev); 198 struct lan966x *lan966x = port->lan966x; 199 u32 i, count, last; 200 u8 grp = 0; 201 u32 val; 202 int err; 203 204 val = lan_rd(lan966x, QS_INJ_STATUS); 205 if (!(QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp)) || 206 (QS_INJ_STATUS_WMARK_REACHED_GET(val) & BIT(grp))) 207 goto err; 208 209 /* Write start of frame */ 210 lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) | 211 QS_INJ_CTRL_SOF_SET(1), 212 lan966x, QS_INJ_CTRL(grp)); 213 214 /* Write IFH header */ 215 for (i = 0; i < IFH_LEN; ++i) { 216 /* Wait until the fifo is ready */ 217 err = lan966x_port_inj_ready(lan966x, grp); 218 if (err) 219 goto err; 220 221 lan_wr((__force u32)ifh[i], lan966x, QS_INJ_WR(grp)); 222 } 223 224 /* Write frame */ 225 count = DIV_ROUND_UP(skb->len, 4); 226 last = skb->len % 4; 227 for (i = 0; i < count; ++i) { 228 /* Wait until the fifo is ready */ 229 err = lan966x_port_inj_ready(lan966x, grp); 230 if (err) 231 goto err; 232 233 lan_wr(((u32 *)skb->data)[i], lan966x, QS_INJ_WR(grp)); 234 } 235 236 /* Add padding */ 237 while (i < (LAN966X_BUFFER_MIN_SZ / 4)) { 238 /* Wait until the fifo is ready */ 239 err = lan966x_port_inj_ready(lan966x, grp); 240 if (err) 241 goto err; 242 243 lan_wr(0, lan966x, QS_INJ_WR(grp)); 244 ++i; 245 } 246 247 /* Inidcate EOF and valid bytes in the last word */ 248 lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) | 249 QS_INJ_CTRL_VLD_BYTES_SET(skb->len < LAN966X_BUFFER_MIN_SZ ? 250 0 : last) | 251 QS_INJ_CTRL_EOF_SET(1), 252 lan966x, QS_INJ_CTRL(grp)); 253 254 /* Add dummy CRC */ 255 lan_wr(0, lan966x, QS_INJ_WR(grp)); 256 skb_tx_timestamp(skb); 257 258 dev->stats.tx_packets++; 259 dev->stats.tx_bytes += skb->len; 260 261 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 262 LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP) 263 return NETDEV_TX_OK; 264 265 dev_consume_skb_any(skb); 266 return NETDEV_TX_OK; 267 268 err: 269 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 270 LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP) 271 lan966x_ptp_txtstamp_release(port, skb); 272 273 return NETDEV_TX_BUSY; 274 } 275 276 static void lan966x_ifh_set_bypass(void *ifh, u64 bypass) 277 { 278 packing(ifh, &bypass, IFH_POS_BYPASS + IFH_WID_BYPASS - 1, 279 IFH_POS_BYPASS, IFH_LEN * 4, PACK, 0); 280 } 281 282 static void lan966x_ifh_set_port(void *ifh, u64 bypass) 283 { 284 packing(ifh, &bypass, IFH_POS_DSTS + IFH_WID_DSTS - 1, 285 IFH_POS_DSTS, IFH_LEN * 4, PACK, 0); 286 } 287 288 static void lan966x_ifh_set_qos_class(void *ifh, u64 bypass) 289 { 290 packing(ifh, &bypass, IFH_POS_QOS_CLASS + IFH_WID_QOS_CLASS - 1, 291 IFH_POS_QOS_CLASS, IFH_LEN * 4, PACK, 0); 292 } 293 294 static void lan966x_ifh_set_ipv(void *ifh, u64 bypass) 295 { 296 packing(ifh, &bypass, IFH_POS_IPV + IFH_WID_IPV - 1, 297 IFH_POS_IPV, IFH_LEN * 4, PACK, 0); 298 } 299 300 static void lan966x_ifh_set_vid(void *ifh, u64 vid) 301 { 302 packing(ifh, &vid, IFH_POS_TCI + IFH_WID_TCI - 1, 303 IFH_POS_TCI, IFH_LEN * 4, PACK, 0); 304 } 305 306 static void lan966x_ifh_set_rew_op(void *ifh, u64 rew_op) 307 { 308 packing(ifh, &rew_op, IFH_POS_REW_CMD + IFH_WID_REW_CMD - 1, 309 IFH_POS_REW_CMD, IFH_LEN * 4, PACK, 0); 310 } 311 312 static void lan966x_ifh_set_timestamp(void *ifh, u64 timestamp) 313 { 314 packing(ifh, ×tamp, IFH_POS_TIMESTAMP + IFH_WID_TIMESTAMP - 1, 315 IFH_POS_TIMESTAMP, IFH_LEN * 4, PACK, 0); 316 } 317 318 static int lan966x_port_xmit(struct sk_buff *skb, struct net_device *dev) 319 { 320 struct lan966x_port *port = netdev_priv(dev); 321 __be32 ifh[IFH_LEN]; 322 int err; 323 324 memset(ifh, 0x0, sizeof(__be32) * IFH_LEN); 325 326 lan966x_ifh_set_bypass(ifh, 1); 327 lan966x_ifh_set_port(ifh, BIT_ULL(port->chip_port)); 328 lan966x_ifh_set_qos_class(ifh, skb->priority >= 7 ? 0x7 : skb->priority); 329 lan966x_ifh_set_ipv(ifh, skb->priority >= 7 ? 0x7 : skb->priority); 330 lan966x_ifh_set_vid(ifh, skb_vlan_tag_get(skb)); 331 332 if (port->lan966x->ptp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) { 333 err = lan966x_ptp_txtstamp_request(port, skb); 334 if (err) 335 return err; 336 337 lan966x_ifh_set_rew_op(ifh, LAN966X_SKB_CB(skb)->rew_op); 338 lan966x_ifh_set_timestamp(ifh, LAN966X_SKB_CB(skb)->ts_id); 339 } 340 341 return lan966x_port_ifh_xmit(skb, ifh, dev); 342 } 343 344 static int lan966x_port_change_mtu(struct net_device *dev, int new_mtu) 345 { 346 struct lan966x_port *port = netdev_priv(dev); 347 struct lan966x *lan966x = port->lan966x; 348 349 lan_wr(DEV_MAC_MAXLEN_CFG_MAX_LEN_SET(new_mtu), 350 lan966x, DEV_MAC_MAXLEN_CFG(port->chip_port)); 351 dev->mtu = new_mtu; 352 353 return 0; 354 } 355 356 static int lan966x_mc_unsync(struct net_device *dev, const unsigned char *addr) 357 { 358 struct lan966x_port *port = netdev_priv(dev); 359 struct lan966x *lan966x = port->lan966x; 360 361 return lan966x_mac_forget(lan966x, addr, HOST_PVID, ENTRYTYPE_LOCKED); 362 } 363 364 static int lan966x_mc_sync(struct net_device *dev, const unsigned char *addr) 365 { 366 struct lan966x_port *port = netdev_priv(dev); 367 struct lan966x *lan966x = port->lan966x; 368 369 return lan966x_mac_cpu_learn(lan966x, addr, HOST_PVID); 370 } 371 372 static void lan966x_port_set_rx_mode(struct net_device *dev) 373 { 374 __dev_mc_sync(dev, lan966x_mc_sync, lan966x_mc_unsync); 375 } 376 377 static int lan966x_port_get_parent_id(struct net_device *dev, 378 struct netdev_phys_item_id *ppid) 379 { 380 struct lan966x_port *port = netdev_priv(dev); 381 struct lan966x *lan966x = port->lan966x; 382 383 ppid->id_len = sizeof(lan966x->base_mac); 384 memcpy(&ppid->id, &lan966x->base_mac, ppid->id_len); 385 386 return 0; 387 } 388 389 static int lan966x_port_ioctl(struct net_device *dev, struct ifreq *ifr, 390 int cmd) 391 { 392 struct lan966x_port *port = netdev_priv(dev); 393 394 if (!phy_has_hwtstamp(dev->phydev) && port->lan966x->ptp) { 395 switch (cmd) { 396 case SIOCSHWTSTAMP: 397 return lan966x_ptp_hwtstamp_set(port, ifr); 398 case SIOCGHWTSTAMP: 399 return lan966x_ptp_hwtstamp_get(port, ifr); 400 } 401 } 402 403 return phy_mii_ioctl(dev->phydev, ifr, cmd); 404 } 405 406 static const struct net_device_ops lan966x_port_netdev_ops = { 407 .ndo_open = lan966x_port_open, 408 .ndo_stop = lan966x_port_stop, 409 .ndo_start_xmit = lan966x_port_xmit, 410 .ndo_change_mtu = lan966x_port_change_mtu, 411 .ndo_set_rx_mode = lan966x_port_set_rx_mode, 412 .ndo_get_phys_port_name = lan966x_port_get_phys_port_name, 413 .ndo_get_stats64 = lan966x_stats_get, 414 .ndo_set_mac_address = lan966x_port_set_mac_address, 415 .ndo_get_port_parent_id = lan966x_port_get_parent_id, 416 .ndo_eth_ioctl = lan966x_port_ioctl, 417 }; 418 419 bool lan966x_netdevice_check(const struct net_device *dev) 420 { 421 return dev->netdev_ops == &lan966x_port_netdev_ops; 422 } 423 424 static bool lan966x_hw_offload(struct lan966x *lan966x, u32 port, 425 struct sk_buff *skb) 426 { 427 u32 val; 428 429 /* The IGMP and MLD frames are not forward by the HW if 430 * multicast snooping is enabled, therefor don't mark as 431 * offload to allow the SW to forward the frames accordingly. 432 */ 433 val = lan_rd(lan966x, ANA_CPU_FWD_CFG(port)); 434 if (!(val & (ANA_CPU_FWD_CFG_IGMP_REDIR_ENA | 435 ANA_CPU_FWD_CFG_MLD_REDIR_ENA))) 436 return true; 437 438 if (skb->protocol == htons(ETH_P_IP) && 439 ip_hdr(skb)->protocol == IPPROTO_IGMP) 440 return false; 441 442 if (IS_ENABLED(CONFIG_IPV6) && 443 skb->protocol == htons(ETH_P_IPV6) && 444 ipv6_addr_is_multicast(&ipv6_hdr(skb)->daddr) && 445 !ipv6_mc_check_mld(skb)) 446 return false; 447 448 return true; 449 } 450 451 static int lan966x_port_xtr_status(struct lan966x *lan966x, u8 grp) 452 { 453 return lan_rd(lan966x, QS_XTR_RD(grp)); 454 } 455 456 static int lan966x_port_xtr_ready(struct lan966x *lan966x, u8 grp) 457 { 458 u32 val; 459 460 return read_poll_timeout(lan966x_port_xtr_status, val, 461 val != XTR_NOT_READY, 462 READL_SLEEP_US, READL_TIMEOUT_US, false, 463 lan966x, grp); 464 } 465 466 static int lan966x_rx_frame_word(struct lan966x *lan966x, u8 grp, u32 *rval) 467 { 468 u32 bytes_valid; 469 u32 val; 470 int err; 471 472 val = lan_rd(lan966x, QS_XTR_RD(grp)); 473 if (val == XTR_NOT_READY) { 474 err = lan966x_port_xtr_ready(lan966x, grp); 475 if (err) 476 return -EIO; 477 } 478 479 switch (val) { 480 case XTR_ABORT: 481 return -EIO; 482 case XTR_EOF_0: 483 case XTR_EOF_1: 484 case XTR_EOF_2: 485 case XTR_EOF_3: 486 case XTR_PRUNED: 487 bytes_valid = XTR_VALID_BYTES(val); 488 val = lan_rd(lan966x, QS_XTR_RD(grp)); 489 if (val == XTR_ESCAPE) 490 *rval = lan_rd(lan966x, QS_XTR_RD(grp)); 491 else 492 *rval = val; 493 494 return bytes_valid; 495 case XTR_ESCAPE: 496 *rval = lan_rd(lan966x, QS_XTR_RD(grp)); 497 498 return 4; 499 default: 500 *rval = val; 501 502 return 4; 503 } 504 } 505 506 static void lan966x_ifh_get_src_port(void *ifh, u64 *src_port) 507 { 508 packing(ifh, src_port, IFH_POS_SRCPORT + IFH_WID_SRCPORT - 1, 509 IFH_POS_SRCPORT, IFH_LEN * 4, UNPACK, 0); 510 } 511 512 static void lan966x_ifh_get_len(void *ifh, u64 *len) 513 { 514 packing(ifh, len, IFH_POS_LEN + IFH_WID_LEN - 1, 515 IFH_POS_LEN, IFH_LEN * 4, UNPACK, 0); 516 } 517 518 static void lan966x_ifh_get_timestamp(void *ifh, u64 *timestamp) 519 { 520 packing(ifh, timestamp, IFH_POS_TIMESTAMP + IFH_WID_TIMESTAMP - 1, 521 IFH_POS_TIMESTAMP, IFH_LEN * 4, UNPACK, 0); 522 } 523 524 static irqreturn_t lan966x_xtr_irq_handler(int irq, void *args) 525 { 526 struct lan966x *lan966x = args; 527 int i, grp = 0, err = 0; 528 529 if (!(lan_rd(lan966x, QS_XTR_DATA_PRESENT) & BIT(grp))) 530 return IRQ_NONE; 531 532 do { 533 u64 src_port, len, timestamp; 534 struct net_device *dev; 535 struct sk_buff *skb; 536 int sz = 0, buf_len; 537 u32 ifh[IFH_LEN]; 538 u32 *buf; 539 u32 val; 540 541 for (i = 0; i < IFH_LEN; i++) { 542 err = lan966x_rx_frame_word(lan966x, grp, &ifh[i]); 543 if (err != 4) 544 goto recover; 545 } 546 547 err = 0; 548 549 lan966x_ifh_get_src_port(ifh, &src_port); 550 lan966x_ifh_get_len(ifh, &len); 551 lan966x_ifh_get_timestamp(ifh, ×tamp); 552 553 WARN_ON(src_port >= lan966x->num_phys_ports); 554 555 dev = lan966x->ports[src_port]->dev; 556 skb = netdev_alloc_skb(dev, len); 557 if (unlikely(!skb)) { 558 netdev_err(dev, "Unable to allocate sk_buff\n"); 559 err = -ENOMEM; 560 break; 561 } 562 buf_len = len - ETH_FCS_LEN; 563 buf = (u32 *)skb_put(skb, buf_len); 564 565 len = 0; 566 do { 567 sz = lan966x_rx_frame_word(lan966x, grp, &val); 568 if (sz < 0) { 569 kfree_skb(skb); 570 goto recover; 571 } 572 573 *buf++ = val; 574 len += sz; 575 } while (len < buf_len); 576 577 /* Read the FCS */ 578 sz = lan966x_rx_frame_word(lan966x, grp, &val); 579 if (sz < 0) { 580 kfree_skb(skb); 581 goto recover; 582 } 583 584 /* Update the statistics if part of the FCS was read before */ 585 len -= ETH_FCS_LEN - sz; 586 587 if (unlikely(dev->features & NETIF_F_RXFCS)) { 588 buf = (u32 *)skb_put(skb, ETH_FCS_LEN); 589 *buf = val; 590 } 591 592 lan966x_ptp_rxtstamp(lan966x, skb, timestamp); 593 skb->protocol = eth_type_trans(skb, dev); 594 595 if (lan966x->bridge_mask & BIT(src_port)) { 596 skb->offload_fwd_mark = 1; 597 598 skb_reset_network_header(skb); 599 if (!lan966x_hw_offload(lan966x, src_port, skb)) 600 skb->offload_fwd_mark = 0; 601 } 602 603 netif_rx(skb); 604 dev->stats.rx_bytes += len; 605 dev->stats.rx_packets++; 606 607 recover: 608 if (sz < 0 || err) 609 lan_rd(lan966x, QS_XTR_RD(grp)); 610 611 } while (lan_rd(lan966x, QS_XTR_DATA_PRESENT) & BIT(grp)); 612 613 return IRQ_HANDLED; 614 } 615 616 static irqreturn_t lan966x_ana_irq_handler(int irq, void *args) 617 { 618 struct lan966x *lan966x = args; 619 620 return lan966x_mac_irq_handler(lan966x); 621 } 622 623 static void lan966x_cleanup_ports(struct lan966x *lan966x) 624 { 625 struct lan966x_port *port; 626 int p; 627 628 for (p = 0; p < lan966x->num_phys_ports; p++) { 629 port = lan966x->ports[p]; 630 if (!port) 631 continue; 632 633 if (port->dev) 634 unregister_netdev(port->dev); 635 636 if (port->phylink) { 637 rtnl_lock(); 638 lan966x_port_stop(port->dev); 639 rtnl_unlock(); 640 phylink_destroy(port->phylink); 641 port->phylink = NULL; 642 } 643 644 if (port->fwnode) 645 fwnode_handle_put(port->fwnode); 646 } 647 648 disable_irq(lan966x->xtr_irq); 649 lan966x->xtr_irq = -ENXIO; 650 651 if (lan966x->ana_irq) { 652 disable_irq(lan966x->ana_irq); 653 lan966x->ana_irq = -ENXIO; 654 } 655 } 656 657 static int lan966x_probe_port(struct lan966x *lan966x, u32 p, 658 phy_interface_t phy_mode, 659 struct fwnode_handle *portnp) 660 { 661 struct lan966x_port *port; 662 struct phylink *phylink; 663 struct net_device *dev; 664 int err; 665 666 if (p >= lan966x->num_phys_ports) 667 return -EINVAL; 668 669 dev = devm_alloc_etherdev_mqs(lan966x->dev, 670 sizeof(struct lan966x_port), 8, 1); 671 if (!dev) 672 return -ENOMEM; 673 674 SET_NETDEV_DEV(dev, lan966x->dev); 675 port = netdev_priv(dev); 676 port->dev = dev; 677 port->lan966x = lan966x; 678 port->chip_port = p; 679 lan966x->ports[p] = port; 680 681 dev->max_mtu = ETH_MAX_MTU; 682 683 dev->netdev_ops = &lan966x_port_netdev_ops; 684 dev->ethtool_ops = &lan966x_ethtool_ops; 685 dev->features |= NETIF_F_HW_VLAN_CTAG_TX | 686 NETIF_F_HW_VLAN_STAG_TX; 687 dev->needed_headroom = IFH_LEN * sizeof(u32); 688 689 eth_hw_addr_gen(dev, lan966x->base_mac, p + 1); 690 691 lan966x_mac_learn(lan966x, PGID_CPU, dev->dev_addr, HOST_PVID, 692 ENTRYTYPE_LOCKED); 693 694 port->phylink_config.dev = &port->dev->dev; 695 port->phylink_config.type = PHYLINK_NETDEV; 696 port->phylink_pcs.poll = true; 697 port->phylink_pcs.ops = &lan966x_phylink_pcs_ops; 698 699 port->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | 700 MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD; 701 702 __set_bit(PHY_INTERFACE_MODE_MII, 703 port->phylink_config.supported_interfaces); 704 __set_bit(PHY_INTERFACE_MODE_GMII, 705 port->phylink_config.supported_interfaces); 706 __set_bit(PHY_INTERFACE_MODE_SGMII, 707 port->phylink_config.supported_interfaces); 708 __set_bit(PHY_INTERFACE_MODE_QSGMII, 709 port->phylink_config.supported_interfaces); 710 __set_bit(PHY_INTERFACE_MODE_1000BASEX, 711 port->phylink_config.supported_interfaces); 712 __set_bit(PHY_INTERFACE_MODE_2500BASEX, 713 port->phylink_config.supported_interfaces); 714 715 phylink = phylink_create(&port->phylink_config, 716 portnp, 717 phy_mode, 718 &lan966x_phylink_mac_ops); 719 if (IS_ERR(phylink)) { 720 port->dev = NULL; 721 return PTR_ERR(phylink); 722 } 723 724 port->phylink = phylink; 725 726 err = register_netdev(dev); 727 if (err) { 728 dev_err(lan966x->dev, "register_netdev failed\n"); 729 return err; 730 } 731 732 lan966x_vlan_port_set_vlan_aware(port, 0); 733 lan966x_vlan_port_set_vid(port, HOST_PVID, false, false); 734 lan966x_vlan_port_apply(port); 735 736 return 0; 737 } 738 739 static void lan966x_init(struct lan966x *lan966x) 740 { 741 u32 p, i; 742 743 /* MAC table initialization */ 744 lan966x_mac_init(lan966x); 745 746 lan966x_vlan_init(lan966x); 747 748 /* Flush queues */ 749 lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) | 750 GENMASK(1, 0), 751 lan966x, QS_XTR_FLUSH); 752 753 /* Allow to drain */ 754 mdelay(1); 755 756 /* All Queues normal */ 757 lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) & 758 ~(GENMASK(1, 0)), 759 lan966x, QS_XTR_FLUSH); 760 761 /* Set MAC age time to default value, the entry is aged after 762 * 2 * AGE_PERIOD 763 */ 764 lan_wr(ANA_AUTOAGE_AGE_PERIOD_SET(BR_DEFAULT_AGEING_TIME / 2 / HZ), 765 lan966x, ANA_AUTOAGE); 766 767 /* Disable learning for frames discarded by VLAN ingress filtering */ 768 lan_rmw(ANA_ADVLEARN_VLAN_CHK_SET(1), 769 ANA_ADVLEARN_VLAN_CHK, 770 lan966x, ANA_ADVLEARN); 771 772 /* Setup frame ageing - "2 sec" - The unit is 6.5 us on lan966x */ 773 lan_wr(SYS_FRM_AGING_AGE_TX_ENA_SET(1) | 774 (20000000 / 65), 775 lan966x, SYS_FRM_AGING); 776 777 /* Map the 8 CPU extraction queues to CPU port */ 778 lan_wr(0, lan966x, QSYS_CPU_GROUP_MAP); 779 780 /* Do byte-swap and expect status after last data word 781 * Extraction: Mode: manual extraction) | Byte_swap 782 */ 783 lan_wr(QS_XTR_GRP_CFG_MODE_SET(1) | 784 QS_XTR_GRP_CFG_BYTE_SWAP_SET(1), 785 lan966x, QS_XTR_GRP_CFG(0)); 786 787 /* Injection: Mode: manual injection | Byte_swap */ 788 lan_wr(QS_INJ_GRP_CFG_MODE_SET(1) | 789 QS_INJ_GRP_CFG_BYTE_SWAP_SET(1), 790 lan966x, QS_INJ_GRP_CFG(0)); 791 792 lan_rmw(QS_INJ_CTRL_GAP_SIZE_SET(0), 793 QS_INJ_CTRL_GAP_SIZE, 794 lan966x, QS_INJ_CTRL(0)); 795 796 /* Enable IFH insertion/parsing on CPU ports */ 797 lan_wr(SYS_PORT_MODE_INCL_INJ_HDR_SET(1) | 798 SYS_PORT_MODE_INCL_XTR_HDR_SET(1), 799 lan966x, SYS_PORT_MODE(CPU_PORT)); 800 801 /* Setup flooding PGIDs */ 802 lan_wr(ANA_FLOODING_IPMC_FLD_MC4_DATA_SET(PGID_MCIPV4) | 803 ANA_FLOODING_IPMC_FLD_MC4_CTRL_SET(PGID_MC) | 804 ANA_FLOODING_IPMC_FLD_MC6_DATA_SET(PGID_MCIPV6) | 805 ANA_FLOODING_IPMC_FLD_MC6_CTRL_SET(PGID_MC), 806 lan966x, ANA_FLOODING_IPMC); 807 808 /* There are 8 priorities */ 809 for (i = 0; i < 8; ++i) 810 lan_rmw(ANA_FLOODING_FLD_MULTICAST_SET(PGID_MC) | 811 ANA_FLOODING_FLD_UNICAST_SET(PGID_UC) | 812 ANA_FLOODING_FLD_BROADCAST_SET(PGID_BC), 813 ANA_FLOODING_FLD_MULTICAST | 814 ANA_FLOODING_FLD_UNICAST | 815 ANA_FLOODING_FLD_BROADCAST, 816 lan966x, ANA_FLOODING(i)); 817 818 for (i = 0; i < PGID_ENTRIES; ++i) 819 /* Set all the entries to obey VLAN_VLAN */ 820 lan_rmw(ANA_PGID_CFG_OBEY_VLAN_SET(1), 821 ANA_PGID_CFG_OBEY_VLAN, 822 lan966x, ANA_PGID_CFG(i)); 823 824 for (p = 0; p < lan966x->num_phys_ports; p++) { 825 /* Disable bridging by default */ 826 lan_rmw(ANA_PGID_PGID_SET(0x0), 827 ANA_PGID_PGID, 828 lan966x, ANA_PGID(p + PGID_SRC)); 829 830 /* Do not forward BPDU frames to the front ports and copy them 831 * to CPU 832 */ 833 lan_wr(0xffff, lan966x, ANA_CPU_FWD_BPDU_CFG(p)); 834 } 835 836 /* Set source buffer size for each priority and each port to 1500 bytes */ 837 for (i = 0; i <= QSYS_Q_RSRV; ++i) { 838 lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(i)); 839 lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(512 + i)); 840 } 841 842 /* Enable switching to/from cpu port */ 843 lan_wr(QSYS_SW_PORT_MODE_PORT_ENA_SET(1) | 844 QSYS_SW_PORT_MODE_SCH_NEXT_CFG_SET(1) | 845 QSYS_SW_PORT_MODE_INGRESS_DROP_MODE_SET(1), 846 lan966x, QSYS_SW_PORT_MODE(CPU_PORT)); 847 848 /* Configure and enable the CPU port */ 849 lan_rmw(ANA_PGID_PGID_SET(0), 850 ANA_PGID_PGID, 851 lan966x, ANA_PGID(CPU_PORT)); 852 lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT)), 853 ANA_PGID_PGID, 854 lan966x, ANA_PGID(PGID_CPU)); 855 856 /* Multicast to all other ports */ 857 lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0), 858 ANA_PGID_PGID, 859 lan966x, ANA_PGID(PGID_MC)); 860 861 /* This will be controlled by mrouter ports */ 862 lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0), 863 ANA_PGID_PGID, 864 lan966x, ANA_PGID(PGID_MCIPV4)); 865 866 lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0), 867 ANA_PGID_PGID, 868 lan966x, ANA_PGID(PGID_MCIPV6)); 869 870 /* Unicast to all other ports */ 871 lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0), 872 ANA_PGID_PGID, 873 lan966x, ANA_PGID(PGID_UC)); 874 875 /* Broadcast to the CPU port and to other ports */ 876 lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT) | GENMASK(lan966x->num_phys_ports - 1, 0)), 877 ANA_PGID_PGID, 878 lan966x, ANA_PGID(PGID_BC)); 879 880 lan_wr(REW_PORT_CFG_NO_REWRITE_SET(1), 881 lan966x, REW_PORT_CFG(CPU_PORT)); 882 883 lan_rmw(ANA_ANAINTR_INTR_ENA_SET(1), 884 ANA_ANAINTR_INTR_ENA, 885 lan966x, ANA_ANAINTR); 886 } 887 888 static int lan966x_ram_init(struct lan966x *lan966x) 889 { 890 return lan_rd(lan966x, SYS_RAM_INIT); 891 } 892 893 static int lan966x_reset_switch(struct lan966x *lan966x) 894 { 895 struct reset_control *switch_reset, *phy_reset; 896 int val = 0; 897 int ret; 898 899 switch_reset = devm_reset_control_get_shared(lan966x->dev, "switch"); 900 if (IS_ERR(switch_reset)) 901 return dev_err_probe(lan966x->dev, PTR_ERR(switch_reset), 902 "Could not obtain switch reset"); 903 904 phy_reset = devm_reset_control_get_shared(lan966x->dev, "phy"); 905 if (IS_ERR(phy_reset)) 906 return dev_err_probe(lan966x->dev, PTR_ERR(phy_reset), 907 "Could not obtain phy reset\n"); 908 909 reset_control_reset(switch_reset); 910 reset_control_reset(phy_reset); 911 912 lan_wr(SYS_RESET_CFG_CORE_ENA_SET(0), lan966x, SYS_RESET_CFG); 913 lan_wr(SYS_RAM_INIT_RAM_INIT_SET(1), lan966x, SYS_RAM_INIT); 914 ret = readx_poll_timeout(lan966x_ram_init, lan966x, 915 val, (val & BIT(1)) == 0, READL_SLEEP_US, 916 READL_TIMEOUT_US); 917 if (ret) 918 return ret; 919 920 lan_wr(SYS_RESET_CFG_CORE_ENA_SET(1), lan966x, SYS_RESET_CFG); 921 922 return 0; 923 } 924 925 static int lan966x_probe(struct platform_device *pdev) 926 { 927 struct fwnode_handle *ports, *portnp; 928 struct lan966x *lan966x; 929 u8 mac_addr[ETH_ALEN]; 930 int err, i; 931 932 lan966x = devm_kzalloc(&pdev->dev, sizeof(*lan966x), GFP_KERNEL); 933 if (!lan966x) 934 return -ENOMEM; 935 936 platform_set_drvdata(pdev, lan966x); 937 lan966x->dev = &pdev->dev; 938 939 if (!device_get_mac_address(&pdev->dev, mac_addr)) { 940 ether_addr_copy(lan966x->base_mac, mac_addr); 941 } else { 942 pr_info("MAC addr was not set, use random MAC\n"); 943 eth_random_addr(lan966x->base_mac); 944 lan966x->base_mac[5] &= 0xf0; 945 } 946 947 ports = device_get_named_child_node(&pdev->dev, "ethernet-ports"); 948 if (!ports) 949 return dev_err_probe(&pdev->dev, -ENODEV, 950 "no ethernet-ports child found\n"); 951 952 err = lan966x_create_targets(pdev, lan966x); 953 if (err) 954 return dev_err_probe(&pdev->dev, err, 955 "Failed to create targets"); 956 957 err = lan966x_reset_switch(lan966x); 958 if (err) 959 return dev_err_probe(&pdev->dev, err, "Reset failed"); 960 961 i = 0; 962 fwnode_for_each_available_child_node(ports, portnp) 963 ++i; 964 965 lan966x->num_phys_ports = i; 966 lan966x->ports = devm_kcalloc(&pdev->dev, lan966x->num_phys_ports, 967 sizeof(struct lan966x_port *), 968 GFP_KERNEL); 969 if (!lan966x->ports) 970 return -ENOMEM; 971 972 /* There QS system has 32KB of memory */ 973 lan966x->shared_queue_sz = LAN966X_BUFFER_MEMORY; 974 975 /* set irq */ 976 lan966x->xtr_irq = platform_get_irq_byname(pdev, "xtr"); 977 if (lan966x->xtr_irq <= 0) 978 return -EINVAL; 979 980 err = devm_request_threaded_irq(&pdev->dev, lan966x->xtr_irq, NULL, 981 lan966x_xtr_irq_handler, IRQF_ONESHOT, 982 "frame extraction", lan966x); 983 if (err) { 984 pr_err("Unable to use xtr irq"); 985 return -ENODEV; 986 } 987 988 lan966x->ana_irq = platform_get_irq_byname(pdev, "ana"); 989 if (lan966x->ana_irq) { 990 err = devm_request_threaded_irq(&pdev->dev, lan966x->ana_irq, NULL, 991 lan966x_ana_irq_handler, IRQF_ONESHOT, 992 "ana irq", lan966x); 993 if (err) 994 return dev_err_probe(&pdev->dev, err, "Unable to use ana irq"); 995 } 996 997 lan966x->ptp_irq = platform_get_irq_byname(pdev, "ptp"); 998 if (lan966x->ptp_irq > 0) { 999 err = devm_request_threaded_irq(&pdev->dev, lan966x->ptp_irq, NULL, 1000 lan966x_ptp_irq_handler, IRQF_ONESHOT, 1001 "ptp irq", lan966x); 1002 if (err) 1003 return dev_err_probe(&pdev->dev, err, "Unable to use ptp irq"); 1004 1005 lan966x->ptp = 1; 1006 } 1007 1008 /* init switch */ 1009 lan966x_init(lan966x); 1010 lan966x_stats_init(lan966x); 1011 1012 /* go over the child nodes */ 1013 fwnode_for_each_available_child_node(ports, portnp) { 1014 phy_interface_t phy_mode; 1015 struct phy *serdes; 1016 u32 p; 1017 1018 if (fwnode_property_read_u32(portnp, "reg", &p)) 1019 continue; 1020 1021 phy_mode = fwnode_get_phy_mode(portnp); 1022 err = lan966x_probe_port(lan966x, p, phy_mode, portnp); 1023 if (err) 1024 goto cleanup_ports; 1025 1026 /* Read needed configuration */ 1027 lan966x->ports[p]->config.portmode = phy_mode; 1028 lan966x->ports[p]->fwnode = fwnode_handle_get(portnp); 1029 1030 serdes = devm_of_phy_get(lan966x->dev, to_of_node(portnp), NULL); 1031 if (!IS_ERR(serdes)) 1032 lan966x->ports[p]->serdes = serdes; 1033 1034 lan966x_port_init(lan966x->ports[p]); 1035 } 1036 1037 lan966x_mdb_init(lan966x); 1038 err = lan966x_fdb_init(lan966x); 1039 if (err) 1040 goto cleanup_ports; 1041 1042 err = lan966x_ptp_init(lan966x); 1043 if (err) 1044 goto cleanup_fdb; 1045 1046 return 0; 1047 1048 cleanup_fdb: 1049 lan966x_fdb_deinit(lan966x); 1050 1051 cleanup_ports: 1052 fwnode_handle_put(portnp); 1053 1054 lan966x_cleanup_ports(lan966x); 1055 1056 cancel_delayed_work_sync(&lan966x->stats_work); 1057 destroy_workqueue(lan966x->stats_queue); 1058 mutex_destroy(&lan966x->stats_lock); 1059 1060 return err; 1061 } 1062 1063 static int lan966x_remove(struct platform_device *pdev) 1064 { 1065 struct lan966x *lan966x = platform_get_drvdata(pdev); 1066 1067 lan966x_cleanup_ports(lan966x); 1068 1069 cancel_delayed_work_sync(&lan966x->stats_work); 1070 destroy_workqueue(lan966x->stats_queue); 1071 mutex_destroy(&lan966x->stats_lock); 1072 1073 lan966x_mac_purge_entries(lan966x); 1074 lan966x_mdb_deinit(lan966x); 1075 lan966x_fdb_deinit(lan966x); 1076 lan966x_ptp_deinit(lan966x); 1077 1078 return 0; 1079 } 1080 1081 static struct platform_driver lan966x_driver = { 1082 .probe = lan966x_probe, 1083 .remove = lan966x_remove, 1084 .driver = { 1085 .name = "lan966x-switch", 1086 .of_match_table = lan966x_match, 1087 }, 1088 }; 1089 1090 static int __init lan966x_switch_driver_init(void) 1091 { 1092 int ret; 1093 1094 lan966x_register_notifier_blocks(); 1095 1096 ret = platform_driver_register(&lan966x_driver); 1097 if (ret) 1098 goto err; 1099 1100 return 0; 1101 1102 err: 1103 lan966x_unregister_notifier_blocks(); 1104 return ret; 1105 } 1106 1107 static void __exit lan966x_switch_driver_exit(void) 1108 { 1109 platform_driver_unregister(&lan966x_driver); 1110 lan966x_unregister_notifier_blocks(); 1111 } 1112 1113 module_init(lan966x_switch_driver_init); 1114 module_exit(lan966x_switch_driver_exit); 1115 1116 MODULE_DESCRIPTION("Microchip LAN966X switch driver"); 1117 MODULE_AUTHOR("Horatiu Vultur <horatiu.vultur@microchip.com>"); 1118 MODULE_LICENSE("Dual MIT/GPL"); 1119