1 // SPDX-License-Identifier: GPL-2.0+ 2 3 #include <linux/bpf.h> 4 #include <linux/filter.h> 5 #include <net/page_pool/helpers.h> 6 7 #include "lan966x_main.h" 8 9 static int lan966x_fdma_channel_active(struct lan966x *lan966x) 10 { 11 return lan_rd(lan966x, FDMA_CH_ACTIVE); 12 } 13 14 static struct page *lan966x_fdma_rx_alloc_page(struct lan966x_rx *rx, 15 struct lan966x_db *db) 16 { 17 struct page *page; 18 19 page = page_pool_dev_alloc_pages(rx->page_pool); 20 if (unlikely(!page)) 21 return NULL; 22 23 db->dataptr = page_pool_get_dma_addr(page) + XDP_PACKET_HEADROOM; 24 25 return page; 26 } 27 28 static void lan966x_fdma_rx_free_pages(struct lan966x_rx *rx) 29 { 30 struct fdma *fdma = &rx->fdma; 31 int i, j; 32 33 for (i = 0; i < fdma->n_dcbs; ++i) { 34 for (j = 0; j < fdma->n_dbs; ++j) 35 page_pool_put_full_page(rx->page_pool, 36 rx->page[i][j], false); 37 } 38 } 39 40 static void lan966x_fdma_rx_free_page(struct lan966x_rx *rx) 41 { 42 struct fdma *fdma = &rx->fdma; 43 struct page *page; 44 45 page = rx->page[fdma->dcb_index][fdma->db_index]; 46 if (unlikely(!page)) 47 return; 48 49 page_pool_recycle_direct(rx->page_pool, page); 50 } 51 52 static void lan966x_fdma_rx_add_dcb(struct lan966x_rx *rx, 53 struct lan966x_rx_dcb *dcb, 54 u64 nextptr) 55 { 56 struct fdma *fdma = &rx->fdma; 57 struct lan966x_db *db; 58 int i; 59 60 for (i = 0; i < fdma->n_dbs; ++i) { 61 db = &dcb->db[i]; 62 db->status = FDMA_DCB_STATUS_INTR; 63 } 64 65 dcb->nextptr = FDMA_DCB_INVALID_DATA; 66 dcb->info = FDMA_DCB_INFO_DATAL(PAGE_SIZE << rx->page_order); 67 68 rx->last_entry->nextptr = nextptr; 69 rx->last_entry = dcb; 70 } 71 72 static int lan966x_fdma_rx_alloc_page_pool(struct lan966x_rx *rx) 73 { 74 struct lan966x *lan966x = rx->lan966x; 75 struct page_pool_params pp_params = { 76 .order = rx->page_order, 77 .flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV, 78 .pool_size = rx->fdma.n_dcbs, 79 .nid = NUMA_NO_NODE, 80 .dev = lan966x->dev, 81 .dma_dir = DMA_FROM_DEVICE, 82 .offset = XDP_PACKET_HEADROOM, 83 .max_len = rx->max_mtu - 84 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)), 85 }; 86 87 if (lan966x_xdp_present(lan966x)) 88 pp_params.dma_dir = DMA_BIDIRECTIONAL; 89 90 rx->page_pool = page_pool_create(&pp_params); 91 92 for (int i = 0; i < lan966x->num_phys_ports; ++i) { 93 struct lan966x_port *port; 94 95 if (!lan966x->ports[i]) 96 continue; 97 98 port = lan966x->ports[i]; 99 xdp_rxq_info_unreg_mem_model(&port->xdp_rxq); 100 xdp_rxq_info_reg_mem_model(&port->xdp_rxq, MEM_TYPE_PAGE_POOL, 101 rx->page_pool); 102 } 103 104 return PTR_ERR_OR_ZERO(rx->page_pool); 105 } 106 107 static int lan966x_fdma_rx_alloc(struct lan966x_rx *rx) 108 { 109 struct lan966x *lan966x = rx->lan966x; 110 struct fdma *fdma = &rx->fdma; 111 struct lan966x_rx_dcb *dcb; 112 struct lan966x_db *db; 113 struct page *page; 114 int i, j; 115 int size; 116 117 if (lan966x_fdma_rx_alloc_page_pool(rx)) 118 return PTR_ERR(rx->page_pool); 119 120 /* calculate how many pages are needed to allocate the dcbs */ 121 size = sizeof(struct lan966x_rx_dcb) * fdma->n_dcbs; 122 size = ALIGN(size, PAGE_SIZE); 123 124 rx->dcbs = dma_alloc_coherent(lan966x->dev, size, &rx->dma, GFP_KERNEL); 125 if (!rx->dcbs) 126 return -ENOMEM; 127 128 rx->last_entry = rx->dcbs; 129 fdma->db_index = 0; 130 fdma->dcb_index = 0; 131 132 /* Now for each dcb allocate the dbs */ 133 for (i = 0; i < fdma->n_dcbs; ++i) { 134 dcb = &rx->dcbs[i]; 135 dcb->info = 0; 136 137 /* For each db allocate a page and map it to the DB dataptr. */ 138 for (j = 0; j < fdma->n_dbs; ++j) { 139 db = &dcb->db[j]; 140 page = lan966x_fdma_rx_alloc_page(rx, db); 141 if (!page) 142 return -ENOMEM; 143 144 db->status = 0; 145 rx->page[i][j] = page; 146 } 147 148 lan966x_fdma_rx_add_dcb(rx, dcb, rx->dma + sizeof(*dcb) * i); 149 } 150 151 return 0; 152 } 153 154 static void lan966x_fdma_rx_advance_dcb(struct lan966x_rx *rx) 155 { 156 struct fdma *fdma = &rx->fdma; 157 158 fdma->dcb_index++; 159 fdma->dcb_index &= fdma->n_dcbs - 1; 160 } 161 162 static void lan966x_fdma_rx_free(struct lan966x_rx *rx) 163 { 164 struct lan966x *lan966x = rx->lan966x; 165 struct fdma *fdma = &rx->fdma; 166 u32 size; 167 168 /* Now it is possible to do the cleanup of dcb */ 169 size = sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; 170 size = ALIGN(size, PAGE_SIZE); 171 dma_free_coherent(lan966x->dev, size, rx->dcbs, rx->dma); 172 } 173 174 static void lan966x_fdma_rx_start(struct lan966x_rx *rx) 175 { 176 struct lan966x *lan966x = rx->lan966x; 177 struct fdma *fdma = &rx->fdma; 178 u32 mask; 179 180 /* When activating a channel, first is required to write the first DCB 181 * address and then to activate it 182 */ 183 lan_wr(lower_32_bits((u64)rx->dma), lan966x, 184 FDMA_DCB_LLP(fdma->channel_id)); 185 lan_wr(upper_32_bits((u64)rx->dma), lan966x, 186 FDMA_DCB_LLP1(fdma->channel_id)); 187 188 lan_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(fdma->n_dbs) | 189 FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_SET(1) | 190 FDMA_CH_CFG_CH_INJ_PORT_SET(0) | 191 FDMA_CH_CFG_CH_MEM_SET(1), 192 lan966x, FDMA_CH_CFG(fdma->channel_id)); 193 194 /* Start fdma */ 195 lan_rmw(FDMA_PORT_CTRL_XTR_STOP_SET(0), 196 FDMA_PORT_CTRL_XTR_STOP, 197 lan966x, FDMA_PORT_CTRL(0)); 198 199 /* Enable interrupts */ 200 mask = lan_rd(lan966x, FDMA_INTR_DB_ENA); 201 mask = FDMA_INTR_DB_ENA_INTR_DB_ENA_GET(mask); 202 mask |= BIT(fdma->channel_id); 203 lan_rmw(FDMA_INTR_DB_ENA_INTR_DB_ENA_SET(mask), 204 FDMA_INTR_DB_ENA_INTR_DB_ENA, 205 lan966x, FDMA_INTR_DB_ENA); 206 207 /* Activate the channel */ 208 lan_rmw(FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(BIT(fdma->channel_id)), 209 FDMA_CH_ACTIVATE_CH_ACTIVATE, 210 lan966x, FDMA_CH_ACTIVATE); 211 } 212 213 static void lan966x_fdma_rx_disable(struct lan966x_rx *rx) 214 { 215 struct lan966x *lan966x = rx->lan966x; 216 struct fdma *fdma = &rx->fdma; 217 u32 val; 218 219 /* Disable the channel */ 220 lan_rmw(FDMA_CH_DISABLE_CH_DISABLE_SET(BIT(fdma->channel_id)), 221 FDMA_CH_DISABLE_CH_DISABLE, 222 lan966x, FDMA_CH_DISABLE); 223 224 readx_poll_timeout_atomic(lan966x_fdma_channel_active, lan966x, 225 val, !(val & BIT(fdma->channel_id)), 226 READL_SLEEP_US, READL_TIMEOUT_US); 227 228 lan_rmw(FDMA_CH_DB_DISCARD_DB_DISCARD_SET(BIT(fdma->channel_id)), 229 FDMA_CH_DB_DISCARD_DB_DISCARD, 230 lan966x, FDMA_CH_DB_DISCARD); 231 } 232 233 static void lan966x_fdma_rx_reload(struct lan966x_rx *rx) 234 { 235 struct lan966x *lan966x = rx->lan966x; 236 237 lan_rmw(FDMA_CH_RELOAD_CH_RELOAD_SET(BIT(rx->fdma.channel_id)), 238 FDMA_CH_RELOAD_CH_RELOAD, 239 lan966x, FDMA_CH_RELOAD); 240 } 241 242 static void lan966x_fdma_tx_add_dcb(struct lan966x_tx *tx, 243 struct lan966x_tx_dcb *dcb) 244 { 245 dcb->nextptr = FDMA_DCB_INVALID_DATA; 246 dcb->info = 0; 247 } 248 249 static int lan966x_fdma_tx_alloc(struct lan966x_tx *tx) 250 { 251 struct lan966x *lan966x = tx->lan966x; 252 struct fdma *fdma = &tx->fdma; 253 struct lan966x_tx_dcb *dcb; 254 struct lan966x_db *db; 255 int size; 256 int i, j; 257 258 tx->dcbs_buf = kcalloc(fdma->n_dcbs, sizeof(struct lan966x_tx_dcb_buf), 259 GFP_KERNEL); 260 if (!tx->dcbs_buf) 261 return -ENOMEM; 262 263 /* calculate how many pages are needed to allocate the dcbs */ 264 size = sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; 265 size = ALIGN(size, PAGE_SIZE); 266 tx->dcbs = dma_alloc_coherent(lan966x->dev, size, &tx->dma, GFP_KERNEL); 267 if (!tx->dcbs) 268 goto out; 269 270 /* Now for each dcb allocate the db */ 271 for (i = 0; i < fdma->n_dcbs; ++i) { 272 dcb = &tx->dcbs[i]; 273 274 for (j = 0; j < fdma->n_dbs; ++j) { 275 db = &dcb->db[j]; 276 db->dataptr = 0; 277 db->status = 0; 278 } 279 280 lan966x_fdma_tx_add_dcb(tx, dcb); 281 } 282 283 return 0; 284 285 out: 286 kfree(tx->dcbs_buf); 287 return -ENOMEM; 288 } 289 290 static void lan966x_fdma_tx_free(struct lan966x_tx *tx) 291 { 292 struct lan966x *lan966x = tx->lan966x; 293 struct fdma *fdma = &tx->fdma; 294 int size; 295 296 kfree(tx->dcbs_buf); 297 298 size = sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; 299 size = ALIGN(size, PAGE_SIZE); 300 dma_free_coherent(lan966x->dev, size, tx->dcbs, tx->dma); 301 } 302 303 static void lan966x_fdma_tx_activate(struct lan966x_tx *tx) 304 { 305 struct lan966x *lan966x = tx->lan966x; 306 struct fdma *fdma = &tx->fdma; 307 u32 mask; 308 309 /* When activating a channel, first is required to write the first DCB 310 * address and then to activate it 311 */ 312 lan_wr(lower_32_bits((u64)tx->dma), lan966x, 313 FDMA_DCB_LLP(fdma->channel_id)); 314 lan_wr(upper_32_bits((u64)tx->dma), lan966x, 315 FDMA_DCB_LLP1(fdma->channel_id)); 316 317 lan_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(fdma->n_dbs) | 318 FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_SET(1) | 319 FDMA_CH_CFG_CH_INJ_PORT_SET(0) | 320 FDMA_CH_CFG_CH_MEM_SET(1), 321 lan966x, FDMA_CH_CFG(fdma->channel_id)); 322 323 /* Start fdma */ 324 lan_rmw(FDMA_PORT_CTRL_INJ_STOP_SET(0), 325 FDMA_PORT_CTRL_INJ_STOP, 326 lan966x, FDMA_PORT_CTRL(0)); 327 328 /* Enable interrupts */ 329 mask = lan_rd(lan966x, FDMA_INTR_DB_ENA); 330 mask = FDMA_INTR_DB_ENA_INTR_DB_ENA_GET(mask); 331 mask |= BIT(fdma->channel_id); 332 lan_rmw(FDMA_INTR_DB_ENA_INTR_DB_ENA_SET(mask), 333 FDMA_INTR_DB_ENA_INTR_DB_ENA, 334 lan966x, FDMA_INTR_DB_ENA); 335 336 /* Activate the channel */ 337 lan_rmw(FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(BIT(fdma->channel_id)), 338 FDMA_CH_ACTIVATE_CH_ACTIVATE, 339 lan966x, FDMA_CH_ACTIVATE); 340 } 341 342 static void lan966x_fdma_tx_disable(struct lan966x_tx *tx) 343 { 344 struct lan966x *lan966x = tx->lan966x; 345 struct fdma *fdma = &tx->fdma; 346 u32 val; 347 348 /* Disable the channel */ 349 lan_rmw(FDMA_CH_DISABLE_CH_DISABLE_SET(BIT(fdma->channel_id)), 350 FDMA_CH_DISABLE_CH_DISABLE, 351 lan966x, FDMA_CH_DISABLE); 352 353 readx_poll_timeout_atomic(lan966x_fdma_channel_active, lan966x, 354 val, !(val & BIT(fdma->channel_id)), 355 READL_SLEEP_US, READL_TIMEOUT_US); 356 357 lan_rmw(FDMA_CH_DB_DISCARD_DB_DISCARD_SET(BIT(fdma->channel_id)), 358 FDMA_CH_DB_DISCARD_DB_DISCARD, 359 lan966x, FDMA_CH_DB_DISCARD); 360 361 tx->activated = false; 362 tx->last_in_use = -1; 363 } 364 365 static void lan966x_fdma_tx_reload(struct lan966x_tx *tx) 366 { 367 struct lan966x *lan966x = tx->lan966x; 368 369 /* Write the registers to reload the channel */ 370 lan_rmw(FDMA_CH_RELOAD_CH_RELOAD_SET(BIT(tx->fdma.channel_id)), 371 FDMA_CH_RELOAD_CH_RELOAD, 372 lan966x, FDMA_CH_RELOAD); 373 } 374 375 static void lan966x_fdma_wakeup_netdev(struct lan966x *lan966x) 376 { 377 struct lan966x_port *port; 378 int i; 379 380 for (i = 0; i < lan966x->num_phys_ports; ++i) { 381 port = lan966x->ports[i]; 382 if (!port) 383 continue; 384 385 if (netif_queue_stopped(port->dev)) 386 netif_wake_queue(port->dev); 387 } 388 } 389 390 static void lan966x_fdma_stop_netdev(struct lan966x *lan966x) 391 { 392 struct lan966x_port *port; 393 int i; 394 395 for (i = 0; i < lan966x->num_phys_ports; ++i) { 396 port = lan966x->ports[i]; 397 if (!port) 398 continue; 399 400 netif_stop_queue(port->dev); 401 } 402 } 403 404 static void lan966x_fdma_tx_clear_buf(struct lan966x *lan966x, int weight) 405 { 406 struct lan966x_tx *tx = &lan966x->tx; 407 struct lan966x_rx *rx = &lan966x->rx; 408 struct lan966x_tx_dcb_buf *dcb_buf; 409 struct xdp_frame_bulk bq; 410 struct lan966x_db *db; 411 unsigned long flags; 412 bool clear = false; 413 int i; 414 415 xdp_frame_bulk_init(&bq); 416 417 spin_lock_irqsave(&lan966x->tx_lock, flags); 418 for (i = 0; i < tx->fdma.n_dcbs; ++i) { 419 dcb_buf = &tx->dcbs_buf[i]; 420 421 if (!dcb_buf->used) 422 continue; 423 424 db = &tx->dcbs[i].db[0]; 425 if (!(db->status & FDMA_DCB_STATUS_DONE)) 426 continue; 427 428 dcb_buf->dev->stats.tx_packets++; 429 dcb_buf->dev->stats.tx_bytes += dcb_buf->len; 430 431 dcb_buf->used = false; 432 if (dcb_buf->use_skb) { 433 dma_unmap_single(lan966x->dev, 434 dcb_buf->dma_addr, 435 dcb_buf->len, 436 DMA_TO_DEVICE); 437 438 if (!dcb_buf->ptp) 439 napi_consume_skb(dcb_buf->data.skb, weight); 440 } else { 441 if (dcb_buf->xdp_ndo) 442 dma_unmap_single(lan966x->dev, 443 dcb_buf->dma_addr, 444 dcb_buf->len, 445 DMA_TO_DEVICE); 446 447 if (dcb_buf->xdp_ndo) 448 xdp_return_frame_bulk(dcb_buf->data.xdpf, &bq); 449 else 450 page_pool_recycle_direct(rx->page_pool, 451 dcb_buf->data.page); 452 } 453 454 clear = true; 455 } 456 457 xdp_flush_frame_bulk(&bq); 458 459 if (clear) 460 lan966x_fdma_wakeup_netdev(lan966x); 461 462 spin_unlock_irqrestore(&lan966x->tx_lock, flags); 463 } 464 465 static bool lan966x_fdma_rx_more_frames(struct lan966x_rx *rx) 466 { 467 struct fdma *fdma = &rx->fdma; 468 struct lan966x_db *db; 469 470 /* Check if there is any data */ 471 db = &rx->dcbs[fdma->dcb_index].db[fdma->db_index]; 472 if (unlikely(!(db->status & FDMA_DCB_STATUS_DONE))) 473 return false; 474 475 return true; 476 } 477 478 static int lan966x_fdma_rx_check_frame(struct lan966x_rx *rx, u64 *src_port) 479 { 480 struct lan966x *lan966x = rx->lan966x; 481 struct fdma *fdma = &rx->fdma; 482 struct lan966x_port *port; 483 struct lan966x_db *db; 484 struct page *page; 485 486 db = &rx->dcbs[fdma->dcb_index].db[fdma->db_index]; 487 page = rx->page[fdma->dcb_index][fdma->db_index]; 488 if (unlikely(!page)) 489 return FDMA_ERROR; 490 491 dma_sync_single_for_cpu(lan966x->dev, 492 (dma_addr_t)db->dataptr + XDP_PACKET_HEADROOM, 493 FDMA_DCB_STATUS_BLOCKL(db->status), 494 DMA_FROM_DEVICE); 495 496 lan966x_ifh_get_src_port(page_address(page) + XDP_PACKET_HEADROOM, 497 src_port); 498 if (WARN_ON(*src_port >= lan966x->num_phys_ports)) 499 return FDMA_ERROR; 500 501 port = lan966x->ports[*src_port]; 502 if (!lan966x_xdp_port_present(port)) 503 return FDMA_PASS; 504 505 return lan966x_xdp_run(port, page, FDMA_DCB_STATUS_BLOCKL(db->status)); 506 } 507 508 static struct sk_buff *lan966x_fdma_rx_get_frame(struct lan966x_rx *rx, 509 u64 src_port) 510 { 511 struct lan966x *lan966x = rx->lan966x; 512 struct fdma *fdma = &rx->fdma; 513 struct lan966x_db *db; 514 struct sk_buff *skb; 515 struct page *page; 516 u64 timestamp; 517 518 /* Get the received frame and unmap it */ 519 db = &rx->dcbs[fdma->dcb_index].db[fdma->db_index]; 520 page = rx->page[fdma->dcb_index][fdma->db_index]; 521 522 skb = build_skb(page_address(page), PAGE_SIZE << rx->page_order); 523 if (unlikely(!skb)) 524 goto free_page; 525 526 skb_mark_for_recycle(skb); 527 528 skb_reserve(skb, XDP_PACKET_HEADROOM); 529 skb_put(skb, FDMA_DCB_STATUS_BLOCKL(db->status)); 530 531 lan966x_ifh_get_timestamp(skb->data, ×tamp); 532 533 skb->dev = lan966x->ports[src_port]->dev; 534 skb_pull(skb, IFH_LEN_BYTES); 535 536 if (likely(!(skb->dev->features & NETIF_F_RXFCS))) 537 skb_trim(skb, skb->len - ETH_FCS_LEN); 538 539 lan966x_ptp_rxtstamp(lan966x, skb, src_port, timestamp); 540 skb->protocol = eth_type_trans(skb, skb->dev); 541 542 if (lan966x->bridge_mask & BIT(src_port)) { 543 skb->offload_fwd_mark = 1; 544 545 skb_reset_network_header(skb); 546 if (!lan966x_hw_offload(lan966x, src_port, skb)) 547 skb->offload_fwd_mark = 0; 548 } 549 550 skb->dev->stats.rx_bytes += skb->len; 551 skb->dev->stats.rx_packets++; 552 553 return skb; 554 555 free_page: 556 page_pool_recycle_direct(rx->page_pool, page); 557 558 return NULL; 559 } 560 561 static int lan966x_fdma_napi_poll(struct napi_struct *napi, int weight) 562 { 563 struct lan966x *lan966x = container_of(napi, struct lan966x, napi); 564 struct lan966x_rx *rx = &lan966x->rx; 565 struct lan966x_rx_dcb *old_dcb; 566 struct fdma *fdma = &rx->fdma; 567 int dcb_reload, counter = 0; 568 struct lan966x_db *db; 569 bool redirect = false; 570 struct sk_buff *skb; 571 struct page *page; 572 u64 src_port; 573 u64 nextptr; 574 575 dcb_reload = fdma->dcb_index; 576 577 lan966x_fdma_tx_clear_buf(lan966x, weight); 578 579 /* Get all received skb */ 580 while (counter < weight) { 581 if (!lan966x_fdma_rx_more_frames(rx)) 582 break; 583 584 counter++; 585 586 switch (lan966x_fdma_rx_check_frame(rx, &src_port)) { 587 case FDMA_PASS: 588 break; 589 case FDMA_ERROR: 590 lan966x_fdma_rx_free_page(rx); 591 lan966x_fdma_rx_advance_dcb(rx); 592 goto allocate_new; 593 case FDMA_REDIRECT: 594 redirect = true; 595 fallthrough; 596 case FDMA_TX: 597 lan966x_fdma_rx_advance_dcb(rx); 598 continue; 599 case FDMA_DROP: 600 lan966x_fdma_rx_free_page(rx); 601 lan966x_fdma_rx_advance_dcb(rx); 602 continue; 603 } 604 605 skb = lan966x_fdma_rx_get_frame(rx, src_port); 606 lan966x_fdma_rx_advance_dcb(rx); 607 if (!skb) 608 goto allocate_new; 609 610 napi_gro_receive(&lan966x->napi, skb); 611 } 612 613 allocate_new: 614 /* Allocate new pages and map them */ 615 while (dcb_reload != fdma->dcb_index) { 616 db = &rx->dcbs[dcb_reload].db[fdma->db_index]; 617 page = lan966x_fdma_rx_alloc_page(rx, db); 618 if (unlikely(!page)) 619 break; 620 rx->page[dcb_reload][fdma->db_index] = page; 621 622 old_dcb = &rx->dcbs[dcb_reload]; 623 dcb_reload++; 624 dcb_reload &= fdma->n_dcbs - 1; 625 626 nextptr = rx->dma + ((unsigned long)old_dcb - 627 (unsigned long)rx->dcbs); 628 lan966x_fdma_rx_add_dcb(rx, old_dcb, nextptr); 629 lan966x_fdma_rx_reload(rx); 630 } 631 632 if (redirect) 633 xdp_do_flush(); 634 635 if (counter < weight && napi_complete_done(napi, counter)) 636 lan_wr(0xff, lan966x, FDMA_INTR_DB_ENA); 637 638 return counter; 639 } 640 641 irqreturn_t lan966x_fdma_irq_handler(int irq, void *args) 642 { 643 struct lan966x *lan966x = args; 644 u32 db, err, err_type; 645 646 db = lan_rd(lan966x, FDMA_INTR_DB); 647 err = lan_rd(lan966x, FDMA_INTR_ERR); 648 649 if (db) { 650 lan_wr(0, lan966x, FDMA_INTR_DB_ENA); 651 lan_wr(db, lan966x, FDMA_INTR_DB); 652 653 napi_schedule(&lan966x->napi); 654 } 655 656 if (err) { 657 err_type = lan_rd(lan966x, FDMA_ERRORS); 658 659 WARN(1, "Unexpected error: %d, error_type: %d\n", err, err_type); 660 661 lan_wr(err, lan966x, FDMA_INTR_ERR); 662 lan_wr(err_type, lan966x, FDMA_ERRORS); 663 } 664 665 return IRQ_HANDLED; 666 } 667 668 static int lan966x_fdma_get_next_dcb(struct lan966x_tx *tx) 669 { 670 struct lan966x_tx_dcb_buf *dcb_buf; 671 struct fdma *fdma = &tx->fdma; 672 int i; 673 674 for (i = 0; i < fdma->n_dcbs; ++i) { 675 dcb_buf = &tx->dcbs_buf[i]; 676 if (!dcb_buf->used && i != tx->last_in_use) 677 return i; 678 } 679 680 return -1; 681 } 682 683 static void lan966x_fdma_tx_setup_dcb(struct lan966x_tx *tx, 684 int next_to_use, int len, 685 dma_addr_t dma_addr) 686 { 687 struct lan966x_tx_dcb *next_dcb; 688 struct lan966x_db *next_db; 689 690 next_dcb = &tx->dcbs[next_to_use]; 691 next_dcb->nextptr = FDMA_DCB_INVALID_DATA; 692 693 next_db = &next_dcb->db[0]; 694 next_db->dataptr = dma_addr; 695 next_db->status = FDMA_DCB_STATUS_SOF | 696 FDMA_DCB_STATUS_EOF | 697 FDMA_DCB_STATUS_INTR | 698 FDMA_DCB_STATUS_BLOCKO(0) | 699 FDMA_DCB_STATUS_BLOCKL(len); 700 } 701 702 static void lan966x_fdma_tx_start(struct lan966x_tx *tx, int next_to_use) 703 { 704 struct lan966x *lan966x = tx->lan966x; 705 struct lan966x_tx_dcb *dcb; 706 707 if (likely(lan966x->tx.activated)) { 708 /* Connect current dcb to the next db */ 709 dcb = &tx->dcbs[tx->last_in_use]; 710 dcb->nextptr = tx->dma + (next_to_use * 711 sizeof(struct lan966x_tx_dcb)); 712 713 lan966x_fdma_tx_reload(tx); 714 } else { 715 /* Because it is first time, then just activate */ 716 lan966x->tx.activated = true; 717 lan966x_fdma_tx_activate(tx); 718 } 719 720 /* Move to next dcb because this last in use */ 721 tx->last_in_use = next_to_use; 722 } 723 724 int lan966x_fdma_xmit_xdpf(struct lan966x_port *port, void *ptr, u32 len) 725 { 726 struct lan966x *lan966x = port->lan966x; 727 struct lan966x_tx_dcb_buf *next_dcb_buf; 728 struct lan966x_tx *tx = &lan966x->tx; 729 struct xdp_frame *xdpf; 730 dma_addr_t dma_addr; 731 struct page *page; 732 int next_to_use; 733 __be32 *ifh; 734 int ret = 0; 735 736 spin_lock(&lan966x->tx_lock); 737 738 /* Get next index */ 739 next_to_use = lan966x_fdma_get_next_dcb(tx); 740 if (next_to_use < 0) { 741 netif_stop_queue(port->dev); 742 ret = NETDEV_TX_BUSY; 743 goto out; 744 } 745 746 /* Get the next buffer */ 747 next_dcb_buf = &tx->dcbs_buf[next_to_use]; 748 749 /* Generate new IFH */ 750 if (!len) { 751 xdpf = ptr; 752 753 if (xdpf->headroom < IFH_LEN_BYTES) { 754 ret = NETDEV_TX_OK; 755 goto out; 756 } 757 758 ifh = xdpf->data - IFH_LEN_BYTES; 759 memset(ifh, 0x0, sizeof(__be32) * IFH_LEN); 760 lan966x_ifh_set_bypass(ifh, 1); 761 lan966x_ifh_set_port(ifh, BIT_ULL(port->chip_port)); 762 763 dma_addr = dma_map_single(lan966x->dev, 764 xdpf->data - IFH_LEN_BYTES, 765 xdpf->len + IFH_LEN_BYTES, 766 DMA_TO_DEVICE); 767 if (dma_mapping_error(lan966x->dev, dma_addr)) { 768 ret = NETDEV_TX_OK; 769 goto out; 770 } 771 772 next_dcb_buf->data.xdpf = xdpf; 773 next_dcb_buf->len = xdpf->len + IFH_LEN_BYTES; 774 775 /* Setup next dcb */ 776 lan966x_fdma_tx_setup_dcb(tx, next_to_use, 777 xdpf->len + IFH_LEN_BYTES, 778 dma_addr); 779 } else { 780 page = ptr; 781 782 ifh = page_address(page) + XDP_PACKET_HEADROOM; 783 memset(ifh, 0x0, sizeof(__be32) * IFH_LEN); 784 lan966x_ifh_set_bypass(ifh, 1); 785 lan966x_ifh_set_port(ifh, BIT_ULL(port->chip_port)); 786 787 dma_addr = page_pool_get_dma_addr(page); 788 dma_sync_single_for_device(lan966x->dev, 789 dma_addr + XDP_PACKET_HEADROOM, 790 len + IFH_LEN_BYTES, 791 DMA_TO_DEVICE); 792 793 next_dcb_buf->data.page = page; 794 next_dcb_buf->len = len + IFH_LEN_BYTES; 795 796 /* Setup next dcb */ 797 lan966x_fdma_tx_setup_dcb(tx, next_to_use, 798 len + IFH_LEN_BYTES, 799 dma_addr + XDP_PACKET_HEADROOM); 800 } 801 802 /* Fill up the buffer */ 803 next_dcb_buf->use_skb = false; 804 next_dcb_buf->xdp_ndo = !len; 805 next_dcb_buf->dma_addr = dma_addr; 806 next_dcb_buf->used = true; 807 next_dcb_buf->ptp = false; 808 next_dcb_buf->dev = port->dev; 809 810 /* Start the transmission */ 811 lan966x_fdma_tx_start(tx, next_to_use); 812 813 out: 814 spin_unlock(&lan966x->tx_lock); 815 816 return ret; 817 } 818 819 int lan966x_fdma_xmit(struct sk_buff *skb, __be32 *ifh, struct net_device *dev) 820 { 821 struct lan966x_port *port = netdev_priv(dev); 822 struct lan966x *lan966x = port->lan966x; 823 struct lan966x_tx_dcb_buf *next_dcb_buf; 824 struct lan966x_tx *tx = &lan966x->tx; 825 int needed_headroom; 826 int needed_tailroom; 827 dma_addr_t dma_addr; 828 int next_to_use; 829 int err; 830 831 /* Get next index */ 832 next_to_use = lan966x_fdma_get_next_dcb(tx); 833 if (next_to_use < 0) { 834 netif_stop_queue(dev); 835 return NETDEV_TX_BUSY; 836 } 837 838 if (skb_put_padto(skb, ETH_ZLEN)) { 839 dev->stats.tx_dropped++; 840 return NETDEV_TX_OK; 841 } 842 843 /* skb processing */ 844 needed_headroom = max_t(int, IFH_LEN_BYTES - skb_headroom(skb), 0); 845 needed_tailroom = max_t(int, ETH_FCS_LEN - skb_tailroom(skb), 0); 846 if (needed_headroom || needed_tailroom || skb_header_cloned(skb)) { 847 err = pskb_expand_head(skb, needed_headroom, needed_tailroom, 848 GFP_ATOMIC); 849 if (unlikely(err)) { 850 dev->stats.tx_dropped++; 851 err = NETDEV_TX_OK; 852 goto release; 853 } 854 } 855 856 skb_tx_timestamp(skb); 857 skb_push(skb, IFH_LEN_BYTES); 858 memcpy(skb->data, ifh, IFH_LEN_BYTES); 859 skb_put(skb, 4); 860 861 dma_addr = dma_map_single(lan966x->dev, skb->data, skb->len, 862 DMA_TO_DEVICE); 863 if (dma_mapping_error(lan966x->dev, dma_addr)) { 864 dev->stats.tx_dropped++; 865 err = NETDEV_TX_OK; 866 goto release; 867 } 868 869 /* Setup next dcb */ 870 lan966x_fdma_tx_setup_dcb(tx, next_to_use, skb->len, dma_addr); 871 872 /* Fill up the buffer */ 873 next_dcb_buf = &tx->dcbs_buf[next_to_use]; 874 next_dcb_buf->use_skb = true; 875 next_dcb_buf->data.skb = skb; 876 next_dcb_buf->xdp_ndo = false; 877 next_dcb_buf->len = skb->len; 878 next_dcb_buf->dma_addr = dma_addr; 879 next_dcb_buf->used = true; 880 next_dcb_buf->ptp = false; 881 next_dcb_buf->dev = dev; 882 883 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 884 LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP) 885 next_dcb_buf->ptp = true; 886 887 /* Start the transmission */ 888 lan966x_fdma_tx_start(tx, next_to_use); 889 890 return NETDEV_TX_OK; 891 892 release: 893 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 894 LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP) 895 lan966x_ptp_txtstamp_release(port, skb); 896 897 dev_kfree_skb_any(skb); 898 return err; 899 } 900 901 static int lan966x_fdma_get_max_mtu(struct lan966x *lan966x) 902 { 903 int max_mtu = 0; 904 int i; 905 906 for (i = 0; i < lan966x->num_phys_ports; ++i) { 907 struct lan966x_port *port; 908 int mtu; 909 910 port = lan966x->ports[i]; 911 if (!port) 912 continue; 913 914 mtu = lan_rd(lan966x, DEV_MAC_MAXLEN_CFG(port->chip_port)); 915 if (mtu > max_mtu) 916 max_mtu = mtu; 917 } 918 919 return max_mtu; 920 } 921 922 static int lan966x_qsys_sw_status(struct lan966x *lan966x) 923 { 924 return lan_rd(lan966x, QSYS_SW_STATUS(CPU_PORT)); 925 } 926 927 static int lan966x_fdma_reload(struct lan966x *lan966x, int new_mtu) 928 { 929 struct page_pool *page_pool; 930 dma_addr_t rx_dma; 931 void *rx_dcbs; 932 u32 size; 933 int err; 934 935 /* Store these for later to free them */ 936 rx_dma = lan966x->rx.dma; 937 rx_dcbs = lan966x->rx.dcbs; 938 page_pool = lan966x->rx.page_pool; 939 940 napi_synchronize(&lan966x->napi); 941 napi_disable(&lan966x->napi); 942 lan966x_fdma_stop_netdev(lan966x); 943 944 lan966x_fdma_rx_disable(&lan966x->rx); 945 lan966x_fdma_rx_free_pages(&lan966x->rx); 946 lan966x->rx.page_order = round_up(new_mtu, PAGE_SIZE) / PAGE_SIZE - 1; 947 lan966x->rx.max_mtu = new_mtu; 948 err = lan966x_fdma_rx_alloc(&lan966x->rx); 949 if (err) 950 goto restore; 951 lan966x_fdma_rx_start(&lan966x->rx); 952 953 size = sizeof(struct lan966x_rx_dcb) * lan966x->rx.fdma.n_dcbs; 954 size = ALIGN(size, PAGE_SIZE); 955 dma_free_coherent(lan966x->dev, size, rx_dcbs, rx_dma); 956 957 page_pool_destroy(page_pool); 958 959 lan966x_fdma_wakeup_netdev(lan966x); 960 napi_enable(&lan966x->napi); 961 962 return err; 963 restore: 964 lan966x->rx.page_pool = page_pool; 965 lan966x->rx.dma = rx_dma; 966 lan966x->rx.dcbs = rx_dcbs; 967 lan966x_fdma_rx_start(&lan966x->rx); 968 969 return err; 970 } 971 972 static int lan966x_fdma_get_max_frame(struct lan966x *lan966x) 973 { 974 return lan966x_fdma_get_max_mtu(lan966x) + 975 IFH_LEN_BYTES + 976 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + 977 VLAN_HLEN * 2 + 978 XDP_PACKET_HEADROOM; 979 } 980 981 static int __lan966x_fdma_reload(struct lan966x *lan966x, int max_mtu) 982 { 983 int err; 984 u32 val; 985 986 /* Disable the CPU port */ 987 lan_rmw(QSYS_SW_PORT_MODE_PORT_ENA_SET(0), 988 QSYS_SW_PORT_MODE_PORT_ENA, 989 lan966x, QSYS_SW_PORT_MODE(CPU_PORT)); 990 991 /* Flush the CPU queues */ 992 readx_poll_timeout(lan966x_qsys_sw_status, lan966x, 993 val, !(QSYS_SW_STATUS_EQ_AVAIL_GET(val)), 994 READL_SLEEP_US, READL_TIMEOUT_US); 995 996 /* Add a sleep in case there are frames between the queues and the CPU 997 * port 998 */ 999 usleep_range(1000, 2000); 1000 1001 err = lan966x_fdma_reload(lan966x, max_mtu); 1002 1003 /* Enable back the CPU port */ 1004 lan_rmw(QSYS_SW_PORT_MODE_PORT_ENA_SET(1), 1005 QSYS_SW_PORT_MODE_PORT_ENA, 1006 lan966x, QSYS_SW_PORT_MODE(CPU_PORT)); 1007 1008 return err; 1009 } 1010 1011 int lan966x_fdma_change_mtu(struct lan966x *lan966x) 1012 { 1013 int max_mtu; 1014 1015 max_mtu = lan966x_fdma_get_max_frame(lan966x); 1016 if (max_mtu == lan966x->rx.max_mtu) 1017 return 0; 1018 1019 return __lan966x_fdma_reload(lan966x, max_mtu); 1020 } 1021 1022 int lan966x_fdma_reload_page_pool(struct lan966x *lan966x) 1023 { 1024 int max_mtu; 1025 1026 max_mtu = lan966x_fdma_get_max_frame(lan966x); 1027 return __lan966x_fdma_reload(lan966x, max_mtu); 1028 } 1029 1030 void lan966x_fdma_netdev_init(struct lan966x *lan966x, struct net_device *dev) 1031 { 1032 if (lan966x->fdma_ndev) 1033 return; 1034 1035 lan966x->fdma_ndev = dev; 1036 netif_napi_add(dev, &lan966x->napi, lan966x_fdma_napi_poll); 1037 napi_enable(&lan966x->napi); 1038 } 1039 1040 void lan966x_fdma_netdev_deinit(struct lan966x *lan966x, struct net_device *dev) 1041 { 1042 if (lan966x->fdma_ndev == dev) { 1043 netif_napi_del(&lan966x->napi); 1044 lan966x->fdma_ndev = NULL; 1045 } 1046 } 1047 1048 int lan966x_fdma_init(struct lan966x *lan966x) 1049 { 1050 int err; 1051 1052 if (!lan966x->fdma) 1053 return 0; 1054 1055 lan966x->rx.lan966x = lan966x; 1056 lan966x->rx.fdma.channel_id = FDMA_XTR_CHANNEL; 1057 lan966x->rx.fdma.n_dcbs = FDMA_DCB_MAX; 1058 lan966x->rx.fdma.n_dbs = FDMA_RX_DCB_MAX_DBS; 1059 lan966x->rx.max_mtu = lan966x_fdma_get_max_frame(lan966x); 1060 lan966x->tx.lan966x = lan966x; 1061 lan966x->tx.fdma.channel_id = FDMA_INJ_CHANNEL; 1062 lan966x->tx.fdma.n_dcbs = FDMA_DCB_MAX; 1063 lan966x->tx.fdma.n_dbs = FDMA_TX_DCB_MAX_DBS; 1064 lan966x->tx.last_in_use = -1; 1065 1066 err = lan966x_fdma_rx_alloc(&lan966x->rx); 1067 if (err) 1068 return err; 1069 1070 err = lan966x_fdma_tx_alloc(&lan966x->tx); 1071 if (err) { 1072 lan966x_fdma_rx_free(&lan966x->rx); 1073 return err; 1074 } 1075 1076 lan966x_fdma_rx_start(&lan966x->rx); 1077 1078 return 0; 1079 } 1080 1081 void lan966x_fdma_deinit(struct lan966x *lan966x) 1082 { 1083 if (!lan966x->fdma) 1084 return; 1085 1086 lan966x_fdma_rx_disable(&lan966x->rx); 1087 lan966x_fdma_tx_disable(&lan966x->tx); 1088 1089 napi_synchronize(&lan966x->napi); 1090 napi_disable(&lan966x->napi); 1091 1092 lan966x_fdma_rx_free_pages(&lan966x->rx); 1093 lan966x_fdma_rx_free(&lan966x->rx); 1094 page_pool_destroy(lan966x->rx.page_pool); 1095 lan966x_fdma_tx_free(&lan966x->tx); 1096 } 1097