1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (C) 2018 Microchip Technology Inc. */ 3 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/crc32.h> 9 #include <linux/microchipphy.h> 10 #include <linux/net_tstamp.h> 11 #include <linux/of_mdio.h> 12 #include <linux/of_net.h> 13 #include <linux/phy.h> 14 #include <linux/phy_fixed.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/iopoll.h> 17 #include <linux/crc16.h> 18 #include "lan743x_main.h" 19 #include "lan743x_ethtool.h" 20 21 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 22 { 23 pci_release_selected_regions(adapter->pdev, 24 pci_select_bars(adapter->pdev, 25 IORESOURCE_MEM)); 26 pci_disable_device(adapter->pdev); 27 } 28 29 static int lan743x_pci_init(struct lan743x_adapter *adapter, 30 struct pci_dev *pdev) 31 { 32 unsigned long bars = 0; 33 int ret; 34 35 adapter->pdev = pdev; 36 ret = pci_enable_device_mem(pdev); 37 if (ret) 38 goto return_error; 39 40 netif_info(adapter, probe, adapter->netdev, 41 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n", 42 pdev->vendor, pdev->device); 43 bars = pci_select_bars(pdev, IORESOURCE_MEM); 44 if (!test_bit(0, &bars)) 45 goto disable_device; 46 47 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME); 48 if (ret) 49 goto disable_device; 50 51 pci_set_master(pdev); 52 return 0; 53 54 disable_device: 55 pci_disable_device(adapter->pdev); 56 57 return_error: 58 return ret; 59 } 60 61 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset) 62 { 63 return ioread32(&adapter->csr.csr_address[offset]); 64 } 65 66 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, 67 u32 data) 68 { 69 iowrite32(data, &adapter->csr.csr_address[offset]); 70 } 71 72 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset) 73 74 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter) 75 { 76 u32 data; 77 78 data = lan743x_csr_read(adapter, HW_CFG); 79 data |= HW_CFG_LRST_; 80 lan743x_csr_write(adapter, HW_CFG, data); 81 82 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data, 83 !(data & HW_CFG_LRST_), 100000, 10000000); 84 } 85 86 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter, 87 int offset, u32 bit_mask, 88 int target_value, int usleep_min, 89 int usleep_max, int count) 90 { 91 u32 data; 92 93 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data, 94 target_value == ((data & bit_mask) ? 1 : 0), 95 usleep_max, usleep_min * count); 96 } 97 98 static int lan743x_csr_init(struct lan743x_adapter *adapter) 99 { 100 struct lan743x_csr *csr = &adapter->csr; 101 resource_size_t bar_start, bar_length; 102 int result; 103 104 bar_start = pci_resource_start(adapter->pdev, 0); 105 bar_length = pci_resource_len(adapter->pdev, 0); 106 csr->csr_address = devm_ioremap(&adapter->pdev->dev, 107 bar_start, bar_length); 108 if (!csr->csr_address) { 109 result = -ENOMEM; 110 goto clean_up; 111 } 112 113 csr->id_rev = lan743x_csr_read(adapter, ID_REV); 114 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 115 netif_info(adapter, probe, adapter->netdev, 116 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n", 117 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), 118 FPGA_REV_GET_MINOR_(csr->fpga_rev)); 119 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) { 120 result = -ENODEV; 121 goto clean_up; 122 } 123 124 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 125 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { 126 case ID_REV_CHIP_REV_A0_: 127 csr->flags |= LAN743X_CSR_FLAG_IS_A0; 128 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 129 break; 130 case ID_REV_CHIP_REV_B0_: 131 csr->flags |= LAN743X_CSR_FLAG_IS_B0; 132 break; 133 } 134 135 result = lan743x_csr_light_reset(adapter); 136 if (result) 137 goto clean_up; 138 return 0; 139 clean_up: 140 return result; 141 } 142 143 static void lan743x_intr_software_isr(void *context) 144 { 145 struct lan743x_adapter *adapter = context; 146 struct lan743x_intr *intr = &adapter->intr; 147 u32 int_sts; 148 149 int_sts = lan743x_csr_read(adapter, INT_STS); 150 if (int_sts & INT_BIT_SW_GP_) { 151 lan743x_csr_write(adapter, INT_STS, INT_BIT_SW_GP_); 152 intr->software_isr_flag = 1; 153 } 154 } 155 156 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags) 157 { 158 struct lan743x_tx *tx = context; 159 struct lan743x_adapter *adapter = tx->adapter; 160 bool enable_flag = true; 161 162 lan743x_csr_read(adapter, INT_EN_SET); 163 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 164 lan743x_csr_write(adapter, INT_EN_CLR, 165 INT_BIT_DMA_TX_(tx->channel_number)); 166 } 167 168 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { 169 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 170 u32 dmac_int_sts; 171 u32 dmac_int_en; 172 173 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 174 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 175 else 176 dmac_int_sts = ioc_bit; 177 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 178 dmac_int_en = lan743x_csr_read(adapter, 179 DMAC_INT_EN_SET); 180 else 181 dmac_int_en = ioc_bit; 182 183 dmac_int_en &= ioc_bit; 184 dmac_int_sts &= dmac_int_en; 185 if (dmac_int_sts & ioc_bit) { 186 napi_schedule(&tx->napi); 187 enable_flag = false;/* poll func will enable later */ 188 } 189 } 190 191 if (enable_flag) 192 /* enable isr */ 193 lan743x_csr_write(adapter, INT_EN_SET, 194 INT_BIT_DMA_TX_(tx->channel_number)); 195 } 196 197 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags) 198 { 199 struct lan743x_rx *rx = context; 200 struct lan743x_adapter *adapter = rx->adapter; 201 bool enable_flag = true; 202 203 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 204 lan743x_csr_write(adapter, INT_EN_CLR, 205 INT_BIT_DMA_RX_(rx->channel_number)); 206 } 207 208 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) { 209 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number); 210 u32 dmac_int_sts; 211 u32 dmac_int_en; 212 213 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 214 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 215 else 216 dmac_int_sts = rx_frame_bit; 217 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 218 dmac_int_en = lan743x_csr_read(adapter, 219 DMAC_INT_EN_SET); 220 else 221 dmac_int_en = rx_frame_bit; 222 223 dmac_int_en &= rx_frame_bit; 224 dmac_int_sts &= dmac_int_en; 225 if (dmac_int_sts & rx_frame_bit) { 226 napi_schedule(&rx->napi); 227 enable_flag = false;/* poll funct will enable later */ 228 } 229 } 230 231 if (enable_flag) { 232 /* enable isr */ 233 lan743x_csr_write(adapter, INT_EN_SET, 234 INT_BIT_DMA_RX_(rx->channel_number)); 235 } 236 } 237 238 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags) 239 { 240 struct lan743x_adapter *adapter = context; 241 unsigned int channel; 242 243 if (int_sts & INT_BIT_ALL_RX_) { 244 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS; 245 channel++) { 246 u32 int_bit = INT_BIT_DMA_RX_(channel); 247 248 if (int_sts & int_bit) { 249 lan743x_rx_isr(&adapter->rx[channel], 250 int_bit, flags); 251 int_sts &= ~int_bit; 252 } 253 } 254 } 255 if (int_sts & INT_BIT_ALL_TX_) { 256 for (channel = 0; channel < LAN743X_USED_TX_CHANNELS; 257 channel++) { 258 u32 int_bit = INT_BIT_DMA_TX_(channel); 259 260 if (int_sts & int_bit) { 261 lan743x_tx_isr(&adapter->tx[channel], 262 int_bit, flags); 263 int_sts &= ~int_bit; 264 } 265 } 266 } 267 if (int_sts & INT_BIT_ALL_OTHER_) { 268 if (int_sts & INT_BIT_SW_GP_) { 269 lan743x_intr_software_isr(adapter); 270 int_sts &= ~INT_BIT_SW_GP_; 271 } 272 if (int_sts & INT_BIT_1588_) { 273 lan743x_ptp_isr(adapter); 274 int_sts &= ~INT_BIT_1588_; 275 } 276 } 277 if (int_sts) 278 lan743x_csr_write(adapter, INT_EN_CLR, int_sts); 279 } 280 281 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr) 282 { 283 struct lan743x_vector *vector = ptr; 284 struct lan743x_adapter *adapter = vector->adapter; 285 irqreturn_t result = IRQ_NONE; 286 u32 int_enables; 287 u32 int_sts; 288 289 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) { 290 int_sts = lan743x_csr_read(adapter, INT_STS); 291 } else if (vector->flags & 292 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C | 293 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) { 294 int_sts = lan743x_csr_read(adapter, INT_STS_R2C); 295 } else { 296 /* use mask as implied status */ 297 int_sts = vector->int_mask | INT_BIT_MAS_; 298 } 299 300 if (!(int_sts & INT_BIT_MAS_)) 301 goto irq_done; 302 303 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR) 304 /* disable vector interrupt */ 305 lan743x_csr_write(adapter, 306 INT_VEC_EN_CLR, 307 INT_VEC_EN_(vector->vector_index)); 308 309 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR) 310 /* disable master interrupt */ 311 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 312 313 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) { 314 int_enables = lan743x_csr_read(adapter, INT_EN_SET); 315 } else { 316 /* use vector mask as implied enable mask */ 317 int_enables = vector->int_mask; 318 } 319 320 int_sts &= int_enables; 321 int_sts &= vector->int_mask; 322 if (int_sts) { 323 if (vector->handler) { 324 vector->handler(vector->context, 325 int_sts, vector->flags); 326 } else { 327 /* disable interrupts on this vector */ 328 lan743x_csr_write(adapter, INT_EN_CLR, 329 vector->int_mask); 330 } 331 result = IRQ_HANDLED; 332 } 333 334 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET) 335 /* enable master interrupt */ 336 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 337 338 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET) 339 /* enable vector interrupt */ 340 lan743x_csr_write(adapter, 341 INT_VEC_EN_SET, 342 INT_VEC_EN_(vector->vector_index)); 343 irq_done: 344 return result; 345 } 346 347 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter) 348 { 349 struct lan743x_intr *intr = &adapter->intr; 350 int result = -ENODEV; 351 int timeout = 10; 352 353 intr->software_isr_flag = 0; 354 355 /* enable interrupt */ 356 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_); 357 358 /* activate interrupt here */ 359 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_); 360 while ((timeout > 0) && (!(intr->software_isr_flag))) { 361 usleep_range(1000, 20000); 362 timeout--; 363 } 364 365 if (intr->software_isr_flag) 366 result = 0; 367 368 /* disable interrupts */ 369 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 370 return result; 371 } 372 373 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter, 374 int vector_index, u32 flags, 375 u32 int_mask, 376 lan743x_vector_handler handler, 377 void *context) 378 { 379 struct lan743x_vector *vector = &adapter->intr.vector_list 380 [vector_index]; 381 int ret; 382 383 vector->adapter = adapter; 384 vector->flags = flags; 385 vector->vector_index = vector_index; 386 vector->int_mask = int_mask; 387 vector->handler = handler; 388 vector->context = context; 389 390 ret = request_irq(vector->irq, 391 lan743x_intr_entry_isr, 392 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ? 393 IRQF_SHARED : 0, DRIVER_NAME, vector); 394 if (ret) { 395 vector->handler = NULL; 396 vector->context = NULL; 397 vector->int_mask = 0; 398 vector->flags = 0; 399 } 400 return ret; 401 } 402 403 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter, 404 int vector_index) 405 { 406 struct lan743x_vector *vector = &adapter->intr.vector_list 407 [vector_index]; 408 409 free_irq(vector->irq, vector); 410 vector->handler = NULL; 411 vector->context = NULL; 412 vector->int_mask = 0; 413 vector->flags = 0; 414 } 415 416 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter, 417 u32 int_mask) 418 { 419 int index; 420 421 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) { 422 if (adapter->intr.vector_list[index].int_mask & int_mask) 423 return adapter->intr.vector_list[index].flags; 424 } 425 return 0; 426 } 427 428 static void lan743x_intr_close(struct lan743x_adapter *adapter) 429 { 430 struct lan743x_intr *intr = &adapter->intr; 431 int index = 0; 432 433 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 434 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 435 436 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) { 437 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 438 lan743x_intr_unregister_isr(adapter, index); 439 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); 440 } 441 } 442 443 if (intr->flags & INTR_FLAG_MSI_ENABLED) { 444 pci_disable_msi(adapter->pdev); 445 intr->flags &= ~INTR_FLAG_MSI_ENABLED; 446 } 447 448 if (intr->flags & INTR_FLAG_MSIX_ENABLED) { 449 pci_disable_msix(adapter->pdev); 450 intr->flags &= ~INTR_FLAG_MSIX_ENABLED; 451 } 452 } 453 454 static int lan743x_intr_open(struct lan743x_adapter *adapter) 455 { 456 struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT]; 457 struct lan743x_intr *intr = &adapter->intr; 458 u32 int_vec_en_auto_clr = 0; 459 u32 int_vec_map0 = 0; 460 u32 int_vec_map1 = 0; 461 int ret = -ENODEV; 462 int index = 0; 463 u32 flags = 0; 464 465 intr->number_of_vectors = 0; 466 467 /* Try to set up MSIX interrupts */ 468 memset(&msix_entries[0], 0, 469 sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT); 470 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) 471 msix_entries[index].entry = index; 472 ret = pci_enable_msix_range(adapter->pdev, 473 msix_entries, 1, 474 1 + LAN743X_USED_TX_CHANNELS + 475 LAN743X_USED_RX_CHANNELS); 476 477 if (ret > 0) { 478 intr->flags |= INTR_FLAG_MSIX_ENABLED; 479 intr->number_of_vectors = ret; 480 intr->using_vectors = true; 481 for (index = 0; index < intr->number_of_vectors; index++) 482 intr->vector_list[index].irq = msix_entries 483 [index].vector; 484 netif_info(adapter, ifup, adapter->netdev, 485 "using MSIX interrupts, number of vectors = %d\n", 486 intr->number_of_vectors); 487 } 488 489 /* If MSIX failed try to setup using MSI interrupts */ 490 if (!intr->number_of_vectors) { 491 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 492 if (!pci_enable_msi(adapter->pdev)) { 493 intr->flags |= INTR_FLAG_MSI_ENABLED; 494 intr->number_of_vectors = 1; 495 intr->using_vectors = true; 496 intr->vector_list[0].irq = 497 adapter->pdev->irq; 498 netif_info(adapter, ifup, adapter->netdev, 499 "using MSI interrupts, number of vectors = %d\n", 500 intr->number_of_vectors); 501 } 502 } 503 } 504 505 /* If MSIX, and MSI failed, setup using legacy interrupt */ 506 if (!intr->number_of_vectors) { 507 intr->number_of_vectors = 1; 508 intr->using_vectors = false; 509 intr->vector_list[0].irq = intr->irq; 510 netif_info(adapter, ifup, adapter->netdev, 511 "using legacy interrupts\n"); 512 } 513 514 /* At this point we must have at least one irq */ 515 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF); 516 517 /* map all interrupts to vector 0 */ 518 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000); 519 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000); 520 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000); 521 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 522 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 523 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 524 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 525 526 if (intr->using_vectors) { 527 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 528 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 529 } else { 530 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR | 531 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET | 532 LAN743X_VECTOR_FLAG_IRQ_SHARED; 533 } 534 535 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 536 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ; 537 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C; 538 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 539 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK; 540 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C; 541 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C; 542 } 543 544 ret = lan743x_intr_register_isr(adapter, 0, flags, 545 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ | 546 INT_BIT_ALL_OTHER_, 547 lan743x_intr_shared_isr, adapter); 548 if (ret) 549 goto clean_up; 550 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0); 551 552 if (intr->using_vectors) 553 lan743x_csr_write(adapter, INT_VEC_EN_SET, 554 INT_VEC_EN_(0)); 555 556 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 557 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD); 558 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD); 559 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD); 560 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD); 561 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD); 562 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 563 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 564 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 565 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 566 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 567 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 568 } 569 570 /* enable interrupts */ 571 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 572 ret = lan743x_intr_test_isr(adapter); 573 if (ret) 574 goto clean_up; 575 576 if (intr->number_of_vectors > 1) { 577 int number_of_tx_vectors = intr->number_of_vectors - 1; 578 579 if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS) 580 number_of_tx_vectors = LAN743X_USED_TX_CHANNELS; 581 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 582 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 583 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 584 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 585 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 586 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 587 588 if (adapter->csr.flags & 589 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 590 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 591 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 592 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 593 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 594 } 595 596 for (index = 0; index < number_of_tx_vectors; index++) { 597 u32 int_bit = INT_BIT_DMA_TX_(index); 598 int vector = index + 1; 599 600 /* map TX interrupt to vector */ 601 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector); 602 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1); 603 604 /* Remove TX interrupt from shared mask */ 605 intr->vector_list[0].int_mask &= ~int_bit; 606 ret = lan743x_intr_register_isr(adapter, vector, flags, 607 int_bit, lan743x_tx_isr, 608 &adapter->tx[index]); 609 if (ret) 610 goto clean_up; 611 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 612 if (!(flags & 613 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)) 614 lan743x_csr_write(adapter, INT_VEC_EN_SET, 615 INT_VEC_EN_(vector)); 616 } 617 } 618 if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) { 619 int number_of_rx_vectors = intr->number_of_vectors - 620 LAN743X_USED_TX_CHANNELS - 1; 621 622 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 623 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; 624 625 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 626 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 627 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 628 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 629 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 630 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 631 632 if (adapter->csr.flags & 633 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 634 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR | 635 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 636 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 637 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 638 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 639 } 640 for (index = 0; index < number_of_rx_vectors; index++) { 641 int vector = index + 1 + LAN743X_USED_TX_CHANNELS; 642 u32 int_bit = INT_BIT_DMA_RX_(index); 643 644 /* map RX interrupt to vector */ 645 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector); 646 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0); 647 if (flags & 648 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) { 649 int_vec_en_auto_clr |= INT_VEC_EN_(vector); 650 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR, 651 int_vec_en_auto_clr); 652 } 653 654 /* Remove RX interrupt from shared mask */ 655 intr->vector_list[0].int_mask &= ~int_bit; 656 ret = lan743x_intr_register_isr(adapter, vector, flags, 657 int_bit, lan743x_rx_isr, 658 &adapter->rx[index]); 659 if (ret) 660 goto clean_up; 661 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 662 663 lan743x_csr_write(adapter, INT_VEC_EN_SET, 664 INT_VEC_EN_(vector)); 665 } 666 } 667 return 0; 668 669 clean_up: 670 lan743x_intr_close(adapter); 671 return ret; 672 } 673 674 static int lan743x_dp_write(struct lan743x_adapter *adapter, 675 u32 select, u32 addr, u32 length, u32 *buf) 676 { 677 u32 dp_sel; 678 int i; 679 680 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 681 1, 40, 100, 100)) 682 return -EIO; 683 dp_sel = lan743x_csr_read(adapter, DP_SEL); 684 dp_sel &= ~DP_SEL_MASK_; 685 dp_sel |= select; 686 lan743x_csr_write(adapter, DP_SEL, dp_sel); 687 688 for (i = 0; i < length; i++) { 689 lan743x_csr_write(adapter, DP_ADDR, addr + i); 690 lan743x_csr_write(adapter, DP_DATA_0, buf[i]); 691 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_); 692 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 693 1, 40, 100, 100)) 694 return -EIO; 695 } 696 697 return 0; 698 } 699 700 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read) 701 { 702 u32 ret; 703 704 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 705 MAC_MII_ACC_PHY_ADDR_MASK_; 706 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) & 707 MAC_MII_ACC_MIIRINDA_MASK_; 708 709 if (read) 710 ret |= MAC_MII_ACC_MII_READ_; 711 else 712 ret |= MAC_MII_ACC_MII_WRITE_; 713 ret |= MAC_MII_ACC_MII_BUSY_; 714 715 return ret; 716 } 717 718 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter) 719 { 720 u32 data; 721 722 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data, 723 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000); 724 } 725 726 static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index) 727 { 728 struct lan743x_adapter *adapter = bus->priv; 729 u32 val, mii_access; 730 int ret; 731 732 /* comfirm MII not busy */ 733 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 734 if (ret < 0) 735 return ret; 736 737 /* set the address, index & direction (read from PHY) */ 738 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ); 739 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 740 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 741 if (ret < 0) 742 return ret; 743 744 val = lan743x_csr_read(adapter, MAC_MII_DATA); 745 return (int)(val & 0xFFFF); 746 } 747 748 static int lan743x_mdiobus_write(struct mii_bus *bus, 749 int phy_id, int index, u16 regval) 750 { 751 struct lan743x_adapter *adapter = bus->priv; 752 u32 val, mii_access; 753 int ret; 754 755 /* confirm MII not busy */ 756 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 757 if (ret < 0) 758 return ret; 759 val = (u32)regval; 760 lan743x_csr_write(adapter, MAC_MII_DATA, val); 761 762 /* set the address, index & direction (write to PHY) */ 763 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 764 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 765 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 766 return ret; 767 } 768 769 static void lan743x_mac_set_address(struct lan743x_adapter *adapter, 770 u8 *addr) 771 { 772 u32 addr_lo, addr_hi; 773 774 addr_lo = addr[0] | 775 addr[1] << 8 | 776 addr[2] << 16 | 777 addr[3] << 24; 778 addr_hi = addr[4] | 779 addr[5] << 8; 780 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo); 781 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi); 782 783 ether_addr_copy(adapter->mac_address, addr); 784 netif_info(adapter, drv, adapter->netdev, 785 "MAC address set to %pM\n", addr); 786 } 787 788 static int lan743x_mac_init(struct lan743x_adapter *adapter) 789 { 790 bool mac_address_valid = true; 791 struct net_device *netdev; 792 u32 mac_addr_hi = 0; 793 u32 mac_addr_lo = 0; 794 u32 data; 795 796 netdev = adapter->netdev; 797 798 /* disable auto duplex, and speed detection. Phylib does that */ 799 data = lan743x_csr_read(adapter, MAC_CR); 800 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_); 801 data |= MAC_CR_CNTR_RST_; 802 lan743x_csr_write(adapter, MAC_CR, data); 803 804 if (!is_valid_ether_addr(adapter->mac_address)) { 805 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH); 806 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL); 807 adapter->mac_address[0] = mac_addr_lo & 0xFF; 808 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF; 809 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF; 810 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF; 811 adapter->mac_address[4] = mac_addr_hi & 0xFF; 812 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF; 813 814 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) && 815 mac_addr_lo == 0xFFFFFFFF) { 816 mac_address_valid = false; 817 } else if (!is_valid_ether_addr(adapter->mac_address)) { 818 mac_address_valid = false; 819 } 820 821 if (!mac_address_valid) 822 eth_random_addr(adapter->mac_address); 823 } 824 lan743x_mac_set_address(adapter, adapter->mac_address); 825 ether_addr_copy(netdev->dev_addr, adapter->mac_address); 826 827 return 0; 828 } 829 830 static int lan743x_mac_open(struct lan743x_adapter *adapter) 831 { 832 u32 temp; 833 834 temp = lan743x_csr_read(adapter, MAC_RX); 835 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_); 836 temp = lan743x_csr_read(adapter, MAC_TX); 837 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_); 838 return 0; 839 } 840 841 static void lan743x_mac_close(struct lan743x_adapter *adapter) 842 { 843 u32 temp; 844 845 temp = lan743x_csr_read(adapter, MAC_TX); 846 temp &= ~MAC_TX_TXEN_; 847 lan743x_csr_write(adapter, MAC_TX, temp); 848 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_, 849 1, 1000, 20000, 100); 850 851 temp = lan743x_csr_read(adapter, MAC_RX); 852 temp &= ~MAC_RX_RXEN_; 853 lan743x_csr_write(adapter, MAC_RX, temp); 854 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 855 1, 1000, 20000, 100); 856 } 857 858 static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, 859 bool tx_enable, bool rx_enable) 860 { 861 u32 flow_setting = 0; 862 863 /* set maximum pause time because when fifo space frees 864 * up a zero value pause frame will be sent to release the pause 865 */ 866 flow_setting = MAC_FLOW_CR_FCPT_MASK_; 867 if (tx_enable) 868 flow_setting |= MAC_FLOW_CR_TX_FCEN_; 869 if (rx_enable) 870 flow_setting |= MAC_FLOW_CR_RX_FCEN_; 871 lan743x_csr_write(adapter, MAC_FLOW, flow_setting); 872 } 873 874 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu) 875 { 876 int enabled = 0; 877 u32 mac_rx = 0; 878 879 mac_rx = lan743x_csr_read(adapter, MAC_RX); 880 if (mac_rx & MAC_RX_RXEN_) { 881 enabled = 1; 882 if (mac_rx & MAC_RX_RXD_) { 883 lan743x_csr_write(adapter, MAC_RX, mac_rx); 884 mac_rx &= ~MAC_RX_RXD_; 885 } 886 mac_rx &= ~MAC_RX_RXEN_; 887 lan743x_csr_write(adapter, MAC_RX, mac_rx); 888 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 889 1, 1000, 20000, 100); 890 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_); 891 } 892 893 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_); 894 mac_rx |= (((new_mtu + ETH_HLEN + 4) << MAC_RX_MAX_SIZE_SHIFT_) & 895 MAC_RX_MAX_SIZE_MASK_); 896 lan743x_csr_write(adapter, MAC_RX, mac_rx); 897 898 if (enabled) { 899 mac_rx |= MAC_RX_RXEN_; 900 lan743x_csr_write(adapter, MAC_RX, mac_rx); 901 } 902 return 0; 903 } 904 905 /* PHY */ 906 static int lan743x_phy_reset(struct lan743x_adapter *adapter) 907 { 908 u32 data; 909 910 /* Only called with in probe, and before mdiobus_register */ 911 912 data = lan743x_csr_read(adapter, PMT_CTL); 913 data |= PMT_CTL_ETH_PHY_RST_; 914 lan743x_csr_write(adapter, PMT_CTL, data); 915 916 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data, 917 (!(data & PMT_CTL_ETH_PHY_RST_) && 918 (data & PMT_CTL_READY_)), 919 50000, 1000000); 920 } 921 922 static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter, 923 u8 duplex, u16 local_adv, 924 u16 remote_adv) 925 { 926 struct lan743x_phy *phy = &adapter->phy; 927 u8 cap; 928 929 if (phy->fc_autoneg) 930 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv); 931 else 932 cap = phy->fc_request_control; 933 934 lan743x_mac_flow_ctrl_set_enables(adapter, 935 cap & FLOW_CTRL_TX, 936 cap & FLOW_CTRL_RX); 937 } 938 939 static int lan743x_phy_init(struct lan743x_adapter *adapter) 940 { 941 return lan743x_phy_reset(adapter); 942 } 943 944 static void lan743x_phy_link_status_change(struct net_device *netdev) 945 { 946 struct lan743x_adapter *adapter = netdev_priv(netdev); 947 struct phy_device *phydev = netdev->phydev; 948 u32 data; 949 950 phy_print_status(phydev); 951 if (phydev->state == PHY_RUNNING) { 952 struct ethtool_link_ksettings ksettings; 953 int remote_advertisement = 0; 954 int local_advertisement = 0; 955 956 data = lan743x_csr_read(adapter, MAC_CR); 957 958 /* set interface mode */ 959 if (phy_interface_is_rgmii(phydev)) 960 /* RGMII */ 961 data &= ~MAC_CR_MII_EN_; 962 else 963 /* GMII */ 964 data |= MAC_CR_MII_EN_; 965 966 /* set duplex mode */ 967 if (phydev->duplex) 968 data |= MAC_CR_DPX_; 969 else 970 data &= ~MAC_CR_DPX_; 971 972 /* set bus speed */ 973 switch (phydev->speed) { 974 case SPEED_10: 975 data &= ~MAC_CR_CFG_H_; 976 data &= ~MAC_CR_CFG_L_; 977 break; 978 case SPEED_100: 979 data &= ~MAC_CR_CFG_H_; 980 data |= MAC_CR_CFG_L_; 981 break; 982 case SPEED_1000: 983 data |= MAC_CR_CFG_H_; 984 data &= ~MAC_CR_CFG_L_; 985 break; 986 } 987 lan743x_csr_write(adapter, MAC_CR, data); 988 989 memset(&ksettings, 0, sizeof(ksettings)); 990 phy_ethtool_get_link_ksettings(netdev, &ksettings); 991 local_advertisement = 992 linkmode_adv_to_mii_adv_t(phydev->advertising); 993 remote_advertisement = 994 linkmode_adv_to_mii_adv_t(phydev->lp_advertising); 995 996 lan743x_phy_update_flowcontrol(adapter, 997 ksettings.base.duplex, 998 local_advertisement, 999 remote_advertisement); 1000 lan743x_ptp_update_latency(adapter, ksettings.base.speed); 1001 } 1002 } 1003 1004 static void lan743x_phy_close(struct lan743x_adapter *adapter) 1005 { 1006 struct net_device *netdev = adapter->netdev; 1007 1008 phy_stop(netdev->phydev); 1009 phy_disconnect(netdev->phydev); 1010 netdev->phydev = NULL; 1011 } 1012 1013 static int lan743x_phy_open(struct lan743x_adapter *adapter) 1014 { 1015 struct net_device *netdev = adapter->netdev; 1016 struct lan743x_phy *phy = &adapter->phy; 1017 struct phy_device *phydev; 1018 int ret = -EIO; 1019 1020 /* try devicetree phy, or fixed link */ 1021 phydev = of_phy_get_and_connect(netdev, adapter->pdev->dev.of_node, 1022 lan743x_phy_link_status_change); 1023 1024 if (!phydev) { 1025 /* try internal phy */ 1026 phydev = phy_find_first(adapter->mdiobus); 1027 if (!phydev) 1028 goto return_error; 1029 1030 ret = phy_connect_direct(netdev, phydev, 1031 lan743x_phy_link_status_change, 1032 PHY_INTERFACE_MODE_GMII); 1033 if (ret) 1034 goto return_error; 1035 } 1036 1037 /* MAC doesn't support 1000T Half */ 1038 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 1039 1040 /* support both flow controls */ 1041 phy_support_asym_pause(phydev); 1042 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX); 1043 phy->fc_autoneg = phydev->autoneg; 1044 1045 phy_start(phydev); 1046 phy_start_aneg(phydev); 1047 phy_attached_info(phydev); 1048 return 0; 1049 1050 return_error: 1051 return ret; 1052 } 1053 1054 static void lan743x_rfe_open(struct lan743x_adapter *adapter) 1055 { 1056 lan743x_csr_write(adapter, RFE_RSS_CFG, 1057 RFE_RSS_CFG_UDP_IPV6_EX_ | 1058 RFE_RSS_CFG_TCP_IPV6_EX_ | 1059 RFE_RSS_CFG_IPV6_EX_ | 1060 RFE_RSS_CFG_UDP_IPV6_ | 1061 RFE_RSS_CFG_TCP_IPV6_ | 1062 RFE_RSS_CFG_IPV6_ | 1063 RFE_RSS_CFG_UDP_IPV4_ | 1064 RFE_RSS_CFG_TCP_IPV4_ | 1065 RFE_RSS_CFG_IPV4_ | 1066 RFE_RSS_CFG_VALID_HASH_BITS_ | 1067 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ | 1068 RFE_RSS_CFG_RSS_HASH_STORE_ | 1069 RFE_RSS_CFG_RSS_ENABLE_); 1070 } 1071 1072 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter) 1073 { 1074 u8 *mac_addr; 1075 u32 mac_addr_hi = 0; 1076 u32 mac_addr_lo = 0; 1077 1078 /* Add mac address to perfect Filter */ 1079 mac_addr = adapter->mac_address; 1080 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) | 1081 (((u32)(mac_addr[1])) << 8) | 1082 (((u32)(mac_addr[2])) << 16) | 1083 (((u32)(mac_addr[3])) << 24)); 1084 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) | 1085 (((u32)(mac_addr[5])) << 8)); 1086 1087 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo); 1088 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0), 1089 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_); 1090 } 1091 1092 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter) 1093 { 1094 struct net_device *netdev = adapter->netdev; 1095 u32 hash_table[DP_SEL_VHF_HASH_LEN]; 1096 u32 rfctl; 1097 u32 data; 1098 1099 rfctl = lan743x_csr_read(adapter, RFE_CTL); 1100 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ | 1101 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1102 rfctl |= RFE_CTL_AB_; 1103 if (netdev->flags & IFF_PROMISC) { 1104 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_; 1105 } else { 1106 if (netdev->flags & IFF_ALLMULTI) 1107 rfctl |= RFE_CTL_AM_; 1108 } 1109 1110 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32)); 1111 if (netdev_mc_count(netdev)) { 1112 struct netdev_hw_addr *ha; 1113 int i; 1114 1115 rfctl |= RFE_CTL_DA_PERFECT_; 1116 i = 1; 1117 netdev_for_each_mc_addr(ha, netdev) { 1118 /* set first 32 into Perfect Filter */ 1119 if (i < 33) { 1120 lan743x_csr_write(adapter, 1121 RFE_ADDR_FILT_HI(i), 0); 1122 data = ha->addr[3]; 1123 data = ha->addr[2] | (data << 8); 1124 data = ha->addr[1] | (data << 8); 1125 data = ha->addr[0] | (data << 8); 1126 lan743x_csr_write(adapter, 1127 RFE_ADDR_FILT_LO(i), data); 1128 data = ha->addr[5]; 1129 data = ha->addr[4] | (data << 8); 1130 data |= RFE_ADDR_FILT_HI_VALID_; 1131 lan743x_csr_write(adapter, 1132 RFE_ADDR_FILT_HI(i), data); 1133 } else { 1134 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >> 1135 23) & 0x1FF; 1136 hash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1137 rfctl |= RFE_CTL_MCAST_HASH_; 1138 } 1139 i++; 1140 } 1141 } 1142 1143 lan743x_dp_write(adapter, DP_SEL_RFE_RAM, 1144 DP_SEL_VHF_VLAN_LEN, 1145 DP_SEL_VHF_HASH_LEN, hash_table); 1146 lan743x_csr_write(adapter, RFE_CTL, rfctl); 1147 } 1148 1149 static int lan743x_dmac_init(struct lan743x_adapter *adapter) 1150 { 1151 u32 data = 0; 1152 1153 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_); 1154 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_, 1155 0, 1000, 20000, 100); 1156 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) { 1157 case DMA_DESCRIPTOR_SPACING_16: 1158 data = DMAC_CFG_MAX_DSPACE_16_; 1159 break; 1160 case DMA_DESCRIPTOR_SPACING_32: 1161 data = DMAC_CFG_MAX_DSPACE_32_; 1162 break; 1163 case DMA_DESCRIPTOR_SPACING_64: 1164 data = DMAC_CFG_MAX_DSPACE_64_; 1165 break; 1166 case DMA_DESCRIPTOR_SPACING_128: 1167 data = DMAC_CFG_MAX_DSPACE_128_; 1168 break; 1169 default: 1170 return -EPERM; 1171 } 1172 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1173 data |= DMAC_CFG_COAL_EN_; 1174 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_; 1175 data |= DMAC_CFG_MAX_READ_REQ_SET_(6); 1176 lan743x_csr_write(adapter, DMAC_CFG, data); 1177 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1); 1178 data |= DMAC_COAL_CFG_TIMER_TX_START_; 1179 data |= DMAC_COAL_CFG_FLUSH_INTS_; 1180 data |= DMAC_COAL_CFG_INT_EXIT_COAL_; 1181 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_; 1182 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A); 1183 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C); 1184 lan743x_csr_write(adapter, DMAC_COAL_CFG, data); 1185 data = DMAC_OBFF_TX_THRES_SET_(0x08); 1186 data |= DMAC_OBFF_RX_THRES_SET_(0x0A); 1187 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data); 1188 return 0; 1189 } 1190 1191 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter, 1192 int tx_channel) 1193 { 1194 u32 dmac_cmd = 0; 1195 1196 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1197 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1198 DMAC_CMD_START_T_(tx_channel)), 1199 (dmac_cmd & 1200 DMAC_CMD_STOP_T_(tx_channel))); 1201 } 1202 1203 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter, 1204 int tx_channel) 1205 { 1206 int timeout = 100; 1207 int result = 0; 1208 1209 while (timeout && 1210 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) == 1211 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1212 usleep_range(1000, 20000); 1213 timeout--; 1214 } 1215 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1216 result = -ENODEV; 1217 return result; 1218 } 1219 1220 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter, 1221 int rx_channel) 1222 { 1223 u32 dmac_cmd = 0; 1224 1225 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1226 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1227 DMAC_CMD_START_R_(rx_channel)), 1228 (dmac_cmd & 1229 DMAC_CMD_STOP_R_(rx_channel))); 1230 } 1231 1232 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter, 1233 int rx_channel) 1234 { 1235 int timeout = 100; 1236 int result = 0; 1237 1238 while (timeout && 1239 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) == 1240 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1241 usleep_range(1000, 20000); 1242 timeout--; 1243 } 1244 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1245 result = -ENODEV; 1246 return result; 1247 } 1248 1249 static void lan743x_tx_release_desc(struct lan743x_tx *tx, 1250 int descriptor_index, bool cleanup) 1251 { 1252 struct lan743x_tx_buffer_info *buffer_info = NULL; 1253 struct lan743x_tx_descriptor *descriptor = NULL; 1254 u32 descriptor_type = 0; 1255 bool ignore_sync; 1256 1257 descriptor = &tx->ring_cpu_ptr[descriptor_index]; 1258 buffer_info = &tx->buffer_info[descriptor_index]; 1259 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE)) 1260 goto done; 1261 1262 descriptor_type = (descriptor->data0) & 1263 TX_DESC_DATA0_DTYPE_MASK_; 1264 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_) 1265 goto clean_up_data_descriptor; 1266 else 1267 goto clear_active; 1268 1269 clean_up_data_descriptor: 1270 if (buffer_info->dma_ptr) { 1271 if (buffer_info->flags & 1272 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) { 1273 dma_unmap_page(&tx->adapter->pdev->dev, 1274 buffer_info->dma_ptr, 1275 buffer_info->buffer_length, 1276 DMA_TO_DEVICE); 1277 } else { 1278 dma_unmap_single(&tx->adapter->pdev->dev, 1279 buffer_info->dma_ptr, 1280 buffer_info->buffer_length, 1281 DMA_TO_DEVICE); 1282 } 1283 buffer_info->dma_ptr = 0; 1284 buffer_info->buffer_length = 0; 1285 } 1286 if (!buffer_info->skb) 1287 goto clear_active; 1288 1289 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1290 dev_kfree_skb(buffer_info->skb); 1291 goto clear_skb; 1292 } 1293 1294 if (cleanup) { 1295 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1296 dev_kfree_skb(buffer_info->skb); 1297 } else { 1298 ignore_sync = (buffer_info->flags & 1299 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; 1300 lan743x_ptp_tx_timestamp_skb(tx->adapter, 1301 buffer_info->skb, ignore_sync); 1302 } 1303 1304 clear_skb: 1305 buffer_info->skb = NULL; 1306 1307 clear_active: 1308 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE; 1309 1310 done: 1311 memset(buffer_info, 0, sizeof(*buffer_info)); 1312 memset(descriptor, 0, sizeof(*descriptor)); 1313 } 1314 1315 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index) 1316 { 1317 return ((++index) % tx->ring_size); 1318 } 1319 1320 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx) 1321 { 1322 while ((*tx->head_cpu_ptr) != (tx->last_head)) { 1323 lan743x_tx_release_desc(tx, tx->last_head, false); 1324 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1325 } 1326 } 1327 1328 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx) 1329 { 1330 u32 original_head = 0; 1331 1332 original_head = tx->last_head; 1333 do { 1334 lan743x_tx_release_desc(tx, tx->last_head, true); 1335 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1336 } while (tx->last_head != original_head); 1337 memset(tx->ring_cpu_ptr, 0, 1338 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size)); 1339 memset(tx->buffer_info, 0, 1340 sizeof(*tx->buffer_info) * (tx->ring_size)); 1341 } 1342 1343 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx, 1344 struct sk_buff *skb) 1345 { 1346 int result = 1; /* 1 for the main skb buffer */ 1347 int nr_frags = 0; 1348 1349 if (skb_is_gso(skb)) 1350 result++; /* requires an extension descriptor */ 1351 nr_frags = skb_shinfo(skb)->nr_frags; 1352 result += nr_frags; /* 1 for each fragment buffer */ 1353 return result; 1354 } 1355 1356 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx) 1357 { 1358 int last_head = tx->last_head; 1359 int last_tail = tx->last_tail; 1360 1361 if (last_tail >= last_head) 1362 return tx->ring_size - last_tail + last_head - 1; 1363 else 1364 return last_head - last_tail - 1; 1365 } 1366 1367 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx, 1368 bool enable_timestamping, 1369 bool enable_onestep_sync) 1370 { 1371 if (enable_timestamping) 1372 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED; 1373 else 1374 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED; 1375 if (enable_onestep_sync) 1376 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC; 1377 else 1378 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC; 1379 } 1380 1381 static int lan743x_tx_frame_start(struct lan743x_tx *tx, 1382 unsigned char *first_buffer, 1383 unsigned int first_buffer_length, 1384 unsigned int frame_length, 1385 bool time_stamp, 1386 bool check_sum) 1387 { 1388 /* called only from within lan743x_tx_xmit_frame. 1389 * assuming tx->ring_lock has already been acquired. 1390 */ 1391 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1392 struct lan743x_tx_buffer_info *buffer_info = NULL; 1393 struct lan743x_adapter *adapter = tx->adapter; 1394 struct device *dev = &adapter->pdev->dev; 1395 dma_addr_t dma_ptr; 1396 1397 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS; 1398 tx->frame_first = tx->last_tail; 1399 tx->frame_tail = tx->frame_first; 1400 1401 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1402 buffer_info = &tx->buffer_info[tx->frame_tail]; 1403 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length, 1404 DMA_TO_DEVICE); 1405 if (dma_mapping_error(dev, dma_ptr)) 1406 return -ENOMEM; 1407 1408 tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr); 1409 tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr); 1410 tx_descriptor->data3 = (frame_length << 16) & 1411 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_; 1412 1413 buffer_info->skb = NULL; 1414 buffer_info->dma_ptr = dma_ptr; 1415 buffer_info->buffer_length = first_buffer_length; 1416 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1417 1418 tx->frame_data0 = (first_buffer_length & 1419 TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1420 TX_DESC_DATA0_DTYPE_DATA_ | 1421 TX_DESC_DATA0_FS_ | 1422 TX_DESC_DATA0_FCS_; 1423 if (time_stamp) 1424 tx->frame_data0 |= TX_DESC_DATA0_TSE_; 1425 1426 if (check_sum) 1427 tx->frame_data0 |= TX_DESC_DATA0_ICE_ | 1428 TX_DESC_DATA0_IPE_ | 1429 TX_DESC_DATA0_TPE_; 1430 1431 /* data0 will be programmed in one of other frame assembler functions */ 1432 return 0; 1433 } 1434 1435 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx, 1436 unsigned int frame_length, 1437 int nr_frags) 1438 { 1439 /* called only from within lan743x_tx_xmit_frame. 1440 * assuming tx->ring_lock has already been acquired. 1441 */ 1442 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1443 struct lan743x_tx_buffer_info *buffer_info = NULL; 1444 1445 /* wrap up previous descriptor */ 1446 tx->frame_data0 |= TX_DESC_DATA0_EXT_; 1447 if (nr_frags <= 0) { 1448 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1449 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1450 } 1451 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1452 tx_descriptor->data0 = tx->frame_data0; 1453 1454 /* move to next descriptor */ 1455 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1456 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1457 buffer_info = &tx->buffer_info[tx->frame_tail]; 1458 1459 /* add extension descriptor */ 1460 tx_descriptor->data1 = 0; 1461 tx_descriptor->data2 = 0; 1462 tx_descriptor->data3 = 0; 1463 1464 buffer_info->skb = NULL; 1465 buffer_info->dma_ptr = 0; 1466 buffer_info->buffer_length = 0; 1467 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1468 1469 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) | 1470 TX_DESC_DATA0_DTYPE_EXT_ | 1471 TX_DESC_DATA0_EXT_LSO_; 1472 1473 /* data0 will be programmed in one of other frame assembler functions */ 1474 } 1475 1476 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx, 1477 const skb_frag_t *fragment, 1478 unsigned int frame_length) 1479 { 1480 /* called only from within lan743x_tx_xmit_frame 1481 * assuming tx->ring_lock has already been acquired 1482 */ 1483 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1484 struct lan743x_tx_buffer_info *buffer_info = NULL; 1485 struct lan743x_adapter *adapter = tx->adapter; 1486 struct device *dev = &adapter->pdev->dev; 1487 unsigned int fragment_length = 0; 1488 dma_addr_t dma_ptr; 1489 1490 fragment_length = skb_frag_size(fragment); 1491 if (!fragment_length) 1492 return 0; 1493 1494 /* wrap up previous descriptor */ 1495 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1496 tx_descriptor->data0 = tx->frame_data0; 1497 1498 /* move to next descriptor */ 1499 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1500 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1501 buffer_info = &tx->buffer_info[tx->frame_tail]; 1502 dma_ptr = skb_frag_dma_map(dev, fragment, 1503 0, fragment_length, 1504 DMA_TO_DEVICE); 1505 if (dma_mapping_error(dev, dma_ptr)) { 1506 int desc_index; 1507 1508 /* cleanup all previously setup descriptors */ 1509 desc_index = tx->frame_first; 1510 while (desc_index != tx->frame_tail) { 1511 lan743x_tx_release_desc(tx, desc_index, true); 1512 desc_index = lan743x_tx_next_index(tx, desc_index); 1513 } 1514 dma_wmb(); 1515 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1516 tx->frame_first = 0; 1517 tx->frame_data0 = 0; 1518 tx->frame_tail = 0; 1519 return -ENOMEM; 1520 } 1521 1522 tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr); 1523 tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr); 1524 tx_descriptor->data3 = (frame_length << 16) & 1525 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_; 1526 1527 buffer_info->skb = NULL; 1528 buffer_info->dma_ptr = dma_ptr; 1529 buffer_info->buffer_length = fragment_length; 1530 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1531 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT; 1532 1533 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1534 TX_DESC_DATA0_DTYPE_DATA_ | 1535 TX_DESC_DATA0_FCS_; 1536 1537 /* data0 will be programmed in one of other frame assembler functions */ 1538 return 0; 1539 } 1540 1541 static void lan743x_tx_frame_end(struct lan743x_tx *tx, 1542 struct sk_buff *skb, 1543 bool time_stamp, 1544 bool ignore_sync) 1545 { 1546 /* called only from within lan743x_tx_xmit_frame 1547 * assuming tx->ring_lock has already been acquired 1548 */ 1549 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1550 struct lan743x_tx_buffer_info *buffer_info = NULL; 1551 struct lan743x_adapter *adapter = tx->adapter; 1552 u32 tx_tail_flags = 0; 1553 1554 /* wrap up previous descriptor */ 1555 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) == 1556 TX_DESC_DATA0_DTYPE_DATA_) { 1557 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1558 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1559 } 1560 1561 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1562 buffer_info = &tx->buffer_info[tx->frame_tail]; 1563 buffer_info->skb = skb; 1564 if (time_stamp) 1565 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED; 1566 if (ignore_sync) 1567 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC; 1568 1569 tx_descriptor->data0 = tx->frame_data0; 1570 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1571 tx->last_tail = tx->frame_tail; 1572 1573 dma_wmb(); 1574 1575 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 1576 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_; 1577 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) 1578 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ | 1579 TX_TAIL_SET_TOP_INT_EN_; 1580 1581 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1582 tx_tail_flags | tx->frame_tail); 1583 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1584 } 1585 1586 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx, 1587 struct sk_buff *skb) 1588 { 1589 int required_number_of_descriptors = 0; 1590 unsigned int start_frame_length = 0; 1591 unsigned int frame_length = 0; 1592 unsigned int head_length = 0; 1593 unsigned long irq_flags = 0; 1594 bool do_timestamp = false; 1595 bool ignore_sync = false; 1596 int nr_frags = 0; 1597 bool gso = false; 1598 int j; 1599 1600 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb); 1601 1602 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1603 if (required_number_of_descriptors > 1604 lan743x_tx_get_avail_desc(tx)) { 1605 if (required_number_of_descriptors > (tx->ring_size - 1)) { 1606 dev_kfree_skb(skb); 1607 } else { 1608 /* save to overflow buffer */ 1609 tx->overflow_skb = skb; 1610 netif_stop_queue(tx->adapter->netdev); 1611 } 1612 goto unlock; 1613 } 1614 1615 /* space available, transmit skb */ 1616 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 1617 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) && 1618 (lan743x_ptp_request_tx_timestamp(tx->adapter))) { 1619 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 1620 do_timestamp = true; 1621 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC) 1622 ignore_sync = true; 1623 } 1624 head_length = skb_headlen(skb); 1625 frame_length = skb_pagelen(skb); 1626 nr_frags = skb_shinfo(skb)->nr_frags; 1627 start_frame_length = frame_length; 1628 gso = skb_is_gso(skb); 1629 if (gso) { 1630 start_frame_length = max(skb_shinfo(skb)->gso_size, 1631 (unsigned short)8); 1632 } 1633 1634 if (lan743x_tx_frame_start(tx, 1635 skb->data, head_length, 1636 start_frame_length, 1637 do_timestamp, 1638 skb->ip_summed == CHECKSUM_PARTIAL)) { 1639 dev_kfree_skb(skb); 1640 goto unlock; 1641 } 1642 1643 if (gso) 1644 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags); 1645 1646 if (nr_frags <= 0) 1647 goto finish; 1648 1649 for (j = 0; j < nr_frags; j++) { 1650 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]); 1651 1652 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) { 1653 /* upon error no need to call 1654 * lan743x_tx_frame_end 1655 * frame assembler clean up was performed inside 1656 * lan743x_tx_frame_add_fragment 1657 */ 1658 dev_kfree_skb(skb); 1659 goto unlock; 1660 } 1661 } 1662 1663 finish: 1664 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync); 1665 1666 unlock: 1667 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 1668 return NETDEV_TX_OK; 1669 } 1670 1671 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight) 1672 { 1673 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi); 1674 struct lan743x_adapter *adapter = tx->adapter; 1675 bool start_transmitter = false; 1676 unsigned long irq_flags = 0; 1677 u32 ioc_bit = 0; 1678 1679 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 1680 lan743x_csr_read(adapter, DMAC_INT_STS); 1681 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) 1682 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit); 1683 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1684 1685 /* clean up tx ring */ 1686 lan743x_tx_release_completed_descriptors(tx); 1687 if (netif_queue_stopped(adapter->netdev)) { 1688 if (tx->overflow_skb) { 1689 if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <= 1690 lan743x_tx_get_avail_desc(tx)) 1691 start_transmitter = true; 1692 } else { 1693 netif_wake_queue(adapter->netdev); 1694 } 1695 } 1696 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 1697 1698 if (start_transmitter) { 1699 /* space is now available, transmit overflow skb */ 1700 lan743x_tx_xmit_frame(tx, tx->overflow_skb); 1701 tx->overflow_skb = NULL; 1702 netif_wake_queue(adapter->netdev); 1703 } 1704 1705 if (!napi_complete(napi)) 1706 goto done; 1707 1708 /* enable isr */ 1709 lan743x_csr_write(adapter, INT_EN_SET, 1710 INT_BIT_DMA_TX_(tx->channel_number)); 1711 lan743x_csr_read(adapter, INT_STS); 1712 1713 done: 1714 return 0; 1715 } 1716 1717 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx) 1718 { 1719 if (tx->head_cpu_ptr) { 1720 dma_free_coherent(&tx->adapter->pdev->dev, 1721 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr, 1722 tx->head_dma_ptr); 1723 tx->head_cpu_ptr = NULL; 1724 tx->head_dma_ptr = 0; 1725 } 1726 kfree(tx->buffer_info); 1727 tx->buffer_info = NULL; 1728 1729 if (tx->ring_cpu_ptr) { 1730 dma_free_coherent(&tx->adapter->pdev->dev, 1731 tx->ring_allocation_size, tx->ring_cpu_ptr, 1732 tx->ring_dma_ptr); 1733 tx->ring_allocation_size = 0; 1734 tx->ring_cpu_ptr = NULL; 1735 tx->ring_dma_ptr = 0; 1736 } 1737 tx->ring_size = 0; 1738 } 1739 1740 static int lan743x_tx_ring_init(struct lan743x_tx *tx) 1741 { 1742 size_t ring_allocation_size = 0; 1743 void *cpu_ptr = NULL; 1744 dma_addr_t dma_ptr; 1745 int ret = -ENOMEM; 1746 1747 tx->ring_size = LAN743X_TX_RING_SIZE; 1748 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) { 1749 ret = -EINVAL; 1750 goto cleanup; 1751 } 1752 ring_allocation_size = ALIGN(tx->ring_size * 1753 sizeof(struct lan743x_tx_descriptor), 1754 PAGE_SIZE); 1755 dma_ptr = 0; 1756 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 1757 ring_allocation_size, &dma_ptr, GFP_KERNEL); 1758 if (!cpu_ptr) { 1759 ret = -ENOMEM; 1760 goto cleanup; 1761 } 1762 1763 tx->ring_allocation_size = ring_allocation_size; 1764 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr; 1765 tx->ring_dma_ptr = dma_ptr; 1766 1767 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL); 1768 if (!cpu_ptr) { 1769 ret = -ENOMEM; 1770 goto cleanup; 1771 } 1772 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr; 1773 dma_ptr = 0; 1774 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 1775 sizeof(*tx->head_cpu_ptr), &dma_ptr, 1776 GFP_KERNEL); 1777 if (!cpu_ptr) { 1778 ret = -ENOMEM; 1779 goto cleanup; 1780 } 1781 1782 tx->head_cpu_ptr = cpu_ptr; 1783 tx->head_dma_ptr = dma_ptr; 1784 if (tx->head_dma_ptr & 0x3) { 1785 ret = -ENOMEM; 1786 goto cleanup; 1787 } 1788 1789 return 0; 1790 1791 cleanup: 1792 lan743x_tx_ring_cleanup(tx); 1793 return ret; 1794 } 1795 1796 static void lan743x_tx_close(struct lan743x_tx *tx) 1797 { 1798 struct lan743x_adapter *adapter = tx->adapter; 1799 1800 lan743x_csr_write(adapter, 1801 DMAC_CMD, 1802 DMAC_CMD_STOP_T_(tx->channel_number)); 1803 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number); 1804 1805 lan743x_csr_write(adapter, 1806 DMAC_INT_EN_CLR, 1807 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 1808 lan743x_csr_write(adapter, INT_EN_CLR, 1809 INT_BIT_DMA_TX_(tx->channel_number)); 1810 napi_disable(&tx->napi); 1811 netif_napi_del(&tx->napi); 1812 1813 lan743x_csr_write(adapter, FCT_TX_CTL, 1814 FCT_TX_CTL_DIS_(tx->channel_number)); 1815 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 1816 FCT_TX_CTL_EN_(tx->channel_number), 1817 0, 1000, 20000, 100); 1818 1819 lan743x_tx_release_all_descriptors(tx); 1820 1821 if (tx->overflow_skb) { 1822 dev_kfree_skb(tx->overflow_skb); 1823 tx->overflow_skb = NULL; 1824 } 1825 1826 lan743x_tx_ring_cleanup(tx); 1827 } 1828 1829 static int lan743x_tx_open(struct lan743x_tx *tx) 1830 { 1831 struct lan743x_adapter *adapter = NULL; 1832 u32 data = 0; 1833 int ret; 1834 1835 adapter = tx->adapter; 1836 ret = lan743x_tx_ring_init(tx); 1837 if (ret) 1838 return ret; 1839 1840 /* initialize fifo */ 1841 lan743x_csr_write(adapter, FCT_TX_CTL, 1842 FCT_TX_CTL_RESET_(tx->channel_number)); 1843 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 1844 FCT_TX_CTL_RESET_(tx->channel_number), 1845 0, 1000, 20000, 100); 1846 1847 /* enable fifo */ 1848 lan743x_csr_write(adapter, FCT_TX_CTL, 1849 FCT_TX_CTL_EN_(tx->channel_number)); 1850 1851 /* reset tx channel */ 1852 lan743x_csr_write(adapter, DMAC_CMD, 1853 DMAC_CMD_TX_SWR_(tx->channel_number)); 1854 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 1855 DMAC_CMD_TX_SWR_(tx->channel_number), 1856 0, 1000, 20000, 100); 1857 1858 /* Write TX_BASE_ADDR */ 1859 lan743x_csr_write(adapter, 1860 TX_BASE_ADDRH(tx->channel_number), 1861 DMA_ADDR_HIGH32(tx->ring_dma_ptr)); 1862 lan743x_csr_write(adapter, 1863 TX_BASE_ADDRL(tx->channel_number), 1864 DMA_ADDR_LOW32(tx->ring_dma_ptr)); 1865 1866 /* Write TX_CFG_B */ 1867 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number)); 1868 data &= ~TX_CFG_B_TX_RING_LEN_MASK_; 1869 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_); 1870 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1871 data |= TX_CFG_B_TDMABL_512_; 1872 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data); 1873 1874 /* Write TX_CFG_A */ 1875 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_; 1876 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 1877 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_; 1878 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10); 1879 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04); 1880 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07); 1881 } 1882 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data); 1883 1884 /* Write TX_HEAD_WRITEBACK_ADDR */ 1885 lan743x_csr_write(adapter, 1886 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number), 1887 DMA_ADDR_HIGH32(tx->head_dma_ptr)); 1888 lan743x_csr_write(adapter, 1889 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number), 1890 DMA_ADDR_LOW32(tx->head_dma_ptr)); 1891 1892 /* set last head */ 1893 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number)); 1894 1895 /* write TX_TAIL */ 1896 tx->last_tail = 0; 1897 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1898 (u32)(tx->last_tail)); 1899 tx->vector_flags = lan743x_intr_get_vector_flags(adapter, 1900 INT_BIT_DMA_TX_ 1901 (tx->channel_number)); 1902 netif_tx_napi_add(adapter->netdev, 1903 &tx->napi, lan743x_tx_napi_poll, 1904 tx->ring_size - 1); 1905 napi_enable(&tx->napi); 1906 1907 data = 0; 1908 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 1909 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_; 1910 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 1911 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_; 1912 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 1913 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_; 1914 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 1915 data |= TX_CFG_C_TX_INT_EN_R2C_; 1916 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data); 1917 1918 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)) 1919 lan743x_csr_write(adapter, INT_EN_SET, 1920 INT_BIT_DMA_TX_(tx->channel_number)); 1921 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 1922 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 1923 1924 /* start dmac channel */ 1925 lan743x_csr_write(adapter, DMAC_CMD, 1926 DMAC_CMD_START_T_(tx->channel_number)); 1927 return 0; 1928 } 1929 1930 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index) 1931 { 1932 return ((++index) % rx->ring_size); 1933 } 1934 1935 static struct sk_buff *lan743x_rx_allocate_skb(struct lan743x_rx *rx) 1936 { 1937 int length = 0; 1938 1939 length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING); 1940 return __netdev_alloc_skb(rx->adapter->netdev, 1941 length, GFP_ATOMIC | GFP_DMA); 1942 } 1943 1944 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index, 1945 struct sk_buff *skb) 1946 { 1947 struct lan743x_rx_buffer_info *buffer_info; 1948 struct lan743x_rx_descriptor *descriptor; 1949 int length = 0; 1950 1951 length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING); 1952 descriptor = &rx->ring_cpu_ptr[index]; 1953 buffer_info = &rx->buffer_info[index]; 1954 buffer_info->skb = skb; 1955 if (!(buffer_info->skb)) 1956 return -ENOMEM; 1957 buffer_info->dma_ptr = dma_map_single(&rx->adapter->pdev->dev, 1958 buffer_info->skb->data, 1959 length, 1960 DMA_FROM_DEVICE); 1961 if (dma_mapping_error(&rx->adapter->pdev->dev, 1962 buffer_info->dma_ptr)) { 1963 buffer_info->dma_ptr = 0; 1964 return -ENOMEM; 1965 } 1966 1967 buffer_info->buffer_length = length; 1968 descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr); 1969 descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr); 1970 descriptor->data3 = 0; 1971 descriptor->data0 = (RX_DESC_DATA0_OWN_ | 1972 (length & RX_DESC_DATA0_BUF_LENGTH_MASK_)); 1973 skb_reserve(buffer_info->skb, RX_HEAD_PADDING); 1974 1975 return 0; 1976 } 1977 1978 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index) 1979 { 1980 struct lan743x_rx_buffer_info *buffer_info; 1981 struct lan743x_rx_descriptor *descriptor; 1982 1983 descriptor = &rx->ring_cpu_ptr[index]; 1984 buffer_info = &rx->buffer_info[index]; 1985 1986 descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr); 1987 descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr); 1988 descriptor->data3 = 0; 1989 descriptor->data0 = (RX_DESC_DATA0_OWN_ | 1990 ((buffer_info->buffer_length) & 1991 RX_DESC_DATA0_BUF_LENGTH_MASK_)); 1992 } 1993 1994 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index) 1995 { 1996 struct lan743x_rx_buffer_info *buffer_info; 1997 struct lan743x_rx_descriptor *descriptor; 1998 1999 descriptor = &rx->ring_cpu_ptr[index]; 2000 buffer_info = &rx->buffer_info[index]; 2001 2002 memset(descriptor, 0, sizeof(*descriptor)); 2003 2004 if (buffer_info->dma_ptr) { 2005 dma_unmap_single(&rx->adapter->pdev->dev, 2006 buffer_info->dma_ptr, 2007 buffer_info->buffer_length, 2008 DMA_FROM_DEVICE); 2009 buffer_info->dma_ptr = 0; 2010 } 2011 2012 if (buffer_info->skb) { 2013 dev_kfree_skb(buffer_info->skb); 2014 buffer_info->skb = NULL; 2015 } 2016 2017 memset(buffer_info, 0, sizeof(*buffer_info)); 2018 } 2019 2020 static int lan743x_rx_process_packet(struct lan743x_rx *rx) 2021 { 2022 struct skb_shared_hwtstamps *hwtstamps = NULL; 2023 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2024 int current_head_index = *rx->head_cpu_ptr; 2025 struct lan743x_rx_buffer_info *buffer_info; 2026 struct lan743x_rx_descriptor *descriptor; 2027 int extension_index = -1; 2028 int first_index = -1; 2029 int last_index = -1; 2030 2031 if (current_head_index < 0 || current_head_index >= rx->ring_size) 2032 goto done; 2033 2034 if (rx->last_head < 0 || rx->last_head >= rx->ring_size) 2035 goto done; 2036 2037 if (rx->last_head != current_head_index) { 2038 descriptor = &rx->ring_cpu_ptr[rx->last_head]; 2039 if (descriptor->data0 & RX_DESC_DATA0_OWN_) 2040 goto done; 2041 2042 if (!(descriptor->data0 & RX_DESC_DATA0_FS_)) 2043 goto done; 2044 2045 first_index = rx->last_head; 2046 if (descriptor->data0 & RX_DESC_DATA0_LS_) { 2047 last_index = rx->last_head; 2048 } else { 2049 int index; 2050 2051 index = lan743x_rx_next_index(rx, first_index); 2052 while (index != current_head_index) { 2053 descriptor = &rx->ring_cpu_ptr[index]; 2054 if (descriptor->data0 & RX_DESC_DATA0_OWN_) 2055 goto done; 2056 2057 if (descriptor->data0 & RX_DESC_DATA0_LS_) { 2058 last_index = index; 2059 break; 2060 } 2061 index = lan743x_rx_next_index(rx, index); 2062 } 2063 } 2064 if (last_index >= 0) { 2065 descriptor = &rx->ring_cpu_ptr[last_index]; 2066 if (descriptor->data0 & RX_DESC_DATA0_EXT_) { 2067 /* extension is expected to follow */ 2068 int index = lan743x_rx_next_index(rx, 2069 last_index); 2070 if (index != current_head_index) { 2071 descriptor = &rx->ring_cpu_ptr[index]; 2072 if (descriptor->data0 & 2073 RX_DESC_DATA0_OWN_) { 2074 goto done; 2075 } 2076 if (descriptor->data0 & 2077 RX_DESC_DATA0_EXT_) { 2078 extension_index = index; 2079 } else { 2080 goto done; 2081 } 2082 } else { 2083 /* extension is not yet available */ 2084 /* prevent processing of this packet */ 2085 first_index = -1; 2086 last_index = -1; 2087 } 2088 } 2089 } 2090 } 2091 if (first_index >= 0 && last_index >= 0) { 2092 int real_last_index = last_index; 2093 struct sk_buff *skb = NULL; 2094 u32 ts_sec = 0; 2095 u32 ts_nsec = 0; 2096 2097 /* packet is available */ 2098 if (first_index == last_index) { 2099 /* single buffer packet */ 2100 struct sk_buff *new_skb = NULL; 2101 int packet_length; 2102 2103 new_skb = lan743x_rx_allocate_skb(rx); 2104 if (!new_skb) { 2105 /* failed to allocate next skb. 2106 * Memory is very low. 2107 * Drop this packet and reuse buffer. 2108 */ 2109 lan743x_rx_reuse_ring_element(rx, first_index); 2110 goto process_extension; 2111 } 2112 2113 buffer_info = &rx->buffer_info[first_index]; 2114 skb = buffer_info->skb; 2115 descriptor = &rx->ring_cpu_ptr[first_index]; 2116 2117 /* unmap from dma */ 2118 if (buffer_info->dma_ptr) { 2119 dma_unmap_single(&rx->adapter->pdev->dev, 2120 buffer_info->dma_ptr, 2121 buffer_info->buffer_length, 2122 DMA_FROM_DEVICE); 2123 buffer_info->dma_ptr = 0; 2124 buffer_info->buffer_length = 0; 2125 } 2126 buffer_info->skb = NULL; 2127 packet_length = RX_DESC_DATA0_FRAME_LENGTH_GET_ 2128 (descriptor->data0); 2129 skb_put(skb, packet_length - 4); 2130 skb->protocol = eth_type_trans(skb, 2131 rx->adapter->netdev); 2132 lan743x_rx_init_ring_element(rx, first_index, new_skb); 2133 } else { 2134 int index = first_index; 2135 2136 /* multi buffer packet not supported */ 2137 /* this should not happen since 2138 * buffers are allocated to be at least jumbo size 2139 */ 2140 2141 /* clean up buffers */ 2142 if (first_index <= last_index) { 2143 while ((index >= first_index) && 2144 (index <= last_index)) { 2145 lan743x_rx_reuse_ring_element(rx, 2146 index); 2147 index = lan743x_rx_next_index(rx, 2148 index); 2149 } 2150 } else { 2151 while ((index >= first_index) || 2152 (index <= last_index)) { 2153 lan743x_rx_reuse_ring_element(rx, 2154 index); 2155 index = lan743x_rx_next_index(rx, 2156 index); 2157 } 2158 } 2159 } 2160 2161 process_extension: 2162 if (extension_index >= 0) { 2163 descriptor = &rx->ring_cpu_ptr[extension_index]; 2164 buffer_info = &rx->buffer_info[extension_index]; 2165 2166 ts_sec = descriptor->data1; 2167 ts_nsec = (descriptor->data2 & 2168 RX_DESC_DATA2_TS_NS_MASK_); 2169 lan743x_rx_reuse_ring_element(rx, extension_index); 2170 real_last_index = extension_index; 2171 } 2172 2173 if (!skb) { 2174 result = RX_PROCESS_RESULT_PACKET_DROPPED; 2175 goto move_forward; 2176 } 2177 2178 if (extension_index < 0) 2179 goto pass_packet_to_os; 2180 hwtstamps = skb_hwtstamps(skb); 2181 if (hwtstamps) 2182 hwtstamps->hwtstamp = ktime_set(ts_sec, ts_nsec); 2183 2184 pass_packet_to_os: 2185 /* pass packet to OS */ 2186 napi_gro_receive(&rx->napi, skb); 2187 result = RX_PROCESS_RESULT_PACKET_RECEIVED; 2188 2189 move_forward: 2190 /* push tail and head forward */ 2191 rx->last_tail = real_last_index; 2192 rx->last_head = lan743x_rx_next_index(rx, real_last_index); 2193 } 2194 done: 2195 return result; 2196 } 2197 2198 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight) 2199 { 2200 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi); 2201 struct lan743x_adapter *adapter = rx->adapter; 2202 u32 rx_tail_flags = 0; 2203 int count; 2204 2205 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) { 2206 /* clear int status bit before reading packet */ 2207 lan743x_csr_write(adapter, DMAC_INT_STS, 2208 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2209 } 2210 count = 0; 2211 while (count < weight) { 2212 int rx_process_result = lan743x_rx_process_packet(rx); 2213 2214 if (rx_process_result == RX_PROCESS_RESULT_PACKET_RECEIVED) { 2215 count++; 2216 } else if (rx_process_result == 2217 RX_PROCESS_RESULT_NOTHING_TO_DO) { 2218 break; 2219 } else if (rx_process_result == 2220 RX_PROCESS_RESULT_PACKET_DROPPED) { 2221 continue; 2222 } 2223 } 2224 rx->frame_count += count; 2225 if (count == weight) 2226 goto done; 2227 2228 if (!napi_complete_done(napi, count)) 2229 goto done; 2230 2231 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2232 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_; 2233 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) { 2234 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_; 2235 } else { 2236 lan743x_csr_write(adapter, INT_EN_SET, 2237 INT_BIT_DMA_RX_(rx->channel_number)); 2238 } 2239 2240 /* update RX_TAIL */ 2241 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2242 rx_tail_flags | rx->last_tail); 2243 done: 2244 return count; 2245 } 2246 2247 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx) 2248 { 2249 if (rx->buffer_info && rx->ring_cpu_ptr) { 2250 int index; 2251 2252 for (index = 0; index < rx->ring_size; index++) 2253 lan743x_rx_release_ring_element(rx, index); 2254 } 2255 2256 if (rx->head_cpu_ptr) { 2257 dma_free_coherent(&rx->adapter->pdev->dev, 2258 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr, 2259 rx->head_dma_ptr); 2260 rx->head_cpu_ptr = NULL; 2261 rx->head_dma_ptr = 0; 2262 } 2263 2264 kfree(rx->buffer_info); 2265 rx->buffer_info = NULL; 2266 2267 if (rx->ring_cpu_ptr) { 2268 dma_free_coherent(&rx->adapter->pdev->dev, 2269 rx->ring_allocation_size, rx->ring_cpu_ptr, 2270 rx->ring_dma_ptr); 2271 rx->ring_allocation_size = 0; 2272 rx->ring_cpu_ptr = NULL; 2273 rx->ring_dma_ptr = 0; 2274 } 2275 2276 rx->ring_size = 0; 2277 rx->last_head = 0; 2278 } 2279 2280 static int lan743x_rx_ring_init(struct lan743x_rx *rx) 2281 { 2282 size_t ring_allocation_size = 0; 2283 dma_addr_t dma_ptr = 0; 2284 void *cpu_ptr = NULL; 2285 int ret = -ENOMEM; 2286 int index = 0; 2287 2288 rx->ring_size = LAN743X_RX_RING_SIZE; 2289 if (rx->ring_size <= 1) { 2290 ret = -EINVAL; 2291 goto cleanup; 2292 } 2293 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) { 2294 ret = -EINVAL; 2295 goto cleanup; 2296 } 2297 ring_allocation_size = ALIGN(rx->ring_size * 2298 sizeof(struct lan743x_rx_descriptor), 2299 PAGE_SIZE); 2300 dma_ptr = 0; 2301 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2302 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2303 if (!cpu_ptr) { 2304 ret = -ENOMEM; 2305 goto cleanup; 2306 } 2307 rx->ring_allocation_size = ring_allocation_size; 2308 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr; 2309 rx->ring_dma_ptr = dma_ptr; 2310 2311 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info), 2312 GFP_KERNEL); 2313 if (!cpu_ptr) { 2314 ret = -ENOMEM; 2315 goto cleanup; 2316 } 2317 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr; 2318 dma_ptr = 0; 2319 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2320 sizeof(*rx->head_cpu_ptr), &dma_ptr, 2321 GFP_KERNEL); 2322 if (!cpu_ptr) { 2323 ret = -ENOMEM; 2324 goto cleanup; 2325 } 2326 2327 rx->head_cpu_ptr = cpu_ptr; 2328 rx->head_dma_ptr = dma_ptr; 2329 if (rx->head_dma_ptr & 0x3) { 2330 ret = -ENOMEM; 2331 goto cleanup; 2332 } 2333 2334 rx->last_head = 0; 2335 for (index = 0; index < rx->ring_size; index++) { 2336 struct sk_buff *new_skb = lan743x_rx_allocate_skb(rx); 2337 2338 ret = lan743x_rx_init_ring_element(rx, index, new_skb); 2339 if (ret) 2340 goto cleanup; 2341 } 2342 return 0; 2343 2344 cleanup: 2345 lan743x_rx_ring_cleanup(rx); 2346 return ret; 2347 } 2348 2349 static void lan743x_rx_close(struct lan743x_rx *rx) 2350 { 2351 struct lan743x_adapter *adapter = rx->adapter; 2352 2353 lan743x_csr_write(adapter, FCT_RX_CTL, 2354 FCT_RX_CTL_DIS_(rx->channel_number)); 2355 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2356 FCT_RX_CTL_EN_(rx->channel_number), 2357 0, 1000, 20000, 100); 2358 2359 lan743x_csr_write(adapter, DMAC_CMD, 2360 DMAC_CMD_STOP_R_(rx->channel_number)); 2361 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number); 2362 2363 lan743x_csr_write(adapter, DMAC_INT_EN_CLR, 2364 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2365 lan743x_csr_write(adapter, INT_EN_CLR, 2366 INT_BIT_DMA_RX_(rx->channel_number)); 2367 napi_disable(&rx->napi); 2368 2369 netif_napi_del(&rx->napi); 2370 2371 lan743x_rx_ring_cleanup(rx); 2372 } 2373 2374 static int lan743x_rx_open(struct lan743x_rx *rx) 2375 { 2376 struct lan743x_adapter *adapter = rx->adapter; 2377 u32 data = 0; 2378 int ret; 2379 2380 rx->frame_count = 0; 2381 ret = lan743x_rx_ring_init(rx); 2382 if (ret) 2383 goto return_error; 2384 2385 netif_napi_add(adapter->netdev, 2386 &rx->napi, lan743x_rx_napi_poll, 2387 rx->ring_size - 1); 2388 2389 lan743x_csr_write(adapter, DMAC_CMD, 2390 DMAC_CMD_RX_SWR_(rx->channel_number)); 2391 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2392 DMAC_CMD_RX_SWR_(rx->channel_number), 2393 0, 1000, 20000, 100); 2394 2395 /* set ring base address */ 2396 lan743x_csr_write(adapter, 2397 RX_BASE_ADDRH(rx->channel_number), 2398 DMA_ADDR_HIGH32(rx->ring_dma_ptr)); 2399 lan743x_csr_write(adapter, 2400 RX_BASE_ADDRL(rx->channel_number), 2401 DMA_ADDR_LOW32(rx->ring_dma_ptr)); 2402 2403 /* set rx write back address */ 2404 lan743x_csr_write(adapter, 2405 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number), 2406 DMA_ADDR_HIGH32(rx->head_dma_ptr)); 2407 lan743x_csr_write(adapter, 2408 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number), 2409 DMA_ADDR_LOW32(rx->head_dma_ptr)); 2410 data = RX_CFG_A_RX_HP_WB_EN_; 2411 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2412 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ | 2413 RX_CFG_A_RX_WB_THRES_SET_(0x7) | 2414 RX_CFG_A_RX_PF_THRES_SET_(16) | 2415 RX_CFG_A_RX_PF_PRI_THRES_SET_(4)); 2416 } 2417 2418 /* set RX_CFG_A */ 2419 lan743x_csr_write(adapter, 2420 RX_CFG_A(rx->channel_number), data); 2421 2422 /* set RX_CFG_B */ 2423 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number)); 2424 data &= ~RX_CFG_B_RX_PAD_MASK_; 2425 if (!RX_HEAD_PADDING) 2426 data |= RX_CFG_B_RX_PAD_0_; 2427 else 2428 data |= RX_CFG_B_RX_PAD_2_; 2429 data &= ~RX_CFG_B_RX_RING_LEN_MASK_; 2430 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_); 2431 data |= RX_CFG_B_TS_ALL_RX_; 2432 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2433 data |= RX_CFG_B_RDMABL_512_; 2434 2435 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data); 2436 rx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2437 INT_BIT_DMA_RX_ 2438 (rx->channel_number)); 2439 2440 /* set RX_CFG_C */ 2441 data = 0; 2442 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2443 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_; 2444 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2445 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_; 2446 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2447 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_; 2448 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2449 data |= RX_CFG_C_RX_INT_EN_R2C_; 2450 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data); 2451 2452 rx->last_tail = ((u32)(rx->ring_size - 1)); 2453 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2454 rx->last_tail); 2455 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number)); 2456 if (rx->last_head) { 2457 ret = -EIO; 2458 goto napi_delete; 2459 } 2460 2461 napi_enable(&rx->napi); 2462 2463 lan743x_csr_write(adapter, INT_EN_SET, 2464 INT_BIT_DMA_RX_(rx->channel_number)); 2465 lan743x_csr_write(adapter, DMAC_INT_STS, 2466 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2467 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2468 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2469 lan743x_csr_write(adapter, DMAC_CMD, 2470 DMAC_CMD_START_R_(rx->channel_number)); 2471 2472 /* initialize fifo */ 2473 lan743x_csr_write(adapter, FCT_RX_CTL, 2474 FCT_RX_CTL_RESET_(rx->channel_number)); 2475 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2476 FCT_RX_CTL_RESET_(rx->channel_number), 2477 0, 1000, 20000, 100); 2478 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number), 2479 FCT_FLOW_CTL_REQ_EN_ | 2480 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) | 2481 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA)); 2482 2483 /* enable fifo */ 2484 lan743x_csr_write(adapter, FCT_RX_CTL, 2485 FCT_RX_CTL_EN_(rx->channel_number)); 2486 return 0; 2487 2488 napi_delete: 2489 netif_napi_del(&rx->napi); 2490 lan743x_rx_ring_cleanup(rx); 2491 2492 return_error: 2493 return ret; 2494 } 2495 2496 static int lan743x_netdev_close(struct net_device *netdev) 2497 { 2498 struct lan743x_adapter *adapter = netdev_priv(netdev); 2499 int index; 2500 2501 lan743x_tx_close(&adapter->tx[0]); 2502 2503 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 2504 lan743x_rx_close(&adapter->rx[index]); 2505 2506 lan743x_ptp_close(adapter); 2507 2508 lan743x_phy_close(adapter); 2509 2510 lan743x_mac_close(adapter); 2511 2512 lan743x_intr_close(adapter); 2513 2514 return 0; 2515 } 2516 2517 static int lan743x_netdev_open(struct net_device *netdev) 2518 { 2519 struct lan743x_adapter *adapter = netdev_priv(netdev); 2520 int index; 2521 int ret; 2522 2523 ret = lan743x_intr_open(adapter); 2524 if (ret) 2525 goto return_error; 2526 2527 ret = lan743x_mac_open(adapter); 2528 if (ret) 2529 goto close_intr; 2530 2531 ret = lan743x_phy_open(adapter); 2532 if (ret) 2533 goto close_mac; 2534 2535 ret = lan743x_ptp_open(adapter); 2536 if (ret) 2537 goto close_phy; 2538 2539 lan743x_rfe_open(adapter); 2540 2541 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2542 ret = lan743x_rx_open(&adapter->rx[index]); 2543 if (ret) 2544 goto close_rx; 2545 } 2546 2547 ret = lan743x_tx_open(&adapter->tx[0]); 2548 if (ret) 2549 goto close_rx; 2550 2551 return 0; 2552 2553 close_rx: 2554 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2555 if (adapter->rx[index].ring_cpu_ptr) 2556 lan743x_rx_close(&adapter->rx[index]); 2557 } 2558 lan743x_ptp_close(adapter); 2559 2560 close_phy: 2561 lan743x_phy_close(adapter); 2562 2563 close_mac: 2564 lan743x_mac_close(adapter); 2565 2566 close_intr: 2567 lan743x_intr_close(adapter); 2568 2569 return_error: 2570 netif_warn(adapter, ifup, adapter->netdev, 2571 "Error opening LAN743x\n"); 2572 return ret; 2573 } 2574 2575 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb, 2576 struct net_device *netdev) 2577 { 2578 struct lan743x_adapter *adapter = netdev_priv(netdev); 2579 2580 return lan743x_tx_xmit_frame(&adapter->tx[0], skb); 2581 } 2582 2583 static int lan743x_netdev_ioctl(struct net_device *netdev, 2584 struct ifreq *ifr, int cmd) 2585 { 2586 if (!netif_running(netdev)) 2587 return -EINVAL; 2588 if (cmd == SIOCSHWTSTAMP) 2589 return lan743x_ptp_ioctl(netdev, ifr, cmd); 2590 return phy_mii_ioctl(netdev->phydev, ifr, cmd); 2591 } 2592 2593 static void lan743x_netdev_set_multicast(struct net_device *netdev) 2594 { 2595 struct lan743x_adapter *adapter = netdev_priv(netdev); 2596 2597 lan743x_rfe_set_multicast(adapter); 2598 } 2599 2600 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu) 2601 { 2602 struct lan743x_adapter *adapter = netdev_priv(netdev); 2603 int ret = 0; 2604 2605 ret = lan743x_mac_set_mtu(adapter, new_mtu); 2606 if (!ret) 2607 netdev->mtu = new_mtu; 2608 return ret; 2609 } 2610 2611 static void lan743x_netdev_get_stats64(struct net_device *netdev, 2612 struct rtnl_link_stats64 *stats) 2613 { 2614 struct lan743x_adapter *adapter = netdev_priv(netdev); 2615 2616 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES); 2617 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES); 2618 stats->rx_bytes = lan743x_csr_read(adapter, 2619 STAT_RX_UNICAST_BYTE_COUNT) + 2620 lan743x_csr_read(adapter, 2621 STAT_RX_BROADCAST_BYTE_COUNT) + 2622 lan743x_csr_read(adapter, 2623 STAT_RX_MULTICAST_BYTE_COUNT); 2624 stats->tx_bytes = lan743x_csr_read(adapter, 2625 STAT_TX_UNICAST_BYTE_COUNT) + 2626 lan743x_csr_read(adapter, 2627 STAT_TX_BROADCAST_BYTE_COUNT) + 2628 lan743x_csr_read(adapter, 2629 STAT_TX_MULTICAST_BYTE_COUNT); 2630 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) + 2631 lan743x_csr_read(adapter, 2632 STAT_RX_ALIGNMENT_ERRORS) + 2633 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) + 2634 lan743x_csr_read(adapter, 2635 STAT_RX_UNDERSIZE_FRAME_ERRORS) + 2636 lan743x_csr_read(adapter, 2637 STAT_RX_OVERSIZE_FRAME_ERRORS); 2638 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) + 2639 lan743x_csr_read(adapter, 2640 STAT_TX_EXCESS_DEFERRAL_ERRORS) + 2641 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS); 2642 stats->rx_dropped = lan743x_csr_read(adapter, 2643 STAT_RX_DROPPED_FRAMES); 2644 stats->tx_dropped = lan743x_csr_read(adapter, 2645 STAT_TX_EXCESSIVE_COLLISION); 2646 stats->multicast = lan743x_csr_read(adapter, 2647 STAT_RX_MULTICAST_FRAMES) + 2648 lan743x_csr_read(adapter, 2649 STAT_TX_MULTICAST_FRAMES); 2650 stats->collisions = lan743x_csr_read(adapter, 2651 STAT_TX_SINGLE_COLLISIONS) + 2652 lan743x_csr_read(adapter, 2653 STAT_TX_MULTIPLE_COLLISIONS) + 2654 lan743x_csr_read(adapter, 2655 STAT_TX_LATE_COLLISIONS); 2656 } 2657 2658 static int lan743x_netdev_set_mac_address(struct net_device *netdev, 2659 void *addr) 2660 { 2661 struct lan743x_adapter *adapter = netdev_priv(netdev); 2662 struct sockaddr *sock_addr = addr; 2663 int ret; 2664 2665 ret = eth_prepare_mac_addr_change(netdev, sock_addr); 2666 if (ret) 2667 return ret; 2668 ether_addr_copy(netdev->dev_addr, sock_addr->sa_data); 2669 lan743x_mac_set_address(adapter, sock_addr->sa_data); 2670 lan743x_rfe_update_mac_address(adapter); 2671 return 0; 2672 } 2673 2674 static const struct net_device_ops lan743x_netdev_ops = { 2675 .ndo_open = lan743x_netdev_open, 2676 .ndo_stop = lan743x_netdev_close, 2677 .ndo_start_xmit = lan743x_netdev_xmit_frame, 2678 .ndo_do_ioctl = lan743x_netdev_ioctl, 2679 .ndo_set_rx_mode = lan743x_netdev_set_multicast, 2680 .ndo_change_mtu = lan743x_netdev_change_mtu, 2681 .ndo_get_stats64 = lan743x_netdev_get_stats64, 2682 .ndo_set_mac_address = lan743x_netdev_set_mac_address, 2683 }; 2684 2685 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter) 2686 { 2687 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2688 } 2689 2690 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter) 2691 { 2692 mdiobus_unregister(adapter->mdiobus); 2693 } 2694 2695 static void lan743x_full_cleanup(struct lan743x_adapter *adapter) 2696 { 2697 unregister_netdev(adapter->netdev); 2698 2699 lan743x_mdiobus_cleanup(adapter); 2700 lan743x_hardware_cleanup(adapter); 2701 lan743x_pci_cleanup(adapter); 2702 } 2703 2704 static int lan743x_hardware_init(struct lan743x_adapter *adapter, 2705 struct pci_dev *pdev) 2706 { 2707 struct lan743x_tx *tx; 2708 int index; 2709 int ret; 2710 2711 adapter->intr.irq = adapter->pdev->irq; 2712 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2713 2714 ret = lan743x_gpio_init(adapter); 2715 if (ret) 2716 return ret; 2717 2718 ret = lan743x_mac_init(adapter); 2719 if (ret) 2720 return ret; 2721 2722 ret = lan743x_phy_init(adapter); 2723 if (ret) 2724 return ret; 2725 2726 ret = lan743x_ptp_init(adapter); 2727 if (ret) 2728 return ret; 2729 2730 lan743x_rfe_update_mac_address(adapter); 2731 2732 ret = lan743x_dmac_init(adapter); 2733 if (ret) 2734 return ret; 2735 2736 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2737 adapter->rx[index].adapter = adapter; 2738 adapter->rx[index].channel_number = index; 2739 } 2740 2741 tx = &adapter->tx[0]; 2742 tx->adapter = adapter; 2743 tx->channel_number = 0; 2744 spin_lock_init(&tx->ring_lock); 2745 return 0; 2746 } 2747 2748 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 2749 { 2750 int ret; 2751 2752 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); 2753 if (!(adapter->mdiobus)) { 2754 ret = -ENOMEM; 2755 goto return_error; 2756 } 2757 2758 adapter->mdiobus->priv = (void *)adapter; 2759 adapter->mdiobus->read = lan743x_mdiobus_read; 2760 adapter->mdiobus->write = lan743x_mdiobus_write; 2761 adapter->mdiobus->name = "lan743x-mdiobus"; 2762 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 2763 "pci-%s", pci_name(adapter->pdev)); 2764 2765 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) 2766 /* LAN7430 uses internal phy at address 1 */ 2767 adapter->mdiobus->phy_mask = ~(u32)BIT(1); 2768 2769 /* register mdiobus */ 2770 ret = mdiobus_register(adapter->mdiobus); 2771 if (ret < 0) 2772 goto return_error; 2773 return 0; 2774 2775 return_error: 2776 return ret; 2777 } 2778 2779 /* lan743x_pcidev_probe - Device Initialization Routine 2780 * @pdev: PCI device information struct 2781 * @id: entry in lan743x_pci_tbl 2782 * 2783 * Returns 0 on success, negative on failure 2784 * 2785 * initializes an adapter identified by a pci_dev structure. 2786 * The OS initialization, configuring of the adapter private structure, 2787 * and a hardware reset occur. 2788 **/ 2789 static int lan743x_pcidev_probe(struct pci_dev *pdev, 2790 const struct pci_device_id *id) 2791 { 2792 struct lan743x_adapter *adapter = NULL; 2793 struct net_device *netdev = NULL; 2794 const void *mac_addr; 2795 int ret = -ENODEV; 2796 2797 netdev = devm_alloc_etherdev(&pdev->dev, 2798 sizeof(struct lan743x_adapter)); 2799 if (!netdev) 2800 goto return_error; 2801 2802 SET_NETDEV_DEV(netdev, &pdev->dev); 2803 pci_set_drvdata(pdev, netdev); 2804 adapter = netdev_priv(netdev); 2805 adapter->netdev = netdev; 2806 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE | 2807 NETIF_MSG_LINK | NETIF_MSG_IFUP | 2808 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED; 2809 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE; 2810 2811 mac_addr = of_get_mac_address(pdev->dev.of_node); 2812 if (!IS_ERR(mac_addr)) 2813 ether_addr_copy(adapter->mac_address, mac_addr); 2814 2815 ret = lan743x_pci_init(adapter, pdev); 2816 if (ret) 2817 goto return_error; 2818 2819 ret = lan743x_csr_init(adapter); 2820 if (ret) 2821 goto cleanup_pci; 2822 2823 ret = lan743x_hardware_init(adapter, pdev); 2824 if (ret) 2825 goto cleanup_pci; 2826 2827 ret = lan743x_mdiobus_init(adapter); 2828 if (ret) 2829 goto cleanup_hardware; 2830 2831 adapter->netdev->netdev_ops = &lan743x_netdev_ops; 2832 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops; 2833 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM; 2834 adapter->netdev->hw_features = adapter->netdev->features; 2835 2836 /* carrier off reporting is important to ethtool even BEFORE open */ 2837 netif_carrier_off(netdev); 2838 2839 ret = register_netdev(adapter->netdev); 2840 if (ret < 0) 2841 goto cleanup_mdiobus; 2842 return 0; 2843 2844 cleanup_mdiobus: 2845 lan743x_mdiobus_cleanup(adapter); 2846 2847 cleanup_hardware: 2848 lan743x_hardware_cleanup(adapter); 2849 2850 cleanup_pci: 2851 lan743x_pci_cleanup(adapter); 2852 2853 return_error: 2854 pr_warn("Initialization failed\n"); 2855 return ret; 2856 } 2857 2858 /** 2859 * lan743x_pcidev_remove - Device Removal Routine 2860 * @pdev: PCI device information struct 2861 * 2862 * this is called by the PCI subsystem to alert the driver 2863 * that it should release a PCI device. This could be caused by a 2864 * Hot-Plug event, or because the driver is going to be removed from 2865 * memory. 2866 **/ 2867 static void lan743x_pcidev_remove(struct pci_dev *pdev) 2868 { 2869 struct net_device *netdev = pci_get_drvdata(pdev); 2870 struct lan743x_adapter *adapter = netdev_priv(netdev); 2871 2872 lan743x_full_cleanup(adapter); 2873 } 2874 2875 static void lan743x_pcidev_shutdown(struct pci_dev *pdev) 2876 { 2877 struct net_device *netdev = pci_get_drvdata(pdev); 2878 struct lan743x_adapter *adapter = netdev_priv(netdev); 2879 2880 rtnl_lock(); 2881 netif_device_detach(netdev); 2882 2883 /* close netdev when netdev is at running state. 2884 * For instance, it is true when system goes to sleep by pm-suspend 2885 * However, it is false when system goes to sleep by suspend GUI menu 2886 */ 2887 if (netif_running(netdev)) 2888 lan743x_netdev_close(netdev); 2889 rtnl_unlock(); 2890 2891 #ifdef CONFIG_PM 2892 pci_save_state(pdev); 2893 #endif 2894 2895 /* clean up lan743x portion */ 2896 lan743x_hardware_cleanup(adapter); 2897 } 2898 2899 #ifdef CONFIG_PM_SLEEP 2900 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len) 2901 { 2902 return bitrev16(crc16(0xFFFF, buf, len)); 2903 } 2904 2905 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter) 2906 { 2907 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 2908 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 2909 const u8 arp_type[2] = { 0x08, 0x06 }; 2910 int mask_index; 2911 u32 pmtctl; 2912 u32 wucsr; 2913 u32 macrx; 2914 u16 crc; 2915 2916 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++) 2917 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0); 2918 2919 /* clear wake settings */ 2920 pmtctl = lan743x_csr_read(adapter, PMT_CTL); 2921 pmtctl |= PMT_CTL_WUPS_MASK_; 2922 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ | 2923 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ | 2924 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_); 2925 2926 macrx = lan743x_csr_read(adapter, MAC_RX); 2927 2928 wucsr = 0; 2929 mask_index = 0; 2930 2931 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_; 2932 2933 if (adapter->wolopts & WAKE_PHY) { 2934 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_; 2935 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_; 2936 } 2937 if (adapter->wolopts & WAKE_MAGIC) { 2938 wucsr |= MAC_WUCSR_MPEN_; 2939 macrx |= MAC_RX_RXEN_; 2940 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2941 } 2942 if (adapter->wolopts & WAKE_UCAST) { 2943 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_; 2944 macrx |= MAC_RX_RXEN_; 2945 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2946 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2947 } 2948 if (adapter->wolopts & WAKE_BCAST) { 2949 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_; 2950 macrx |= MAC_RX_RXEN_; 2951 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2952 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2953 } 2954 if (adapter->wolopts & WAKE_MCAST) { 2955 /* IPv4 multicast */ 2956 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3); 2957 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2958 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 2959 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2960 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2961 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7); 2962 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2963 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2964 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2965 mask_index++; 2966 2967 /* IPv6 multicast */ 2968 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2); 2969 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2970 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 2971 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2972 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2973 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3); 2974 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2975 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2976 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2977 mask_index++; 2978 2979 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 2980 macrx |= MAC_RX_RXEN_; 2981 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2982 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2983 } 2984 if (adapter->wolopts & WAKE_ARP) { 2985 /* set MAC_WUF_CFG & WUF_MASK 2986 * for packettype (offset 12,13) = ARP (0x0806) 2987 */ 2988 crc = lan743x_pm_wakeframe_crc16(arp_type, 2); 2989 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2990 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ | 2991 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2992 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2993 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000); 2994 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2995 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2996 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2997 mask_index++; 2998 2999 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3000 macrx |= MAC_RX_RXEN_; 3001 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3002 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3003 } 3004 3005 lan743x_csr_write(adapter, MAC_WUCSR, wucsr); 3006 lan743x_csr_write(adapter, PMT_CTL, pmtctl); 3007 lan743x_csr_write(adapter, MAC_RX, macrx); 3008 } 3009 3010 static int lan743x_pm_suspend(struct device *dev) 3011 { 3012 struct pci_dev *pdev = to_pci_dev(dev); 3013 struct net_device *netdev = pci_get_drvdata(pdev); 3014 struct lan743x_adapter *adapter = netdev_priv(netdev); 3015 3016 lan743x_pcidev_shutdown(pdev); 3017 3018 /* clear all wakes */ 3019 lan743x_csr_write(adapter, MAC_WUCSR, 0); 3020 lan743x_csr_write(adapter, MAC_WUCSR2, 0); 3021 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF); 3022 3023 if (adapter->wolopts) 3024 lan743x_pm_set_wol(adapter); 3025 3026 /* Host sets PME_En, put D3hot */ 3027 return pci_prepare_to_sleep(pdev);; 3028 } 3029 3030 static int lan743x_pm_resume(struct device *dev) 3031 { 3032 struct pci_dev *pdev = to_pci_dev(dev); 3033 struct net_device *netdev = pci_get_drvdata(pdev); 3034 struct lan743x_adapter *adapter = netdev_priv(netdev); 3035 int ret; 3036 3037 pci_set_power_state(pdev, PCI_D0); 3038 pci_restore_state(pdev); 3039 pci_save_state(pdev); 3040 3041 ret = lan743x_hardware_init(adapter, pdev); 3042 if (ret) { 3043 netif_err(adapter, probe, adapter->netdev, 3044 "lan743x_hardware_init returned %d\n", ret); 3045 } 3046 3047 /* open netdev when netdev is at running state while resume. 3048 * For instance, it is true when system wakesup after pm-suspend 3049 * However, it is false when system wakes up after suspend GUI menu 3050 */ 3051 if (netif_running(netdev)) 3052 lan743x_netdev_open(netdev); 3053 3054 netif_device_attach(netdev); 3055 3056 return 0; 3057 } 3058 3059 static const struct dev_pm_ops lan743x_pm_ops = { 3060 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume) 3061 }; 3062 #endif /* CONFIG_PM_SLEEP */ 3063 3064 static const struct pci_device_id lan743x_pcidev_tbl[] = { 3065 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 3066 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 3067 { 0, } 3068 }; 3069 3070 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl); 3071 3072 static struct pci_driver lan743x_pcidev_driver = { 3073 .name = DRIVER_NAME, 3074 .id_table = lan743x_pcidev_tbl, 3075 .probe = lan743x_pcidev_probe, 3076 .remove = lan743x_pcidev_remove, 3077 #ifdef CONFIG_PM_SLEEP 3078 .driver.pm = &lan743x_pm_ops, 3079 #endif 3080 .shutdown = lan743x_pcidev_shutdown, 3081 }; 3082 3083 module_pci_driver(lan743x_pcidev_driver); 3084 3085 MODULE_AUTHOR(DRIVER_AUTHOR); 3086 MODULE_DESCRIPTION(DRIVER_DESC); 3087 MODULE_LICENSE("GPL"); 3088