1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (C) 2018 Microchip Technology Inc. */ 3 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/crc32.h> 9 #include <linux/microchipphy.h> 10 #include <linux/net_tstamp.h> 11 #include <linux/of_mdio.h> 12 #include <linux/of_net.h> 13 #include <linux/phy.h> 14 #include <linux/phy_fixed.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/iopoll.h> 17 #include <linux/crc16.h> 18 #include "lan743x_main.h" 19 #include "lan743x_ethtool.h" 20 21 #define MMD_ACCESS_ADDRESS 0 22 #define MMD_ACCESS_WRITE 1 23 #define MMD_ACCESS_READ 2 24 #define MMD_ACCESS_READ_INC 3 25 26 static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter) 27 { 28 u32 chip_rev; 29 u32 strap; 30 31 strap = lan743x_csr_read(adapter, STRAP_READ); 32 if (strap & STRAP_READ_USE_SGMII_EN_) { 33 if (strap & STRAP_READ_SGMII_EN_) 34 adapter->is_sgmii_en = true; 35 else 36 adapter->is_sgmii_en = false; 37 netif_dbg(adapter, drv, adapter->netdev, 38 "STRAP_READ: 0x%08X\n", strap); 39 } else { 40 chip_rev = lan743x_csr_read(adapter, FPGA_REV); 41 if (chip_rev) { 42 if (chip_rev & FPGA_SGMII_OP) 43 adapter->is_sgmii_en = true; 44 else 45 adapter->is_sgmii_en = false; 46 netif_dbg(adapter, drv, adapter->netdev, 47 "FPGA_REV: 0x%08X\n", chip_rev); 48 } else { 49 adapter->is_sgmii_en = false; 50 } 51 } 52 } 53 54 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter) 55 { 56 struct lan743x_csr *csr = &adapter->csr; 57 u32 id_rev = csr->id_rev; 58 59 if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) || 60 ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) { 61 return true; 62 } 63 return false; 64 } 65 66 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 67 { 68 pci_release_selected_regions(adapter->pdev, 69 pci_select_bars(adapter->pdev, 70 IORESOURCE_MEM)); 71 pci_disable_device(adapter->pdev); 72 } 73 74 static int lan743x_pci_init(struct lan743x_adapter *adapter, 75 struct pci_dev *pdev) 76 { 77 unsigned long bars = 0; 78 int ret; 79 80 adapter->pdev = pdev; 81 ret = pci_enable_device_mem(pdev); 82 if (ret) 83 goto return_error; 84 85 netif_info(adapter, probe, adapter->netdev, 86 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n", 87 pdev->vendor, pdev->device); 88 bars = pci_select_bars(pdev, IORESOURCE_MEM); 89 if (!test_bit(0, &bars)) 90 goto disable_device; 91 92 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME); 93 if (ret) 94 goto disable_device; 95 96 pci_set_master(pdev); 97 return 0; 98 99 disable_device: 100 pci_disable_device(adapter->pdev); 101 102 return_error: 103 return ret; 104 } 105 106 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset) 107 { 108 return ioread32(&adapter->csr.csr_address[offset]); 109 } 110 111 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, 112 u32 data) 113 { 114 iowrite32(data, &adapter->csr.csr_address[offset]); 115 } 116 117 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset) 118 119 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter) 120 { 121 u32 data; 122 123 data = lan743x_csr_read(adapter, HW_CFG); 124 data |= HW_CFG_LRST_; 125 lan743x_csr_write(adapter, HW_CFG, data); 126 127 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data, 128 !(data & HW_CFG_LRST_), 100000, 10000000); 129 } 130 131 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter, 132 int offset, u32 bit_mask, 133 int target_value, int usleep_min, 134 int usleep_max, int count) 135 { 136 u32 data; 137 138 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data, 139 target_value == ((data & bit_mask) ? 1 : 0), 140 usleep_max, usleep_min * count); 141 } 142 143 static int lan743x_csr_init(struct lan743x_adapter *adapter) 144 { 145 struct lan743x_csr *csr = &adapter->csr; 146 resource_size_t bar_start, bar_length; 147 int result; 148 149 bar_start = pci_resource_start(adapter->pdev, 0); 150 bar_length = pci_resource_len(adapter->pdev, 0); 151 csr->csr_address = devm_ioremap(&adapter->pdev->dev, 152 bar_start, bar_length); 153 if (!csr->csr_address) { 154 result = -ENOMEM; 155 goto clean_up; 156 } 157 158 csr->id_rev = lan743x_csr_read(adapter, ID_REV); 159 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 160 netif_info(adapter, probe, adapter->netdev, 161 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n", 162 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), 163 FPGA_REV_GET_MINOR_(csr->fpga_rev)); 164 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) { 165 result = -ENODEV; 166 goto clean_up; 167 } 168 169 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 170 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { 171 case ID_REV_CHIP_REV_A0_: 172 csr->flags |= LAN743X_CSR_FLAG_IS_A0; 173 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 174 break; 175 case ID_REV_CHIP_REV_B0_: 176 csr->flags |= LAN743X_CSR_FLAG_IS_B0; 177 break; 178 } 179 180 result = lan743x_csr_light_reset(adapter); 181 if (result) 182 goto clean_up; 183 return 0; 184 clean_up: 185 return result; 186 } 187 188 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter) 189 { 190 struct lan743x_intr *intr = &adapter->intr; 191 192 /* disable the interrupt to prevent repeated re-triggering */ 193 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 194 intr->software_isr_flag = true; 195 wake_up(&intr->software_isr_wq); 196 } 197 198 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags) 199 { 200 struct lan743x_tx *tx = context; 201 struct lan743x_adapter *adapter = tx->adapter; 202 bool enable_flag = true; 203 204 lan743x_csr_read(adapter, INT_EN_SET); 205 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 206 lan743x_csr_write(adapter, INT_EN_CLR, 207 INT_BIT_DMA_TX_(tx->channel_number)); 208 } 209 210 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { 211 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 212 u32 dmac_int_sts; 213 u32 dmac_int_en; 214 215 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 216 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 217 else 218 dmac_int_sts = ioc_bit; 219 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 220 dmac_int_en = lan743x_csr_read(adapter, 221 DMAC_INT_EN_SET); 222 else 223 dmac_int_en = ioc_bit; 224 225 dmac_int_en &= ioc_bit; 226 dmac_int_sts &= dmac_int_en; 227 if (dmac_int_sts & ioc_bit) { 228 napi_schedule(&tx->napi); 229 enable_flag = false;/* poll func will enable later */ 230 } 231 } 232 233 if (enable_flag) 234 /* enable isr */ 235 lan743x_csr_write(adapter, INT_EN_SET, 236 INT_BIT_DMA_TX_(tx->channel_number)); 237 } 238 239 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags) 240 { 241 struct lan743x_rx *rx = context; 242 struct lan743x_adapter *adapter = rx->adapter; 243 bool enable_flag = true; 244 245 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 246 lan743x_csr_write(adapter, INT_EN_CLR, 247 INT_BIT_DMA_RX_(rx->channel_number)); 248 } 249 250 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) { 251 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number); 252 u32 dmac_int_sts; 253 u32 dmac_int_en; 254 255 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 256 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 257 else 258 dmac_int_sts = rx_frame_bit; 259 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 260 dmac_int_en = lan743x_csr_read(adapter, 261 DMAC_INT_EN_SET); 262 else 263 dmac_int_en = rx_frame_bit; 264 265 dmac_int_en &= rx_frame_bit; 266 dmac_int_sts &= dmac_int_en; 267 if (dmac_int_sts & rx_frame_bit) { 268 napi_schedule(&rx->napi); 269 enable_flag = false;/* poll funct will enable later */ 270 } 271 } 272 273 if (enable_flag) { 274 /* enable isr */ 275 lan743x_csr_write(adapter, INT_EN_SET, 276 INT_BIT_DMA_RX_(rx->channel_number)); 277 } 278 } 279 280 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags) 281 { 282 struct lan743x_adapter *adapter = context; 283 unsigned int channel; 284 285 if (int_sts & INT_BIT_ALL_RX_) { 286 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS; 287 channel++) { 288 u32 int_bit = INT_BIT_DMA_RX_(channel); 289 290 if (int_sts & int_bit) { 291 lan743x_rx_isr(&adapter->rx[channel], 292 int_bit, flags); 293 int_sts &= ~int_bit; 294 } 295 } 296 } 297 if (int_sts & INT_BIT_ALL_TX_) { 298 for (channel = 0; channel < adapter->used_tx_channels; 299 channel++) { 300 u32 int_bit = INT_BIT_DMA_TX_(channel); 301 302 if (int_sts & int_bit) { 303 lan743x_tx_isr(&adapter->tx[channel], 304 int_bit, flags); 305 int_sts &= ~int_bit; 306 } 307 } 308 } 309 if (int_sts & INT_BIT_ALL_OTHER_) { 310 if (int_sts & INT_BIT_SW_GP_) { 311 lan743x_intr_software_isr(adapter); 312 int_sts &= ~INT_BIT_SW_GP_; 313 } 314 if (int_sts & INT_BIT_1588_) { 315 lan743x_ptp_isr(adapter); 316 int_sts &= ~INT_BIT_1588_; 317 } 318 } 319 if (int_sts) 320 lan743x_csr_write(adapter, INT_EN_CLR, int_sts); 321 } 322 323 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr) 324 { 325 struct lan743x_vector *vector = ptr; 326 struct lan743x_adapter *adapter = vector->adapter; 327 irqreturn_t result = IRQ_NONE; 328 u32 int_enables; 329 u32 int_sts; 330 331 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) { 332 int_sts = lan743x_csr_read(adapter, INT_STS); 333 } else if (vector->flags & 334 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C | 335 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) { 336 int_sts = lan743x_csr_read(adapter, INT_STS_R2C); 337 } else { 338 /* use mask as implied status */ 339 int_sts = vector->int_mask | INT_BIT_MAS_; 340 } 341 342 if (!(int_sts & INT_BIT_MAS_)) 343 goto irq_done; 344 345 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR) 346 /* disable vector interrupt */ 347 lan743x_csr_write(adapter, 348 INT_VEC_EN_CLR, 349 INT_VEC_EN_(vector->vector_index)); 350 351 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR) 352 /* disable master interrupt */ 353 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 354 355 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) { 356 int_enables = lan743x_csr_read(adapter, INT_EN_SET); 357 } else { 358 /* use vector mask as implied enable mask */ 359 int_enables = vector->int_mask; 360 } 361 362 int_sts &= int_enables; 363 int_sts &= vector->int_mask; 364 if (int_sts) { 365 if (vector->handler) { 366 vector->handler(vector->context, 367 int_sts, vector->flags); 368 } else { 369 /* disable interrupts on this vector */ 370 lan743x_csr_write(adapter, INT_EN_CLR, 371 vector->int_mask); 372 } 373 result = IRQ_HANDLED; 374 } 375 376 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET) 377 /* enable master interrupt */ 378 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 379 380 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET) 381 /* enable vector interrupt */ 382 lan743x_csr_write(adapter, 383 INT_VEC_EN_SET, 384 INT_VEC_EN_(vector->vector_index)); 385 irq_done: 386 return result; 387 } 388 389 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter) 390 { 391 struct lan743x_intr *intr = &adapter->intr; 392 int ret; 393 394 intr->software_isr_flag = false; 395 396 /* enable and activate test interrupt */ 397 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_); 398 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_); 399 400 ret = wait_event_timeout(intr->software_isr_wq, 401 intr->software_isr_flag, 402 msecs_to_jiffies(200)); 403 404 /* disable test interrupt */ 405 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 406 407 return ret > 0 ? 0 : -ENODEV; 408 } 409 410 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter, 411 int vector_index, u32 flags, 412 u32 int_mask, 413 lan743x_vector_handler handler, 414 void *context) 415 { 416 struct lan743x_vector *vector = &adapter->intr.vector_list 417 [vector_index]; 418 int ret; 419 420 vector->adapter = adapter; 421 vector->flags = flags; 422 vector->vector_index = vector_index; 423 vector->int_mask = int_mask; 424 vector->handler = handler; 425 vector->context = context; 426 427 ret = request_irq(vector->irq, 428 lan743x_intr_entry_isr, 429 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ? 430 IRQF_SHARED : 0, DRIVER_NAME, vector); 431 if (ret) { 432 vector->handler = NULL; 433 vector->context = NULL; 434 vector->int_mask = 0; 435 vector->flags = 0; 436 } 437 return ret; 438 } 439 440 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter, 441 int vector_index) 442 { 443 struct lan743x_vector *vector = &adapter->intr.vector_list 444 [vector_index]; 445 446 free_irq(vector->irq, vector); 447 vector->handler = NULL; 448 vector->context = NULL; 449 vector->int_mask = 0; 450 vector->flags = 0; 451 } 452 453 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter, 454 u32 int_mask) 455 { 456 int index; 457 458 for (index = 0; index < adapter->max_vector_count; index++) { 459 if (adapter->intr.vector_list[index].int_mask & int_mask) 460 return adapter->intr.vector_list[index].flags; 461 } 462 return 0; 463 } 464 465 static void lan743x_intr_close(struct lan743x_adapter *adapter) 466 { 467 struct lan743x_intr *intr = &adapter->intr; 468 int index = 0; 469 470 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 471 if (adapter->is_pci11x1x) 472 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF); 473 else 474 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 475 476 for (index = 0; index < intr->number_of_vectors; index++) { 477 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 478 lan743x_intr_unregister_isr(adapter, index); 479 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); 480 } 481 } 482 483 if (intr->flags & INTR_FLAG_MSI_ENABLED) { 484 pci_disable_msi(adapter->pdev); 485 intr->flags &= ~INTR_FLAG_MSI_ENABLED; 486 } 487 488 if (intr->flags & INTR_FLAG_MSIX_ENABLED) { 489 pci_disable_msix(adapter->pdev); 490 intr->flags &= ~INTR_FLAG_MSIX_ENABLED; 491 } 492 } 493 494 static int lan743x_intr_open(struct lan743x_adapter *adapter) 495 { 496 struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT]; 497 struct lan743x_intr *intr = &adapter->intr; 498 unsigned int used_tx_channels; 499 u32 int_vec_en_auto_clr = 0; 500 u8 max_vector_count; 501 u32 int_vec_map0 = 0; 502 u32 int_vec_map1 = 0; 503 int ret = -ENODEV; 504 int index = 0; 505 u32 flags = 0; 506 507 intr->number_of_vectors = 0; 508 509 /* Try to set up MSIX interrupts */ 510 max_vector_count = adapter->max_vector_count; 511 memset(&msix_entries[0], 0, 512 sizeof(struct msix_entry) * max_vector_count); 513 for (index = 0; index < max_vector_count; index++) 514 msix_entries[index].entry = index; 515 used_tx_channels = adapter->used_tx_channels; 516 ret = pci_enable_msix_range(adapter->pdev, 517 msix_entries, 1, 518 1 + used_tx_channels + 519 LAN743X_USED_RX_CHANNELS); 520 521 if (ret > 0) { 522 intr->flags |= INTR_FLAG_MSIX_ENABLED; 523 intr->number_of_vectors = ret; 524 intr->using_vectors = true; 525 for (index = 0; index < intr->number_of_vectors; index++) 526 intr->vector_list[index].irq = msix_entries 527 [index].vector; 528 netif_info(adapter, ifup, adapter->netdev, 529 "using MSIX interrupts, number of vectors = %d\n", 530 intr->number_of_vectors); 531 } 532 533 /* If MSIX failed try to setup using MSI interrupts */ 534 if (!intr->number_of_vectors) { 535 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 536 if (!pci_enable_msi(adapter->pdev)) { 537 intr->flags |= INTR_FLAG_MSI_ENABLED; 538 intr->number_of_vectors = 1; 539 intr->using_vectors = true; 540 intr->vector_list[0].irq = 541 adapter->pdev->irq; 542 netif_info(adapter, ifup, adapter->netdev, 543 "using MSI interrupts, number of vectors = %d\n", 544 intr->number_of_vectors); 545 } 546 } 547 } 548 549 /* If MSIX, and MSI failed, setup using legacy interrupt */ 550 if (!intr->number_of_vectors) { 551 intr->number_of_vectors = 1; 552 intr->using_vectors = false; 553 intr->vector_list[0].irq = intr->irq; 554 netif_info(adapter, ifup, adapter->netdev, 555 "using legacy interrupts\n"); 556 } 557 558 /* At this point we must have at least one irq */ 559 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF); 560 561 /* map all interrupts to vector 0 */ 562 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000); 563 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000); 564 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000); 565 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 566 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 567 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 568 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 569 570 if (intr->using_vectors) { 571 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 572 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 573 } else { 574 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR | 575 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET | 576 LAN743X_VECTOR_FLAG_IRQ_SHARED; 577 } 578 579 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 580 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ; 581 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C; 582 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 583 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK; 584 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C; 585 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C; 586 } 587 588 init_waitqueue_head(&intr->software_isr_wq); 589 590 ret = lan743x_intr_register_isr(adapter, 0, flags, 591 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ | 592 INT_BIT_ALL_OTHER_, 593 lan743x_intr_shared_isr, adapter); 594 if (ret) 595 goto clean_up; 596 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0); 597 598 if (intr->using_vectors) 599 lan743x_csr_write(adapter, INT_VEC_EN_SET, 600 INT_VEC_EN_(0)); 601 602 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 603 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD); 604 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD); 605 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD); 606 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD); 607 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD); 608 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 609 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 610 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 611 if (adapter->is_pci11x1x) { 612 lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD); 613 lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD); 614 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654); 615 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210); 616 } else { 617 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 618 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 619 } 620 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 621 } 622 623 /* enable interrupts */ 624 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 625 ret = lan743x_intr_test_isr(adapter); 626 if (ret) 627 goto clean_up; 628 629 if (intr->number_of_vectors > 1) { 630 int number_of_tx_vectors = intr->number_of_vectors - 1; 631 632 if (number_of_tx_vectors > used_tx_channels) 633 number_of_tx_vectors = used_tx_channels; 634 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 635 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 636 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 637 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 638 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 639 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 640 641 if (adapter->csr.flags & 642 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 643 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 644 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 645 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 646 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 647 } 648 649 for (index = 0; index < number_of_tx_vectors; index++) { 650 u32 int_bit = INT_BIT_DMA_TX_(index); 651 int vector = index + 1; 652 653 /* map TX interrupt to vector */ 654 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector); 655 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1); 656 657 /* Remove TX interrupt from shared mask */ 658 intr->vector_list[0].int_mask &= ~int_bit; 659 ret = lan743x_intr_register_isr(adapter, vector, flags, 660 int_bit, lan743x_tx_isr, 661 &adapter->tx[index]); 662 if (ret) 663 goto clean_up; 664 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 665 if (!(flags & 666 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)) 667 lan743x_csr_write(adapter, INT_VEC_EN_SET, 668 INT_VEC_EN_(vector)); 669 } 670 } 671 if ((intr->number_of_vectors - used_tx_channels) > 1) { 672 int number_of_rx_vectors = intr->number_of_vectors - 673 used_tx_channels - 1; 674 675 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 676 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; 677 678 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 679 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 680 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 681 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 682 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 683 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 684 685 if (adapter->csr.flags & 686 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 687 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR | 688 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 689 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 690 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 691 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 692 } 693 for (index = 0; index < number_of_rx_vectors; index++) { 694 int vector = index + 1 + used_tx_channels; 695 u32 int_bit = INT_BIT_DMA_RX_(index); 696 697 /* map RX interrupt to vector */ 698 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector); 699 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0); 700 if (flags & 701 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) { 702 int_vec_en_auto_clr |= INT_VEC_EN_(vector); 703 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR, 704 int_vec_en_auto_clr); 705 } 706 707 /* Remove RX interrupt from shared mask */ 708 intr->vector_list[0].int_mask &= ~int_bit; 709 ret = lan743x_intr_register_isr(adapter, vector, flags, 710 int_bit, lan743x_rx_isr, 711 &adapter->rx[index]); 712 if (ret) 713 goto clean_up; 714 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 715 716 lan743x_csr_write(adapter, INT_VEC_EN_SET, 717 INT_VEC_EN_(vector)); 718 } 719 } 720 return 0; 721 722 clean_up: 723 lan743x_intr_close(adapter); 724 return ret; 725 } 726 727 static int lan743x_dp_write(struct lan743x_adapter *adapter, 728 u32 select, u32 addr, u32 length, u32 *buf) 729 { 730 u32 dp_sel; 731 int i; 732 733 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 734 1, 40, 100, 100)) 735 return -EIO; 736 dp_sel = lan743x_csr_read(adapter, DP_SEL); 737 dp_sel &= ~DP_SEL_MASK_; 738 dp_sel |= select; 739 lan743x_csr_write(adapter, DP_SEL, dp_sel); 740 741 for (i = 0; i < length; i++) { 742 lan743x_csr_write(adapter, DP_ADDR, addr + i); 743 lan743x_csr_write(adapter, DP_DATA_0, buf[i]); 744 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_); 745 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 746 1, 40, 100, 100)) 747 return -EIO; 748 } 749 750 return 0; 751 } 752 753 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read) 754 { 755 u32 ret; 756 757 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 758 MAC_MII_ACC_PHY_ADDR_MASK_; 759 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) & 760 MAC_MII_ACC_MIIRINDA_MASK_; 761 762 if (read) 763 ret |= MAC_MII_ACC_MII_READ_; 764 else 765 ret |= MAC_MII_ACC_MII_WRITE_; 766 ret |= MAC_MII_ACC_MII_BUSY_; 767 768 return ret; 769 } 770 771 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter) 772 { 773 u32 data; 774 775 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data, 776 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000); 777 } 778 779 static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index) 780 { 781 struct lan743x_adapter *adapter = bus->priv; 782 u32 val, mii_access; 783 int ret; 784 785 /* comfirm MII not busy */ 786 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 787 if (ret < 0) 788 return ret; 789 790 /* set the address, index & direction (read from PHY) */ 791 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ); 792 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 793 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 794 if (ret < 0) 795 return ret; 796 797 val = lan743x_csr_read(adapter, MAC_MII_DATA); 798 return (int)(val & 0xFFFF); 799 } 800 801 static int lan743x_mdiobus_write(struct mii_bus *bus, 802 int phy_id, int index, u16 regval) 803 { 804 struct lan743x_adapter *adapter = bus->priv; 805 u32 val, mii_access; 806 int ret; 807 808 /* confirm MII not busy */ 809 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 810 if (ret < 0) 811 return ret; 812 val = (u32)regval; 813 lan743x_csr_write(adapter, MAC_MII_DATA, val); 814 815 /* set the address, index & direction (write to PHY) */ 816 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 817 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 818 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 819 return ret; 820 } 821 822 static u32 lan743x_mac_mmd_access(int id, int index, int op) 823 { 824 u16 dev_addr; 825 u32 ret; 826 827 dev_addr = (index >> 16) & 0x1f; 828 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 829 MAC_MII_ACC_PHY_ADDR_MASK_; 830 ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) & 831 MAC_MII_ACC_MIIMMD_MASK_; 832 if (op == MMD_ACCESS_WRITE) 833 ret |= MAC_MII_ACC_MIICMD_WRITE_; 834 else if (op == MMD_ACCESS_READ) 835 ret |= MAC_MII_ACC_MIICMD_READ_; 836 else if (op == MMD_ACCESS_READ_INC) 837 ret |= MAC_MII_ACC_MIICMD_READ_INC_; 838 else 839 ret |= MAC_MII_ACC_MIICMD_ADDR_; 840 ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_); 841 842 return ret; 843 } 844 845 static int lan743x_mdiobus_c45_read(struct mii_bus *bus, int phy_id, int index) 846 { 847 struct lan743x_adapter *adapter = bus->priv; 848 u32 mmd_access; 849 int ret; 850 851 /* comfirm MII not busy */ 852 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 853 if (ret < 0) 854 return ret; 855 if (index & MII_ADDR_C45) { 856 /* Load Register Address */ 857 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)(index & 0xffff)); 858 mmd_access = lan743x_mac_mmd_access(phy_id, index, 859 MMD_ACCESS_ADDRESS); 860 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 861 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 862 if (ret < 0) 863 return ret; 864 /* Read Data */ 865 mmd_access = lan743x_mac_mmd_access(phy_id, index, 866 MMD_ACCESS_READ); 867 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 868 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 869 if (ret < 0) 870 return ret; 871 ret = lan743x_csr_read(adapter, MAC_MII_DATA); 872 return (int)(ret & 0xFFFF); 873 } 874 875 ret = lan743x_mdiobus_read(bus, phy_id, index); 876 return ret; 877 } 878 879 static int lan743x_mdiobus_c45_write(struct mii_bus *bus, 880 int phy_id, int index, u16 regval) 881 { 882 struct lan743x_adapter *adapter = bus->priv; 883 u32 mmd_access; 884 int ret; 885 886 /* confirm MII not busy */ 887 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 888 if (ret < 0) 889 return ret; 890 if (index & MII_ADDR_C45) { 891 /* Load Register Address */ 892 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)(index & 0xffff)); 893 mmd_access = lan743x_mac_mmd_access(phy_id, index, 894 MMD_ACCESS_ADDRESS); 895 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 896 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 897 if (ret < 0) 898 return ret; 899 /* Write Data */ 900 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval); 901 mmd_access = lan743x_mac_mmd_access(phy_id, index, 902 MMD_ACCESS_WRITE); 903 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 904 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 905 } else { 906 ret = lan743x_mdiobus_write(bus, phy_id, index, regval); 907 } 908 909 return ret; 910 } 911 912 static void lan743x_mac_set_address(struct lan743x_adapter *adapter, 913 u8 *addr) 914 { 915 u32 addr_lo, addr_hi; 916 917 addr_lo = addr[0] | 918 addr[1] << 8 | 919 addr[2] << 16 | 920 addr[3] << 24; 921 addr_hi = addr[4] | 922 addr[5] << 8; 923 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo); 924 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi); 925 926 ether_addr_copy(adapter->mac_address, addr); 927 netif_info(adapter, drv, adapter->netdev, 928 "MAC address set to %pM\n", addr); 929 } 930 931 static int lan743x_mac_init(struct lan743x_adapter *adapter) 932 { 933 bool mac_address_valid = true; 934 struct net_device *netdev; 935 u32 mac_addr_hi = 0; 936 u32 mac_addr_lo = 0; 937 u32 data; 938 939 netdev = adapter->netdev; 940 941 /* disable auto duplex, and speed detection. Phylib does that */ 942 data = lan743x_csr_read(adapter, MAC_CR); 943 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_); 944 data |= MAC_CR_CNTR_RST_; 945 lan743x_csr_write(adapter, MAC_CR, data); 946 947 if (!is_valid_ether_addr(adapter->mac_address)) { 948 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH); 949 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL); 950 adapter->mac_address[0] = mac_addr_lo & 0xFF; 951 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF; 952 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF; 953 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF; 954 adapter->mac_address[4] = mac_addr_hi & 0xFF; 955 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF; 956 957 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) && 958 mac_addr_lo == 0xFFFFFFFF) { 959 mac_address_valid = false; 960 } else if (!is_valid_ether_addr(adapter->mac_address)) { 961 mac_address_valid = false; 962 } 963 964 if (!mac_address_valid) 965 eth_random_addr(adapter->mac_address); 966 } 967 lan743x_mac_set_address(adapter, adapter->mac_address); 968 eth_hw_addr_set(netdev, adapter->mac_address); 969 970 return 0; 971 } 972 973 static int lan743x_mac_open(struct lan743x_adapter *adapter) 974 { 975 u32 temp; 976 977 temp = lan743x_csr_read(adapter, MAC_RX); 978 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_); 979 temp = lan743x_csr_read(adapter, MAC_TX); 980 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_); 981 return 0; 982 } 983 984 static void lan743x_mac_close(struct lan743x_adapter *adapter) 985 { 986 u32 temp; 987 988 temp = lan743x_csr_read(adapter, MAC_TX); 989 temp &= ~MAC_TX_TXEN_; 990 lan743x_csr_write(adapter, MAC_TX, temp); 991 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_, 992 1, 1000, 20000, 100); 993 994 temp = lan743x_csr_read(adapter, MAC_RX); 995 temp &= ~MAC_RX_RXEN_; 996 lan743x_csr_write(adapter, MAC_RX, temp); 997 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 998 1, 1000, 20000, 100); 999 } 1000 1001 static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, 1002 bool tx_enable, bool rx_enable) 1003 { 1004 u32 flow_setting = 0; 1005 1006 /* set maximum pause time because when fifo space frees 1007 * up a zero value pause frame will be sent to release the pause 1008 */ 1009 flow_setting = MAC_FLOW_CR_FCPT_MASK_; 1010 if (tx_enable) 1011 flow_setting |= MAC_FLOW_CR_TX_FCEN_; 1012 if (rx_enable) 1013 flow_setting |= MAC_FLOW_CR_RX_FCEN_; 1014 lan743x_csr_write(adapter, MAC_FLOW, flow_setting); 1015 } 1016 1017 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu) 1018 { 1019 int enabled = 0; 1020 u32 mac_rx = 0; 1021 1022 mac_rx = lan743x_csr_read(adapter, MAC_RX); 1023 if (mac_rx & MAC_RX_RXEN_) { 1024 enabled = 1; 1025 if (mac_rx & MAC_RX_RXD_) { 1026 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1027 mac_rx &= ~MAC_RX_RXD_; 1028 } 1029 mac_rx &= ~MAC_RX_RXEN_; 1030 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1031 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1032 1, 1000, 20000, 100); 1033 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_); 1034 } 1035 1036 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_); 1037 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN) 1038 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 1039 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1040 1041 if (enabled) { 1042 mac_rx |= MAC_RX_RXEN_; 1043 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1044 } 1045 return 0; 1046 } 1047 1048 /* PHY */ 1049 static int lan743x_phy_reset(struct lan743x_adapter *adapter) 1050 { 1051 u32 data; 1052 1053 /* Only called with in probe, and before mdiobus_register */ 1054 1055 data = lan743x_csr_read(adapter, PMT_CTL); 1056 data |= PMT_CTL_ETH_PHY_RST_; 1057 lan743x_csr_write(adapter, PMT_CTL, data); 1058 1059 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data, 1060 (!(data & PMT_CTL_ETH_PHY_RST_) && 1061 (data & PMT_CTL_READY_)), 1062 50000, 1000000); 1063 } 1064 1065 static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter, 1066 u16 local_adv, u16 remote_adv) 1067 { 1068 struct lan743x_phy *phy = &adapter->phy; 1069 u8 cap; 1070 1071 if (phy->fc_autoneg) 1072 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv); 1073 else 1074 cap = phy->fc_request_control; 1075 1076 lan743x_mac_flow_ctrl_set_enables(adapter, 1077 cap & FLOW_CTRL_TX, 1078 cap & FLOW_CTRL_RX); 1079 } 1080 1081 static int lan743x_phy_init(struct lan743x_adapter *adapter) 1082 { 1083 return lan743x_phy_reset(adapter); 1084 } 1085 1086 static void lan743x_phy_link_status_change(struct net_device *netdev) 1087 { 1088 struct lan743x_adapter *adapter = netdev_priv(netdev); 1089 struct phy_device *phydev = netdev->phydev; 1090 u32 data; 1091 1092 phy_print_status(phydev); 1093 if (phydev->state == PHY_RUNNING) { 1094 int remote_advertisement = 0; 1095 int local_advertisement = 0; 1096 1097 data = lan743x_csr_read(adapter, MAC_CR); 1098 1099 /* set interface mode */ 1100 if (phy_interface_is_rgmii(phydev)) 1101 /* RGMII */ 1102 data &= ~MAC_CR_MII_EN_; 1103 else 1104 /* GMII */ 1105 data |= MAC_CR_MII_EN_; 1106 1107 /* set duplex mode */ 1108 if (phydev->duplex) 1109 data |= MAC_CR_DPX_; 1110 else 1111 data &= ~MAC_CR_DPX_; 1112 1113 /* set bus speed */ 1114 switch (phydev->speed) { 1115 case SPEED_10: 1116 data &= ~MAC_CR_CFG_H_; 1117 data &= ~MAC_CR_CFG_L_; 1118 break; 1119 case SPEED_100: 1120 data &= ~MAC_CR_CFG_H_; 1121 data |= MAC_CR_CFG_L_; 1122 break; 1123 case SPEED_1000: 1124 data |= MAC_CR_CFG_H_; 1125 data &= ~MAC_CR_CFG_L_; 1126 break; 1127 } 1128 lan743x_csr_write(adapter, MAC_CR, data); 1129 1130 local_advertisement = 1131 linkmode_adv_to_mii_adv_t(phydev->advertising); 1132 remote_advertisement = 1133 linkmode_adv_to_mii_adv_t(phydev->lp_advertising); 1134 1135 lan743x_phy_update_flowcontrol(adapter, local_advertisement, 1136 remote_advertisement); 1137 lan743x_ptp_update_latency(adapter, phydev->speed); 1138 } 1139 } 1140 1141 static void lan743x_phy_close(struct lan743x_adapter *adapter) 1142 { 1143 struct net_device *netdev = adapter->netdev; 1144 1145 phy_stop(netdev->phydev); 1146 phy_disconnect(netdev->phydev); 1147 netdev->phydev = NULL; 1148 } 1149 1150 static int lan743x_phy_open(struct lan743x_adapter *adapter) 1151 { 1152 struct net_device *netdev = adapter->netdev; 1153 struct lan743x_phy *phy = &adapter->phy; 1154 struct phy_device *phydev; 1155 int ret = -EIO; 1156 1157 /* try devicetree phy, or fixed link */ 1158 phydev = of_phy_get_and_connect(netdev, adapter->pdev->dev.of_node, 1159 lan743x_phy_link_status_change); 1160 1161 if (!phydev) { 1162 /* try internal phy */ 1163 phydev = phy_find_first(adapter->mdiobus); 1164 if (!phydev) 1165 goto return_error; 1166 1167 ret = phy_connect_direct(netdev, phydev, 1168 lan743x_phy_link_status_change, 1169 PHY_INTERFACE_MODE_GMII); 1170 if (ret) 1171 goto return_error; 1172 } 1173 1174 /* MAC doesn't support 1000T Half */ 1175 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 1176 1177 /* support both flow controls */ 1178 phy_support_asym_pause(phydev); 1179 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX); 1180 phy->fc_autoneg = phydev->autoneg; 1181 1182 phy_start(phydev); 1183 phy_start_aneg(phydev); 1184 phy_attached_info(phydev); 1185 return 0; 1186 1187 return_error: 1188 return ret; 1189 } 1190 1191 static void lan743x_rfe_open(struct lan743x_adapter *adapter) 1192 { 1193 lan743x_csr_write(adapter, RFE_RSS_CFG, 1194 RFE_RSS_CFG_UDP_IPV6_EX_ | 1195 RFE_RSS_CFG_TCP_IPV6_EX_ | 1196 RFE_RSS_CFG_IPV6_EX_ | 1197 RFE_RSS_CFG_UDP_IPV6_ | 1198 RFE_RSS_CFG_TCP_IPV6_ | 1199 RFE_RSS_CFG_IPV6_ | 1200 RFE_RSS_CFG_UDP_IPV4_ | 1201 RFE_RSS_CFG_TCP_IPV4_ | 1202 RFE_RSS_CFG_IPV4_ | 1203 RFE_RSS_CFG_VALID_HASH_BITS_ | 1204 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ | 1205 RFE_RSS_CFG_RSS_HASH_STORE_ | 1206 RFE_RSS_CFG_RSS_ENABLE_); 1207 } 1208 1209 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter) 1210 { 1211 u8 *mac_addr; 1212 u32 mac_addr_hi = 0; 1213 u32 mac_addr_lo = 0; 1214 1215 /* Add mac address to perfect Filter */ 1216 mac_addr = adapter->mac_address; 1217 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) | 1218 (((u32)(mac_addr[1])) << 8) | 1219 (((u32)(mac_addr[2])) << 16) | 1220 (((u32)(mac_addr[3])) << 24)); 1221 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) | 1222 (((u32)(mac_addr[5])) << 8)); 1223 1224 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo); 1225 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0), 1226 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_); 1227 } 1228 1229 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter) 1230 { 1231 struct net_device *netdev = adapter->netdev; 1232 u32 hash_table[DP_SEL_VHF_HASH_LEN]; 1233 u32 rfctl; 1234 u32 data; 1235 1236 rfctl = lan743x_csr_read(adapter, RFE_CTL); 1237 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ | 1238 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1239 rfctl |= RFE_CTL_AB_; 1240 if (netdev->flags & IFF_PROMISC) { 1241 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_; 1242 } else { 1243 if (netdev->flags & IFF_ALLMULTI) 1244 rfctl |= RFE_CTL_AM_; 1245 } 1246 1247 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32)); 1248 if (netdev_mc_count(netdev)) { 1249 struct netdev_hw_addr *ha; 1250 int i; 1251 1252 rfctl |= RFE_CTL_DA_PERFECT_; 1253 i = 1; 1254 netdev_for_each_mc_addr(ha, netdev) { 1255 /* set first 32 into Perfect Filter */ 1256 if (i < 33) { 1257 lan743x_csr_write(adapter, 1258 RFE_ADDR_FILT_HI(i), 0); 1259 data = ha->addr[3]; 1260 data = ha->addr[2] | (data << 8); 1261 data = ha->addr[1] | (data << 8); 1262 data = ha->addr[0] | (data << 8); 1263 lan743x_csr_write(adapter, 1264 RFE_ADDR_FILT_LO(i), data); 1265 data = ha->addr[5]; 1266 data = ha->addr[4] | (data << 8); 1267 data |= RFE_ADDR_FILT_HI_VALID_; 1268 lan743x_csr_write(adapter, 1269 RFE_ADDR_FILT_HI(i), data); 1270 } else { 1271 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >> 1272 23) & 0x1FF; 1273 hash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1274 rfctl |= RFE_CTL_MCAST_HASH_; 1275 } 1276 i++; 1277 } 1278 } 1279 1280 lan743x_dp_write(adapter, DP_SEL_RFE_RAM, 1281 DP_SEL_VHF_VLAN_LEN, 1282 DP_SEL_VHF_HASH_LEN, hash_table); 1283 lan743x_csr_write(adapter, RFE_CTL, rfctl); 1284 } 1285 1286 static int lan743x_dmac_init(struct lan743x_adapter *adapter) 1287 { 1288 u32 data = 0; 1289 1290 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_); 1291 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_, 1292 0, 1000, 20000, 100); 1293 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) { 1294 case DMA_DESCRIPTOR_SPACING_16: 1295 data = DMAC_CFG_MAX_DSPACE_16_; 1296 break; 1297 case DMA_DESCRIPTOR_SPACING_32: 1298 data = DMAC_CFG_MAX_DSPACE_32_; 1299 break; 1300 case DMA_DESCRIPTOR_SPACING_64: 1301 data = DMAC_CFG_MAX_DSPACE_64_; 1302 break; 1303 case DMA_DESCRIPTOR_SPACING_128: 1304 data = DMAC_CFG_MAX_DSPACE_128_; 1305 break; 1306 default: 1307 return -EPERM; 1308 } 1309 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1310 data |= DMAC_CFG_COAL_EN_; 1311 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_; 1312 data |= DMAC_CFG_MAX_READ_REQ_SET_(6); 1313 lan743x_csr_write(adapter, DMAC_CFG, data); 1314 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1); 1315 data |= DMAC_COAL_CFG_TIMER_TX_START_; 1316 data |= DMAC_COAL_CFG_FLUSH_INTS_; 1317 data |= DMAC_COAL_CFG_INT_EXIT_COAL_; 1318 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_; 1319 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A); 1320 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C); 1321 lan743x_csr_write(adapter, DMAC_COAL_CFG, data); 1322 data = DMAC_OBFF_TX_THRES_SET_(0x08); 1323 data |= DMAC_OBFF_RX_THRES_SET_(0x0A); 1324 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data); 1325 return 0; 1326 } 1327 1328 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter, 1329 int tx_channel) 1330 { 1331 u32 dmac_cmd = 0; 1332 1333 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1334 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1335 DMAC_CMD_START_T_(tx_channel)), 1336 (dmac_cmd & 1337 DMAC_CMD_STOP_T_(tx_channel))); 1338 } 1339 1340 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter, 1341 int tx_channel) 1342 { 1343 int timeout = 100; 1344 int result = 0; 1345 1346 while (timeout && 1347 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) == 1348 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1349 usleep_range(1000, 20000); 1350 timeout--; 1351 } 1352 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1353 result = -ENODEV; 1354 return result; 1355 } 1356 1357 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter, 1358 int rx_channel) 1359 { 1360 u32 dmac_cmd = 0; 1361 1362 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1363 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1364 DMAC_CMD_START_R_(rx_channel)), 1365 (dmac_cmd & 1366 DMAC_CMD_STOP_R_(rx_channel))); 1367 } 1368 1369 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter, 1370 int rx_channel) 1371 { 1372 int timeout = 100; 1373 int result = 0; 1374 1375 while (timeout && 1376 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) == 1377 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1378 usleep_range(1000, 20000); 1379 timeout--; 1380 } 1381 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1382 result = -ENODEV; 1383 return result; 1384 } 1385 1386 static void lan743x_tx_release_desc(struct lan743x_tx *tx, 1387 int descriptor_index, bool cleanup) 1388 { 1389 struct lan743x_tx_buffer_info *buffer_info = NULL; 1390 struct lan743x_tx_descriptor *descriptor = NULL; 1391 u32 descriptor_type = 0; 1392 bool ignore_sync; 1393 1394 descriptor = &tx->ring_cpu_ptr[descriptor_index]; 1395 buffer_info = &tx->buffer_info[descriptor_index]; 1396 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE)) 1397 goto done; 1398 1399 descriptor_type = le32_to_cpu(descriptor->data0) & 1400 TX_DESC_DATA0_DTYPE_MASK_; 1401 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_) 1402 goto clean_up_data_descriptor; 1403 else 1404 goto clear_active; 1405 1406 clean_up_data_descriptor: 1407 if (buffer_info->dma_ptr) { 1408 if (buffer_info->flags & 1409 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) { 1410 dma_unmap_page(&tx->adapter->pdev->dev, 1411 buffer_info->dma_ptr, 1412 buffer_info->buffer_length, 1413 DMA_TO_DEVICE); 1414 } else { 1415 dma_unmap_single(&tx->adapter->pdev->dev, 1416 buffer_info->dma_ptr, 1417 buffer_info->buffer_length, 1418 DMA_TO_DEVICE); 1419 } 1420 buffer_info->dma_ptr = 0; 1421 buffer_info->buffer_length = 0; 1422 } 1423 if (!buffer_info->skb) 1424 goto clear_active; 1425 1426 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1427 dev_kfree_skb_any(buffer_info->skb); 1428 goto clear_skb; 1429 } 1430 1431 if (cleanup) { 1432 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1433 dev_kfree_skb_any(buffer_info->skb); 1434 } else { 1435 ignore_sync = (buffer_info->flags & 1436 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; 1437 lan743x_ptp_tx_timestamp_skb(tx->adapter, 1438 buffer_info->skb, ignore_sync); 1439 } 1440 1441 clear_skb: 1442 buffer_info->skb = NULL; 1443 1444 clear_active: 1445 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE; 1446 1447 done: 1448 memset(buffer_info, 0, sizeof(*buffer_info)); 1449 memset(descriptor, 0, sizeof(*descriptor)); 1450 } 1451 1452 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index) 1453 { 1454 return ((++index) % tx->ring_size); 1455 } 1456 1457 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx) 1458 { 1459 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) { 1460 lan743x_tx_release_desc(tx, tx->last_head, false); 1461 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1462 } 1463 } 1464 1465 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx) 1466 { 1467 u32 original_head = 0; 1468 1469 original_head = tx->last_head; 1470 do { 1471 lan743x_tx_release_desc(tx, tx->last_head, true); 1472 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1473 } while (tx->last_head != original_head); 1474 memset(tx->ring_cpu_ptr, 0, 1475 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size)); 1476 memset(tx->buffer_info, 0, 1477 sizeof(*tx->buffer_info) * (tx->ring_size)); 1478 } 1479 1480 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx, 1481 struct sk_buff *skb) 1482 { 1483 int result = 1; /* 1 for the main skb buffer */ 1484 int nr_frags = 0; 1485 1486 if (skb_is_gso(skb)) 1487 result++; /* requires an extension descriptor */ 1488 nr_frags = skb_shinfo(skb)->nr_frags; 1489 result += nr_frags; /* 1 for each fragment buffer */ 1490 return result; 1491 } 1492 1493 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx) 1494 { 1495 int last_head = tx->last_head; 1496 int last_tail = tx->last_tail; 1497 1498 if (last_tail >= last_head) 1499 return tx->ring_size - last_tail + last_head - 1; 1500 else 1501 return last_head - last_tail - 1; 1502 } 1503 1504 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx, 1505 bool enable_timestamping, 1506 bool enable_onestep_sync) 1507 { 1508 if (enable_timestamping) 1509 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED; 1510 else 1511 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED; 1512 if (enable_onestep_sync) 1513 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC; 1514 else 1515 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC; 1516 } 1517 1518 static int lan743x_tx_frame_start(struct lan743x_tx *tx, 1519 unsigned char *first_buffer, 1520 unsigned int first_buffer_length, 1521 unsigned int frame_length, 1522 bool time_stamp, 1523 bool check_sum) 1524 { 1525 /* called only from within lan743x_tx_xmit_frame. 1526 * assuming tx->ring_lock has already been acquired. 1527 */ 1528 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1529 struct lan743x_tx_buffer_info *buffer_info = NULL; 1530 struct lan743x_adapter *adapter = tx->adapter; 1531 struct device *dev = &adapter->pdev->dev; 1532 dma_addr_t dma_ptr; 1533 1534 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS; 1535 tx->frame_first = tx->last_tail; 1536 tx->frame_tail = tx->frame_first; 1537 1538 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1539 buffer_info = &tx->buffer_info[tx->frame_tail]; 1540 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length, 1541 DMA_TO_DEVICE); 1542 if (dma_mapping_error(dev, dma_ptr)) 1543 return -ENOMEM; 1544 1545 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1546 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1547 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1548 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1549 1550 buffer_info->skb = NULL; 1551 buffer_info->dma_ptr = dma_ptr; 1552 buffer_info->buffer_length = first_buffer_length; 1553 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1554 1555 tx->frame_data0 = (first_buffer_length & 1556 TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1557 TX_DESC_DATA0_DTYPE_DATA_ | 1558 TX_DESC_DATA0_FS_ | 1559 TX_DESC_DATA0_FCS_; 1560 if (time_stamp) 1561 tx->frame_data0 |= TX_DESC_DATA0_TSE_; 1562 1563 if (check_sum) 1564 tx->frame_data0 |= TX_DESC_DATA0_ICE_ | 1565 TX_DESC_DATA0_IPE_ | 1566 TX_DESC_DATA0_TPE_; 1567 1568 /* data0 will be programmed in one of other frame assembler functions */ 1569 return 0; 1570 } 1571 1572 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx, 1573 unsigned int frame_length, 1574 int nr_frags) 1575 { 1576 /* called only from within lan743x_tx_xmit_frame. 1577 * assuming tx->ring_lock has already been acquired. 1578 */ 1579 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1580 struct lan743x_tx_buffer_info *buffer_info = NULL; 1581 1582 /* wrap up previous descriptor */ 1583 tx->frame_data0 |= TX_DESC_DATA0_EXT_; 1584 if (nr_frags <= 0) { 1585 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1586 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1587 } 1588 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1589 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1590 1591 /* move to next descriptor */ 1592 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1593 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1594 buffer_info = &tx->buffer_info[tx->frame_tail]; 1595 1596 /* add extension descriptor */ 1597 tx_descriptor->data1 = 0; 1598 tx_descriptor->data2 = 0; 1599 tx_descriptor->data3 = 0; 1600 1601 buffer_info->skb = NULL; 1602 buffer_info->dma_ptr = 0; 1603 buffer_info->buffer_length = 0; 1604 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1605 1606 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) | 1607 TX_DESC_DATA0_DTYPE_EXT_ | 1608 TX_DESC_DATA0_EXT_LSO_; 1609 1610 /* data0 will be programmed in one of other frame assembler functions */ 1611 } 1612 1613 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx, 1614 const skb_frag_t *fragment, 1615 unsigned int frame_length) 1616 { 1617 /* called only from within lan743x_tx_xmit_frame 1618 * assuming tx->ring_lock has already been acquired 1619 */ 1620 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1621 struct lan743x_tx_buffer_info *buffer_info = NULL; 1622 struct lan743x_adapter *adapter = tx->adapter; 1623 struct device *dev = &adapter->pdev->dev; 1624 unsigned int fragment_length = 0; 1625 dma_addr_t dma_ptr; 1626 1627 fragment_length = skb_frag_size(fragment); 1628 if (!fragment_length) 1629 return 0; 1630 1631 /* wrap up previous descriptor */ 1632 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1633 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1634 1635 /* move to next descriptor */ 1636 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1637 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1638 buffer_info = &tx->buffer_info[tx->frame_tail]; 1639 dma_ptr = skb_frag_dma_map(dev, fragment, 1640 0, fragment_length, 1641 DMA_TO_DEVICE); 1642 if (dma_mapping_error(dev, dma_ptr)) { 1643 int desc_index; 1644 1645 /* cleanup all previously setup descriptors */ 1646 desc_index = tx->frame_first; 1647 while (desc_index != tx->frame_tail) { 1648 lan743x_tx_release_desc(tx, desc_index, true); 1649 desc_index = lan743x_tx_next_index(tx, desc_index); 1650 } 1651 dma_wmb(); 1652 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1653 tx->frame_first = 0; 1654 tx->frame_data0 = 0; 1655 tx->frame_tail = 0; 1656 return -ENOMEM; 1657 } 1658 1659 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1660 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1661 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1662 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1663 1664 buffer_info->skb = NULL; 1665 buffer_info->dma_ptr = dma_ptr; 1666 buffer_info->buffer_length = fragment_length; 1667 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1668 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT; 1669 1670 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1671 TX_DESC_DATA0_DTYPE_DATA_ | 1672 TX_DESC_DATA0_FCS_; 1673 1674 /* data0 will be programmed in one of other frame assembler functions */ 1675 return 0; 1676 } 1677 1678 static void lan743x_tx_frame_end(struct lan743x_tx *tx, 1679 struct sk_buff *skb, 1680 bool time_stamp, 1681 bool ignore_sync) 1682 { 1683 /* called only from within lan743x_tx_xmit_frame 1684 * assuming tx->ring_lock has already been acquired 1685 */ 1686 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1687 struct lan743x_tx_buffer_info *buffer_info = NULL; 1688 struct lan743x_adapter *adapter = tx->adapter; 1689 u32 tx_tail_flags = 0; 1690 1691 /* wrap up previous descriptor */ 1692 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) == 1693 TX_DESC_DATA0_DTYPE_DATA_) { 1694 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1695 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1696 } 1697 1698 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1699 buffer_info = &tx->buffer_info[tx->frame_tail]; 1700 buffer_info->skb = skb; 1701 if (time_stamp) 1702 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED; 1703 if (ignore_sync) 1704 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC; 1705 1706 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1707 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1708 tx->last_tail = tx->frame_tail; 1709 1710 dma_wmb(); 1711 1712 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 1713 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_; 1714 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) 1715 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ | 1716 TX_TAIL_SET_TOP_INT_EN_; 1717 1718 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1719 tx_tail_flags | tx->frame_tail); 1720 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1721 } 1722 1723 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx, 1724 struct sk_buff *skb) 1725 { 1726 int required_number_of_descriptors = 0; 1727 unsigned int start_frame_length = 0; 1728 unsigned int frame_length = 0; 1729 unsigned int head_length = 0; 1730 unsigned long irq_flags = 0; 1731 bool do_timestamp = false; 1732 bool ignore_sync = false; 1733 int nr_frags = 0; 1734 bool gso = false; 1735 int j; 1736 1737 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb); 1738 1739 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1740 if (required_number_of_descriptors > 1741 lan743x_tx_get_avail_desc(tx)) { 1742 if (required_number_of_descriptors > (tx->ring_size - 1)) { 1743 dev_kfree_skb_irq(skb); 1744 } else { 1745 /* save to overflow buffer */ 1746 tx->overflow_skb = skb; 1747 netif_stop_queue(tx->adapter->netdev); 1748 } 1749 goto unlock; 1750 } 1751 1752 /* space available, transmit skb */ 1753 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 1754 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) && 1755 (lan743x_ptp_request_tx_timestamp(tx->adapter))) { 1756 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 1757 do_timestamp = true; 1758 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC) 1759 ignore_sync = true; 1760 } 1761 head_length = skb_headlen(skb); 1762 frame_length = skb_pagelen(skb); 1763 nr_frags = skb_shinfo(skb)->nr_frags; 1764 start_frame_length = frame_length; 1765 gso = skb_is_gso(skb); 1766 if (gso) { 1767 start_frame_length = max(skb_shinfo(skb)->gso_size, 1768 (unsigned short)8); 1769 } 1770 1771 if (lan743x_tx_frame_start(tx, 1772 skb->data, head_length, 1773 start_frame_length, 1774 do_timestamp, 1775 skb->ip_summed == CHECKSUM_PARTIAL)) { 1776 dev_kfree_skb_irq(skb); 1777 goto unlock; 1778 } 1779 1780 if (gso) 1781 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags); 1782 1783 if (nr_frags <= 0) 1784 goto finish; 1785 1786 for (j = 0; j < nr_frags; j++) { 1787 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]); 1788 1789 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) { 1790 /* upon error no need to call 1791 * lan743x_tx_frame_end 1792 * frame assembler clean up was performed inside 1793 * lan743x_tx_frame_add_fragment 1794 */ 1795 dev_kfree_skb_irq(skb); 1796 goto unlock; 1797 } 1798 } 1799 1800 finish: 1801 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync); 1802 1803 unlock: 1804 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 1805 return NETDEV_TX_OK; 1806 } 1807 1808 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight) 1809 { 1810 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi); 1811 struct lan743x_adapter *adapter = tx->adapter; 1812 bool start_transmitter = false; 1813 unsigned long irq_flags = 0; 1814 u32 ioc_bit = 0; 1815 1816 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 1817 lan743x_csr_read(adapter, DMAC_INT_STS); 1818 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) 1819 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit); 1820 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1821 1822 /* clean up tx ring */ 1823 lan743x_tx_release_completed_descriptors(tx); 1824 if (netif_queue_stopped(adapter->netdev)) { 1825 if (tx->overflow_skb) { 1826 if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <= 1827 lan743x_tx_get_avail_desc(tx)) 1828 start_transmitter = true; 1829 } else { 1830 netif_wake_queue(adapter->netdev); 1831 } 1832 } 1833 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 1834 1835 if (start_transmitter) { 1836 /* space is now available, transmit overflow skb */ 1837 lan743x_tx_xmit_frame(tx, tx->overflow_skb); 1838 tx->overflow_skb = NULL; 1839 netif_wake_queue(adapter->netdev); 1840 } 1841 1842 if (!napi_complete(napi)) 1843 goto done; 1844 1845 /* enable isr */ 1846 lan743x_csr_write(adapter, INT_EN_SET, 1847 INT_BIT_DMA_TX_(tx->channel_number)); 1848 lan743x_csr_read(adapter, INT_STS); 1849 1850 done: 1851 return 0; 1852 } 1853 1854 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx) 1855 { 1856 if (tx->head_cpu_ptr) { 1857 dma_free_coherent(&tx->adapter->pdev->dev, 1858 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr, 1859 tx->head_dma_ptr); 1860 tx->head_cpu_ptr = NULL; 1861 tx->head_dma_ptr = 0; 1862 } 1863 kfree(tx->buffer_info); 1864 tx->buffer_info = NULL; 1865 1866 if (tx->ring_cpu_ptr) { 1867 dma_free_coherent(&tx->adapter->pdev->dev, 1868 tx->ring_allocation_size, tx->ring_cpu_ptr, 1869 tx->ring_dma_ptr); 1870 tx->ring_allocation_size = 0; 1871 tx->ring_cpu_ptr = NULL; 1872 tx->ring_dma_ptr = 0; 1873 } 1874 tx->ring_size = 0; 1875 } 1876 1877 static int lan743x_tx_ring_init(struct lan743x_tx *tx) 1878 { 1879 size_t ring_allocation_size = 0; 1880 void *cpu_ptr = NULL; 1881 dma_addr_t dma_ptr; 1882 int ret = -ENOMEM; 1883 1884 tx->ring_size = LAN743X_TX_RING_SIZE; 1885 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) { 1886 ret = -EINVAL; 1887 goto cleanup; 1888 } 1889 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev, 1890 DMA_BIT_MASK(64))) { 1891 dev_warn(&tx->adapter->pdev->dev, 1892 "lan743x_: No suitable DMA available\n"); 1893 ret = -ENOMEM; 1894 goto cleanup; 1895 } 1896 ring_allocation_size = ALIGN(tx->ring_size * 1897 sizeof(struct lan743x_tx_descriptor), 1898 PAGE_SIZE); 1899 dma_ptr = 0; 1900 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 1901 ring_allocation_size, &dma_ptr, GFP_KERNEL); 1902 if (!cpu_ptr) { 1903 ret = -ENOMEM; 1904 goto cleanup; 1905 } 1906 1907 tx->ring_allocation_size = ring_allocation_size; 1908 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr; 1909 tx->ring_dma_ptr = dma_ptr; 1910 1911 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL); 1912 if (!cpu_ptr) { 1913 ret = -ENOMEM; 1914 goto cleanup; 1915 } 1916 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr; 1917 dma_ptr = 0; 1918 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 1919 sizeof(*tx->head_cpu_ptr), &dma_ptr, 1920 GFP_KERNEL); 1921 if (!cpu_ptr) { 1922 ret = -ENOMEM; 1923 goto cleanup; 1924 } 1925 1926 tx->head_cpu_ptr = cpu_ptr; 1927 tx->head_dma_ptr = dma_ptr; 1928 if (tx->head_dma_ptr & 0x3) { 1929 ret = -ENOMEM; 1930 goto cleanup; 1931 } 1932 1933 return 0; 1934 1935 cleanup: 1936 lan743x_tx_ring_cleanup(tx); 1937 return ret; 1938 } 1939 1940 static void lan743x_tx_close(struct lan743x_tx *tx) 1941 { 1942 struct lan743x_adapter *adapter = tx->adapter; 1943 1944 lan743x_csr_write(adapter, 1945 DMAC_CMD, 1946 DMAC_CMD_STOP_T_(tx->channel_number)); 1947 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number); 1948 1949 lan743x_csr_write(adapter, 1950 DMAC_INT_EN_CLR, 1951 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 1952 lan743x_csr_write(adapter, INT_EN_CLR, 1953 INT_BIT_DMA_TX_(tx->channel_number)); 1954 napi_disable(&tx->napi); 1955 netif_napi_del(&tx->napi); 1956 1957 lan743x_csr_write(adapter, FCT_TX_CTL, 1958 FCT_TX_CTL_DIS_(tx->channel_number)); 1959 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 1960 FCT_TX_CTL_EN_(tx->channel_number), 1961 0, 1000, 20000, 100); 1962 1963 lan743x_tx_release_all_descriptors(tx); 1964 1965 if (tx->overflow_skb) { 1966 dev_kfree_skb(tx->overflow_skb); 1967 tx->overflow_skb = NULL; 1968 } 1969 1970 lan743x_tx_ring_cleanup(tx); 1971 } 1972 1973 static int lan743x_tx_open(struct lan743x_tx *tx) 1974 { 1975 struct lan743x_adapter *adapter = NULL; 1976 u32 data = 0; 1977 int ret; 1978 1979 adapter = tx->adapter; 1980 ret = lan743x_tx_ring_init(tx); 1981 if (ret) 1982 return ret; 1983 1984 /* initialize fifo */ 1985 lan743x_csr_write(adapter, FCT_TX_CTL, 1986 FCT_TX_CTL_RESET_(tx->channel_number)); 1987 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 1988 FCT_TX_CTL_RESET_(tx->channel_number), 1989 0, 1000, 20000, 100); 1990 1991 /* enable fifo */ 1992 lan743x_csr_write(adapter, FCT_TX_CTL, 1993 FCT_TX_CTL_EN_(tx->channel_number)); 1994 1995 /* reset tx channel */ 1996 lan743x_csr_write(adapter, DMAC_CMD, 1997 DMAC_CMD_TX_SWR_(tx->channel_number)); 1998 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 1999 DMAC_CMD_TX_SWR_(tx->channel_number), 2000 0, 1000, 20000, 100); 2001 2002 /* Write TX_BASE_ADDR */ 2003 lan743x_csr_write(adapter, 2004 TX_BASE_ADDRH(tx->channel_number), 2005 DMA_ADDR_HIGH32(tx->ring_dma_ptr)); 2006 lan743x_csr_write(adapter, 2007 TX_BASE_ADDRL(tx->channel_number), 2008 DMA_ADDR_LOW32(tx->ring_dma_ptr)); 2009 2010 /* Write TX_CFG_B */ 2011 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number)); 2012 data &= ~TX_CFG_B_TX_RING_LEN_MASK_; 2013 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_); 2014 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2015 data |= TX_CFG_B_TDMABL_512_; 2016 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data); 2017 2018 /* Write TX_CFG_A */ 2019 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_; 2020 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2021 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_; 2022 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10); 2023 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04); 2024 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07); 2025 } 2026 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data); 2027 2028 /* Write TX_HEAD_WRITEBACK_ADDR */ 2029 lan743x_csr_write(adapter, 2030 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number), 2031 DMA_ADDR_HIGH32(tx->head_dma_ptr)); 2032 lan743x_csr_write(adapter, 2033 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number), 2034 DMA_ADDR_LOW32(tx->head_dma_ptr)); 2035 2036 /* set last head */ 2037 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number)); 2038 2039 /* write TX_TAIL */ 2040 tx->last_tail = 0; 2041 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 2042 (u32)(tx->last_tail)); 2043 tx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2044 INT_BIT_DMA_TX_ 2045 (tx->channel_number)); 2046 netif_tx_napi_add(adapter->netdev, 2047 &tx->napi, lan743x_tx_napi_poll, 2048 tx->ring_size - 1); 2049 napi_enable(&tx->napi); 2050 2051 data = 0; 2052 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2053 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_; 2054 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2055 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_; 2056 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2057 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_; 2058 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2059 data |= TX_CFG_C_TX_INT_EN_R2C_; 2060 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data); 2061 2062 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)) 2063 lan743x_csr_write(adapter, INT_EN_SET, 2064 INT_BIT_DMA_TX_(tx->channel_number)); 2065 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2066 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2067 2068 /* start dmac channel */ 2069 lan743x_csr_write(adapter, DMAC_CMD, 2070 DMAC_CMD_START_T_(tx->channel_number)); 2071 return 0; 2072 } 2073 2074 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index) 2075 { 2076 return ((++index) % rx->ring_size); 2077 } 2078 2079 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index) 2080 { 2081 /* update the tail once per 8 descriptors */ 2082 if ((index & 7) == 7) 2083 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number), 2084 index); 2085 } 2086 2087 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index, 2088 gfp_t gfp) 2089 { 2090 struct net_device *netdev = rx->adapter->netdev; 2091 struct device *dev = &rx->adapter->pdev->dev; 2092 struct lan743x_rx_buffer_info *buffer_info; 2093 unsigned int buffer_length, used_length; 2094 struct lan743x_rx_descriptor *descriptor; 2095 struct sk_buff *skb; 2096 dma_addr_t dma_ptr; 2097 2098 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING; 2099 2100 descriptor = &rx->ring_cpu_ptr[index]; 2101 buffer_info = &rx->buffer_info[index]; 2102 skb = __netdev_alloc_skb(netdev, buffer_length, gfp); 2103 if (!skb) 2104 return -ENOMEM; 2105 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE); 2106 if (dma_mapping_error(dev, dma_ptr)) { 2107 dev_kfree_skb_any(skb); 2108 return -ENOMEM; 2109 } 2110 if (buffer_info->dma_ptr) { 2111 /* sync used area of buffer only */ 2112 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_) 2113 /* frame length is valid only if LS bit is set. 2114 * it's a safe upper bound for the used area in this 2115 * buffer. 2116 */ 2117 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_ 2118 (le32_to_cpu(descriptor->data0)), 2119 buffer_info->buffer_length); 2120 else 2121 used_length = buffer_info->buffer_length; 2122 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr, 2123 used_length, 2124 DMA_FROM_DEVICE); 2125 dma_unmap_single_attrs(dev, buffer_info->dma_ptr, 2126 buffer_info->buffer_length, 2127 DMA_FROM_DEVICE, 2128 DMA_ATTR_SKIP_CPU_SYNC); 2129 } 2130 2131 buffer_info->skb = skb; 2132 buffer_info->dma_ptr = dma_ptr; 2133 buffer_info->buffer_length = buffer_length; 2134 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2135 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2136 descriptor->data3 = 0; 2137 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2138 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2139 lan743x_rx_update_tail(rx, index); 2140 2141 return 0; 2142 } 2143 2144 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index) 2145 { 2146 struct lan743x_rx_buffer_info *buffer_info; 2147 struct lan743x_rx_descriptor *descriptor; 2148 2149 descriptor = &rx->ring_cpu_ptr[index]; 2150 buffer_info = &rx->buffer_info[index]; 2151 2152 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2153 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2154 descriptor->data3 = 0; 2155 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2156 ((buffer_info->buffer_length) & 2157 RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2158 lan743x_rx_update_tail(rx, index); 2159 } 2160 2161 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index) 2162 { 2163 struct lan743x_rx_buffer_info *buffer_info; 2164 struct lan743x_rx_descriptor *descriptor; 2165 2166 descriptor = &rx->ring_cpu_ptr[index]; 2167 buffer_info = &rx->buffer_info[index]; 2168 2169 memset(descriptor, 0, sizeof(*descriptor)); 2170 2171 if (buffer_info->dma_ptr) { 2172 dma_unmap_single(&rx->adapter->pdev->dev, 2173 buffer_info->dma_ptr, 2174 buffer_info->buffer_length, 2175 DMA_FROM_DEVICE); 2176 buffer_info->dma_ptr = 0; 2177 } 2178 2179 if (buffer_info->skb) { 2180 dev_kfree_skb(buffer_info->skb); 2181 buffer_info->skb = NULL; 2182 } 2183 2184 memset(buffer_info, 0, sizeof(*buffer_info)); 2185 } 2186 2187 static struct sk_buff * 2188 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length) 2189 { 2190 if (skb_linearize(skb)) { 2191 dev_kfree_skb_irq(skb); 2192 return NULL; 2193 } 2194 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN); 2195 if (skb->len > frame_length) { 2196 skb->tail -= skb->len - frame_length; 2197 skb->len = frame_length; 2198 } 2199 return skb; 2200 } 2201 2202 static int lan743x_rx_process_buffer(struct lan743x_rx *rx) 2203 { 2204 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr); 2205 struct lan743x_rx_descriptor *descriptor, *desc_ext; 2206 struct net_device *netdev = rx->adapter->netdev; 2207 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2208 struct lan743x_rx_buffer_info *buffer_info; 2209 int frame_length, buffer_length; 2210 int extension_index = -1; 2211 bool is_last, is_first; 2212 struct sk_buff *skb; 2213 2214 if (current_head_index < 0 || current_head_index >= rx->ring_size) 2215 goto done; 2216 2217 if (rx->last_head < 0 || rx->last_head >= rx->ring_size) 2218 goto done; 2219 2220 if (rx->last_head == current_head_index) 2221 goto done; 2222 2223 descriptor = &rx->ring_cpu_ptr[rx->last_head]; 2224 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_) 2225 goto done; 2226 buffer_info = &rx->buffer_info[rx->last_head]; 2227 2228 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_; 2229 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_; 2230 2231 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) { 2232 /* extension is expected to follow */ 2233 int index = lan743x_rx_next_index(rx, rx->last_head); 2234 2235 if (index == current_head_index) 2236 /* extension not yet available */ 2237 goto done; 2238 desc_ext = &rx->ring_cpu_ptr[index]; 2239 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_) 2240 /* extension not yet available */ 2241 goto done; 2242 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_)) 2243 goto move_forward; 2244 extension_index = index; 2245 } 2246 2247 /* Only the last buffer in a multi-buffer frame contains the total frame 2248 * length. The chip occasionally sends more buffers than strictly 2249 * required to reach the total frame length. 2250 * Handle this by adding all buffers to the skb in their entirety. 2251 * Once the real frame length is known, trim the skb. 2252 */ 2253 frame_length = 2254 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0)); 2255 buffer_length = buffer_info->buffer_length; 2256 2257 netdev_dbg(netdev, "%s%schunk: %d/%d", 2258 is_first ? "first " : " ", 2259 is_last ? "last " : " ", 2260 frame_length, buffer_length); 2261 2262 /* save existing skb, allocate new skb and map to dma */ 2263 skb = buffer_info->skb; 2264 if (lan743x_rx_init_ring_element(rx, rx->last_head, 2265 GFP_ATOMIC | GFP_DMA)) { 2266 /* failed to allocate next skb. 2267 * Memory is very low. 2268 * Drop this packet and reuse buffer. 2269 */ 2270 lan743x_rx_reuse_ring_element(rx, rx->last_head); 2271 /* drop packet that was being assembled */ 2272 dev_kfree_skb_irq(rx->skb_head); 2273 rx->skb_head = NULL; 2274 goto process_extension; 2275 } 2276 2277 /* add buffers to skb via skb->frag_list */ 2278 if (is_first) { 2279 skb_reserve(skb, RX_HEAD_PADDING); 2280 skb_put(skb, buffer_length - RX_HEAD_PADDING); 2281 if (rx->skb_head) 2282 dev_kfree_skb_irq(rx->skb_head); 2283 rx->skb_head = skb; 2284 } else if (rx->skb_head) { 2285 skb_put(skb, buffer_length); 2286 if (skb_shinfo(rx->skb_head)->frag_list) 2287 rx->skb_tail->next = skb; 2288 else 2289 skb_shinfo(rx->skb_head)->frag_list = skb; 2290 rx->skb_tail = skb; 2291 rx->skb_head->len += skb->len; 2292 rx->skb_head->data_len += skb->len; 2293 rx->skb_head->truesize += skb->truesize; 2294 } else { 2295 /* packet to assemble has already been dropped because one or 2296 * more of its buffers could not be allocated 2297 */ 2298 netdev_dbg(netdev, "drop buffer intended for dropped packet"); 2299 dev_kfree_skb_irq(skb); 2300 } 2301 2302 process_extension: 2303 if (extension_index >= 0) { 2304 u32 ts_sec; 2305 u32 ts_nsec; 2306 2307 ts_sec = le32_to_cpu(desc_ext->data1); 2308 ts_nsec = (le32_to_cpu(desc_ext->data2) & 2309 RX_DESC_DATA2_TS_NS_MASK_); 2310 if (rx->skb_head) 2311 skb_hwtstamps(rx->skb_head)->hwtstamp = 2312 ktime_set(ts_sec, ts_nsec); 2313 lan743x_rx_reuse_ring_element(rx, extension_index); 2314 rx->last_head = extension_index; 2315 netdev_dbg(netdev, "process extension"); 2316 } 2317 2318 if (is_last && rx->skb_head) 2319 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length); 2320 2321 if (is_last && rx->skb_head) { 2322 rx->skb_head->protocol = eth_type_trans(rx->skb_head, 2323 rx->adapter->netdev); 2324 netdev_dbg(netdev, "sending %d byte frame to OS", 2325 rx->skb_head->len); 2326 napi_gro_receive(&rx->napi, rx->skb_head); 2327 rx->skb_head = NULL; 2328 } 2329 2330 move_forward: 2331 /* push tail and head forward */ 2332 rx->last_tail = rx->last_head; 2333 rx->last_head = lan743x_rx_next_index(rx, rx->last_head); 2334 result = RX_PROCESS_RESULT_BUFFER_RECEIVED; 2335 done: 2336 return result; 2337 } 2338 2339 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight) 2340 { 2341 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi); 2342 struct lan743x_adapter *adapter = rx->adapter; 2343 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2344 u32 rx_tail_flags = 0; 2345 int count; 2346 2347 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) { 2348 /* clear int status bit before reading packet */ 2349 lan743x_csr_write(adapter, DMAC_INT_STS, 2350 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2351 } 2352 for (count = 0; count < weight; count++) { 2353 result = lan743x_rx_process_buffer(rx); 2354 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO) 2355 break; 2356 } 2357 rx->frame_count += count; 2358 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED) 2359 return weight; 2360 2361 if (!napi_complete_done(napi, count)) 2362 return count; 2363 2364 /* re-arm interrupts, must write to rx tail on some chip variants */ 2365 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2366 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_; 2367 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) { 2368 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_; 2369 } else { 2370 lan743x_csr_write(adapter, INT_EN_SET, 2371 INT_BIT_DMA_RX_(rx->channel_number)); 2372 } 2373 2374 if (rx_tail_flags) 2375 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2376 rx_tail_flags | rx->last_tail); 2377 2378 return count; 2379 } 2380 2381 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx) 2382 { 2383 if (rx->buffer_info && rx->ring_cpu_ptr) { 2384 int index; 2385 2386 for (index = 0; index < rx->ring_size; index++) 2387 lan743x_rx_release_ring_element(rx, index); 2388 } 2389 2390 if (rx->head_cpu_ptr) { 2391 dma_free_coherent(&rx->adapter->pdev->dev, 2392 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr, 2393 rx->head_dma_ptr); 2394 rx->head_cpu_ptr = NULL; 2395 rx->head_dma_ptr = 0; 2396 } 2397 2398 kfree(rx->buffer_info); 2399 rx->buffer_info = NULL; 2400 2401 if (rx->ring_cpu_ptr) { 2402 dma_free_coherent(&rx->adapter->pdev->dev, 2403 rx->ring_allocation_size, rx->ring_cpu_ptr, 2404 rx->ring_dma_ptr); 2405 rx->ring_allocation_size = 0; 2406 rx->ring_cpu_ptr = NULL; 2407 rx->ring_dma_ptr = 0; 2408 } 2409 2410 rx->ring_size = 0; 2411 rx->last_head = 0; 2412 } 2413 2414 static int lan743x_rx_ring_init(struct lan743x_rx *rx) 2415 { 2416 size_t ring_allocation_size = 0; 2417 dma_addr_t dma_ptr = 0; 2418 void *cpu_ptr = NULL; 2419 int ret = -ENOMEM; 2420 int index = 0; 2421 2422 rx->ring_size = LAN743X_RX_RING_SIZE; 2423 if (rx->ring_size <= 1) { 2424 ret = -EINVAL; 2425 goto cleanup; 2426 } 2427 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) { 2428 ret = -EINVAL; 2429 goto cleanup; 2430 } 2431 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev, 2432 DMA_BIT_MASK(64))) { 2433 dev_warn(&rx->adapter->pdev->dev, 2434 "lan743x_: No suitable DMA available\n"); 2435 ret = -ENOMEM; 2436 goto cleanup; 2437 } 2438 ring_allocation_size = ALIGN(rx->ring_size * 2439 sizeof(struct lan743x_rx_descriptor), 2440 PAGE_SIZE); 2441 dma_ptr = 0; 2442 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2443 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2444 if (!cpu_ptr) { 2445 ret = -ENOMEM; 2446 goto cleanup; 2447 } 2448 rx->ring_allocation_size = ring_allocation_size; 2449 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr; 2450 rx->ring_dma_ptr = dma_ptr; 2451 2452 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info), 2453 GFP_KERNEL); 2454 if (!cpu_ptr) { 2455 ret = -ENOMEM; 2456 goto cleanup; 2457 } 2458 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr; 2459 dma_ptr = 0; 2460 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2461 sizeof(*rx->head_cpu_ptr), &dma_ptr, 2462 GFP_KERNEL); 2463 if (!cpu_ptr) { 2464 ret = -ENOMEM; 2465 goto cleanup; 2466 } 2467 2468 rx->head_cpu_ptr = cpu_ptr; 2469 rx->head_dma_ptr = dma_ptr; 2470 if (rx->head_dma_ptr & 0x3) { 2471 ret = -ENOMEM; 2472 goto cleanup; 2473 } 2474 2475 rx->last_head = 0; 2476 for (index = 0; index < rx->ring_size; index++) { 2477 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL); 2478 if (ret) 2479 goto cleanup; 2480 } 2481 return 0; 2482 2483 cleanup: 2484 netif_warn(rx->adapter, ifup, rx->adapter->netdev, 2485 "Error allocating memory for LAN743x\n"); 2486 2487 lan743x_rx_ring_cleanup(rx); 2488 return ret; 2489 } 2490 2491 static void lan743x_rx_close(struct lan743x_rx *rx) 2492 { 2493 struct lan743x_adapter *adapter = rx->adapter; 2494 2495 lan743x_csr_write(adapter, FCT_RX_CTL, 2496 FCT_RX_CTL_DIS_(rx->channel_number)); 2497 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2498 FCT_RX_CTL_EN_(rx->channel_number), 2499 0, 1000, 20000, 100); 2500 2501 lan743x_csr_write(adapter, DMAC_CMD, 2502 DMAC_CMD_STOP_R_(rx->channel_number)); 2503 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number); 2504 2505 lan743x_csr_write(adapter, DMAC_INT_EN_CLR, 2506 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2507 lan743x_csr_write(adapter, INT_EN_CLR, 2508 INT_BIT_DMA_RX_(rx->channel_number)); 2509 napi_disable(&rx->napi); 2510 2511 netif_napi_del(&rx->napi); 2512 2513 lan743x_rx_ring_cleanup(rx); 2514 } 2515 2516 static int lan743x_rx_open(struct lan743x_rx *rx) 2517 { 2518 struct lan743x_adapter *adapter = rx->adapter; 2519 u32 data = 0; 2520 int ret; 2521 2522 rx->frame_count = 0; 2523 ret = lan743x_rx_ring_init(rx); 2524 if (ret) 2525 goto return_error; 2526 2527 netif_napi_add(adapter->netdev, 2528 &rx->napi, lan743x_rx_napi_poll, 2529 NAPI_POLL_WEIGHT); 2530 2531 lan743x_csr_write(adapter, DMAC_CMD, 2532 DMAC_CMD_RX_SWR_(rx->channel_number)); 2533 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2534 DMAC_CMD_RX_SWR_(rx->channel_number), 2535 0, 1000, 20000, 100); 2536 2537 /* set ring base address */ 2538 lan743x_csr_write(adapter, 2539 RX_BASE_ADDRH(rx->channel_number), 2540 DMA_ADDR_HIGH32(rx->ring_dma_ptr)); 2541 lan743x_csr_write(adapter, 2542 RX_BASE_ADDRL(rx->channel_number), 2543 DMA_ADDR_LOW32(rx->ring_dma_ptr)); 2544 2545 /* set rx write back address */ 2546 lan743x_csr_write(adapter, 2547 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number), 2548 DMA_ADDR_HIGH32(rx->head_dma_ptr)); 2549 lan743x_csr_write(adapter, 2550 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number), 2551 DMA_ADDR_LOW32(rx->head_dma_ptr)); 2552 data = RX_CFG_A_RX_HP_WB_EN_; 2553 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2554 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ | 2555 RX_CFG_A_RX_WB_THRES_SET_(0x7) | 2556 RX_CFG_A_RX_PF_THRES_SET_(16) | 2557 RX_CFG_A_RX_PF_PRI_THRES_SET_(4)); 2558 } 2559 2560 /* set RX_CFG_A */ 2561 lan743x_csr_write(adapter, 2562 RX_CFG_A(rx->channel_number), data); 2563 2564 /* set RX_CFG_B */ 2565 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number)); 2566 data &= ~RX_CFG_B_RX_PAD_MASK_; 2567 if (!RX_HEAD_PADDING) 2568 data |= RX_CFG_B_RX_PAD_0_; 2569 else 2570 data |= RX_CFG_B_RX_PAD_2_; 2571 data &= ~RX_CFG_B_RX_RING_LEN_MASK_; 2572 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_); 2573 data |= RX_CFG_B_TS_ALL_RX_; 2574 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2575 data |= RX_CFG_B_RDMABL_512_; 2576 2577 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data); 2578 rx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2579 INT_BIT_DMA_RX_ 2580 (rx->channel_number)); 2581 2582 /* set RX_CFG_C */ 2583 data = 0; 2584 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2585 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_; 2586 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2587 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_; 2588 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2589 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_; 2590 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2591 data |= RX_CFG_C_RX_INT_EN_R2C_; 2592 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data); 2593 2594 rx->last_tail = ((u32)(rx->ring_size - 1)); 2595 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2596 rx->last_tail); 2597 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number)); 2598 if (rx->last_head) { 2599 ret = -EIO; 2600 goto napi_delete; 2601 } 2602 2603 napi_enable(&rx->napi); 2604 2605 lan743x_csr_write(adapter, INT_EN_SET, 2606 INT_BIT_DMA_RX_(rx->channel_number)); 2607 lan743x_csr_write(adapter, DMAC_INT_STS, 2608 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2609 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2610 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2611 lan743x_csr_write(adapter, DMAC_CMD, 2612 DMAC_CMD_START_R_(rx->channel_number)); 2613 2614 /* initialize fifo */ 2615 lan743x_csr_write(adapter, FCT_RX_CTL, 2616 FCT_RX_CTL_RESET_(rx->channel_number)); 2617 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2618 FCT_RX_CTL_RESET_(rx->channel_number), 2619 0, 1000, 20000, 100); 2620 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number), 2621 FCT_FLOW_CTL_REQ_EN_ | 2622 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) | 2623 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA)); 2624 2625 /* enable fifo */ 2626 lan743x_csr_write(adapter, FCT_RX_CTL, 2627 FCT_RX_CTL_EN_(rx->channel_number)); 2628 return 0; 2629 2630 napi_delete: 2631 netif_napi_del(&rx->napi); 2632 lan743x_rx_ring_cleanup(rx); 2633 2634 return_error: 2635 return ret; 2636 } 2637 2638 static int lan743x_netdev_close(struct net_device *netdev) 2639 { 2640 struct lan743x_adapter *adapter = netdev_priv(netdev); 2641 int index; 2642 2643 for (index = 0; index < adapter->used_tx_channels; index++) 2644 lan743x_tx_close(&adapter->tx[index]); 2645 2646 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 2647 lan743x_rx_close(&adapter->rx[index]); 2648 2649 lan743x_ptp_close(adapter); 2650 2651 lan743x_phy_close(adapter); 2652 2653 lan743x_mac_close(adapter); 2654 2655 lan743x_intr_close(adapter); 2656 2657 return 0; 2658 } 2659 2660 static int lan743x_netdev_open(struct net_device *netdev) 2661 { 2662 struct lan743x_adapter *adapter = netdev_priv(netdev); 2663 int index; 2664 int ret; 2665 2666 ret = lan743x_intr_open(adapter); 2667 if (ret) 2668 goto return_error; 2669 2670 ret = lan743x_mac_open(adapter); 2671 if (ret) 2672 goto close_intr; 2673 2674 ret = lan743x_phy_open(adapter); 2675 if (ret) 2676 goto close_mac; 2677 2678 ret = lan743x_ptp_open(adapter); 2679 if (ret) 2680 goto close_phy; 2681 2682 lan743x_rfe_open(adapter); 2683 2684 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2685 ret = lan743x_rx_open(&adapter->rx[index]); 2686 if (ret) 2687 goto close_rx; 2688 } 2689 2690 for (index = 0; index < adapter->used_tx_channels; index++) { 2691 ret = lan743x_tx_open(&adapter->tx[index]); 2692 if (ret) 2693 goto close_tx; 2694 } 2695 return 0; 2696 2697 close_tx: 2698 for (index = 0; index < adapter->used_tx_channels; index++) { 2699 if (adapter->tx[index].ring_cpu_ptr) 2700 lan743x_tx_close(&adapter->tx[index]); 2701 } 2702 2703 close_rx: 2704 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2705 if (adapter->rx[index].ring_cpu_ptr) 2706 lan743x_rx_close(&adapter->rx[index]); 2707 } 2708 lan743x_ptp_close(adapter); 2709 2710 close_phy: 2711 lan743x_phy_close(adapter); 2712 2713 close_mac: 2714 lan743x_mac_close(adapter); 2715 2716 close_intr: 2717 lan743x_intr_close(adapter); 2718 2719 return_error: 2720 netif_warn(adapter, ifup, adapter->netdev, 2721 "Error opening LAN743x\n"); 2722 return ret; 2723 } 2724 2725 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb, 2726 struct net_device *netdev) 2727 { 2728 struct lan743x_adapter *adapter = netdev_priv(netdev); 2729 u8 ch = 0; 2730 2731 if (adapter->is_pci11x1x) 2732 ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS; 2733 2734 return lan743x_tx_xmit_frame(&adapter->tx[ch], skb); 2735 } 2736 2737 static int lan743x_netdev_ioctl(struct net_device *netdev, 2738 struct ifreq *ifr, int cmd) 2739 { 2740 if (!netif_running(netdev)) 2741 return -EINVAL; 2742 if (cmd == SIOCSHWTSTAMP) 2743 return lan743x_ptp_ioctl(netdev, ifr, cmd); 2744 return phy_mii_ioctl(netdev->phydev, ifr, cmd); 2745 } 2746 2747 static void lan743x_netdev_set_multicast(struct net_device *netdev) 2748 { 2749 struct lan743x_adapter *adapter = netdev_priv(netdev); 2750 2751 lan743x_rfe_set_multicast(adapter); 2752 } 2753 2754 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu) 2755 { 2756 struct lan743x_adapter *adapter = netdev_priv(netdev); 2757 int ret = 0; 2758 2759 ret = lan743x_mac_set_mtu(adapter, new_mtu); 2760 if (!ret) 2761 netdev->mtu = new_mtu; 2762 return ret; 2763 } 2764 2765 static void lan743x_netdev_get_stats64(struct net_device *netdev, 2766 struct rtnl_link_stats64 *stats) 2767 { 2768 struct lan743x_adapter *adapter = netdev_priv(netdev); 2769 2770 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES); 2771 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES); 2772 stats->rx_bytes = lan743x_csr_read(adapter, 2773 STAT_RX_UNICAST_BYTE_COUNT) + 2774 lan743x_csr_read(adapter, 2775 STAT_RX_BROADCAST_BYTE_COUNT) + 2776 lan743x_csr_read(adapter, 2777 STAT_RX_MULTICAST_BYTE_COUNT); 2778 stats->tx_bytes = lan743x_csr_read(adapter, 2779 STAT_TX_UNICAST_BYTE_COUNT) + 2780 lan743x_csr_read(adapter, 2781 STAT_TX_BROADCAST_BYTE_COUNT) + 2782 lan743x_csr_read(adapter, 2783 STAT_TX_MULTICAST_BYTE_COUNT); 2784 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) + 2785 lan743x_csr_read(adapter, 2786 STAT_RX_ALIGNMENT_ERRORS) + 2787 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) + 2788 lan743x_csr_read(adapter, 2789 STAT_RX_UNDERSIZE_FRAME_ERRORS) + 2790 lan743x_csr_read(adapter, 2791 STAT_RX_OVERSIZE_FRAME_ERRORS); 2792 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) + 2793 lan743x_csr_read(adapter, 2794 STAT_TX_EXCESS_DEFERRAL_ERRORS) + 2795 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS); 2796 stats->rx_dropped = lan743x_csr_read(adapter, 2797 STAT_RX_DROPPED_FRAMES); 2798 stats->tx_dropped = lan743x_csr_read(adapter, 2799 STAT_TX_EXCESSIVE_COLLISION); 2800 stats->multicast = lan743x_csr_read(adapter, 2801 STAT_RX_MULTICAST_FRAMES) + 2802 lan743x_csr_read(adapter, 2803 STAT_TX_MULTICAST_FRAMES); 2804 stats->collisions = lan743x_csr_read(adapter, 2805 STAT_TX_SINGLE_COLLISIONS) + 2806 lan743x_csr_read(adapter, 2807 STAT_TX_MULTIPLE_COLLISIONS) + 2808 lan743x_csr_read(adapter, 2809 STAT_TX_LATE_COLLISIONS); 2810 } 2811 2812 static int lan743x_netdev_set_mac_address(struct net_device *netdev, 2813 void *addr) 2814 { 2815 struct lan743x_adapter *adapter = netdev_priv(netdev); 2816 struct sockaddr *sock_addr = addr; 2817 int ret; 2818 2819 ret = eth_prepare_mac_addr_change(netdev, sock_addr); 2820 if (ret) 2821 return ret; 2822 eth_hw_addr_set(netdev, sock_addr->sa_data); 2823 lan743x_mac_set_address(adapter, sock_addr->sa_data); 2824 lan743x_rfe_update_mac_address(adapter); 2825 return 0; 2826 } 2827 2828 static const struct net_device_ops lan743x_netdev_ops = { 2829 .ndo_open = lan743x_netdev_open, 2830 .ndo_stop = lan743x_netdev_close, 2831 .ndo_start_xmit = lan743x_netdev_xmit_frame, 2832 .ndo_eth_ioctl = lan743x_netdev_ioctl, 2833 .ndo_set_rx_mode = lan743x_netdev_set_multicast, 2834 .ndo_change_mtu = lan743x_netdev_change_mtu, 2835 .ndo_get_stats64 = lan743x_netdev_get_stats64, 2836 .ndo_set_mac_address = lan743x_netdev_set_mac_address, 2837 }; 2838 2839 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter) 2840 { 2841 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2842 } 2843 2844 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter) 2845 { 2846 mdiobus_unregister(adapter->mdiobus); 2847 } 2848 2849 static void lan743x_full_cleanup(struct lan743x_adapter *adapter) 2850 { 2851 unregister_netdev(adapter->netdev); 2852 2853 lan743x_mdiobus_cleanup(adapter); 2854 lan743x_hardware_cleanup(adapter); 2855 lan743x_pci_cleanup(adapter); 2856 } 2857 2858 static int lan743x_hardware_init(struct lan743x_adapter *adapter, 2859 struct pci_dev *pdev) 2860 { 2861 struct lan743x_tx *tx; 2862 int index; 2863 int ret; 2864 2865 adapter->is_pci11x1x = is_pci11x1x_chip(adapter); 2866 if (adapter->is_pci11x1x) { 2867 adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS; 2868 adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS; 2869 adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT; 2870 pci11x1x_strap_get_status(adapter); 2871 } else { 2872 adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS; 2873 adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS; 2874 adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT; 2875 } 2876 2877 adapter->intr.irq = adapter->pdev->irq; 2878 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2879 2880 ret = lan743x_gpio_init(adapter); 2881 if (ret) 2882 return ret; 2883 2884 ret = lan743x_mac_init(adapter); 2885 if (ret) 2886 return ret; 2887 2888 ret = lan743x_phy_init(adapter); 2889 if (ret) 2890 return ret; 2891 2892 ret = lan743x_ptp_init(adapter); 2893 if (ret) 2894 return ret; 2895 2896 lan743x_rfe_update_mac_address(adapter); 2897 2898 ret = lan743x_dmac_init(adapter); 2899 if (ret) 2900 return ret; 2901 2902 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2903 adapter->rx[index].adapter = adapter; 2904 adapter->rx[index].channel_number = index; 2905 } 2906 2907 for (index = 0; index < adapter->used_tx_channels; index++) { 2908 tx = &adapter->tx[index]; 2909 tx->adapter = adapter; 2910 tx->channel_number = index; 2911 spin_lock_init(&tx->ring_lock); 2912 } 2913 2914 return 0; 2915 } 2916 2917 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 2918 { 2919 u32 sgmii_ctl; 2920 int ret; 2921 2922 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); 2923 if (!(adapter->mdiobus)) { 2924 ret = -ENOMEM; 2925 goto return_error; 2926 } 2927 2928 adapter->mdiobus->priv = (void *)adapter; 2929 if (adapter->is_pci11x1x) { 2930 if (adapter->is_sgmii_en) { 2931 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 2932 sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_; 2933 sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_; 2934 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 2935 netif_dbg(adapter, drv, adapter->netdev, 2936 "SGMII operation\n"); 2937 } else { 2938 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 2939 sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_; 2940 sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_; 2941 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 2942 netif_dbg(adapter, drv, adapter->netdev, 2943 "(R)GMII operation\n"); 2944 } 2945 2946 adapter->mdiobus->probe_capabilities = MDIOBUS_C22_C45; 2947 adapter->mdiobus->read = lan743x_mdiobus_c45_read; 2948 adapter->mdiobus->write = lan743x_mdiobus_c45_write; 2949 adapter->mdiobus->name = "lan743x-mdiobus-c45"; 2950 netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus-c45\n"); 2951 } else { 2952 adapter->mdiobus->read = lan743x_mdiobus_read; 2953 adapter->mdiobus->write = lan743x_mdiobus_write; 2954 adapter->mdiobus->name = "lan743x-mdiobus"; 2955 netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus\n"); 2956 } 2957 2958 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 2959 "pci-%s", pci_name(adapter->pdev)); 2960 2961 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) 2962 /* LAN7430 uses internal phy at address 1 */ 2963 adapter->mdiobus->phy_mask = ~(u32)BIT(1); 2964 2965 /* register mdiobus */ 2966 ret = mdiobus_register(adapter->mdiobus); 2967 if (ret < 0) 2968 goto return_error; 2969 return 0; 2970 2971 return_error: 2972 return ret; 2973 } 2974 2975 /* lan743x_pcidev_probe - Device Initialization Routine 2976 * @pdev: PCI device information struct 2977 * @id: entry in lan743x_pci_tbl 2978 * 2979 * Returns 0 on success, negative on failure 2980 * 2981 * initializes an adapter identified by a pci_dev structure. 2982 * The OS initialization, configuring of the adapter private structure, 2983 * and a hardware reset occur. 2984 **/ 2985 static int lan743x_pcidev_probe(struct pci_dev *pdev, 2986 const struct pci_device_id *id) 2987 { 2988 struct lan743x_adapter *adapter = NULL; 2989 struct net_device *netdev = NULL; 2990 int ret = -ENODEV; 2991 2992 if (id->device == PCI_DEVICE_ID_SMSC_A011 || 2993 id->device == PCI_DEVICE_ID_SMSC_A041) { 2994 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 2995 sizeof(struct lan743x_adapter), 2996 PCI11X1X_USED_TX_CHANNELS, 2997 LAN743X_USED_RX_CHANNELS); 2998 } else { 2999 netdev = devm_alloc_etherdev(&pdev->dev, 3000 sizeof(struct lan743x_adapter)); 3001 } 3002 3003 if (!netdev) 3004 goto return_error; 3005 3006 SET_NETDEV_DEV(netdev, &pdev->dev); 3007 pci_set_drvdata(pdev, netdev); 3008 adapter = netdev_priv(netdev); 3009 adapter->netdev = netdev; 3010 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE | 3011 NETIF_MSG_LINK | NETIF_MSG_IFUP | 3012 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED; 3013 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE; 3014 3015 of_get_mac_address(pdev->dev.of_node, adapter->mac_address); 3016 3017 ret = lan743x_pci_init(adapter, pdev); 3018 if (ret) 3019 goto return_error; 3020 3021 ret = lan743x_csr_init(adapter); 3022 if (ret) 3023 goto cleanup_pci; 3024 3025 ret = lan743x_hardware_init(adapter, pdev); 3026 if (ret) 3027 goto cleanup_pci; 3028 3029 ret = lan743x_mdiobus_init(adapter); 3030 if (ret) 3031 goto cleanup_hardware; 3032 3033 adapter->netdev->netdev_ops = &lan743x_netdev_ops; 3034 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops; 3035 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM; 3036 adapter->netdev->hw_features = adapter->netdev->features; 3037 3038 /* carrier off reporting is important to ethtool even BEFORE open */ 3039 netif_carrier_off(netdev); 3040 3041 ret = register_netdev(adapter->netdev); 3042 if (ret < 0) 3043 goto cleanup_mdiobus; 3044 return 0; 3045 3046 cleanup_mdiobus: 3047 lan743x_mdiobus_cleanup(adapter); 3048 3049 cleanup_hardware: 3050 lan743x_hardware_cleanup(adapter); 3051 3052 cleanup_pci: 3053 lan743x_pci_cleanup(adapter); 3054 3055 return_error: 3056 pr_warn("Initialization failed\n"); 3057 return ret; 3058 } 3059 3060 /** 3061 * lan743x_pcidev_remove - Device Removal Routine 3062 * @pdev: PCI device information struct 3063 * 3064 * this is called by the PCI subsystem to alert the driver 3065 * that it should release a PCI device. This could be caused by a 3066 * Hot-Plug event, or because the driver is going to be removed from 3067 * memory. 3068 **/ 3069 static void lan743x_pcidev_remove(struct pci_dev *pdev) 3070 { 3071 struct net_device *netdev = pci_get_drvdata(pdev); 3072 struct lan743x_adapter *adapter = netdev_priv(netdev); 3073 3074 lan743x_full_cleanup(adapter); 3075 } 3076 3077 static void lan743x_pcidev_shutdown(struct pci_dev *pdev) 3078 { 3079 struct net_device *netdev = pci_get_drvdata(pdev); 3080 struct lan743x_adapter *adapter = netdev_priv(netdev); 3081 3082 rtnl_lock(); 3083 netif_device_detach(netdev); 3084 3085 /* close netdev when netdev is at running state. 3086 * For instance, it is true when system goes to sleep by pm-suspend 3087 * However, it is false when system goes to sleep by suspend GUI menu 3088 */ 3089 if (netif_running(netdev)) 3090 lan743x_netdev_close(netdev); 3091 rtnl_unlock(); 3092 3093 #ifdef CONFIG_PM 3094 pci_save_state(pdev); 3095 #endif 3096 3097 /* clean up lan743x portion */ 3098 lan743x_hardware_cleanup(adapter); 3099 } 3100 3101 #ifdef CONFIG_PM_SLEEP 3102 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len) 3103 { 3104 return bitrev16(crc16(0xFFFF, buf, len)); 3105 } 3106 3107 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter) 3108 { 3109 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 3110 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 3111 const u8 arp_type[2] = { 0x08, 0x06 }; 3112 int mask_index; 3113 u32 pmtctl; 3114 u32 wucsr; 3115 u32 macrx; 3116 u16 crc; 3117 3118 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++) 3119 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0); 3120 3121 /* clear wake settings */ 3122 pmtctl = lan743x_csr_read(adapter, PMT_CTL); 3123 pmtctl |= PMT_CTL_WUPS_MASK_; 3124 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ | 3125 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ | 3126 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_); 3127 3128 macrx = lan743x_csr_read(adapter, MAC_RX); 3129 3130 wucsr = 0; 3131 mask_index = 0; 3132 3133 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_; 3134 3135 if (adapter->wolopts & WAKE_PHY) { 3136 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_; 3137 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_; 3138 } 3139 if (adapter->wolopts & WAKE_MAGIC) { 3140 wucsr |= MAC_WUCSR_MPEN_; 3141 macrx |= MAC_RX_RXEN_; 3142 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3143 } 3144 if (adapter->wolopts & WAKE_UCAST) { 3145 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_; 3146 macrx |= MAC_RX_RXEN_; 3147 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3148 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3149 } 3150 if (adapter->wolopts & WAKE_BCAST) { 3151 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_; 3152 macrx |= MAC_RX_RXEN_; 3153 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3154 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3155 } 3156 if (adapter->wolopts & WAKE_MCAST) { 3157 /* IPv4 multicast */ 3158 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3); 3159 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3160 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3161 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3162 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3163 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7); 3164 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3165 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3166 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3167 mask_index++; 3168 3169 /* IPv6 multicast */ 3170 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2); 3171 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3172 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3173 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3174 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3175 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3); 3176 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3177 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3178 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3179 mask_index++; 3180 3181 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3182 macrx |= MAC_RX_RXEN_; 3183 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3184 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3185 } 3186 if (adapter->wolopts & WAKE_ARP) { 3187 /* set MAC_WUF_CFG & WUF_MASK 3188 * for packettype (offset 12,13) = ARP (0x0806) 3189 */ 3190 crc = lan743x_pm_wakeframe_crc16(arp_type, 2); 3191 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3192 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ | 3193 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3194 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3195 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000); 3196 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3197 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3198 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3199 mask_index++; 3200 3201 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3202 macrx |= MAC_RX_RXEN_; 3203 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3204 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3205 } 3206 3207 lan743x_csr_write(adapter, MAC_WUCSR, wucsr); 3208 lan743x_csr_write(adapter, PMT_CTL, pmtctl); 3209 lan743x_csr_write(adapter, MAC_RX, macrx); 3210 } 3211 3212 static int lan743x_pm_suspend(struct device *dev) 3213 { 3214 struct pci_dev *pdev = to_pci_dev(dev); 3215 struct net_device *netdev = pci_get_drvdata(pdev); 3216 struct lan743x_adapter *adapter = netdev_priv(netdev); 3217 3218 lan743x_pcidev_shutdown(pdev); 3219 3220 /* clear all wakes */ 3221 lan743x_csr_write(adapter, MAC_WUCSR, 0); 3222 lan743x_csr_write(adapter, MAC_WUCSR2, 0); 3223 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF); 3224 3225 if (adapter->wolopts) 3226 lan743x_pm_set_wol(adapter); 3227 3228 /* Host sets PME_En, put D3hot */ 3229 return pci_prepare_to_sleep(pdev); 3230 } 3231 3232 static int lan743x_pm_resume(struct device *dev) 3233 { 3234 struct pci_dev *pdev = to_pci_dev(dev); 3235 struct net_device *netdev = pci_get_drvdata(pdev); 3236 struct lan743x_adapter *adapter = netdev_priv(netdev); 3237 int ret; 3238 3239 pci_set_power_state(pdev, PCI_D0); 3240 pci_restore_state(pdev); 3241 pci_save_state(pdev); 3242 3243 ret = lan743x_hardware_init(adapter, pdev); 3244 if (ret) { 3245 netif_err(adapter, probe, adapter->netdev, 3246 "lan743x_hardware_init returned %d\n", ret); 3247 lan743x_pci_cleanup(adapter); 3248 return ret; 3249 } 3250 3251 /* open netdev when netdev is at running state while resume. 3252 * For instance, it is true when system wakesup after pm-suspend 3253 * However, it is false when system wakes up after suspend GUI menu 3254 */ 3255 if (netif_running(netdev)) 3256 lan743x_netdev_open(netdev); 3257 3258 netif_device_attach(netdev); 3259 3260 return 0; 3261 } 3262 3263 static const struct dev_pm_ops lan743x_pm_ops = { 3264 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume) 3265 }; 3266 #endif /* CONFIG_PM_SLEEP */ 3267 3268 static const struct pci_device_id lan743x_pcidev_tbl[] = { 3269 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 3270 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 3271 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) }, 3272 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) }, 3273 { 0, } 3274 }; 3275 3276 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl); 3277 3278 static struct pci_driver lan743x_pcidev_driver = { 3279 .name = DRIVER_NAME, 3280 .id_table = lan743x_pcidev_tbl, 3281 .probe = lan743x_pcidev_probe, 3282 .remove = lan743x_pcidev_remove, 3283 #ifdef CONFIG_PM_SLEEP 3284 .driver.pm = &lan743x_pm_ops, 3285 #endif 3286 .shutdown = lan743x_pcidev_shutdown, 3287 }; 3288 3289 module_pci_driver(lan743x_pcidev_driver); 3290 3291 MODULE_AUTHOR(DRIVER_AUTHOR); 3292 MODULE_DESCRIPTION(DRIVER_DESC); 3293 MODULE_LICENSE("GPL"); 3294