1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (C) 2018 Microchip Technology Inc. */ 3 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/crc32.h> 9 #include <linux/microchipphy.h> 10 #include <linux/net_tstamp.h> 11 #include <linux/of_mdio.h> 12 #include <linux/of_net.h> 13 #include <linux/phy.h> 14 #include <linux/phy_fixed.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/iopoll.h> 17 #include <linux/crc16.h> 18 #include <linux/phylink.h> 19 #include "lan743x_main.h" 20 #include "lan743x_ethtool.h" 21 22 #define MMD_ACCESS_ADDRESS 0 23 #define MMD_ACCESS_WRITE 1 24 #define MMD_ACCESS_READ 2 25 #define MMD_ACCESS_READ_INC 3 26 #define PCS_POWER_STATE_DOWN 0x6 27 #define PCS_POWER_STATE_UP 0x4 28 29 #define RFE_RD_FIFO_TH_3_DWORDS 0x3 30 31 static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter) 32 { 33 u32 chip_rev; 34 u32 cfg_load; 35 u32 hw_cfg; 36 u32 strap; 37 int ret; 38 39 /* Timeout = 100 (i.e. 1 sec (10 msce * 100)) */ 40 ret = lan743x_hs_syslock_acquire(adapter, 100); 41 if (ret < 0) { 42 netif_err(adapter, drv, adapter->netdev, 43 "Sys Lock acquire failed ret:%d\n", ret); 44 return; 45 } 46 47 cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG); 48 lan743x_hs_syslock_release(adapter); 49 hw_cfg = lan743x_csr_read(adapter, HW_CFG); 50 51 if (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ || 52 hw_cfg & HW_CFG_RST_PROTECT_) { 53 strap = lan743x_csr_read(adapter, STRAP_READ); 54 if (strap & STRAP_READ_SGMII_EN_) 55 adapter->is_sgmii_en = true; 56 else 57 adapter->is_sgmii_en = false; 58 } else { 59 chip_rev = lan743x_csr_read(adapter, FPGA_REV); 60 if (chip_rev) { 61 if (chip_rev & FPGA_SGMII_OP) 62 adapter->is_sgmii_en = true; 63 else 64 adapter->is_sgmii_en = false; 65 } else { 66 adapter->is_sgmii_en = false; 67 } 68 } 69 netif_dbg(adapter, drv, adapter->netdev, 70 "SGMII I/F %sable\n", adapter->is_sgmii_en ? "En" : "Dis"); 71 } 72 73 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter) 74 { 75 struct lan743x_csr *csr = &adapter->csr; 76 u32 id_rev = csr->id_rev; 77 78 if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) || 79 ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) { 80 return true; 81 } 82 return false; 83 } 84 85 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 86 { 87 pci_release_selected_regions(adapter->pdev, 88 pci_select_bars(adapter->pdev, 89 IORESOURCE_MEM)); 90 pci_disable_device(adapter->pdev); 91 } 92 93 static int lan743x_pci_init(struct lan743x_adapter *adapter, 94 struct pci_dev *pdev) 95 { 96 unsigned long bars = 0; 97 int ret; 98 99 adapter->pdev = pdev; 100 ret = pci_enable_device_mem(pdev); 101 if (ret) 102 goto return_error; 103 104 netif_info(adapter, probe, adapter->netdev, 105 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n", 106 pdev->vendor, pdev->device); 107 bars = pci_select_bars(pdev, IORESOURCE_MEM); 108 if (!test_bit(0, &bars)) 109 goto disable_device; 110 111 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME); 112 if (ret) 113 goto disable_device; 114 115 pci_set_master(pdev); 116 return 0; 117 118 disable_device: 119 pci_disable_device(adapter->pdev); 120 121 return_error: 122 return ret; 123 } 124 125 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset) 126 { 127 return ioread32(&adapter->csr.csr_address[offset]); 128 } 129 130 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, 131 u32 data) 132 { 133 iowrite32(data, &adapter->csr.csr_address[offset]); 134 } 135 136 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset) 137 138 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter) 139 { 140 u32 data; 141 142 data = lan743x_csr_read(adapter, HW_CFG); 143 data |= HW_CFG_LRST_; 144 lan743x_csr_write(adapter, HW_CFG, data); 145 146 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data, 147 !(data & HW_CFG_LRST_), 100000, 10000000); 148 } 149 150 static int lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter *adapter, 151 int offset, u32 bit_mask, 152 int target_value, int udelay_min, 153 int udelay_max, int count) 154 { 155 u32 data; 156 157 return readx_poll_timeout_atomic(LAN743X_CSR_READ_OP, offset, data, 158 target_value == !!(data & bit_mask), 159 udelay_max, udelay_min * count); 160 } 161 162 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter, 163 int offset, u32 bit_mask, 164 int target_value, int usleep_min, 165 int usleep_max, int count) 166 { 167 u32 data; 168 169 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data, 170 target_value == !!(data & bit_mask), 171 usleep_max, usleep_min * count); 172 } 173 174 static int lan743x_csr_init(struct lan743x_adapter *adapter) 175 { 176 struct lan743x_csr *csr = &adapter->csr; 177 resource_size_t bar_start, bar_length; 178 179 bar_start = pci_resource_start(adapter->pdev, 0); 180 bar_length = pci_resource_len(adapter->pdev, 0); 181 csr->csr_address = devm_ioremap(&adapter->pdev->dev, 182 bar_start, bar_length); 183 if (!csr->csr_address) 184 return -ENOMEM; 185 186 csr->id_rev = lan743x_csr_read(adapter, ID_REV); 187 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 188 netif_info(adapter, probe, adapter->netdev, 189 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n", 190 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), 191 FPGA_REV_GET_MINOR_(csr->fpga_rev)); 192 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) 193 return -ENODEV; 194 195 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 196 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { 197 case ID_REV_CHIP_REV_A0_: 198 csr->flags |= LAN743X_CSR_FLAG_IS_A0; 199 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 200 break; 201 case ID_REV_CHIP_REV_B0_: 202 csr->flags |= LAN743X_CSR_FLAG_IS_B0; 203 break; 204 } 205 206 return lan743x_csr_light_reset(adapter); 207 } 208 209 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter) 210 { 211 struct lan743x_intr *intr = &adapter->intr; 212 213 /* disable the interrupt to prevent repeated re-triggering */ 214 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 215 intr->software_isr_flag = true; 216 wake_up(&intr->software_isr_wq); 217 } 218 219 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags) 220 { 221 struct lan743x_tx *tx = context; 222 struct lan743x_adapter *adapter = tx->adapter; 223 bool enable_flag = true; 224 225 lan743x_csr_read(adapter, INT_EN_SET); 226 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 227 lan743x_csr_write(adapter, INT_EN_CLR, 228 INT_BIT_DMA_TX_(tx->channel_number)); 229 } 230 231 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { 232 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 233 u32 dmac_int_sts; 234 u32 dmac_int_en; 235 236 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 237 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 238 else 239 dmac_int_sts = ioc_bit; 240 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 241 dmac_int_en = lan743x_csr_read(adapter, 242 DMAC_INT_EN_SET); 243 else 244 dmac_int_en = ioc_bit; 245 246 dmac_int_en &= ioc_bit; 247 dmac_int_sts &= dmac_int_en; 248 if (dmac_int_sts & ioc_bit) { 249 napi_schedule(&tx->napi); 250 enable_flag = false;/* poll func will enable later */ 251 } 252 } 253 254 if (enable_flag) 255 /* enable isr */ 256 lan743x_csr_write(adapter, INT_EN_SET, 257 INT_BIT_DMA_TX_(tx->channel_number)); 258 } 259 260 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags) 261 { 262 struct lan743x_rx *rx = context; 263 struct lan743x_adapter *adapter = rx->adapter; 264 bool enable_flag = true; 265 266 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 267 lan743x_csr_write(adapter, INT_EN_CLR, 268 INT_BIT_DMA_RX_(rx->channel_number)); 269 } 270 271 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) { 272 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number); 273 u32 dmac_int_sts; 274 u32 dmac_int_en; 275 276 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 277 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 278 else 279 dmac_int_sts = rx_frame_bit; 280 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 281 dmac_int_en = lan743x_csr_read(adapter, 282 DMAC_INT_EN_SET); 283 else 284 dmac_int_en = rx_frame_bit; 285 286 dmac_int_en &= rx_frame_bit; 287 dmac_int_sts &= dmac_int_en; 288 if (dmac_int_sts & rx_frame_bit) { 289 napi_schedule(&rx->napi); 290 enable_flag = false;/* poll funct will enable later */ 291 } 292 } 293 294 if (enable_flag) { 295 /* enable isr */ 296 lan743x_csr_write(adapter, INT_EN_SET, 297 INT_BIT_DMA_RX_(rx->channel_number)); 298 } 299 } 300 301 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags) 302 { 303 struct lan743x_adapter *adapter = context; 304 unsigned int channel; 305 306 if (int_sts & INT_BIT_ALL_RX_) { 307 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS; 308 channel++) { 309 u32 int_bit = INT_BIT_DMA_RX_(channel); 310 311 if (int_sts & int_bit) { 312 lan743x_rx_isr(&adapter->rx[channel], 313 int_bit, flags); 314 int_sts &= ~int_bit; 315 } 316 } 317 } 318 if (int_sts & INT_BIT_ALL_TX_) { 319 for (channel = 0; channel < adapter->used_tx_channels; 320 channel++) { 321 u32 int_bit = INT_BIT_DMA_TX_(channel); 322 323 if (int_sts & int_bit) { 324 lan743x_tx_isr(&adapter->tx[channel], 325 int_bit, flags); 326 int_sts &= ~int_bit; 327 } 328 } 329 } 330 if (int_sts & INT_BIT_ALL_OTHER_) { 331 if (int_sts & INT_BIT_SW_GP_) { 332 lan743x_intr_software_isr(adapter); 333 int_sts &= ~INT_BIT_SW_GP_; 334 } 335 if (int_sts & INT_BIT_1588_) { 336 lan743x_ptp_isr(adapter); 337 int_sts &= ~INT_BIT_1588_; 338 } 339 } 340 if (int_sts) 341 lan743x_csr_write(adapter, INT_EN_CLR, int_sts); 342 } 343 344 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr) 345 { 346 struct lan743x_vector *vector = ptr; 347 struct lan743x_adapter *adapter = vector->adapter; 348 irqreturn_t result = IRQ_NONE; 349 u32 int_enables; 350 u32 int_sts; 351 352 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) { 353 int_sts = lan743x_csr_read(adapter, INT_STS); 354 } else if (vector->flags & 355 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C | 356 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) { 357 int_sts = lan743x_csr_read(adapter, INT_STS_R2C); 358 } else { 359 /* use mask as implied status */ 360 int_sts = vector->int_mask | INT_BIT_MAS_; 361 } 362 363 if (!(int_sts & INT_BIT_MAS_)) 364 goto irq_done; 365 366 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR) 367 /* disable vector interrupt */ 368 lan743x_csr_write(adapter, 369 INT_VEC_EN_CLR, 370 INT_VEC_EN_(vector->vector_index)); 371 372 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR) 373 /* disable master interrupt */ 374 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 375 376 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) { 377 int_enables = lan743x_csr_read(adapter, INT_EN_SET); 378 } else { 379 /* use vector mask as implied enable mask */ 380 int_enables = vector->int_mask; 381 } 382 383 int_sts &= int_enables; 384 int_sts &= vector->int_mask; 385 if (int_sts) { 386 if (vector->handler) { 387 vector->handler(vector->context, 388 int_sts, vector->flags); 389 } else { 390 /* disable interrupts on this vector */ 391 lan743x_csr_write(adapter, INT_EN_CLR, 392 vector->int_mask); 393 } 394 result = IRQ_HANDLED; 395 } 396 397 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET) 398 /* enable master interrupt */ 399 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 400 401 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET) 402 /* enable vector interrupt */ 403 lan743x_csr_write(adapter, 404 INT_VEC_EN_SET, 405 INT_VEC_EN_(vector->vector_index)); 406 irq_done: 407 return result; 408 } 409 410 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter) 411 { 412 struct lan743x_intr *intr = &adapter->intr; 413 int ret; 414 415 intr->software_isr_flag = false; 416 417 /* enable and activate test interrupt */ 418 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_); 419 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_); 420 421 ret = wait_event_timeout(intr->software_isr_wq, 422 intr->software_isr_flag, 423 msecs_to_jiffies(200)); 424 425 /* disable test interrupt */ 426 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 427 428 return ret > 0 ? 0 : -ENODEV; 429 } 430 431 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter, 432 int vector_index, u32 flags, 433 u32 int_mask, 434 lan743x_vector_handler handler, 435 void *context) 436 { 437 struct lan743x_vector *vector = &adapter->intr.vector_list 438 [vector_index]; 439 int ret; 440 441 vector->adapter = adapter; 442 vector->flags = flags; 443 vector->vector_index = vector_index; 444 vector->int_mask = int_mask; 445 vector->handler = handler; 446 vector->context = context; 447 448 ret = request_irq(vector->irq, 449 lan743x_intr_entry_isr, 450 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ? 451 IRQF_SHARED : 0, DRIVER_NAME, vector); 452 if (ret) { 453 vector->handler = NULL; 454 vector->context = NULL; 455 vector->int_mask = 0; 456 vector->flags = 0; 457 } 458 return ret; 459 } 460 461 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter, 462 int vector_index) 463 { 464 struct lan743x_vector *vector = &adapter->intr.vector_list 465 [vector_index]; 466 467 free_irq(vector->irq, vector); 468 vector->handler = NULL; 469 vector->context = NULL; 470 vector->int_mask = 0; 471 vector->flags = 0; 472 } 473 474 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter, 475 u32 int_mask) 476 { 477 int index; 478 479 for (index = 0; index < adapter->max_vector_count; index++) { 480 if (adapter->intr.vector_list[index].int_mask & int_mask) 481 return adapter->intr.vector_list[index].flags; 482 } 483 return 0; 484 } 485 486 static void lan743x_intr_close(struct lan743x_adapter *adapter) 487 { 488 struct lan743x_intr *intr = &adapter->intr; 489 int index = 0; 490 491 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 492 if (adapter->is_pci11x1x) 493 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF); 494 else 495 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 496 497 for (index = 0; index < intr->number_of_vectors; index++) { 498 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 499 lan743x_intr_unregister_isr(adapter, index); 500 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); 501 } 502 } 503 504 if (intr->flags & INTR_FLAG_MSI_ENABLED) { 505 pci_disable_msi(adapter->pdev); 506 intr->flags &= ~INTR_FLAG_MSI_ENABLED; 507 } 508 509 if (intr->flags & INTR_FLAG_MSIX_ENABLED) { 510 pci_disable_msix(adapter->pdev); 511 intr->flags &= ~INTR_FLAG_MSIX_ENABLED; 512 } 513 } 514 515 static int lan743x_intr_open(struct lan743x_adapter *adapter) 516 { 517 struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT]; 518 struct lan743x_intr *intr = &adapter->intr; 519 unsigned int used_tx_channels; 520 u32 int_vec_en_auto_clr = 0; 521 u8 max_vector_count; 522 u32 int_vec_map0 = 0; 523 u32 int_vec_map1 = 0; 524 int ret = -ENODEV; 525 int index = 0; 526 u32 flags = 0; 527 528 intr->number_of_vectors = 0; 529 530 /* Try to set up MSIX interrupts */ 531 max_vector_count = adapter->max_vector_count; 532 memset(&msix_entries[0], 0, 533 sizeof(struct msix_entry) * max_vector_count); 534 for (index = 0; index < max_vector_count; index++) 535 msix_entries[index].entry = index; 536 used_tx_channels = adapter->used_tx_channels; 537 ret = pci_enable_msix_range(adapter->pdev, 538 msix_entries, 1, 539 1 + used_tx_channels + 540 LAN743X_USED_RX_CHANNELS); 541 542 if (ret > 0) { 543 intr->flags |= INTR_FLAG_MSIX_ENABLED; 544 intr->number_of_vectors = ret; 545 intr->using_vectors = true; 546 for (index = 0; index < intr->number_of_vectors; index++) 547 intr->vector_list[index].irq = msix_entries 548 [index].vector; 549 netif_info(adapter, ifup, adapter->netdev, 550 "using MSIX interrupts, number of vectors = %d\n", 551 intr->number_of_vectors); 552 } 553 554 /* If MSIX failed try to setup using MSI interrupts */ 555 if (!intr->number_of_vectors) { 556 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 557 if (!pci_enable_msi(adapter->pdev)) { 558 intr->flags |= INTR_FLAG_MSI_ENABLED; 559 intr->number_of_vectors = 1; 560 intr->using_vectors = true; 561 intr->vector_list[0].irq = 562 adapter->pdev->irq; 563 netif_info(adapter, ifup, adapter->netdev, 564 "using MSI interrupts, number of vectors = %d\n", 565 intr->number_of_vectors); 566 } 567 } 568 } 569 570 /* If MSIX, and MSI failed, setup using legacy interrupt */ 571 if (!intr->number_of_vectors) { 572 intr->number_of_vectors = 1; 573 intr->using_vectors = false; 574 intr->vector_list[0].irq = intr->irq; 575 netif_info(adapter, ifup, adapter->netdev, 576 "using legacy interrupts\n"); 577 } 578 579 /* At this point we must have at least one irq */ 580 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF); 581 582 /* map all interrupts to vector 0 */ 583 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000); 584 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000); 585 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000); 586 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 587 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 588 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 589 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 590 591 if (intr->using_vectors) { 592 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 593 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 594 } else { 595 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR | 596 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET | 597 LAN743X_VECTOR_FLAG_IRQ_SHARED; 598 } 599 600 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 601 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ; 602 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C; 603 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 604 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK; 605 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C; 606 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C; 607 } 608 609 init_waitqueue_head(&intr->software_isr_wq); 610 611 ret = lan743x_intr_register_isr(adapter, 0, flags, 612 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ | 613 INT_BIT_ALL_OTHER_, 614 lan743x_intr_shared_isr, adapter); 615 if (ret) 616 goto clean_up; 617 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0); 618 619 if (intr->using_vectors) 620 lan743x_csr_write(adapter, INT_VEC_EN_SET, 621 INT_VEC_EN_(0)); 622 623 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 624 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD); 625 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD); 626 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD); 627 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD); 628 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD); 629 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 630 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 631 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 632 if (adapter->is_pci11x1x) { 633 lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD); 634 lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD); 635 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654); 636 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210); 637 } else { 638 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 639 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 640 } 641 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 642 } 643 644 /* enable interrupts */ 645 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 646 ret = lan743x_intr_test_isr(adapter); 647 if (ret) 648 goto clean_up; 649 650 if (intr->number_of_vectors > 1) { 651 int number_of_tx_vectors = intr->number_of_vectors - 1; 652 653 if (number_of_tx_vectors > used_tx_channels) 654 number_of_tx_vectors = used_tx_channels; 655 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 656 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 657 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 658 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 659 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 660 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 661 662 if (adapter->csr.flags & 663 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 664 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 665 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 666 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 667 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 668 } 669 670 for (index = 0; index < number_of_tx_vectors; index++) { 671 u32 int_bit = INT_BIT_DMA_TX_(index); 672 int vector = index + 1; 673 674 /* map TX interrupt to vector */ 675 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector); 676 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1); 677 678 /* Remove TX interrupt from shared mask */ 679 intr->vector_list[0].int_mask &= ~int_bit; 680 ret = lan743x_intr_register_isr(adapter, vector, flags, 681 int_bit, lan743x_tx_isr, 682 &adapter->tx[index]); 683 if (ret) 684 goto clean_up; 685 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 686 if (!(flags & 687 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)) 688 lan743x_csr_write(adapter, INT_VEC_EN_SET, 689 INT_VEC_EN_(vector)); 690 } 691 } 692 if ((intr->number_of_vectors - used_tx_channels) > 1) { 693 int number_of_rx_vectors = intr->number_of_vectors - 694 used_tx_channels - 1; 695 696 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 697 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; 698 699 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 700 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 701 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 702 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 703 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 704 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 705 706 if (adapter->csr.flags & 707 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 708 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR | 709 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 710 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 711 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 712 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 713 } 714 for (index = 0; index < number_of_rx_vectors; index++) { 715 int vector = index + 1 + used_tx_channels; 716 u32 int_bit = INT_BIT_DMA_RX_(index); 717 718 /* map RX interrupt to vector */ 719 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector); 720 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0); 721 if (flags & 722 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) { 723 int_vec_en_auto_clr |= INT_VEC_EN_(vector); 724 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR, 725 int_vec_en_auto_clr); 726 } 727 728 /* Remove RX interrupt from shared mask */ 729 intr->vector_list[0].int_mask &= ~int_bit; 730 ret = lan743x_intr_register_isr(adapter, vector, flags, 731 int_bit, lan743x_rx_isr, 732 &adapter->rx[index]); 733 if (ret) 734 goto clean_up; 735 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 736 737 lan743x_csr_write(adapter, INT_VEC_EN_SET, 738 INT_VEC_EN_(vector)); 739 } 740 } 741 return 0; 742 743 clean_up: 744 lan743x_intr_close(adapter); 745 return ret; 746 } 747 748 static int lan743x_dp_write(struct lan743x_adapter *adapter, 749 u32 select, u32 addr, u32 length, u32 *buf) 750 { 751 u32 dp_sel; 752 int i; 753 754 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, DP_SEL_DPRDY_, 755 1, 40, 100, 100)) 756 return -EIO; 757 dp_sel = lan743x_csr_read(adapter, DP_SEL); 758 dp_sel &= ~DP_SEL_MASK_; 759 dp_sel |= select; 760 lan743x_csr_write(adapter, DP_SEL, dp_sel); 761 762 for (i = 0; i < length; i++) { 763 lan743x_csr_write(adapter, DP_ADDR, addr + i); 764 lan743x_csr_write(adapter, DP_DATA_0, buf[i]); 765 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_); 766 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, 767 DP_SEL_DPRDY_, 768 1, 40, 100, 100)) 769 return -EIO; 770 } 771 772 return 0; 773 } 774 775 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read) 776 { 777 u32 ret; 778 779 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 780 MAC_MII_ACC_PHY_ADDR_MASK_; 781 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) & 782 MAC_MII_ACC_MIIRINDA_MASK_; 783 784 if (read) 785 ret |= MAC_MII_ACC_MII_READ_; 786 else 787 ret |= MAC_MII_ACC_MII_WRITE_; 788 ret |= MAC_MII_ACC_MII_BUSY_; 789 790 return ret; 791 } 792 793 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter) 794 { 795 u32 data; 796 797 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data, 798 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000); 799 } 800 801 static int lan743x_mdiobus_read_c22(struct mii_bus *bus, int phy_id, int index) 802 { 803 struct lan743x_adapter *adapter = bus->priv; 804 u32 val, mii_access; 805 int ret; 806 807 /* confirm MII not busy */ 808 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 809 if (ret < 0) 810 return ret; 811 812 /* set the address, index & direction (read from PHY) */ 813 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ); 814 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 815 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 816 if (ret < 0) 817 return ret; 818 819 val = lan743x_csr_read(adapter, MAC_MII_DATA); 820 return (int)(val & 0xFFFF); 821 } 822 823 static int lan743x_mdiobus_write_c22(struct mii_bus *bus, 824 int phy_id, int index, u16 regval) 825 { 826 struct lan743x_adapter *adapter = bus->priv; 827 u32 val, mii_access; 828 int ret; 829 830 /* confirm MII not busy */ 831 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 832 if (ret < 0) 833 return ret; 834 val = (u32)regval; 835 lan743x_csr_write(adapter, MAC_MII_DATA, val); 836 837 /* set the address, index & direction (write to PHY) */ 838 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 839 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 840 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 841 return ret; 842 } 843 844 static u32 lan743x_mac_mmd_access(int id, int dev_addr, int op) 845 { 846 u32 ret; 847 848 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 849 MAC_MII_ACC_PHY_ADDR_MASK_; 850 ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) & 851 MAC_MII_ACC_MIIMMD_MASK_; 852 if (op == MMD_ACCESS_WRITE) 853 ret |= MAC_MII_ACC_MIICMD_WRITE_; 854 else if (op == MMD_ACCESS_READ) 855 ret |= MAC_MII_ACC_MIICMD_READ_; 856 else if (op == MMD_ACCESS_READ_INC) 857 ret |= MAC_MII_ACC_MIICMD_READ_INC_; 858 else 859 ret |= MAC_MII_ACC_MIICMD_ADDR_; 860 ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_); 861 862 return ret; 863 } 864 865 static int lan743x_mdiobus_read_c45(struct mii_bus *bus, int phy_id, 866 int dev_addr, int index) 867 { 868 struct lan743x_adapter *adapter = bus->priv; 869 u32 mmd_access; 870 int ret; 871 872 /* confirm MII not busy */ 873 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 874 if (ret < 0) 875 return ret; 876 877 /* Load Register Address */ 878 lan743x_csr_write(adapter, MAC_MII_DATA, index); 879 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 880 MMD_ACCESS_ADDRESS); 881 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 882 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 883 if (ret < 0) 884 return ret; 885 886 /* Read Data */ 887 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 888 MMD_ACCESS_READ); 889 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 890 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 891 if (ret < 0) 892 return ret; 893 894 ret = lan743x_csr_read(adapter, MAC_MII_DATA); 895 return (int)(ret & 0xFFFF); 896 } 897 898 static int lan743x_mdiobus_write_c45(struct mii_bus *bus, int phy_id, 899 int dev_addr, int index, u16 regval) 900 { 901 struct lan743x_adapter *adapter = bus->priv; 902 u32 mmd_access; 903 int ret; 904 905 /* confirm MII not busy */ 906 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 907 if (ret < 0) 908 return ret; 909 910 /* Load Register Address */ 911 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)index); 912 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 913 MMD_ACCESS_ADDRESS); 914 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 915 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 916 if (ret < 0) 917 return ret; 918 919 /* Write Data */ 920 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval); 921 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 922 MMD_ACCESS_WRITE); 923 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 924 925 return lan743x_mac_mii_wait_till_not_busy(adapter); 926 } 927 928 static int lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter *adapter) 929 { 930 u32 data; 931 int ret; 932 933 ret = readx_poll_timeout(LAN743X_CSR_READ_OP, SGMII_ACC, data, 934 !(data & SGMII_ACC_SGMII_BZY_), 100, 1000000); 935 if (ret < 0) 936 netif_err(adapter, drv, adapter->netdev, 937 "%s: error %d sgmii wait timeout\n", __func__, ret); 938 939 return ret; 940 } 941 942 int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr) 943 { 944 u32 mmd_access; 945 int ret; 946 u32 val; 947 948 if (mmd > 31) { 949 netif_err(adapter, probe, adapter->netdev, 950 "%s mmd should <= 31\n", __func__); 951 return -EINVAL; 952 } 953 954 mutex_lock(&adapter->sgmii_rw_lock); 955 /* Load Register Address */ 956 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_; 957 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_); 958 lan743x_csr_write(adapter, SGMII_ACC, mmd_access); 959 ret = lan743x_sgmii_wait_till_not_busy(adapter); 960 if (ret < 0) 961 goto sgmii_unlock; 962 963 val = lan743x_csr_read(adapter, SGMII_DATA); 964 ret = (int)(val & SGMII_DATA_MASK_); 965 966 sgmii_unlock: 967 mutex_unlock(&adapter->sgmii_rw_lock); 968 969 return ret; 970 } 971 972 static int lan743x_sgmii_write(struct lan743x_adapter *adapter, 973 u8 mmd, u16 addr, u16 val) 974 { 975 u32 mmd_access; 976 int ret; 977 978 if (mmd > 31) { 979 netif_err(adapter, probe, adapter->netdev, 980 "%s mmd should <= 31\n", __func__); 981 return -EINVAL; 982 } 983 mutex_lock(&adapter->sgmii_rw_lock); 984 /* Load Register Data */ 985 lan743x_csr_write(adapter, SGMII_DATA, (u32)(val & SGMII_DATA_MASK_)); 986 /* Load Register Address */ 987 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_; 988 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_ | SGMII_ACC_SGMII_WR_); 989 lan743x_csr_write(adapter, SGMII_ACC, mmd_access); 990 ret = lan743x_sgmii_wait_till_not_busy(adapter); 991 mutex_unlock(&adapter->sgmii_rw_lock); 992 993 return ret; 994 } 995 996 static int lan743x_get_lsd(int speed, int duplex, u8 mss) 997 { 998 int lsd; 999 1000 switch (speed) { 1001 case SPEED_2500: 1002 if (mss == MASTER_SLAVE_STATE_SLAVE) 1003 lsd = LINK_2500_SLAVE; 1004 else 1005 lsd = LINK_2500_MASTER; 1006 break; 1007 case SPEED_1000: 1008 if (mss == MASTER_SLAVE_STATE_SLAVE) 1009 lsd = LINK_1000_SLAVE; 1010 else 1011 lsd = LINK_1000_MASTER; 1012 break; 1013 case SPEED_100: 1014 if (duplex == DUPLEX_FULL) 1015 lsd = LINK_100FD; 1016 else 1017 lsd = LINK_100HD; 1018 break; 1019 case SPEED_10: 1020 if (duplex == DUPLEX_FULL) 1021 lsd = LINK_10FD; 1022 else 1023 lsd = LINK_10HD; 1024 break; 1025 default: 1026 lsd = -EINVAL; 1027 } 1028 1029 return lsd; 1030 } 1031 1032 static int lan743x_sgmii_mpll_set(struct lan743x_adapter *adapter, 1033 u16 baud) 1034 { 1035 int mpllctrl0; 1036 int mpllctrl1; 1037 int miscctrl1; 1038 int ret; 1039 1040 mpllctrl0 = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1041 VR_MII_GEN2_4_MPLL_CTRL0); 1042 if (mpllctrl0 < 0) 1043 return mpllctrl0; 1044 1045 mpllctrl0 &= ~VR_MII_MPLL_CTRL0_USE_REFCLK_PAD_; 1046 if (baud == VR_MII_BAUD_RATE_1P25GBPS) { 1047 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_100; 1048 /* mpll_baud_clk/4 */ 1049 miscctrl1 = 0xA; 1050 } else { 1051 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_125; 1052 /* mpll_baud_clk/2 */ 1053 miscctrl1 = 0x5; 1054 } 1055 1056 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1057 VR_MII_GEN2_4_MPLL_CTRL0, mpllctrl0); 1058 if (ret < 0) 1059 return ret; 1060 1061 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1062 VR_MII_GEN2_4_MPLL_CTRL1, mpllctrl1); 1063 if (ret < 0) 1064 return ret; 1065 1066 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1067 VR_MII_GEN2_4_MISC_CTRL1, miscctrl1); 1068 } 1069 1070 static int lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter *adapter, 1071 bool enable) 1072 { 1073 if (enable) 1074 return lan743x_sgmii_mpll_set(adapter, 1075 VR_MII_BAUD_RATE_3P125GBPS); 1076 else 1077 return lan743x_sgmii_mpll_set(adapter, 1078 VR_MII_BAUD_RATE_1P25GBPS); 1079 } 1080 1081 static int lan743x_serdes_clock_and_aneg_update(struct lan743x_adapter *adapter) 1082 { 1083 enum lan743x_sgmii_lsd lsd = adapter->sgmii_lsd; 1084 int mii_ctrl; 1085 int dgt_ctrl; 1086 int an_ctrl; 1087 int ret; 1088 1089 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) 1090 /* Switch to 2.5 Gbps */ 1091 ret = lan743x_sgmii_2_5G_mode_set(adapter, true); 1092 else 1093 /* Switch to 10/100/1000 Mbps clock */ 1094 ret = lan743x_sgmii_2_5G_mode_set(adapter, false); 1095 if (ret < 0) 1096 return ret; 1097 1098 /* Enable SGMII Auto NEG */ 1099 mii_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR); 1100 if (mii_ctrl < 0) 1101 return mii_ctrl; 1102 1103 an_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, VR_MII_AN_CTRL); 1104 if (an_ctrl < 0) 1105 return an_ctrl; 1106 1107 dgt_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1108 VR_MII_DIG_CTRL1); 1109 if (dgt_ctrl < 0) 1110 return dgt_ctrl; 1111 1112 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) { 1113 mii_ctrl &= ~(BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100); 1114 mii_ctrl |= BMCR_SPEED1000; 1115 dgt_ctrl |= VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_; 1116 dgt_ctrl &= ~VR_MII_DIG_CTRL1_MAC_AUTO_SW_; 1117 /* In order for Auto-Negotiation to operate properly at 1118 * 2.5 Gbps the 1.6ms link timer values must be adjusted 1119 * The VR_MII_LINK_TIMER_CTRL Register must be set to 1120 * 16'h7A1 and The CL37_TMR_OVR_RIDE bit of the 1121 * VR_MII_DIG_CTRL1 Register set to 1 1122 */ 1123 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1124 VR_MII_LINK_TIMER_CTRL, 0x7A1); 1125 if (ret < 0) 1126 return ret; 1127 } else { 1128 mii_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART); 1129 an_ctrl &= ~VR_MII_AN_CTRL_SGMII_LINK_STS_; 1130 dgt_ctrl &= ~VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_; 1131 dgt_ctrl |= VR_MII_DIG_CTRL1_MAC_AUTO_SW_; 1132 } 1133 1134 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, 1135 mii_ctrl); 1136 if (ret < 0) 1137 return ret; 1138 1139 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1140 VR_MII_DIG_CTRL1, dgt_ctrl); 1141 if (ret < 0) 1142 return ret; 1143 1144 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1145 VR_MII_AN_CTRL, an_ctrl); 1146 } 1147 1148 static int lan743x_pcs_seq_state(struct lan743x_adapter *adapter, u8 state) 1149 { 1150 u8 wait_cnt = 0; 1151 u32 dig_sts; 1152 1153 do { 1154 dig_sts = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1155 VR_MII_DIG_STS); 1156 if (((dig_sts & VR_MII_DIG_STS_PSEQ_STATE_MASK_) >> 1157 VR_MII_DIG_STS_PSEQ_STATE_POS_) == state) 1158 break; 1159 usleep_range(1000, 2000); 1160 } while (wait_cnt++ < 10); 1161 1162 if (wait_cnt >= 10) 1163 return -ETIMEDOUT; 1164 1165 return 0; 1166 } 1167 1168 static int lan743x_pcs_power_reset(struct lan743x_adapter *adapter) 1169 { 1170 int mii_ctl; 1171 int ret; 1172 1173 /* SGMII/1000/2500BASE-X PCS power down */ 1174 mii_ctl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR); 1175 if (mii_ctl < 0) 1176 return mii_ctl; 1177 1178 mii_ctl |= BMCR_PDOWN; 1179 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl); 1180 if (ret < 0) 1181 return ret; 1182 1183 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_DOWN); 1184 if (ret < 0) 1185 return ret; 1186 1187 /* SGMII/1000/2500BASE-X PCS power up */ 1188 mii_ctl &= ~BMCR_PDOWN; 1189 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl); 1190 if (ret < 0) 1191 return ret; 1192 1193 return lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_UP); 1194 } 1195 1196 static void lan743x_mac_set_address(struct lan743x_adapter *adapter, 1197 u8 *addr) 1198 { 1199 u32 addr_lo, addr_hi; 1200 1201 addr_lo = addr[0] | 1202 addr[1] << 8 | 1203 addr[2] << 16 | 1204 addr[3] << 24; 1205 addr_hi = addr[4] | 1206 addr[5] << 8; 1207 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo); 1208 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi); 1209 1210 ether_addr_copy(adapter->mac_address, addr); 1211 netif_info(adapter, drv, adapter->netdev, 1212 "MAC address set to %pM\n", addr); 1213 } 1214 1215 static int lan743x_mac_init(struct lan743x_adapter *adapter) 1216 { 1217 bool mac_address_valid = true; 1218 struct net_device *netdev; 1219 u32 mac_addr_hi = 0; 1220 u32 mac_addr_lo = 0; 1221 u32 data; 1222 1223 netdev = adapter->netdev; 1224 1225 /* disable auto duplex, and speed detection. Phylib does that */ 1226 data = lan743x_csr_read(adapter, MAC_CR); 1227 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_); 1228 data |= MAC_CR_CNTR_RST_; 1229 lan743x_csr_write(adapter, MAC_CR, data); 1230 1231 if (!is_valid_ether_addr(adapter->mac_address)) { 1232 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH); 1233 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL); 1234 adapter->mac_address[0] = mac_addr_lo & 0xFF; 1235 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF; 1236 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF; 1237 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF; 1238 adapter->mac_address[4] = mac_addr_hi & 0xFF; 1239 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF; 1240 1241 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) && 1242 mac_addr_lo == 0xFFFFFFFF) { 1243 mac_address_valid = false; 1244 } else if (!is_valid_ether_addr(adapter->mac_address)) { 1245 mac_address_valid = false; 1246 } 1247 1248 if (!mac_address_valid) 1249 eth_random_addr(adapter->mac_address); 1250 } 1251 lan743x_mac_set_address(adapter, adapter->mac_address); 1252 eth_hw_addr_set(netdev, adapter->mac_address); 1253 1254 return 0; 1255 } 1256 1257 static int lan743x_mac_open(struct lan743x_adapter *adapter) 1258 { 1259 u32 temp; 1260 1261 temp = lan743x_csr_read(adapter, MAC_RX); 1262 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_); 1263 temp = lan743x_csr_read(adapter, MAC_TX); 1264 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_); 1265 return 0; 1266 } 1267 1268 static void lan743x_mac_close(struct lan743x_adapter *adapter) 1269 { 1270 u32 temp; 1271 1272 temp = lan743x_csr_read(adapter, MAC_TX); 1273 temp &= ~MAC_TX_TXEN_; 1274 lan743x_csr_write(adapter, MAC_TX, temp); 1275 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_, 1276 1, 1000, 20000, 100); 1277 1278 temp = lan743x_csr_read(adapter, MAC_RX); 1279 temp &= ~MAC_RX_RXEN_; 1280 lan743x_csr_write(adapter, MAC_RX, temp); 1281 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1282 1, 1000, 20000, 100); 1283 } 1284 1285 void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, 1286 bool tx_enable, bool rx_enable) 1287 { 1288 u32 flow_setting = 0; 1289 1290 /* set maximum pause time because when fifo space frees 1291 * up a zero value pause frame will be sent to release the pause 1292 */ 1293 flow_setting = MAC_FLOW_CR_FCPT_MASK_; 1294 if (tx_enable) 1295 flow_setting |= MAC_FLOW_CR_TX_FCEN_; 1296 if (rx_enable) 1297 flow_setting |= MAC_FLOW_CR_RX_FCEN_; 1298 lan743x_csr_write(adapter, MAC_FLOW, flow_setting); 1299 } 1300 1301 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu) 1302 { 1303 int enabled = 0; 1304 u32 mac_rx = 0; 1305 1306 mac_rx = lan743x_csr_read(adapter, MAC_RX); 1307 if (mac_rx & MAC_RX_RXEN_) { 1308 enabled = 1; 1309 if (mac_rx & MAC_RX_RXD_) { 1310 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1311 mac_rx &= ~MAC_RX_RXD_; 1312 } 1313 mac_rx &= ~MAC_RX_RXEN_; 1314 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1315 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1316 1, 1000, 20000, 100); 1317 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_); 1318 } 1319 1320 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_); 1321 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN) 1322 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 1323 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1324 1325 if (enabled) { 1326 mac_rx |= MAC_RX_RXEN_; 1327 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1328 } 1329 return 0; 1330 } 1331 1332 /* PHY */ 1333 static int lan743x_phy_reset(struct lan743x_adapter *adapter) 1334 { 1335 u32 data; 1336 1337 /* Only called with in probe, and before mdiobus_register */ 1338 1339 data = lan743x_csr_read(adapter, PMT_CTL); 1340 data |= PMT_CTL_ETH_PHY_RST_; 1341 lan743x_csr_write(adapter, PMT_CTL, data); 1342 1343 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data, 1344 (!(data & PMT_CTL_ETH_PHY_RST_) && 1345 (data & PMT_CTL_READY_)), 1346 50000, 1000000); 1347 } 1348 1349 static int lan743x_phy_init(struct lan743x_adapter *adapter) 1350 { 1351 return lan743x_phy_reset(adapter); 1352 } 1353 1354 static void lan743x_phy_interface_select(struct lan743x_adapter *adapter) 1355 { 1356 u32 id_rev; 1357 u32 data; 1358 1359 data = lan743x_csr_read(adapter, MAC_CR); 1360 id_rev = adapter->csr.id_rev & ID_REV_ID_MASK_; 1361 1362 if (adapter->is_pci11x1x && adapter->is_sgmii_en) 1363 adapter->phy_interface = PHY_INTERFACE_MODE_SGMII; 1364 else if (id_rev == ID_REV_ID_LAN7430_) 1365 adapter->phy_interface = PHY_INTERFACE_MODE_GMII; 1366 else if ((id_rev == ID_REV_ID_LAN7431_) && (data & MAC_CR_MII_EN_)) 1367 adapter->phy_interface = PHY_INTERFACE_MODE_MII; 1368 else 1369 adapter->phy_interface = PHY_INTERFACE_MODE_RGMII; 1370 1371 netif_dbg(adapter, drv, adapter->netdev, 1372 "selected phy interface: 0x%X\n", adapter->phy_interface); 1373 } 1374 1375 static void lan743x_rfe_open(struct lan743x_adapter *adapter) 1376 { 1377 lan743x_csr_write(adapter, RFE_RSS_CFG, 1378 RFE_RSS_CFG_UDP_IPV6_EX_ | 1379 RFE_RSS_CFG_TCP_IPV6_EX_ | 1380 RFE_RSS_CFG_IPV6_EX_ | 1381 RFE_RSS_CFG_UDP_IPV6_ | 1382 RFE_RSS_CFG_TCP_IPV6_ | 1383 RFE_RSS_CFG_IPV6_ | 1384 RFE_RSS_CFG_UDP_IPV4_ | 1385 RFE_RSS_CFG_TCP_IPV4_ | 1386 RFE_RSS_CFG_IPV4_ | 1387 RFE_RSS_CFG_VALID_HASH_BITS_ | 1388 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ | 1389 RFE_RSS_CFG_RSS_HASH_STORE_ | 1390 RFE_RSS_CFG_RSS_ENABLE_); 1391 } 1392 1393 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter) 1394 { 1395 u8 *mac_addr; 1396 u32 mac_addr_hi = 0; 1397 u32 mac_addr_lo = 0; 1398 1399 /* Add mac address to perfect Filter */ 1400 mac_addr = adapter->mac_address; 1401 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) | 1402 (((u32)(mac_addr[1])) << 8) | 1403 (((u32)(mac_addr[2])) << 16) | 1404 (((u32)(mac_addr[3])) << 24)); 1405 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) | 1406 (((u32)(mac_addr[5])) << 8)); 1407 1408 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo); 1409 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0), 1410 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_); 1411 } 1412 1413 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter) 1414 { 1415 struct net_device *netdev = adapter->netdev; 1416 u32 hash_table[DP_SEL_VHF_HASH_LEN]; 1417 u32 rfctl; 1418 u32 data; 1419 1420 rfctl = lan743x_csr_read(adapter, RFE_CTL); 1421 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ | 1422 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1423 rfctl |= RFE_CTL_AB_; 1424 if (netdev->flags & IFF_PROMISC) { 1425 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_; 1426 } else { 1427 if (netdev->flags & IFF_ALLMULTI) 1428 rfctl |= RFE_CTL_AM_; 1429 } 1430 1431 if (netdev->features & NETIF_F_RXCSUM) 1432 rfctl |= RFE_CTL_IP_COE_ | RFE_CTL_TCP_UDP_COE_; 1433 1434 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32)); 1435 if (netdev_mc_count(netdev)) { 1436 struct netdev_hw_addr *ha; 1437 int i; 1438 1439 rfctl |= RFE_CTL_DA_PERFECT_; 1440 i = 1; 1441 netdev_for_each_mc_addr(ha, netdev) { 1442 /* set first 32 into Perfect Filter */ 1443 if (i < 33) { 1444 lan743x_csr_write(adapter, 1445 RFE_ADDR_FILT_HI(i), 0); 1446 data = ha->addr[3]; 1447 data = ha->addr[2] | (data << 8); 1448 data = ha->addr[1] | (data << 8); 1449 data = ha->addr[0] | (data << 8); 1450 lan743x_csr_write(adapter, 1451 RFE_ADDR_FILT_LO(i), data); 1452 data = ha->addr[5]; 1453 data = ha->addr[4] | (data << 8); 1454 data |= RFE_ADDR_FILT_HI_VALID_; 1455 lan743x_csr_write(adapter, 1456 RFE_ADDR_FILT_HI(i), data); 1457 } else { 1458 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >> 1459 23) & 0x1FF; 1460 hash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1461 rfctl |= RFE_CTL_MCAST_HASH_; 1462 } 1463 i++; 1464 } 1465 } 1466 1467 lan743x_dp_write(adapter, DP_SEL_RFE_RAM, 1468 DP_SEL_VHF_VLAN_LEN, 1469 DP_SEL_VHF_HASH_LEN, hash_table); 1470 lan743x_csr_write(adapter, RFE_CTL, rfctl); 1471 } 1472 1473 static int lan743x_dmac_init(struct lan743x_adapter *adapter) 1474 { 1475 u32 data = 0; 1476 1477 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_); 1478 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_, 1479 0, 1000, 20000, 100); 1480 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) { 1481 case DMA_DESCRIPTOR_SPACING_16: 1482 data = DMAC_CFG_MAX_DSPACE_16_; 1483 break; 1484 case DMA_DESCRIPTOR_SPACING_32: 1485 data = DMAC_CFG_MAX_DSPACE_32_; 1486 break; 1487 case DMA_DESCRIPTOR_SPACING_64: 1488 data = DMAC_CFG_MAX_DSPACE_64_; 1489 break; 1490 case DMA_DESCRIPTOR_SPACING_128: 1491 data = DMAC_CFG_MAX_DSPACE_128_; 1492 break; 1493 default: 1494 return -EPERM; 1495 } 1496 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1497 data |= DMAC_CFG_COAL_EN_; 1498 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_; 1499 data |= DMAC_CFG_MAX_READ_REQ_SET_(6); 1500 lan743x_csr_write(adapter, DMAC_CFG, data); 1501 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1); 1502 data |= DMAC_COAL_CFG_TIMER_TX_START_; 1503 data |= DMAC_COAL_CFG_FLUSH_INTS_; 1504 data |= DMAC_COAL_CFG_INT_EXIT_COAL_; 1505 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_; 1506 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A); 1507 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C); 1508 lan743x_csr_write(adapter, DMAC_COAL_CFG, data); 1509 data = DMAC_OBFF_TX_THRES_SET_(0x08); 1510 data |= DMAC_OBFF_RX_THRES_SET_(0x0A); 1511 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data); 1512 return 0; 1513 } 1514 1515 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter, 1516 int tx_channel) 1517 { 1518 u32 dmac_cmd = 0; 1519 1520 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1521 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1522 DMAC_CMD_START_T_(tx_channel)), 1523 (dmac_cmd & 1524 DMAC_CMD_STOP_T_(tx_channel))); 1525 } 1526 1527 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter, 1528 int tx_channel) 1529 { 1530 int timeout = 100; 1531 int result = 0; 1532 1533 while (timeout && 1534 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) == 1535 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1536 usleep_range(1000, 20000); 1537 timeout--; 1538 } 1539 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1540 result = -ENODEV; 1541 return result; 1542 } 1543 1544 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter, 1545 int rx_channel) 1546 { 1547 u32 dmac_cmd = 0; 1548 1549 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1550 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1551 DMAC_CMD_START_R_(rx_channel)), 1552 (dmac_cmd & 1553 DMAC_CMD_STOP_R_(rx_channel))); 1554 } 1555 1556 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter, 1557 int rx_channel) 1558 { 1559 int timeout = 100; 1560 int result = 0; 1561 1562 while (timeout && 1563 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) == 1564 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1565 usleep_range(1000, 20000); 1566 timeout--; 1567 } 1568 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1569 result = -ENODEV; 1570 return result; 1571 } 1572 1573 static void lan743x_tx_release_desc(struct lan743x_tx *tx, 1574 int descriptor_index, bool cleanup) 1575 { 1576 struct lan743x_tx_buffer_info *buffer_info = NULL; 1577 struct lan743x_tx_descriptor *descriptor = NULL; 1578 u32 descriptor_type = 0; 1579 bool ignore_sync; 1580 1581 descriptor = &tx->ring_cpu_ptr[descriptor_index]; 1582 buffer_info = &tx->buffer_info[descriptor_index]; 1583 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE)) 1584 goto done; 1585 1586 descriptor_type = le32_to_cpu(descriptor->data0) & 1587 TX_DESC_DATA0_DTYPE_MASK_; 1588 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_) 1589 goto clean_up_data_descriptor; 1590 else 1591 goto clear_active; 1592 1593 clean_up_data_descriptor: 1594 if (buffer_info->dma_ptr) { 1595 if (buffer_info->flags & 1596 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) { 1597 dma_unmap_page(&tx->adapter->pdev->dev, 1598 buffer_info->dma_ptr, 1599 buffer_info->buffer_length, 1600 DMA_TO_DEVICE); 1601 } else { 1602 dma_unmap_single(&tx->adapter->pdev->dev, 1603 buffer_info->dma_ptr, 1604 buffer_info->buffer_length, 1605 DMA_TO_DEVICE); 1606 } 1607 buffer_info->dma_ptr = 0; 1608 buffer_info->buffer_length = 0; 1609 } 1610 if (!buffer_info->skb) 1611 goto clear_active; 1612 1613 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1614 dev_kfree_skb_any(buffer_info->skb); 1615 goto clear_skb; 1616 } 1617 1618 if (cleanup) { 1619 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1620 dev_kfree_skb_any(buffer_info->skb); 1621 } else { 1622 ignore_sync = (buffer_info->flags & 1623 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; 1624 lan743x_ptp_tx_timestamp_skb(tx->adapter, 1625 buffer_info->skb, ignore_sync); 1626 } 1627 1628 clear_skb: 1629 buffer_info->skb = NULL; 1630 1631 clear_active: 1632 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE; 1633 1634 done: 1635 memset(buffer_info, 0, sizeof(*buffer_info)); 1636 memset(descriptor, 0, sizeof(*descriptor)); 1637 } 1638 1639 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index) 1640 { 1641 return ((++index) % tx->ring_size); 1642 } 1643 1644 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx) 1645 { 1646 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) { 1647 lan743x_tx_release_desc(tx, tx->last_head, false); 1648 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1649 } 1650 } 1651 1652 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx) 1653 { 1654 u32 original_head = 0; 1655 1656 original_head = tx->last_head; 1657 do { 1658 lan743x_tx_release_desc(tx, tx->last_head, true); 1659 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1660 } while (tx->last_head != original_head); 1661 memset(tx->ring_cpu_ptr, 0, 1662 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size)); 1663 memset(tx->buffer_info, 0, 1664 sizeof(*tx->buffer_info) * (tx->ring_size)); 1665 } 1666 1667 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx, 1668 struct sk_buff *skb) 1669 { 1670 int result = 1; /* 1 for the main skb buffer */ 1671 int nr_frags = 0; 1672 1673 if (skb_is_gso(skb)) 1674 result++; /* requires an extension descriptor */ 1675 nr_frags = skb_shinfo(skb)->nr_frags; 1676 result += nr_frags; /* 1 for each fragment buffer */ 1677 return result; 1678 } 1679 1680 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx) 1681 { 1682 int last_head = tx->last_head; 1683 int last_tail = tx->last_tail; 1684 1685 if (last_tail >= last_head) 1686 return tx->ring_size - last_tail + last_head - 1; 1687 else 1688 return last_head - last_tail - 1; 1689 } 1690 1691 static void lan743x_rx_cfg_b_tstamp_config(struct lan743x_adapter *adapter, 1692 int rx_ts_config) 1693 { 1694 int channel_number; 1695 int index; 1696 u32 data; 1697 1698 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 1699 channel_number = adapter->rx[index].channel_number; 1700 data = lan743x_csr_read(adapter, RX_CFG_B(channel_number)); 1701 data &= RX_CFG_B_TS_MASK_; 1702 data |= rx_ts_config; 1703 lan743x_csr_write(adapter, RX_CFG_B(channel_number), 1704 data); 1705 } 1706 } 1707 1708 int lan743x_rx_set_tstamp_mode(struct lan743x_adapter *adapter, 1709 int rx_filter) 1710 { 1711 u32 data; 1712 1713 switch (rx_filter) { 1714 case HWTSTAMP_FILTER_PTP_V2_EVENT: 1715 lan743x_rx_cfg_b_tstamp_config(adapter, 1716 RX_CFG_B_TS_DESCR_EN_); 1717 data = lan743x_csr_read(adapter, PTP_RX_TS_CFG); 1718 data |= PTP_RX_TS_CFG_EVENT_MSGS_; 1719 lan743x_csr_write(adapter, PTP_RX_TS_CFG, data); 1720 break; 1721 case HWTSTAMP_FILTER_NONE: 1722 lan743x_rx_cfg_b_tstamp_config(adapter, 1723 RX_CFG_B_TS_NONE_); 1724 break; 1725 case HWTSTAMP_FILTER_ALL: 1726 lan743x_rx_cfg_b_tstamp_config(adapter, 1727 RX_CFG_B_TS_ALL_RX_); 1728 break; 1729 default: 1730 return -ERANGE; 1731 } 1732 adapter->rx_tstamp_filter = rx_filter; 1733 return 0; 1734 } 1735 1736 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx, 1737 bool enable_timestamping, 1738 bool enable_onestep_sync) 1739 { 1740 if (enable_timestamping) 1741 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED; 1742 else 1743 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED; 1744 if (enable_onestep_sync) 1745 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC; 1746 else 1747 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC; 1748 } 1749 1750 static int lan743x_tx_frame_start(struct lan743x_tx *tx, 1751 unsigned char *first_buffer, 1752 unsigned int first_buffer_length, 1753 unsigned int frame_length, 1754 bool time_stamp, 1755 bool check_sum) 1756 { 1757 /* called only from within lan743x_tx_xmit_frame. 1758 * assuming tx->ring_lock has already been acquired. 1759 */ 1760 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1761 struct lan743x_tx_buffer_info *buffer_info = NULL; 1762 struct lan743x_adapter *adapter = tx->adapter; 1763 struct device *dev = &adapter->pdev->dev; 1764 dma_addr_t dma_ptr; 1765 1766 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS; 1767 tx->frame_first = tx->last_tail; 1768 tx->frame_tail = tx->frame_first; 1769 1770 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1771 buffer_info = &tx->buffer_info[tx->frame_tail]; 1772 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length, 1773 DMA_TO_DEVICE); 1774 if (dma_mapping_error(dev, dma_ptr)) 1775 return -ENOMEM; 1776 1777 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1778 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1779 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1780 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1781 1782 buffer_info->skb = NULL; 1783 buffer_info->dma_ptr = dma_ptr; 1784 buffer_info->buffer_length = first_buffer_length; 1785 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1786 1787 tx->frame_data0 = (first_buffer_length & 1788 TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1789 TX_DESC_DATA0_DTYPE_DATA_ | 1790 TX_DESC_DATA0_FS_ | 1791 TX_DESC_DATA0_FCS_; 1792 if (time_stamp) 1793 tx->frame_data0 |= TX_DESC_DATA0_TSE_; 1794 1795 if (check_sum) 1796 tx->frame_data0 |= TX_DESC_DATA0_ICE_ | 1797 TX_DESC_DATA0_IPE_ | 1798 TX_DESC_DATA0_TPE_; 1799 1800 /* data0 will be programmed in one of other frame assembler functions */ 1801 return 0; 1802 } 1803 1804 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx, 1805 unsigned int frame_length, 1806 int nr_frags) 1807 { 1808 /* called only from within lan743x_tx_xmit_frame. 1809 * assuming tx->ring_lock has already been acquired. 1810 */ 1811 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1812 struct lan743x_tx_buffer_info *buffer_info = NULL; 1813 1814 /* wrap up previous descriptor */ 1815 tx->frame_data0 |= TX_DESC_DATA0_EXT_; 1816 if (nr_frags <= 0) { 1817 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1818 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1819 tx->frame_last = tx->frame_first; 1820 } 1821 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1822 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1823 1824 /* move to next descriptor */ 1825 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1826 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1827 buffer_info = &tx->buffer_info[tx->frame_tail]; 1828 1829 /* add extension descriptor */ 1830 tx_descriptor->data1 = 0; 1831 tx_descriptor->data2 = 0; 1832 tx_descriptor->data3 = 0; 1833 1834 buffer_info->skb = NULL; 1835 buffer_info->dma_ptr = 0; 1836 buffer_info->buffer_length = 0; 1837 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1838 1839 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) | 1840 TX_DESC_DATA0_DTYPE_EXT_ | 1841 TX_DESC_DATA0_EXT_LSO_; 1842 1843 /* data0 will be programmed in one of other frame assembler functions */ 1844 } 1845 1846 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx, 1847 const skb_frag_t *fragment, 1848 unsigned int frame_length) 1849 { 1850 /* called only from within lan743x_tx_xmit_frame 1851 * assuming tx->ring_lock has already been acquired 1852 */ 1853 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1854 struct lan743x_tx_buffer_info *buffer_info = NULL; 1855 struct lan743x_adapter *adapter = tx->adapter; 1856 struct device *dev = &adapter->pdev->dev; 1857 unsigned int fragment_length = 0; 1858 dma_addr_t dma_ptr; 1859 1860 fragment_length = skb_frag_size(fragment); 1861 if (!fragment_length) 1862 return 0; 1863 1864 /* wrap up previous descriptor */ 1865 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1866 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1867 1868 /* move to next descriptor */ 1869 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1870 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1871 buffer_info = &tx->buffer_info[tx->frame_tail]; 1872 dma_ptr = skb_frag_dma_map(dev, fragment, 1873 0, fragment_length, 1874 DMA_TO_DEVICE); 1875 if (dma_mapping_error(dev, dma_ptr)) { 1876 int desc_index; 1877 1878 /* cleanup all previously setup descriptors */ 1879 desc_index = tx->frame_first; 1880 while (desc_index != tx->frame_tail) { 1881 lan743x_tx_release_desc(tx, desc_index, true); 1882 desc_index = lan743x_tx_next_index(tx, desc_index); 1883 } 1884 dma_wmb(); 1885 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1886 tx->frame_first = 0; 1887 tx->frame_data0 = 0; 1888 tx->frame_tail = 0; 1889 tx->frame_last = 0; 1890 return -ENOMEM; 1891 } 1892 1893 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1894 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1895 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1896 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1897 1898 buffer_info->skb = NULL; 1899 buffer_info->dma_ptr = dma_ptr; 1900 buffer_info->buffer_length = fragment_length; 1901 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1902 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT; 1903 1904 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1905 TX_DESC_DATA0_DTYPE_DATA_ | 1906 TX_DESC_DATA0_FCS_; 1907 1908 /* data0 will be programmed in one of other frame assembler functions */ 1909 return 0; 1910 } 1911 1912 static void lan743x_tx_frame_end(struct lan743x_tx *tx, 1913 struct sk_buff *skb, 1914 bool time_stamp, 1915 bool ignore_sync) 1916 { 1917 /* called only from within lan743x_tx_xmit_frame 1918 * assuming tx->ring_lock has already been acquired 1919 */ 1920 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1921 struct lan743x_tx_buffer_info *buffer_info = NULL; 1922 struct lan743x_adapter *adapter = tx->adapter; 1923 u32 tx_tail_flags = 0; 1924 1925 /* wrap up previous descriptor */ 1926 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) == 1927 TX_DESC_DATA0_DTYPE_DATA_) { 1928 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1929 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1930 tx->frame_last = tx->frame_tail; 1931 } 1932 1933 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_last]; 1934 buffer_info = &tx->buffer_info[tx->frame_last]; 1935 buffer_info->skb = skb; 1936 if (time_stamp) 1937 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED; 1938 if (ignore_sync) 1939 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC; 1940 1941 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1942 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1943 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1944 tx->last_tail = tx->frame_tail; 1945 1946 dma_wmb(); 1947 1948 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 1949 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_; 1950 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) 1951 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ | 1952 TX_TAIL_SET_TOP_INT_EN_; 1953 1954 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1955 tx_tail_flags | tx->frame_tail); 1956 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1957 } 1958 1959 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx, 1960 struct sk_buff *skb) 1961 { 1962 int required_number_of_descriptors = 0; 1963 unsigned int start_frame_length = 0; 1964 netdev_tx_t retval = NETDEV_TX_OK; 1965 unsigned int frame_length = 0; 1966 unsigned int head_length = 0; 1967 unsigned long irq_flags = 0; 1968 bool do_timestamp = false; 1969 bool ignore_sync = false; 1970 struct netdev_queue *txq; 1971 int nr_frags = 0; 1972 bool gso = false; 1973 int j; 1974 1975 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb); 1976 1977 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1978 if (required_number_of_descriptors > 1979 lan743x_tx_get_avail_desc(tx)) { 1980 if (required_number_of_descriptors > (tx->ring_size - 1)) { 1981 dev_kfree_skb_irq(skb); 1982 } else { 1983 /* save how many descriptors we needed to restart the queue */ 1984 tx->rqd_descriptors = required_number_of_descriptors; 1985 retval = NETDEV_TX_BUSY; 1986 txq = netdev_get_tx_queue(tx->adapter->netdev, 1987 tx->channel_number); 1988 netif_tx_stop_queue(txq); 1989 } 1990 goto unlock; 1991 } 1992 1993 /* space available, transmit skb */ 1994 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 1995 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) && 1996 (lan743x_ptp_request_tx_timestamp(tx->adapter))) { 1997 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 1998 do_timestamp = true; 1999 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC) 2000 ignore_sync = true; 2001 } 2002 head_length = skb_headlen(skb); 2003 frame_length = skb_pagelen(skb); 2004 nr_frags = skb_shinfo(skb)->nr_frags; 2005 start_frame_length = frame_length; 2006 gso = skb_is_gso(skb); 2007 if (gso) { 2008 start_frame_length = max(skb_shinfo(skb)->gso_size, 2009 (unsigned short)8); 2010 } 2011 2012 if (lan743x_tx_frame_start(tx, 2013 skb->data, head_length, 2014 start_frame_length, 2015 do_timestamp, 2016 skb->ip_summed == CHECKSUM_PARTIAL)) { 2017 dev_kfree_skb_irq(skb); 2018 goto unlock; 2019 } 2020 tx->frame_count++; 2021 2022 if (gso) 2023 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags); 2024 2025 if (nr_frags <= 0) 2026 goto finish; 2027 2028 for (j = 0; j < nr_frags; j++) { 2029 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]); 2030 2031 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) { 2032 /* upon error no need to call 2033 * lan743x_tx_frame_end 2034 * frame assembler clean up was performed inside 2035 * lan743x_tx_frame_add_fragment 2036 */ 2037 dev_kfree_skb_irq(skb); 2038 goto unlock; 2039 } 2040 } 2041 2042 finish: 2043 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync); 2044 2045 unlock: 2046 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 2047 return retval; 2048 } 2049 2050 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight) 2051 { 2052 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi); 2053 struct lan743x_adapter *adapter = tx->adapter; 2054 unsigned long irq_flags = 0; 2055 struct netdev_queue *txq; 2056 u32 ioc_bit = 0; 2057 2058 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 2059 lan743x_csr_read(adapter, DMAC_INT_STS); 2060 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) 2061 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit); 2062 spin_lock_irqsave(&tx->ring_lock, irq_flags); 2063 2064 /* clean up tx ring */ 2065 lan743x_tx_release_completed_descriptors(tx); 2066 txq = netdev_get_tx_queue(adapter->netdev, tx->channel_number); 2067 if (netif_tx_queue_stopped(txq)) { 2068 if (tx->rqd_descriptors) { 2069 if (tx->rqd_descriptors <= 2070 lan743x_tx_get_avail_desc(tx)) { 2071 tx->rqd_descriptors = 0; 2072 netif_tx_wake_queue(txq); 2073 } 2074 } else { 2075 netif_tx_wake_queue(txq); 2076 } 2077 } 2078 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 2079 2080 if (!napi_complete(napi)) 2081 goto done; 2082 2083 /* enable isr */ 2084 lan743x_csr_write(adapter, INT_EN_SET, 2085 INT_BIT_DMA_TX_(tx->channel_number)); 2086 lan743x_csr_read(adapter, INT_STS); 2087 2088 done: 2089 return 0; 2090 } 2091 2092 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx) 2093 { 2094 if (tx->head_cpu_ptr) { 2095 dma_free_coherent(&tx->adapter->pdev->dev, 2096 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr, 2097 tx->head_dma_ptr); 2098 tx->head_cpu_ptr = NULL; 2099 tx->head_dma_ptr = 0; 2100 } 2101 kfree(tx->buffer_info); 2102 tx->buffer_info = NULL; 2103 2104 if (tx->ring_cpu_ptr) { 2105 dma_free_coherent(&tx->adapter->pdev->dev, 2106 tx->ring_allocation_size, tx->ring_cpu_ptr, 2107 tx->ring_dma_ptr); 2108 tx->ring_allocation_size = 0; 2109 tx->ring_cpu_ptr = NULL; 2110 tx->ring_dma_ptr = 0; 2111 } 2112 tx->ring_size = 0; 2113 } 2114 2115 static int lan743x_tx_ring_init(struct lan743x_tx *tx) 2116 { 2117 size_t ring_allocation_size = 0; 2118 void *cpu_ptr = NULL; 2119 dma_addr_t dma_ptr; 2120 int ret = -ENOMEM; 2121 2122 tx->ring_size = LAN743X_TX_RING_SIZE; 2123 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) { 2124 ret = -EINVAL; 2125 goto cleanup; 2126 } 2127 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev, 2128 DMA_BIT_MASK(64))) { 2129 dev_warn(&tx->adapter->pdev->dev, 2130 "lan743x_: No suitable DMA available\n"); 2131 ret = -ENOMEM; 2132 goto cleanup; 2133 } 2134 ring_allocation_size = ALIGN(tx->ring_size * 2135 sizeof(struct lan743x_tx_descriptor), 2136 PAGE_SIZE); 2137 dma_ptr = 0; 2138 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 2139 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2140 if (!cpu_ptr) { 2141 ret = -ENOMEM; 2142 goto cleanup; 2143 } 2144 2145 tx->ring_allocation_size = ring_allocation_size; 2146 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr; 2147 tx->ring_dma_ptr = dma_ptr; 2148 2149 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL); 2150 if (!cpu_ptr) { 2151 ret = -ENOMEM; 2152 goto cleanup; 2153 } 2154 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr; 2155 dma_ptr = 0; 2156 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 2157 sizeof(*tx->head_cpu_ptr), &dma_ptr, 2158 GFP_KERNEL); 2159 if (!cpu_ptr) { 2160 ret = -ENOMEM; 2161 goto cleanup; 2162 } 2163 2164 tx->head_cpu_ptr = cpu_ptr; 2165 tx->head_dma_ptr = dma_ptr; 2166 if (tx->head_dma_ptr & 0x3) { 2167 ret = -ENOMEM; 2168 goto cleanup; 2169 } 2170 2171 return 0; 2172 2173 cleanup: 2174 lan743x_tx_ring_cleanup(tx); 2175 return ret; 2176 } 2177 2178 static void lan743x_tx_close(struct lan743x_tx *tx) 2179 { 2180 struct lan743x_adapter *adapter = tx->adapter; 2181 2182 lan743x_csr_write(adapter, 2183 DMAC_CMD, 2184 DMAC_CMD_STOP_T_(tx->channel_number)); 2185 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number); 2186 2187 lan743x_csr_write(adapter, 2188 DMAC_INT_EN_CLR, 2189 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2190 lan743x_csr_write(adapter, INT_EN_CLR, 2191 INT_BIT_DMA_TX_(tx->channel_number)); 2192 napi_disable(&tx->napi); 2193 netif_napi_del(&tx->napi); 2194 2195 lan743x_csr_write(adapter, FCT_TX_CTL, 2196 FCT_TX_CTL_DIS_(tx->channel_number)); 2197 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 2198 FCT_TX_CTL_EN_(tx->channel_number), 2199 0, 1000, 20000, 100); 2200 2201 lan743x_tx_release_all_descriptors(tx); 2202 2203 tx->rqd_descriptors = 0; 2204 2205 lan743x_tx_ring_cleanup(tx); 2206 } 2207 2208 static int lan743x_tx_open(struct lan743x_tx *tx) 2209 { 2210 struct lan743x_adapter *adapter = NULL; 2211 u32 data = 0; 2212 int ret; 2213 2214 adapter = tx->adapter; 2215 ret = lan743x_tx_ring_init(tx); 2216 if (ret) 2217 return ret; 2218 2219 /* initialize fifo */ 2220 lan743x_csr_write(adapter, FCT_TX_CTL, 2221 FCT_TX_CTL_RESET_(tx->channel_number)); 2222 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 2223 FCT_TX_CTL_RESET_(tx->channel_number), 2224 0, 1000, 20000, 100); 2225 2226 /* enable fifo */ 2227 lan743x_csr_write(adapter, FCT_TX_CTL, 2228 FCT_TX_CTL_EN_(tx->channel_number)); 2229 2230 /* reset tx channel */ 2231 lan743x_csr_write(adapter, DMAC_CMD, 2232 DMAC_CMD_TX_SWR_(tx->channel_number)); 2233 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2234 DMAC_CMD_TX_SWR_(tx->channel_number), 2235 0, 1000, 20000, 100); 2236 2237 /* Write TX_BASE_ADDR */ 2238 lan743x_csr_write(adapter, 2239 TX_BASE_ADDRH(tx->channel_number), 2240 DMA_ADDR_HIGH32(tx->ring_dma_ptr)); 2241 lan743x_csr_write(adapter, 2242 TX_BASE_ADDRL(tx->channel_number), 2243 DMA_ADDR_LOW32(tx->ring_dma_ptr)); 2244 2245 /* Write TX_CFG_B */ 2246 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number)); 2247 data &= ~TX_CFG_B_TX_RING_LEN_MASK_; 2248 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_); 2249 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2250 data |= TX_CFG_B_TDMABL_512_; 2251 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data); 2252 2253 /* Write TX_CFG_A */ 2254 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_; 2255 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2256 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_; 2257 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10); 2258 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04); 2259 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07); 2260 } 2261 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data); 2262 2263 /* Write TX_HEAD_WRITEBACK_ADDR */ 2264 lan743x_csr_write(adapter, 2265 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number), 2266 DMA_ADDR_HIGH32(tx->head_dma_ptr)); 2267 lan743x_csr_write(adapter, 2268 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number), 2269 DMA_ADDR_LOW32(tx->head_dma_ptr)); 2270 2271 /* set last head */ 2272 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number)); 2273 2274 /* write TX_TAIL */ 2275 tx->last_tail = 0; 2276 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 2277 (u32)(tx->last_tail)); 2278 tx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2279 INT_BIT_DMA_TX_ 2280 (tx->channel_number)); 2281 netif_napi_add_tx_weight(adapter->netdev, 2282 &tx->napi, lan743x_tx_napi_poll, 2283 NAPI_POLL_WEIGHT); 2284 napi_enable(&tx->napi); 2285 2286 data = 0; 2287 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2288 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_; 2289 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2290 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_; 2291 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2292 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_; 2293 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2294 data |= TX_CFG_C_TX_INT_EN_R2C_; 2295 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data); 2296 2297 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)) 2298 lan743x_csr_write(adapter, INT_EN_SET, 2299 INT_BIT_DMA_TX_(tx->channel_number)); 2300 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2301 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2302 2303 /* start dmac channel */ 2304 lan743x_csr_write(adapter, DMAC_CMD, 2305 DMAC_CMD_START_T_(tx->channel_number)); 2306 return 0; 2307 } 2308 2309 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index) 2310 { 2311 return ((++index) % rx->ring_size); 2312 } 2313 2314 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index) 2315 { 2316 /* update the tail once per 8 descriptors */ 2317 if ((index & 7) == 7) 2318 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number), 2319 index); 2320 } 2321 2322 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index, 2323 gfp_t gfp) 2324 { 2325 struct net_device *netdev = rx->adapter->netdev; 2326 struct device *dev = &rx->adapter->pdev->dev; 2327 struct lan743x_rx_buffer_info *buffer_info; 2328 unsigned int buffer_length, used_length; 2329 struct lan743x_rx_descriptor *descriptor; 2330 struct sk_buff *skb; 2331 dma_addr_t dma_ptr; 2332 2333 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING; 2334 2335 descriptor = &rx->ring_cpu_ptr[index]; 2336 buffer_info = &rx->buffer_info[index]; 2337 skb = __netdev_alloc_skb(netdev, buffer_length, gfp); 2338 if (!skb) 2339 return -ENOMEM; 2340 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE); 2341 if (dma_mapping_error(dev, dma_ptr)) { 2342 dev_kfree_skb_any(skb); 2343 return -ENOMEM; 2344 } 2345 if (buffer_info->dma_ptr) { 2346 /* sync used area of buffer only */ 2347 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_) 2348 /* frame length is valid only if LS bit is set. 2349 * it's a safe upper bound for the used area in this 2350 * buffer. 2351 */ 2352 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_ 2353 (le32_to_cpu(descriptor->data0)), 2354 buffer_info->buffer_length); 2355 else 2356 used_length = buffer_info->buffer_length; 2357 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr, 2358 used_length, 2359 DMA_FROM_DEVICE); 2360 dma_unmap_single_attrs(dev, buffer_info->dma_ptr, 2361 buffer_info->buffer_length, 2362 DMA_FROM_DEVICE, 2363 DMA_ATTR_SKIP_CPU_SYNC); 2364 } 2365 2366 buffer_info->skb = skb; 2367 buffer_info->dma_ptr = dma_ptr; 2368 buffer_info->buffer_length = buffer_length; 2369 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2370 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2371 descriptor->data3 = 0; 2372 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2373 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2374 lan743x_rx_update_tail(rx, index); 2375 2376 return 0; 2377 } 2378 2379 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index) 2380 { 2381 struct lan743x_rx_buffer_info *buffer_info; 2382 struct lan743x_rx_descriptor *descriptor; 2383 2384 descriptor = &rx->ring_cpu_ptr[index]; 2385 buffer_info = &rx->buffer_info[index]; 2386 2387 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2388 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2389 descriptor->data3 = 0; 2390 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2391 ((buffer_info->buffer_length) & 2392 RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2393 lan743x_rx_update_tail(rx, index); 2394 } 2395 2396 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index) 2397 { 2398 struct lan743x_rx_buffer_info *buffer_info; 2399 struct lan743x_rx_descriptor *descriptor; 2400 2401 descriptor = &rx->ring_cpu_ptr[index]; 2402 buffer_info = &rx->buffer_info[index]; 2403 2404 memset(descriptor, 0, sizeof(*descriptor)); 2405 2406 if (buffer_info->dma_ptr) { 2407 dma_unmap_single(&rx->adapter->pdev->dev, 2408 buffer_info->dma_ptr, 2409 buffer_info->buffer_length, 2410 DMA_FROM_DEVICE); 2411 buffer_info->dma_ptr = 0; 2412 } 2413 2414 if (buffer_info->skb) { 2415 dev_kfree_skb(buffer_info->skb); 2416 buffer_info->skb = NULL; 2417 } 2418 2419 memset(buffer_info, 0, sizeof(*buffer_info)); 2420 } 2421 2422 static struct sk_buff * 2423 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length) 2424 { 2425 if (skb_linearize(skb)) { 2426 dev_kfree_skb_irq(skb); 2427 return NULL; 2428 } 2429 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN); 2430 if (skb->len > frame_length) { 2431 skb->tail -= skb->len - frame_length; 2432 skb->len = frame_length; 2433 } 2434 return skb; 2435 } 2436 2437 static int lan743x_rx_process_buffer(struct lan743x_rx *rx) 2438 { 2439 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr); 2440 struct lan743x_rx_descriptor *descriptor, *desc_ext; 2441 struct net_device *netdev = rx->adapter->netdev; 2442 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2443 struct lan743x_rx_buffer_info *buffer_info; 2444 int frame_length, buffer_length; 2445 bool is_ice, is_tce, is_icsm; 2446 int extension_index = -1; 2447 bool is_last, is_first; 2448 struct sk_buff *skb; 2449 2450 if (current_head_index < 0 || current_head_index >= rx->ring_size) 2451 goto done; 2452 2453 if (rx->last_head < 0 || rx->last_head >= rx->ring_size) 2454 goto done; 2455 2456 if (rx->last_head == current_head_index) 2457 goto done; 2458 2459 descriptor = &rx->ring_cpu_ptr[rx->last_head]; 2460 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_) 2461 goto done; 2462 buffer_info = &rx->buffer_info[rx->last_head]; 2463 2464 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_; 2465 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_; 2466 2467 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) { 2468 /* extension is expected to follow */ 2469 int index = lan743x_rx_next_index(rx, rx->last_head); 2470 2471 if (index == current_head_index) 2472 /* extension not yet available */ 2473 goto done; 2474 desc_ext = &rx->ring_cpu_ptr[index]; 2475 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_) 2476 /* extension not yet available */ 2477 goto done; 2478 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_)) 2479 goto move_forward; 2480 extension_index = index; 2481 } 2482 2483 /* Only the last buffer in a multi-buffer frame contains the total frame 2484 * length. The chip occasionally sends more buffers than strictly 2485 * required to reach the total frame length. 2486 * Handle this by adding all buffers to the skb in their entirety. 2487 * Once the real frame length is known, trim the skb. 2488 */ 2489 frame_length = 2490 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0)); 2491 buffer_length = buffer_info->buffer_length; 2492 is_ice = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICE_; 2493 is_tce = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_TCE_; 2494 is_icsm = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICSM_; 2495 2496 netdev_dbg(netdev, "%s%schunk: %d/%d", 2497 is_first ? "first " : " ", 2498 is_last ? "last " : " ", 2499 frame_length, buffer_length); 2500 2501 /* save existing skb, allocate new skb and map to dma */ 2502 skb = buffer_info->skb; 2503 if (lan743x_rx_init_ring_element(rx, rx->last_head, GFP_ATOMIC)) { 2504 /* failed to allocate next skb. 2505 * Memory is very low. 2506 * Drop this packet and reuse buffer. 2507 */ 2508 lan743x_rx_reuse_ring_element(rx, rx->last_head); 2509 /* drop packet that was being assembled */ 2510 dev_kfree_skb_irq(rx->skb_head); 2511 rx->skb_head = NULL; 2512 goto process_extension; 2513 } 2514 2515 /* add buffers to skb via skb->frag_list */ 2516 if (is_first) { 2517 skb_reserve(skb, RX_HEAD_PADDING); 2518 skb_put(skb, buffer_length - RX_HEAD_PADDING); 2519 if (rx->skb_head) 2520 dev_kfree_skb_irq(rx->skb_head); 2521 rx->skb_head = skb; 2522 } else if (rx->skb_head) { 2523 skb_put(skb, buffer_length); 2524 if (skb_shinfo(rx->skb_head)->frag_list) 2525 rx->skb_tail->next = skb; 2526 else 2527 skb_shinfo(rx->skb_head)->frag_list = skb; 2528 rx->skb_tail = skb; 2529 rx->skb_head->len += skb->len; 2530 rx->skb_head->data_len += skb->len; 2531 rx->skb_head->truesize += skb->truesize; 2532 } else { 2533 /* packet to assemble has already been dropped because one or 2534 * more of its buffers could not be allocated 2535 */ 2536 netdev_dbg(netdev, "drop buffer intended for dropped packet"); 2537 dev_kfree_skb_irq(skb); 2538 } 2539 2540 process_extension: 2541 if (extension_index >= 0) { 2542 u32 ts_sec; 2543 u32 ts_nsec; 2544 2545 ts_sec = le32_to_cpu(desc_ext->data1); 2546 ts_nsec = (le32_to_cpu(desc_ext->data2) & 2547 RX_DESC_DATA2_TS_NS_MASK_); 2548 if (rx->skb_head) 2549 skb_hwtstamps(rx->skb_head)->hwtstamp = 2550 ktime_set(ts_sec, ts_nsec); 2551 lan743x_rx_reuse_ring_element(rx, extension_index); 2552 rx->last_head = extension_index; 2553 netdev_dbg(netdev, "process extension"); 2554 } 2555 2556 if (is_last && rx->skb_head) 2557 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length); 2558 2559 if (is_last && rx->skb_head) { 2560 rx->skb_head->protocol = eth_type_trans(rx->skb_head, 2561 rx->adapter->netdev); 2562 if (rx->adapter->netdev->features & NETIF_F_RXCSUM) { 2563 if (!is_ice && !is_tce && !is_icsm) 2564 skb->ip_summed = CHECKSUM_UNNECESSARY; 2565 } 2566 netdev_dbg(netdev, "sending %d byte frame to OS", 2567 rx->skb_head->len); 2568 napi_gro_receive(&rx->napi, rx->skb_head); 2569 rx->skb_head = NULL; 2570 } 2571 2572 move_forward: 2573 /* push tail and head forward */ 2574 rx->last_tail = rx->last_head; 2575 rx->last_head = lan743x_rx_next_index(rx, rx->last_head); 2576 result = RX_PROCESS_RESULT_BUFFER_RECEIVED; 2577 done: 2578 return result; 2579 } 2580 2581 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight) 2582 { 2583 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi); 2584 struct lan743x_adapter *adapter = rx->adapter; 2585 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2586 u32 rx_tail_flags = 0; 2587 int count; 2588 2589 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) { 2590 /* clear int status bit before reading packet */ 2591 lan743x_csr_write(adapter, DMAC_INT_STS, 2592 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2593 } 2594 for (count = 0; count < weight; count++) { 2595 result = lan743x_rx_process_buffer(rx); 2596 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO) 2597 break; 2598 } 2599 rx->frame_count += count; 2600 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED) 2601 return weight; 2602 2603 if (!napi_complete_done(napi, count)) 2604 return count; 2605 2606 /* re-arm interrupts, must write to rx tail on some chip variants */ 2607 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2608 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_; 2609 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) { 2610 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_; 2611 } else { 2612 lan743x_csr_write(adapter, INT_EN_SET, 2613 INT_BIT_DMA_RX_(rx->channel_number)); 2614 } 2615 2616 if (rx_tail_flags) 2617 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2618 rx_tail_flags | rx->last_tail); 2619 2620 return count; 2621 } 2622 2623 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx) 2624 { 2625 if (rx->buffer_info && rx->ring_cpu_ptr) { 2626 int index; 2627 2628 for (index = 0; index < rx->ring_size; index++) 2629 lan743x_rx_release_ring_element(rx, index); 2630 } 2631 2632 if (rx->head_cpu_ptr) { 2633 dma_free_coherent(&rx->adapter->pdev->dev, 2634 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr, 2635 rx->head_dma_ptr); 2636 rx->head_cpu_ptr = NULL; 2637 rx->head_dma_ptr = 0; 2638 } 2639 2640 kfree(rx->buffer_info); 2641 rx->buffer_info = NULL; 2642 2643 if (rx->ring_cpu_ptr) { 2644 dma_free_coherent(&rx->adapter->pdev->dev, 2645 rx->ring_allocation_size, rx->ring_cpu_ptr, 2646 rx->ring_dma_ptr); 2647 rx->ring_allocation_size = 0; 2648 rx->ring_cpu_ptr = NULL; 2649 rx->ring_dma_ptr = 0; 2650 } 2651 2652 rx->ring_size = 0; 2653 rx->last_head = 0; 2654 } 2655 2656 static int lan743x_rx_ring_init(struct lan743x_rx *rx) 2657 { 2658 size_t ring_allocation_size = 0; 2659 dma_addr_t dma_ptr = 0; 2660 void *cpu_ptr = NULL; 2661 int ret = -ENOMEM; 2662 int index = 0; 2663 2664 rx->ring_size = LAN743X_RX_RING_SIZE; 2665 if (rx->ring_size <= 1) { 2666 ret = -EINVAL; 2667 goto cleanup; 2668 } 2669 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) { 2670 ret = -EINVAL; 2671 goto cleanup; 2672 } 2673 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev, 2674 DMA_BIT_MASK(64))) { 2675 dev_warn(&rx->adapter->pdev->dev, 2676 "lan743x_: No suitable DMA available\n"); 2677 ret = -ENOMEM; 2678 goto cleanup; 2679 } 2680 ring_allocation_size = ALIGN(rx->ring_size * 2681 sizeof(struct lan743x_rx_descriptor), 2682 PAGE_SIZE); 2683 dma_ptr = 0; 2684 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2685 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2686 if (!cpu_ptr) { 2687 ret = -ENOMEM; 2688 goto cleanup; 2689 } 2690 rx->ring_allocation_size = ring_allocation_size; 2691 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr; 2692 rx->ring_dma_ptr = dma_ptr; 2693 2694 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info), 2695 GFP_KERNEL); 2696 if (!cpu_ptr) { 2697 ret = -ENOMEM; 2698 goto cleanup; 2699 } 2700 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr; 2701 dma_ptr = 0; 2702 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2703 sizeof(*rx->head_cpu_ptr), &dma_ptr, 2704 GFP_KERNEL); 2705 if (!cpu_ptr) { 2706 ret = -ENOMEM; 2707 goto cleanup; 2708 } 2709 2710 rx->head_cpu_ptr = cpu_ptr; 2711 rx->head_dma_ptr = dma_ptr; 2712 if (rx->head_dma_ptr & 0x3) { 2713 ret = -ENOMEM; 2714 goto cleanup; 2715 } 2716 2717 rx->last_head = 0; 2718 for (index = 0; index < rx->ring_size; index++) { 2719 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL); 2720 if (ret) 2721 goto cleanup; 2722 } 2723 return 0; 2724 2725 cleanup: 2726 netif_warn(rx->adapter, ifup, rx->adapter->netdev, 2727 "Error allocating memory for LAN743x\n"); 2728 2729 lan743x_rx_ring_cleanup(rx); 2730 return ret; 2731 } 2732 2733 static void lan743x_rx_close(struct lan743x_rx *rx) 2734 { 2735 struct lan743x_adapter *adapter = rx->adapter; 2736 2737 lan743x_csr_write(adapter, FCT_RX_CTL, 2738 FCT_RX_CTL_DIS_(rx->channel_number)); 2739 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2740 FCT_RX_CTL_EN_(rx->channel_number), 2741 0, 1000, 20000, 100); 2742 2743 lan743x_csr_write(adapter, DMAC_CMD, 2744 DMAC_CMD_STOP_R_(rx->channel_number)); 2745 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number); 2746 2747 lan743x_csr_write(adapter, DMAC_INT_EN_CLR, 2748 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2749 lan743x_csr_write(adapter, INT_EN_CLR, 2750 INT_BIT_DMA_RX_(rx->channel_number)); 2751 napi_disable(&rx->napi); 2752 2753 netif_napi_del(&rx->napi); 2754 2755 lan743x_rx_ring_cleanup(rx); 2756 } 2757 2758 static int lan743x_rx_open(struct lan743x_rx *rx) 2759 { 2760 struct lan743x_adapter *adapter = rx->adapter; 2761 u32 data = 0; 2762 int ret; 2763 2764 rx->frame_count = 0; 2765 ret = lan743x_rx_ring_init(rx); 2766 if (ret) 2767 goto return_error; 2768 2769 netif_napi_add(adapter->netdev, &rx->napi, lan743x_rx_napi_poll); 2770 2771 lan743x_csr_write(adapter, DMAC_CMD, 2772 DMAC_CMD_RX_SWR_(rx->channel_number)); 2773 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2774 DMAC_CMD_RX_SWR_(rx->channel_number), 2775 0, 1000, 20000, 100); 2776 2777 /* set ring base address */ 2778 lan743x_csr_write(adapter, 2779 RX_BASE_ADDRH(rx->channel_number), 2780 DMA_ADDR_HIGH32(rx->ring_dma_ptr)); 2781 lan743x_csr_write(adapter, 2782 RX_BASE_ADDRL(rx->channel_number), 2783 DMA_ADDR_LOW32(rx->ring_dma_ptr)); 2784 2785 /* set rx write back address */ 2786 lan743x_csr_write(adapter, 2787 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number), 2788 DMA_ADDR_HIGH32(rx->head_dma_ptr)); 2789 lan743x_csr_write(adapter, 2790 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number), 2791 DMA_ADDR_LOW32(rx->head_dma_ptr)); 2792 data = RX_CFG_A_RX_HP_WB_EN_; 2793 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2794 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ | 2795 RX_CFG_A_RX_WB_THRES_SET_(0x7) | 2796 RX_CFG_A_RX_PF_THRES_SET_(16) | 2797 RX_CFG_A_RX_PF_PRI_THRES_SET_(4)); 2798 } 2799 2800 /* set RX_CFG_A */ 2801 lan743x_csr_write(adapter, 2802 RX_CFG_A(rx->channel_number), data); 2803 2804 /* set RX_CFG_B */ 2805 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number)); 2806 data &= ~RX_CFG_B_RX_PAD_MASK_; 2807 if (!RX_HEAD_PADDING) 2808 data |= RX_CFG_B_RX_PAD_0_; 2809 else 2810 data |= RX_CFG_B_RX_PAD_2_; 2811 data &= ~RX_CFG_B_RX_RING_LEN_MASK_; 2812 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_); 2813 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2814 data |= RX_CFG_B_RDMABL_512_; 2815 2816 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data); 2817 rx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2818 INT_BIT_DMA_RX_ 2819 (rx->channel_number)); 2820 2821 /* set RX_CFG_C */ 2822 data = 0; 2823 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2824 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_; 2825 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2826 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_; 2827 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2828 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_; 2829 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2830 data |= RX_CFG_C_RX_INT_EN_R2C_; 2831 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data); 2832 2833 rx->last_tail = ((u32)(rx->ring_size - 1)); 2834 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2835 rx->last_tail); 2836 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number)); 2837 if (rx->last_head) { 2838 ret = -EIO; 2839 goto napi_delete; 2840 } 2841 2842 napi_enable(&rx->napi); 2843 2844 lan743x_csr_write(adapter, INT_EN_SET, 2845 INT_BIT_DMA_RX_(rx->channel_number)); 2846 lan743x_csr_write(adapter, DMAC_INT_STS, 2847 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2848 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2849 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2850 lan743x_csr_write(adapter, DMAC_CMD, 2851 DMAC_CMD_START_R_(rx->channel_number)); 2852 2853 /* initialize fifo */ 2854 lan743x_csr_write(adapter, FCT_RX_CTL, 2855 FCT_RX_CTL_RESET_(rx->channel_number)); 2856 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2857 FCT_RX_CTL_RESET_(rx->channel_number), 2858 0, 1000, 20000, 100); 2859 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number), 2860 FCT_FLOW_CTL_REQ_EN_ | 2861 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) | 2862 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA)); 2863 2864 /* enable fifo */ 2865 lan743x_csr_write(adapter, FCT_RX_CTL, 2866 FCT_RX_CTL_EN_(rx->channel_number)); 2867 return 0; 2868 2869 napi_delete: 2870 netif_napi_del(&rx->napi); 2871 lan743x_rx_ring_cleanup(rx); 2872 2873 return_error: 2874 return ret; 2875 } 2876 2877 static int lan743x_phylink_sgmii_config(struct lan743x_adapter *adapter) 2878 { 2879 u32 sgmii_ctl; 2880 int ret; 2881 2882 ret = lan743x_get_lsd(SPEED_1000, DUPLEX_FULL, 2883 MASTER_SLAVE_STATE_MASTER); 2884 if (ret < 0) { 2885 netif_err(adapter, drv, adapter->netdev, 2886 "error %d link-speed-duplex(LSD) invalid\n", ret); 2887 return ret; 2888 } 2889 2890 adapter->sgmii_lsd = ret; 2891 netif_dbg(adapter, drv, adapter->netdev, 2892 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd); 2893 2894 /* LINK_STATUS_SOURCE from the External PHY via SGMII */ 2895 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 2896 sgmii_ctl &= ~SGMII_CTL_LINK_STATUS_SOURCE_; 2897 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 2898 2899 ret = lan743x_serdes_clock_and_aneg_update(adapter); 2900 if (ret < 0) { 2901 netif_err(adapter, drv, adapter->netdev, 2902 "error %d sgmii aneg update failed\n", ret); 2903 return ret; 2904 } 2905 2906 return lan743x_pcs_power_reset(adapter); 2907 } 2908 2909 static int lan743x_phylink_1000basex_config(struct lan743x_adapter *adapter) 2910 { 2911 u32 sgmii_ctl; 2912 int ret; 2913 2914 ret = lan743x_get_lsd(SPEED_1000, DUPLEX_FULL, 2915 MASTER_SLAVE_STATE_MASTER); 2916 if (ret < 0) { 2917 netif_err(adapter, drv, adapter->netdev, 2918 "error %d link-speed-duplex(LSD) invalid\n", ret); 2919 return ret; 2920 } 2921 2922 adapter->sgmii_lsd = ret; 2923 netif_dbg(adapter, drv, adapter->netdev, 2924 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd); 2925 2926 /* LINK_STATUS_SOURCE from 1000BASE-X PCS link status */ 2927 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 2928 sgmii_ctl |= SGMII_CTL_LINK_STATUS_SOURCE_; 2929 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 2930 2931 ret = lan743x_serdes_clock_and_aneg_update(adapter); 2932 if (ret < 0) { 2933 netif_err(adapter, drv, adapter->netdev, 2934 "error %d 1000basex aneg update failed\n", ret); 2935 return ret; 2936 } 2937 2938 return lan743x_pcs_power_reset(adapter); 2939 } 2940 2941 static int lan743x_phylink_2500basex_config(struct lan743x_adapter *adapter) 2942 { 2943 u32 sgmii_ctl; 2944 int ret; 2945 2946 ret = lan743x_get_lsd(SPEED_2500, DUPLEX_FULL, 2947 MASTER_SLAVE_STATE_MASTER); 2948 if (ret < 0) { 2949 netif_err(adapter, drv, adapter->netdev, 2950 "error %d link-speed-duplex(LSD) invalid\n", ret); 2951 return ret; 2952 } 2953 2954 adapter->sgmii_lsd = ret; 2955 netif_dbg(adapter, drv, adapter->netdev, 2956 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd); 2957 2958 /* LINK_STATUS_SOURCE from 2500BASE-X PCS link status */ 2959 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 2960 sgmii_ctl |= SGMII_CTL_LINK_STATUS_SOURCE_; 2961 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 2962 2963 ret = lan743x_serdes_clock_and_aneg_update(adapter); 2964 if (ret < 0) { 2965 netif_err(adapter, drv, adapter->netdev, 2966 "error %d 2500basex aneg update failed\n", ret); 2967 return ret; 2968 } 2969 2970 return lan743x_pcs_power_reset(adapter); 2971 } 2972 2973 static void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable) 2974 { 2975 u32 mac_cr; 2976 2977 mac_cr = lan743x_csr_read(adapter, MAC_CR); 2978 if (enable) 2979 mac_cr |= MAC_CR_EEE_EN_; 2980 else 2981 mac_cr &= ~MAC_CR_EEE_EN_; 2982 lan743x_csr_write(adapter, MAC_CR, mac_cr); 2983 } 2984 2985 static void lan743x_phylink_mac_config(struct phylink_config *config, 2986 unsigned int link_an_mode, 2987 const struct phylink_link_state *state) 2988 { 2989 struct net_device *netdev = to_net_dev(config->dev); 2990 struct lan743x_adapter *adapter = netdev_priv(netdev); 2991 int ret; 2992 2993 switch (state->interface) { 2994 case PHY_INTERFACE_MODE_2500BASEX: 2995 ret = lan743x_phylink_2500basex_config(adapter); 2996 if (ret < 0) 2997 netif_err(adapter, drv, adapter->netdev, 2998 "2500BASEX config failed. Error %d\n", ret); 2999 else 3000 netif_dbg(adapter, drv, adapter->netdev, 3001 "2500BASEX mode selected and configured\n"); 3002 break; 3003 case PHY_INTERFACE_MODE_1000BASEX: 3004 ret = lan743x_phylink_1000basex_config(adapter); 3005 if (ret < 0) 3006 netif_err(adapter, drv, adapter->netdev, 3007 "1000BASEX config failed. Error %d\n", ret); 3008 else 3009 netif_dbg(adapter, drv, adapter->netdev, 3010 "1000BASEX mode selected and configured\n"); 3011 break; 3012 case PHY_INTERFACE_MODE_SGMII: 3013 ret = lan743x_phylink_sgmii_config(adapter); 3014 if (ret < 0) 3015 netif_err(adapter, drv, adapter->netdev, 3016 "SGMII config failed. Error %d\n", ret); 3017 else 3018 netif_dbg(adapter, drv, adapter->netdev, 3019 "SGMII mode selected and configured\n"); 3020 break; 3021 default: 3022 netif_dbg(adapter, drv, adapter->netdev, 3023 "RGMII/GMII/MII(0x%X) mode enable\n", 3024 state->interface); 3025 break; 3026 } 3027 } 3028 3029 static void lan743x_phylink_mac_link_down(struct phylink_config *config, 3030 unsigned int link_an_mode, 3031 phy_interface_t interface) 3032 { 3033 struct net_device *netdev = to_net_dev(config->dev); 3034 3035 netif_tx_stop_all_queues(netdev); 3036 } 3037 3038 static void lan743x_phylink_mac_link_up(struct phylink_config *config, 3039 struct phy_device *phydev, 3040 unsigned int link_an_mode, 3041 phy_interface_t interface, 3042 int speed, int duplex, 3043 bool tx_pause, bool rx_pause) 3044 { 3045 struct net_device *netdev = to_net_dev(config->dev); 3046 struct lan743x_adapter *adapter = netdev_priv(netdev); 3047 int mac_cr; 3048 u8 cap; 3049 3050 mac_cr = lan743x_csr_read(adapter, MAC_CR); 3051 /* Pre-initialize register bits. 3052 * Resulting value corresponds to SPEED_10 3053 */ 3054 mac_cr &= ~(MAC_CR_CFG_H_ | MAC_CR_CFG_L_); 3055 if (speed == SPEED_2500) 3056 mac_cr |= MAC_CR_CFG_H_ | MAC_CR_CFG_L_; 3057 else if (speed == SPEED_1000) 3058 mac_cr |= MAC_CR_CFG_H_; 3059 else if (speed == SPEED_100) 3060 mac_cr |= MAC_CR_CFG_L_; 3061 3062 lan743x_csr_write(adapter, MAC_CR, mac_cr); 3063 3064 lan743x_ptp_update_latency(adapter, speed); 3065 3066 /* Flow Control operation */ 3067 cap = 0; 3068 if (tx_pause) 3069 cap |= FLOW_CTRL_TX; 3070 if (rx_pause) 3071 cap |= FLOW_CTRL_RX; 3072 3073 lan743x_mac_flow_ctrl_set_enables(adapter, 3074 cap & FLOW_CTRL_TX, 3075 cap & FLOW_CTRL_RX); 3076 3077 netif_tx_wake_all_queues(netdev); 3078 } 3079 3080 static void lan743x_mac_disable_tx_lpi(struct phylink_config *config) 3081 { 3082 struct net_device *netdev = to_net_dev(config->dev); 3083 struct lan743x_adapter *adapter = netdev_priv(netdev); 3084 3085 lan743x_mac_eee_enable(adapter, false); 3086 } 3087 3088 static int lan743x_mac_enable_tx_lpi(struct phylink_config *config, u32 timer, 3089 bool tx_clk_stop) 3090 { 3091 struct net_device *netdev = to_net_dev(config->dev); 3092 struct lan743x_adapter *adapter = netdev_priv(netdev); 3093 3094 /* Software should only change this field when Energy Efficient 3095 * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing 3096 * EEEEN during probe, and phylink itself guarantees that 3097 * mac_disable_tx_lpi() will have been previously called. 3098 */ 3099 lan743x_csr_write(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT, timer); 3100 lan743x_mac_eee_enable(adapter, true); 3101 3102 return 0; 3103 } 3104 3105 static const struct phylink_mac_ops lan743x_phylink_mac_ops = { 3106 .mac_config = lan743x_phylink_mac_config, 3107 .mac_link_down = lan743x_phylink_mac_link_down, 3108 .mac_link_up = lan743x_phylink_mac_link_up, 3109 .mac_disable_tx_lpi = lan743x_mac_disable_tx_lpi, 3110 .mac_enable_tx_lpi = lan743x_mac_enable_tx_lpi, 3111 }; 3112 3113 static int lan743x_phylink_create(struct lan743x_adapter *adapter) 3114 { 3115 struct net_device *netdev = adapter->netdev; 3116 struct phylink *pl; 3117 3118 adapter->phylink_config.dev = &netdev->dev; 3119 adapter->phylink_config.type = PHYLINK_NETDEV; 3120 adapter->phylink_config.mac_managed_pm = false; 3121 3122 adapter->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | 3123 MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; 3124 adapter->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD; 3125 adapter->phylink_config.lpi_timer_default = 3126 lan743x_csr_read(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT); 3127 3128 lan743x_phy_interface_select(adapter); 3129 3130 switch (adapter->phy_interface) { 3131 case PHY_INTERFACE_MODE_SGMII: 3132 __set_bit(PHY_INTERFACE_MODE_SGMII, 3133 adapter->phylink_config.supported_interfaces); 3134 __set_bit(PHY_INTERFACE_MODE_1000BASEX, 3135 adapter->phylink_config.supported_interfaces); 3136 __set_bit(PHY_INTERFACE_MODE_2500BASEX, 3137 adapter->phylink_config.supported_interfaces); 3138 adapter->phylink_config.mac_capabilities |= MAC_2500FD; 3139 break; 3140 case PHY_INTERFACE_MODE_GMII: 3141 __set_bit(PHY_INTERFACE_MODE_GMII, 3142 adapter->phylink_config.supported_interfaces); 3143 break; 3144 case PHY_INTERFACE_MODE_MII: 3145 __set_bit(PHY_INTERFACE_MODE_MII, 3146 adapter->phylink_config.supported_interfaces); 3147 break; 3148 default: 3149 phy_interface_set_rgmii(adapter->phylink_config.supported_interfaces); 3150 } 3151 3152 memcpy(adapter->phylink_config.lpi_interfaces, 3153 adapter->phylink_config.supported_interfaces, 3154 sizeof(adapter->phylink_config.lpi_interfaces)); 3155 3156 pl = phylink_create(&adapter->phylink_config, NULL, 3157 adapter->phy_interface, &lan743x_phylink_mac_ops); 3158 3159 if (IS_ERR(pl)) { 3160 netdev_err(netdev, "Could not create phylink (%pe)\n", pl); 3161 return PTR_ERR(pl); 3162 } 3163 3164 adapter->phylink = pl; 3165 netdev_dbg(netdev, "lan743x phylink created"); 3166 3167 return 0; 3168 } 3169 3170 static bool lan743x_phy_handle_exists(struct device_node *dn) 3171 { 3172 dn = of_parse_phandle(dn, "phy-handle", 0); 3173 of_node_put(dn); 3174 return dn != NULL; 3175 } 3176 3177 static int lan743x_phylink_connect(struct lan743x_adapter *adapter) 3178 { 3179 struct device_node *dn = adapter->pdev->dev.of_node; 3180 struct net_device *dev = adapter->netdev; 3181 struct phy_device *phydev; 3182 int ret; 3183 3184 if (dn) 3185 ret = phylink_of_phy_connect(adapter->phylink, dn, 0); 3186 3187 if (!dn || (ret && !lan743x_phy_handle_exists(dn))) { 3188 phydev = phy_find_first(adapter->mdiobus); 3189 if (phydev) { 3190 /* attach the mac to the phy */ 3191 ret = phylink_connect_phy(adapter->phylink, phydev); 3192 } else if (((adapter->csr.id_rev & ID_REV_ID_MASK_) == 3193 ID_REV_ID_LAN7431_) || adapter->is_pci11x1x) { 3194 struct phylink_link_state state; 3195 unsigned long caps; 3196 3197 caps = adapter->phylink_config.mac_capabilities; 3198 if (caps & MAC_2500FD) { 3199 state.speed = SPEED_2500; 3200 state.duplex = DUPLEX_FULL; 3201 } else if (caps & MAC_1000FD) { 3202 state.speed = SPEED_1000; 3203 state.duplex = DUPLEX_FULL; 3204 } else { 3205 state.speed = SPEED_UNKNOWN; 3206 state.duplex = DUPLEX_UNKNOWN; 3207 } 3208 3209 ret = phylink_set_fixed_link(adapter->phylink, &state); 3210 if (ret) { 3211 netdev_err(dev, "Could not set fixed link\n"); 3212 return ret; 3213 } 3214 } else { 3215 netdev_err(dev, "no PHY found\n"); 3216 return -ENXIO; 3217 } 3218 } 3219 3220 if (ret) { 3221 netdev_err(dev, "Could not attach PHY (%d)\n", ret); 3222 return ret; 3223 } 3224 3225 phylink_start(adapter->phylink); 3226 3227 return 0; 3228 } 3229 3230 static void lan743x_phylink_disconnect(struct lan743x_adapter *adapter) 3231 { 3232 phylink_stop(adapter->phylink); 3233 phylink_disconnect_phy(adapter->phylink); 3234 } 3235 3236 static int lan743x_netdev_close(struct net_device *netdev) 3237 { 3238 struct lan743x_adapter *adapter = netdev_priv(netdev); 3239 int index; 3240 3241 for (index = 0; index < adapter->used_tx_channels; index++) 3242 lan743x_tx_close(&adapter->tx[index]); 3243 3244 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 3245 lan743x_rx_close(&adapter->rx[index]); 3246 3247 lan743x_ptp_close(adapter); 3248 3249 lan743x_phylink_disconnect(adapter); 3250 3251 lan743x_mac_close(adapter); 3252 3253 lan743x_intr_close(adapter); 3254 3255 return 0; 3256 } 3257 3258 static int lan743x_netdev_open(struct net_device *netdev) 3259 { 3260 struct lan743x_adapter *adapter = netdev_priv(netdev); 3261 int index; 3262 int ret; 3263 3264 ret = lan743x_intr_open(adapter); 3265 if (ret) 3266 goto return_error; 3267 3268 ret = lan743x_mac_open(adapter); 3269 if (ret) 3270 goto close_intr; 3271 3272 ret = lan743x_phylink_connect(adapter); 3273 if (ret) 3274 goto close_mac; 3275 3276 ret = lan743x_ptp_open(adapter); 3277 if (ret) 3278 goto close_mac; 3279 3280 lan743x_rfe_open(adapter); 3281 3282 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3283 ret = lan743x_rx_open(&adapter->rx[index]); 3284 if (ret) 3285 goto close_rx; 3286 } 3287 3288 for (index = 0; index < adapter->used_tx_channels; index++) { 3289 ret = lan743x_tx_open(&adapter->tx[index]); 3290 if (ret) 3291 goto close_tx; 3292 } 3293 3294 if (netdev->phydev) 3295 phy_support_eee(netdev->phydev); 3296 3297 #ifdef CONFIG_PM 3298 if (adapter->netdev->phydev) { 3299 struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL }; 3300 3301 phy_ethtool_get_wol(netdev->phydev, &wol); 3302 adapter->phy_wol_supported = wol.supported; 3303 adapter->phy_wolopts = wol.wolopts; 3304 } 3305 #endif 3306 3307 return 0; 3308 3309 close_tx: 3310 for (index = 0; index < adapter->used_tx_channels; index++) { 3311 if (adapter->tx[index].ring_cpu_ptr) 3312 lan743x_tx_close(&adapter->tx[index]); 3313 } 3314 3315 close_rx: 3316 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3317 if (adapter->rx[index].ring_cpu_ptr) 3318 lan743x_rx_close(&adapter->rx[index]); 3319 } 3320 lan743x_ptp_close(adapter); 3321 if (adapter->phylink) 3322 lan743x_phylink_disconnect(adapter); 3323 3324 close_mac: 3325 lan743x_mac_close(adapter); 3326 3327 close_intr: 3328 lan743x_intr_close(adapter); 3329 3330 return_error: 3331 netif_warn(adapter, ifup, adapter->netdev, 3332 "Error opening LAN743x\n"); 3333 return ret; 3334 } 3335 3336 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb, 3337 struct net_device *netdev) 3338 { 3339 struct lan743x_adapter *adapter = netdev_priv(netdev); 3340 u8 ch = 0; 3341 3342 if (adapter->is_pci11x1x) 3343 ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS; 3344 3345 return lan743x_tx_xmit_frame(&adapter->tx[ch], skb); 3346 } 3347 3348 static int lan743x_netdev_ioctl(struct net_device *netdev, 3349 struct ifreq *ifr, int cmd) 3350 { 3351 struct lan743x_adapter *adapter = netdev_priv(netdev); 3352 3353 if (!netif_running(netdev)) 3354 return -EINVAL; 3355 3356 return phylink_mii_ioctl(adapter->phylink, ifr, cmd); 3357 } 3358 3359 static void lan743x_netdev_set_multicast(struct net_device *netdev) 3360 { 3361 struct lan743x_adapter *adapter = netdev_priv(netdev); 3362 3363 lan743x_rfe_set_multicast(adapter); 3364 } 3365 3366 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu) 3367 { 3368 struct lan743x_adapter *adapter = netdev_priv(netdev); 3369 int ret = 0; 3370 3371 ret = lan743x_mac_set_mtu(adapter, new_mtu); 3372 if (!ret) 3373 WRITE_ONCE(netdev->mtu, new_mtu); 3374 return ret; 3375 } 3376 3377 static void lan743x_netdev_get_stats64(struct net_device *netdev, 3378 struct rtnl_link_stats64 *stats) 3379 { 3380 struct lan743x_adapter *adapter = netdev_priv(netdev); 3381 3382 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES); 3383 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES); 3384 stats->rx_bytes = lan743x_csr_read(adapter, 3385 STAT_RX_UNICAST_BYTE_COUNT) + 3386 lan743x_csr_read(adapter, 3387 STAT_RX_BROADCAST_BYTE_COUNT) + 3388 lan743x_csr_read(adapter, 3389 STAT_RX_MULTICAST_BYTE_COUNT); 3390 stats->tx_bytes = lan743x_csr_read(adapter, 3391 STAT_TX_UNICAST_BYTE_COUNT) + 3392 lan743x_csr_read(adapter, 3393 STAT_TX_BROADCAST_BYTE_COUNT) + 3394 lan743x_csr_read(adapter, 3395 STAT_TX_MULTICAST_BYTE_COUNT); 3396 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) + 3397 lan743x_csr_read(adapter, 3398 STAT_RX_ALIGNMENT_ERRORS) + 3399 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) + 3400 lan743x_csr_read(adapter, 3401 STAT_RX_UNDERSIZE_FRAME_ERRORS) + 3402 lan743x_csr_read(adapter, 3403 STAT_RX_OVERSIZE_FRAME_ERRORS); 3404 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) + 3405 lan743x_csr_read(adapter, 3406 STAT_TX_EXCESS_DEFERRAL_ERRORS) + 3407 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS); 3408 stats->rx_dropped = lan743x_csr_read(adapter, 3409 STAT_RX_DROPPED_FRAMES); 3410 stats->tx_dropped = lan743x_csr_read(adapter, 3411 STAT_TX_EXCESSIVE_COLLISION); 3412 stats->multicast = lan743x_csr_read(adapter, 3413 STAT_RX_MULTICAST_FRAMES) + 3414 lan743x_csr_read(adapter, 3415 STAT_TX_MULTICAST_FRAMES); 3416 stats->collisions = lan743x_csr_read(adapter, 3417 STAT_TX_SINGLE_COLLISIONS) + 3418 lan743x_csr_read(adapter, 3419 STAT_TX_MULTIPLE_COLLISIONS) + 3420 lan743x_csr_read(adapter, 3421 STAT_TX_LATE_COLLISIONS); 3422 } 3423 3424 static int lan743x_netdev_set_mac_address(struct net_device *netdev, 3425 void *addr) 3426 { 3427 struct lan743x_adapter *adapter = netdev_priv(netdev); 3428 struct sockaddr *sock_addr = addr; 3429 int ret; 3430 3431 ret = eth_prepare_mac_addr_change(netdev, sock_addr); 3432 if (ret) 3433 return ret; 3434 eth_hw_addr_set(netdev, sock_addr->sa_data); 3435 lan743x_mac_set_address(adapter, sock_addr->sa_data); 3436 lan743x_rfe_update_mac_address(adapter); 3437 return 0; 3438 } 3439 3440 static const struct net_device_ops lan743x_netdev_ops = { 3441 .ndo_open = lan743x_netdev_open, 3442 .ndo_stop = lan743x_netdev_close, 3443 .ndo_start_xmit = lan743x_netdev_xmit_frame, 3444 .ndo_eth_ioctl = lan743x_netdev_ioctl, 3445 .ndo_set_rx_mode = lan743x_netdev_set_multicast, 3446 .ndo_change_mtu = lan743x_netdev_change_mtu, 3447 .ndo_get_stats64 = lan743x_netdev_get_stats64, 3448 .ndo_set_mac_address = lan743x_netdev_set_mac_address, 3449 .ndo_hwtstamp_get = lan743x_ptp_hwtstamp_get, 3450 .ndo_hwtstamp_set = lan743x_ptp_hwtstamp_set, 3451 }; 3452 3453 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter) 3454 { 3455 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 3456 } 3457 3458 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter) 3459 { 3460 mdiobus_unregister(adapter->mdiobus); 3461 } 3462 3463 static void lan743x_destroy_phylink(struct lan743x_adapter *adapter) 3464 { 3465 phylink_destroy(adapter->phylink); 3466 adapter->phylink = NULL; 3467 } 3468 3469 static void lan743x_full_cleanup(struct lan743x_adapter *adapter) 3470 { 3471 unregister_netdev(adapter->netdev); 3472 3473 lan743x_destroy_phylink(adapter); 3474 lan743x_mdiobus_cleanup(adapter); 3475 lan743x_hardware_cleanup(adapter); 3476 lan743x_pci_cleanup(adapter); 3477 } 3478 3479 static void pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter *adapter) 3480 { 3481 u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_; 3482 3483 if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) { 3484 u32 misc_ctl; 3485 3486 misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0); 3487 misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_; 3488 misc_ctl |= FIELD_PREP(MISC_CTL_0_RFE_READ_FIFO_MASK_, 3489 RFE_RD_FIFO_TH_3_DWORDS); 3490 lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl); 3491 } 3492 } 3493 3494 static int lan743x_hardware_init(struct lan743x_adapter *adapter, 3495 struct pci_dev *pdev) 3496 { 3497 struct lan743x_tx *tx; 3498 u32 sgmii_ctl; 3499 int index; 3500 int ret; 3501 3502 adapter->is_pci11x1x = is_pci11x1x_chip(adapter); 3503 if (adapter->is_pci11x1x) { 3504 adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS; 3505 adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS; 3506 adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT; 3507 pci11x1x_strap_get_status(adapter); 3508 spin_lock_init(&adapter->eth_syslock_spinlock); 3509 mutex_init(&adapter->sgmii_rw_lock); 3510 pci11x1x_set_rfe_rd_fifo_threshold(adapter); 3511 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 3512 if (adapter->is_sgmii_en) { 3513 sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_; 3514 sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_; 3515 } else { 3516 sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_; 3517 sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_; 3518 } 3519 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 3520 } else { 3521 adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS; 3522 adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS; 3523 adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT; 3524 } 3525 3526 adapter->intr.irq = adapter->pdev->irq; 3527 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 3528 3529 ret = lan743x_gpio_init(adapter); 3530 if (ret) 3531 return ret; 3532 3533 ret = lan743x_mac_init(adapter); 3534 if (ret) 3535 return ret; 3536 3537 ret = lan743x_phy_init(adapter); 3538 if (ret) 3539 return ret; 3540 3541 ret = lan743x_ptp_init(adapter); 3542 if (ret) 3543 return ret; 3544 3545 lan743x_rfe_update_mac_address(adapter); 3546 3547 ret = lan743x_dmac_init(adapter); 3548 if (ret) 3549 return ret; 3550 3551 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3552 adapter->rx[index].adapter = adapter; 3553 adapter->rx[index].channel_number = index; 3554 } 3555 3556 for (index = 0; index < adapter->used_tx_channels; index++) { 3557 tx = &adapter->tx[index]; 3558 tx->adapter = adapter; 3559 tx->channel_number = index; 3560 spin_lock_init(&tx->ring_lock); 3561 } 3562 3563 /* Ensure EEEEN is clear */ 3564 lan743x_mac_eee_enable(adapter, false); 3565 3566 return 0; 3567 } 3568 3569 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 3570 { 3571 int ret; 3572 3573 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); 3574 if (!(adapter->mdiobus)) { 3575 ret = -ENOMEM; 3576 goto return_error; 3577 } 3578 3579 adapter->mdiobus->priv = (void *)adapter; 3580 if (adapter->is_pci11x1x) { 3581 if (adapter->is_sgmii_en) { 3582 netif_dbg(adapter, drv, adapter->netdev, 3583 "SGMII operation\n"); 3584 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3585 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3586 adapter->mdiobus->read_c45 = lan743x_mdiobus_read_c45; 3587 adapter->mdiobus->write_c45 = lan743x_mdiobus_write_c45; 3588 adapter->mdiobus->name = "lan743x-mdiobus-c45"; 3589 netif_dbg(adapter, drv, adapter->netdev, 3590 "lan743x-mdiobus-c45\n"); 3591 } else { 3592 netif_dbg(adapter, drv, adapter->netdev, 3593 "RGMII operation\n"); 3594 // Only C22 support when RGMII I/F 3595 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3596 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3597 adapter->mdiobus->name = "lan743x-mdiobus"; 3598 netif_dbg(adapter, drv, adapter->netdev, 3599 "lan743x-mdiobus\n"); 3600 } 3601 } else { 3602 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3603 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3604 adapter->mdiobus->name = "lan743x-mdiobus"; 3605 netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus\n"); 3606 } 3607 3608 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 3609 "pci-%s", pci_name(adapter->pdev)); 3610 3611 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) 3612 /* LAN7430 uses internal phy at address 1 */ 3613 adapter->mdiobus->phy_mask = ~(u32)BIT(1); 3614 3615 /* register mdiobus */ 3616 ret = mdiobus_register(adapter->mdiobus); 3617 if (ret < 0) 3618 goto return_error; 3619 return 0; 3620 3621 return_error: 3622 return ret; 3623 } 3624 3625 /* lan743x_pcidev_probe - Device Initialization Routine 3626 * @pdev: PCI device information struct 3627 * @id: entry in lan743x_pci_tbl 3628 * 3629 * Returns 0 on success, negative on failure 3630 * 3631 * initializes an adapter identified by a pci_dev structure. 3632 * The OS initialization, configuring of the adapter private structure, 3633 * and a hardware reset occur. 3634 **/ 3635 static int lan743x_pcidev_probe(struct pci_dev *pdev, 3636 const struct pci_device_id *id) 3637 { 3638 struct lan743x_adapter *adapter = NULL; 3639 struct net_device *netdev = NULL; 3640 int ret = -ENODEV; 3641 3642 if (id->device == PCI_DEVICE_ID_SMSC_A011 || 3643 id->device == PCI_DEVICE_ID_SMSC_A041) { 3644 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 3645 sizeof(struct lan743x_adapter), 3646 PCI11X1X_USED_TX_CHANNELS, 3647 LAN743X_USED_RX_CHANNELS); 3648 } else { 3649 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 3650 sizeof(struct lan743x_adapter), 3651 LAN743X_USED_TX_CHANNELS, 3652 LAN743X_USED_RX_CHANNELS); 3653 } 3654 3655 if (!netdev) 3656 goto return_error; 3657 3658 SET_NETDEV_DEV(netdev, &pdev->dev); 3659 pci_set_drvdata(pdev, netdev); 3660 adapter = netdev_priv(netdev); 3661 adapter->netdev = netdev; 3662 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE | 3663 NETIF_MSG_LINK | NETIF_MSG_IFUP | 3664 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED; 3665 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE; 3666 3667 of_get_mac_address(pdev->dev.of_node, adapter->mac_address); 3668 3669 ret = lan743x_pci_init(adapter, pdev); 3670 if (ret) 3671 goto return_error; 3672 3673 ret = lan743x_csr_init(adapter); 3674 if (ret) 3675 goto cleanup_pci; 3676 3677 ret = lan743x_hardware_init(adapter, pdev); 3678 if (ret) 3679 goto cleanup_pci; 3680 3681 ret = lan743x_mdiobus_init(adapter); 3682 if (ret) 3683 goto cleanup_hardware; 3684 3685 adapter->netdev->netdev_ops = &lan743x_netdev_ops; 3686 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops; 3687 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | 3688 NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 3689 adapter->netdev->hw_features = adapter->netdev->features; 3690 3691 ret = lan743x_phylink_create(adapter); 3692 if (ret < 0) { 3693 netif_err(adapter, probe, netdev, 3694 "failed to setup phylink (%d)\n", ret); 3695 goto cleanup_mdiobus; 3696 } 3697 3698 ret = register_netdev(adapter->netdev); 3699 if (ret < 0) 3700 goto cleanup_phylink; 3701 return 0; 3702 3703 cleanup_phylink: 3704 lan743x_destroy_phylink(adapter); 3705 3706 cleanup_mdiobus: 3707 lan743x_mdiobus_cleanup(adapter); 3708 3709 cleanup_hardware: 3710 lan743x_hardware_cleanup(adapter); 3711 3712 cleanup_pci: 3713 lan743x_pci_cleanup(adapter); 3714 3715 return_error: 3716 pr_warn("Initialization failed\n"); 3717 return ret; 3718 } 3719 3720 /** 3721 * lan743x_pcidev_remove - Device Removal Routine 3722 * @pdev: PCI device information struct 3723 * 3724 * this is called by the PCI subsystem to alert the driver 3725 * that it should release a PCI device. This could be caused by a 3726 * Hot-Plug event, or because the driver is going to be removed from 3727 * memory. 3728 **/ 3729 static void lan743x_pcidev_remove(struct pci_dev *pdev) 3730 { 3731 struct net_device *netdev = pci_get_drvdata(pdev); 3732 struct lan743x_adapter *adapter = netdev_priv(netdev); 3733 3734 lan743x_full_cleanup(adapter); 3735 } 3736 3737 static void lan743x_pcidev_shutdown(struct pci_dev *pdev) 3738 { 3739 struct net_device *netdev = pci_get_drvdata(pdev); 3740 struct lan743x_adapter *adapter = netdev_priv(netdev); 3741 3742 rtnl_lock(); 3743 netif_device_detach(netdev); 3744 3745 /* close netdev when netdev is at running state. 3746 * For instance, it is true when system goes to sleep by pm-suspend 3747 * However, it is false when system goes to sleep by suspend GUI menu 3748 */ 3749 if (netif_running(netdev)) 3750 lan743x_netdev_close(netdev); 3751 rtnl_unlock(); 3752 3753 #ifdef CONFIG_PM 3754 pci_save_state(pdev); 3755 #endif 3756 3757 /* clean up lan743x portion */ 3758 lan743x_hardware_cleanup(adapter); 3759 } 3760 3761 #ifdef CONFIG_PM_SLEEP 3762 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len) 3763 { 3764 return bitrev16(crc16(0xFFFF, buf, len)); 3765 } 3766 3767 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter) 3768 { 3769 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 3770 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 3771 const u8 arp_type[2] = { 0x08, 0x06 }; 3772 int mask_index; 3773 u32 sopass; 3774 u32 pmtctl; 3775 u32 wucsr; 3776 u32 macrx; 3777 u16 crc; 3778 3779 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++) 3780 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0); 3781 3782 /* clear wake settings */ 3783 pmtctl = lan743x_csr_read(adapter, PMT_CTL); 3784 pmtctl |= PMT_CTL_WUPS_MASK_ | PMT_CTL_RES_CLR_WKP_MASK_; 3785 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ | 3786 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ | 3787 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_); 3788 3789 macrx = lan743x_csr_read(adapter, MAC_RX); 3790 3791 wucsr = 0; 3792 mask_index = 0; 3793 3794 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_; 3795 3796 if (adapter->phy_wolopts) 3797 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_; 3798 3799 if (adapter->wolopts & WAKE_MAGIC) { 3800 wucsr |= MAC_WUCSR_MPEN_; 3801 macrx |= MAC_RX_RXEN_; 3802 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3803 } 3804 if (adapter->wolopts & WAKE_UCAST) { 3805 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_; 3806 macrx |= MAC_RX_RXEN_; 3807 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3808 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3809 } 3810 if (adapter->wolopts & WAKE_BCAST) { 3811 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_; 3812 macrx |= MAC_RX_RXEN_; 3813 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3814 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3815 } 3816 if (adapter->wolopts & WAKE_MCAST) { 3817 /* IPv4 multicast */ 3818 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3); 3819 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3820 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3821 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3822 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3823 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7); 3824 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3825 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3826 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3827 mask_index++; 3828 3829 /* IPv6 multicast */ 3830 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2); 3831 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3832 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3833 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3834 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3835 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3); 3836 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3837 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3838 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3839 mask_index++; 3840 3841 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3842 macrx |= MAC_RX_RXEN_; 3843 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3844 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3845 } 3846 if (adapter->wolopts & WAKE_ARP) { 3847 /* set MAC_WUF_CFG & WUF_MASK 3848 * for packettype (offset 12,13) = ARP (0x0806) 3849 */ 3850 crc = lan743x_pm_wakeframe_crc16(arp_type, 2); 3851 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3852 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ | 3853 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3854 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3855 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000); 3856 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3857 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3858 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3859 mask_index++; 3860 3861 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3862 macrx |= MAC_RX_RXEN_; 3863 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3864 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3865 } 3866 3867 if (adapter->wolopts & WAKE_MAGICSECURE) { 3868 sopass = *(u32 *)adapter->sopass; 3869 lan743x_csr_write(adapter, MAC_MP_SO_LO, sopass); 3870 sopass = *(u16 *)&adapter->sopass[4]; 3871 lan743x_csr_write(adapter, MAC_MP_SO_HI, sopass); 3872 wucsr |= MAC_MP_SO_EN_; 3873 } 3874 3875 lan743x_csr_write(adapter, MAC_WUCSR, wucsr); 3876 lan743x_csr_write(adapter, PMT_CTL, pmtctl); 3877 lan743x_csr_write(adapter, MAC_RX, macrx); 3878 } 3879 3880 static int lan743x_pm_suspend(struct device *dev) 3881 { 3882 struct pci_dev *pdev = to_pci_dev(dev); 3883 struct net_device *netdev = pci_get_drvdata(pdev); 3884 struct lan743x_adapter *adapter = netdev_priv(netdev); 3885 u32 data; 3886 3887 lan743x_pcidev_shutdown(pdev); 3888 3889 /* clear all wakes */ 3890 lan743x_csr_write(adapter, MAC_WUCSR, 0); 3891 lan743x_csr_write(adapter, MAC_WUCSR2, 0); 3892 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF); 3893 3894 if (adapter->wolopts || adapter->phy_wolopts) 3895 lan743x_pm_set_wol(adapter); 3896 3897 if (adapter->is_pci11x1x) { 3898 /* Save HW_CFG to config again in PM resume */ 3899 data = lan743x_csr_read(adapter, HW_CFG); 3900 adapter->hw_cfg = data; 3901 data |= (HW_CFG_RST_PROTECT_PCIE_ | 3902 HW_CFG_D3_RESET_DIS_ | 3903 HW_CFG_D3_VAUX_OVR_ | 3904 HW_CFG_HOT_RESET_DIS_ | 3905 HW_CFG_RST_PROTECT_); 3906 lan743x_csr_write(adapter, HW_CFG, data); 3907 } 3908 3909 /* Host sets PME_En, put D3hot */ 3910 return pci_prepare_to_sleep(pdev); 3911 } 3912 3913 static int lan743x_pm_resume(struct device *dev) 3914 { 3915 struct pci_dev *pdev = to_pci_dev(dev); 3916 struct net_device *netdev = pci_get_drvdata(pdev); 3917 struct lan743x_adapter *adapter = netdev_priv(netdev); 3918 u32 data; 3919 int ret; 3920 3921 pci_set_power_state(pdev, PCI_D0); 3922 pci_restore_state(pdev); 3923 pci_save_state(pdev); 3924 3925 /* Restore HW_CFG that was saved during pm suspend */ 3926 if (adapter->is_pci11x1x) 3927 lan743x_csr_write(adapter, HW_CFG, adapter->hw_cfg); 3928 3929 ret = lan743x_hardware_init(adapter, pdev); 3930 if (ret) { 3931 netif_err(adapter, probe, adapter->netdev, 3932 "lan743x_hardware_init returned %d\n", ret); 3933 lan743x_pci_cleanup(adapter); 3934 return ret; 3935 } 3936 3937 ret = lan743x_csr_read(adapter, MAC_WK_SRC); 3938 netif_dbg(adapter, drv, adapter->netdev, 3939 "Wakeup source : 0x%08X\n", ret); 3940 3941 /* Clear the wol configuration and status bits. Note that 3942 * the status bits are "Write One to Clear (W1C)" 3943 */ 3944 data = MAC_WUCSR_EEE_TX_WAKE_ | MAC_WUCSR_EEE_RX_WAKE_ | 3945 MAC_WUCSR_RFE_WAKE_FR_ | MAC_WUCSR_PFDA_FR_ | MAC_WUCSR_WUFR_ | 3946 MAC_WUCSR_MPR_ | MAC_WUCSR_BCAST_FR_; 3947 lan743x_csr_write(adapter, MAC_WUCSR, data); 3948 3949 data = MAC_WUCSR2_NS_RCD_ | MAC_WUCSR2_ARP_RCD_ | 3950 MAC_WUCSR2_IPV6_TCPSYN_RCD_ | MAC_WUCSR2_IPV4_TCPSYN_RCD_; 3951 lan743x_csr_write(adapter, MAC_WUCSR2, data); 3952 3953 data = MAC_WK_SRC_ETH_PHY_WK_ | MAC_WK_SRC_IPV6_TCPSYN_RCD_WK_ | 3954 MAC_WK_SRC_IPV4_TCPSYN_RCD_WK_ | MAC_WK_SRC_EEE_TX_WK_ | 3955 MAC_WK_SRC_EEE_RX_WK_ | MAC_WK_SRC_RFE_FR_WK_ | 3956 MAC_WK_SRC_PFDA_FR_WK_ | MAC_WK_SRC_MP_FR_WK_ | 3957 MAC_WK_SRC_BCAST_FR_WK_ | MAC_WK_SRC_WU_FR_WK_ | 3958 MAC_WK_SRC_WK_FR_SAVED_; 3959 lan743x_csr_write(adapter, MAC_WK_SRC, data); 3960 3961 rtnl_lock(); 3962 /* open netdev when netdev is at running state while resume. 3963 * For instance, it is true when system wakesup after pm-suspend 3964 * However, it is false when system wakes up after suspend GUI menu 3965 */ 3966 if (netif_running(netdev)) 3967 lan743x_netdev_open(netdev); 3968 3969 netif_device_attach(netdev); 3970 rtnl_unlock(); 3971 3972 return 0; 3973 } 3974 3975 static const struct dev_pm_ops lan743x_pm_ops = { 3976 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume) 3977 }; 3978 #endif /* CONFIG_PM_SLEEP */ 3979 3980 static const struct pci_device_id lan743x_pcidev_tbl[] = { 3981 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 3982 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 3983 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) }, 3984 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) }, 3985 { 0, } 3986 }; 3987 3988 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl); 3989 3990 static struct pci_driver lan743x_pcidev_driver = { 3991 .name = DRIVER_NAME, 3992 .id_table = lan743x_pcidev_tbl, 3993 .probe = lan743x_pcidev_probe, 3994 .remove = lan743x_pcidev_remove, 3995 #ifdef CONFIG_PM_SLEEP 3996 .driver.pm = &lan743x_pm_ops, 3997 #endif 3998 .shutdown = lan743x_pcidev_shutdown, 3999 }; 4000 4001 module_pci_driver(lan743x_pcidev_driver); 4002 4003 MODULE_AUTHOR(DRIVER_AUTHOR); 4004 MODULE_DESCRIPTION(DRIVER_DESC); 4005 MODULE_LICENSE("GPL"); 4006