10cf63226SBryan Whitehead /* SPDX-License-Identifier: GPL-2.0+ */ 20cf63226SBryan Whitehead /* Copyright (C) 2018 Microchip Technology Inc. */ 30cf63226SBryan Whitehead 40cf63226SBryan Whitehead #ifndef _LAN743X_ETHTOOL_H 50cf63226SBryan Whitehead #define _LAN743X_ETHTOOL_H 60cf63226SBryan Whitehead 70cf63226SBryan Whitehead #include "linux/ethtool.h" 80cf63226SBryan Whitehead 99aeb87d2SRaju Lakkaraju #define LAN743X_ETH_REG_VERSION 1 109aeb87d2SRaju Lakkaraju 119aeb87d2SRaju Lakkaraju enum { 129aeb87d2SRaju Lakkaraju ETH_PRIV_FLAGS, 139aeb87d2SRaju Lakkaraju ETH_ID_REV, 149aeb87d2SRaju Lakkaraju ETH_FPGA_REV, 159aeb87d2SRaju Lakkaraju ETH_STRAP_READ, 169aeb87d2SRaju Lakkaraju ETH_INT_STS, 179aeb87d2SRaju Lakkaraju ETH_HW_CFG, 189aeb87d2SRaju Lakkaraju ETH_PMT_CTL, 199aeb87d2SRaju Lakkaraju ETH_E2P_CMD, 209aeb87d2SRaju Lakkaraju ETH_E2P_DATA, 219aeb87d2SRaju Lakkaraju ETH_MAC_CR, 229aeb87d2SRaju Lakkaraju ETH_MAC_RX, 239aeb87d2SRaju Lakkaraju ETH_MAC_TX, 249aeb87d2SRaju Lakkaraju ETH_FLOW, 259aeb87d2SRaju Lakkaraju ETH_MII_ACC, 269aeb87d2SRaju Lakkaraju ETH_MII_DATA, 279aeb87d2SRaju Lakkaraju ETH_EEE_TX_LPI_REQ_DLY, 289aeb87d2SRaju Lakkaraju ETH_WUCSR, 299aeb87d2SRaju Lakkaraju ETH_WK_SRC, 309aeb87d2SRaju Lakkaraju 319aeb87d2SRaju Lakkaraju /* Add new registers above */ 32*90452205SRaju Lakkaraju MAX_LAN743X_ETH_COMMON_REGS 33*90452205SRaju Lakkaraju }; 34*90452205SRaju Lakkaraju 35*90452205SRaju Lakkaraju enum { 36*90452205SRaju Lakkaraju /* SGMII Register */ 37*90452205SRaju Lakkaraju ETH_SR_VSMMD_DEV_ID1, 38*90452205SRaju Lakkaraju ETH_SR_VSMMD_DEV_ID2, 39*90452205SRaju Lakkaraju ETH_SR_VSMMD_PCS_ID1, 40*90452205SRaju Lakkaraju ETH_SR_VSMMD_PCS_ID2, 41*90452205SRaju Lakkaraju ETH_SR_VSMMD_STS, 42*90452205SRaju Lakkaraju ETH_SR_VSMMD_CTRL, 43*90452205SRaju Lakkaraju ETH_SR_MII_CTRL, 44*90452205SRaju Lakkaraju ETH_SR_MII_STS, 45*90452205SRaju Lakkaraju ETH_SR_MII_DEV_ID1, 46*90452205SRaju Lakkaraju ETH_SR_MII_DEV_ID2, 47*90452205SRaju Lakkaraju ETH_SR_MII_AN_ADV, 48*90452205SRaju Lakkaraju ETH_SR_MII_LP_BABL, 49*90452205SRaju Lakkaraju ETH_SR_MII_EXPN, 50*90452205SRaju Lakkaraju ETH_SR_MII_EXT_STS, 51*90452205SRaju Lakkaraju ETH_SR_MII_TIME_SYNC_ABL, 52*90452205SRaju Lakkaraju ETH_SR_MII_TIME_SYNC_TX_MAX_DLY_LWR, 53*90452205SRaju Lakkaraju ETH_SR_MII_TIME_SYNC_TX_MAX_DLY_UPR, 54*90452205SRaju Lakkaraju ETH_SR_MII_TIME_SYNC_TX_MIN_DLY_LWR, 55*90452205SRaju Lakkaraju ETH_SR_MII_TIME_SYNC_TX_MIN_DLY_UPR, 56*90452205SRaju Lakkaraju ETH_SR_MII_TIME_SYNC_RX_MAX_DLY_LWR, 57*90452205SRaju Lakkaraju ETH_SR_MII_TIME_SYNC_RX_MAX_DLY_UPR, 58*90452205SRaju Lakkaraju ETH_SR_MII_TIME_SYNC_RX_MIN_DLY_LWR, 59*90452205SRaju Lakkaraju ETH_SR_MII_TIME_SYNC_RX_MIN_DLY_UPR, 60*90452205SRaju Lakkaraju ETH_VR_MII_DIG_CTRL1, 61*90452205SRaju Lakkaraju ETH_VR_MII_AN_CTRL, 62*90452205SRaju Lakkaraju ETH_VR_MII_AN_INTR_STS, 63*90452205SRaju Lakkaraju ETH_VR_MII_TC, 64*90452205SRaju Lakkaraju ETH_VR_MII_DBG_CTRL, 65*90452205SRaju Lakkaraju ETH_VR_MII_EEE_MCTRL0, 66*90452205SRaju Lakkaraju ETH_VR_MII_EEE_TXTIMER, 67*90452205SRaju Lakkaraju ETH_VR_MII_EEE_RXTIMER, 68*90452205SRaju Lakkaraju ETH_VR_MII_LINK_TIMER_CTRL, 69*90452205SRaju Lakkaraju ETH_VR_MII_EEE_MCTRL1, 70*90452205SRaju Lakkaraju ETH_VR_MII_DIG_STS, 71*90452205SRaju Lakkaraju ETH_VR_MII_ICG_ERRCNT1, 72*90452205SRaju Lakkaraju ETH_VR_MII_GPIO, 73*90452205SRaju Lakkaraju ETH_VR_MII_EEE_LPI_STATUS, 74*90452205SRaju Lakkaraju ETH_VR_MII_EEE_WKERR, 75*90452205SRaju Lakkaraju ETH_VR_MII_MISC_STS, 76*90452205SRaju Lakkaraju ETH_VR_MII_RX_LSTS, 77*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_TX_BSTCTRL0, 78*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_TX_LVLCTRL0, 79*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_TXGENCTRL0, 80*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_TXGENCTRL1, 81*90452205SRaju Lakkaraju ETH_VR_MII_GEN4_TXGENCTRL2, 82*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_TX_STS, 83*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_RXGENCTRL0, 84*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_RXGENCTRL1, 85*90452205SRaju Lakkaraju ETH_VR_MII_GEN4_RXEQ_CTRL, 86*90452205SRaju Lakkaraju ETH_VR_MII_GEN4_RXLOS_CTRL0, 87*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_MPLL_CTRL0, 88*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_MPLL_CTRL1, 89*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_MPLL_STS, 90*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_LVL_CTRL, 91*90452205SRaju Lakkaraju ETH_VR_MII_GEN4_MISC_CTRL2, 92*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_MISC_CTRL0, 93*90452205SRaju Lakkaraju ETH_VR_MII_GEN2_GEN4_MISC_CTRL1, 94*90452205SRaju Lakkaraju ETH_VR_MII_SNPS_CR_CTRL, 95*90452205SRaju Lakkaraju ETH_VR_MII_SNPS_CR_ADDR, 96*90452205SRaju Lakkaraju ETH_VR_MII_SNPS_CR_DATA, 97*90452205SRaju Lakkaraju ETH_VR_MII_DIG_CTRL2, 98*90452205SRaju Lakkaraju ETH_VR_MII_DIG_ERRCNT, 99*90452205SRaju Lakkaraju 100*90452205SRaju Lakkaraju /* Add new registers above */ 101*90452205SRaju Lakkaraju MAX_LAN743X_ETH_SGMII_REGS 1029aeb87d2SRaju Lakkaraju }; 1039aeb87d2SRaju Lakkaraju 1040cf63226SBryan Whitehead extern const struct ethtool_ops lan743x_ethtool_ops; 1050cf63226SBryan Whitehead 1060cf63226SBryan Whitehead #endif /* _LAN743X_ETHTOOL_H */ 107