1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */ 3 4 #ifndef _FBNIC_FW_H_ 5 #define _FBNIC_FW_H_ 6 7 #include <linux/if_ether.h> 8 #include <linux/types.h> 9 10 struct fbnic_dev; 11 struct fbnic_tlv_msg; 12 13 struct fbnic_fw_mbx { 14 u8 ready, head, tail; 15 struct { 16 struct fbnic_tlv_msg *msg; 17 dma_addr_t addr; 18 } buf_info[FBNIC_IPC_MBX_DESC_LEN]; 19 }; 20 21 // FW_VER_MAX_SIZE must match ETHTOOL_FWVERS_LEN 22 #define FBNIC_FW_VER_MAX_SIZE 32 23 // Formatted version is in the format XX.YY.ZZ_RRR_COMMIT 24 #define FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE (FBNIC_FW_VER_MAX_SIZE - 13) 25 #define FBNIC_FW_LOG_MAX_SIZE 256 26 27 struct fbnic_fw_ver { 28 u32 version; 29 char commit[FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE]; 30 }; 31 32 struct fbnic_fw_cap { 33 struct { 34 struct fbnic_fw_ver mgmt, bootloader; 35 } running; 36 struct { 37 struct fbnic_fw_ver mgmt, bootloader, undi; 38 } stored; 39 u8 active_slot; 40 u8 bmc_mac_addr[4][ETH_ALEN]; 41 u8 bmc_present : 1; 42 u8 all_multi : 1; 43 u8 link_speed; 44 u8 link_fec; 45 u32 anti_rollback_version; 46 }; 47 48 struct fbnic_fw_completion { 49 u32 msg_type; 50 struct completion done; 51 struct kref ref_count; 52 int result; 53 union { 54 struct { 55 u32 offset; 56 u32 length; 57 } fw_update; 58 struct { 59 s32 millivolts; 60 s32 millidegrees; 61 } tsene; 62 } u; 63 }; 64 65 void fbnic_mbx_init(struct fbnic_dev *fbd); 66 void fbnic_mbx_clean(struct fbnic_dev *fbd); 67 int fbnic_mbx_set_cmpl(struct fbnic_dev *fbd, 68 struct fbnic_fw_completion *cmpl_data); 69 void fbnic_mbx_poll(struct fbnic_dev *fbd); 70 int fbnic_mbx_poll_tx_ready(struct fbnic_dev *fbd); 71 void fbnic_mbx_flush_tx(struct fbnic_dev *fbd); 72 int fbnic_fw_xmit_ownership_msg(struct fbnic_dev *fbd, bool take_ownership); 73 int fbnic_fw_init_heartbeat(struct fbnic_dev *fbd, bool poll); 74 void fbnic_fw_check_heartbeat(struct fbnic_dev *fbd); 75 int fbnic_fw_xmit_fw_start_upgrade(struct fbnic_dev *fbd, 76 struct fbnic_fw_completion *cmpl_data, 77 unsigned int id, unsigned int len); 78 int fbnic_fw_xmit_fw_write_chunk(struct fbnic_dev *fbd, 79 const u8 *data, u32 offset, u16 length, 80 int cancel_error); 81 int fbnic_fw_xmit_tsene_read_msg(struct fbnic_dev *fbd, 82 struct fbnic_fw_completion *cmpl_data); 83 struct fbnic_fw_completion *fbnic_fw_alloc_cmpl(u32 msg_type); 84 void fbnic_fw_clear_cmpl(struct fbnic_dev *fbd, 85 struct fbnic_fw_completion *cmpl_data); 86 void fbnic_fw_put_cmpl(struct fbnic_fw_completion *cmpl_data); 87 88 #define fbnic_mk_full_fw_ver_str(_rev_id, _delim, _commit, _str, _str_sz) \ 89 do { \ 90 const u32 __rev_id = _rev_id; \ 91 snprintf(_str, _str_sz, "%02lu.%02lu.%02lu-%03lu%s%s", \ 92 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MAJOR, __rev_id), \ 93 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MINOR, __rev_id), \ 94 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_PATCH, __rev_id), \ 95 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_BUILD, __rev_id), \ 96 _delim, _commit); \ 97 } while (0) 98 99 #define fbnic_mk_fw_ver_str(_rev_id, _str) \ 100 fbnic_mk_full_fw_ver_str(_rev_id, "", "", _str, sizeof(_str)) 101 102 enum { 103 QSPI_SECTION_CMRT = 0, 104 QSPI_SECTION_CONTROL_FW = 1, 105 QSPI_SECTION_UCODE = 2, 106 QSPI_SECTION_OPTION_ROM = 3, 107 QSPI_SECTION_USER = 4, 108 QSPI_SECTION_INVALID, 109 }; 110 111 #define FW_HEARTBEAT_PERIOD (10 * HZ) 112 113 enum { 114 FBNIC_TLV_MSG_ID_HOST_CAP_REQ = 0x10, 115 FBNIC_TLV_MSG_ID_FW_CAP_RESP = 0x11, 116 FBNIC_TLV_MSG_ID_OWNERSHIP_REQ = 0x12, 117 FBNIC_TLV_MSG_ID_OWNERSHIP_RESP = 0x13, 118 FBNIC_TLV_MSG_ID_HEARTBEAT_REQ = 0x14, 119 FBNIC_TLV_MSG_ID_HEARTBEAT_RESP = 0x15, 120 FBNIC_TLV_MSG_ID_FW_START_UPGRADE_REQ = 0x22, 121 FBNIC_TLV_MSG_ID_FW_START_UPGRADE_RESP = 0x23, 122 FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_REQ = 0x24, 123 FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_RESP = 0x25, 124 FBNIC_TLV_MSG_ID_FW_FINISH_UPGRADE_REQ = 0x28, 125 FBNIC_TLV_MSG_ID_FW_FINISH_UPGRADE_RESP = 0x29, 126 FBNIC_TLV_MSG_ID_TSENE_READ_REQ = 0x3C, 127 FBNIC_TLV_MSG_ID_TSENE_READ_RESP = 0x3D, 128 }; 129 130 #define FBNIC_FW_CAP_RESP_VERSION_MAJOR CSR_GENMASK(31, 24) 131 #define FBNIC_FW_CAP_RESP_VERSION_MINOR CSR_GENMASK(23, 16) 132 #define FBNIC_FW_CAP_RESP_VERSION_PATCH CSR_GENMASK(15, 8) 133 #define FBNIC_FW_CAP_RESP_VERSION_BUILD CSR_GENMASK(7, 0) 134 enum { 135 FBNIC_FW_CAP_RESP_VERSION = 0x0, 136 FBNIC_FW_CAP_RESP_BMC_PRESENT = 0x1, 137 FBNIC_FW_CAP_RESP_BMC_MAC_ADDR = 0x2, 138 FBNIC_FW_CAP_RESP_BMC_MAC_ARRAY = 0x3, 139 FBNIC_FW_CAP_RESP_STORED_VERSION = 0x4, 140 FBNIC_FW_CAP_RESP_ACTIVE_FW_SLOT = 0x5, 141 FBNIC_FW_CAP_RESP_VERSION_COMMIT_STR = 0x6, 142 FBNIC_FW_CAP_RESP_BMC_ALL_MULTI = 0x8, 143 FBNIC_FW_CAP_RESP_FW_STATE = 0x9, 144 FBNIC_FW_CAP_RESP_FW_LINK_SPEED = 0xa, 145 FBNIC_FW_CAP_RESP_FW_LINK_FEC = 0xb, 146 FBNIC_FW_CAP_RESP_STORED_COMMIT_STR = 0xc, 147 FBNIC_FW_CAP_RESP_CMRT_VERSION = 0xd, 148 FBNIC_FW_CAP_RESP_STORED_CMRT_VERSION = 0xe, 149 FBNIC_FW_CAP_RESP_CMRT_COMMIT_STR = 0xf, 150 FBNIC_FW_CAP_RESP_STORED_CMRT_COMMIT_STR = 0x10, 151 FBNIC_FW_CAP_RESP_UEFI_VERSION = 0x11, 152 FBNIC_FW_CAP_RESP_UEFI_COMMIT_STR = 0x12, 153 FBNIC_FW_CAP_RESP_ANTI_ROLLBACK_VERSION = 0x15, 154 FBNIC_FW_CAP_RESP_MSG_MAX 155 }; 156 157 enum { 158 FBNIC_FW_LINK_SPEED_25R1 = 1, 159 FBNIC_FW_LINK_SPEED_50R2 = 2, 160 FBNIC_FW_LINK_SPEED_50R1 = 3, 161 FBNIC_FW_LINK_SPEED_100R2 = 4, 162 }; 163 164 enum { 165 FBNIC_FW_LINK_FEC_NONE = 1, 166 FBNIC_FW_LINK_FEC_RS = 2, 167 FBNIC_FW_LINK_FEC_BASER = 3, 168 }; 169 170 enum { 171 FBNIC_FW_TSENE_THERM = 0x0, 172 FBNIC_FW_TSENE_VOLT = 0x1, 173 FBNIC_FW_TSENE_ERROR = 0x2, 174 FBNIC_FW_TSENE_MSG_MAX 175 }; 176 177 enum { 178 FBNIC_FW_OWNERSHIP_FLAG = 0x0, 179 FBNIC_FW_OWNERSHIP_MSG_MAX 180 }; 181 182 enum { 183 FBNIC_FW_START_UPGRADE_ERROR = 0x0, 184 FBNIC_FW_START_UPGRADE_SECTION = 0x1, 185 FBNIC_FW_START_UPGRADE_IMAGE_LENGTH = 0x2, 186 FBNIC_FW_START_UPGRADE_MSG_MAX 187 }; 188 189 enum { 190 FBNIC_FW_WRITE_CHUNK_OFFSET = 0x0, 191 FBNIC_FW_WRITE_CHUNK_LENGTH = 0x1, 192 FBNIC_FW_WRITE_CHUNK_DATA = 0x2, 193 FBNIC_FW_WRITE_CHUNK_ERROR = 0x3, 194 FBNIC_FW_WRITE_CHUNK_MSG_MAX 195 }; 196 197 enum { 198 FBNIC_FW_FINISH_UPGRADE_ERROR = 0x0, 199 FBNIC_FW_FINISH_UPGRADE_MSG_MAX 200 }; 201 202 #endif /* _FBNIC_FW_H_ */ 203