xref: /linux/drivers/net/ethernet/meta/fbnic/fbnic_fw.h (revision 8a5f956a9fb7d74fff681145082acfad5afa6bb8)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */
3 
4 #ifndef _FBNIC_FW_H_
5 #define _FBNIC_FW_H_
6 
7 #include <linux/if_ether.h>
8 #include <linux/types.h>
9 
10 struct fbnic_dev;
11 struct fbnic_tlv_msg;
12 
13 struct fbnic_fw_mbx {
14 	u8 ready, head, tail;
15 	struct {
16 		struct fbnic_tlv_msg	*msg;
17 		dma_addr_t		addr;
18 	} buf_info[FBNIC_IPC_MBX_DESC_LEN];
19 };
20 
21 // FW_VER_MAX_SIZE must match ETHTOOL_FWVERS_LEN
22 #define FBNIC_FW_VER_MAX_SIZE			32
23 // Formatted version is in the format XX.YY.ZZ_RRR_COMMIT
24 #define FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE	(FBNIC_FW_VER_MAX_SIZE - 13)
25 #define FBNIC_FW_LOG_VERSION			1
26 #define FBNIC_FW_LOG_MAX_SIZE			256
27 /*
28  * The max amount of logs which can fit in a single mailbox message. Firmware
29  * assumes each mailbox message is 4096B. The amount of messages supported is
30  * calculated as 4096 minus headers for message, arrays, and length minus the
31  * size of length divided by headers for each array plus the maximum LOG size,
32  * and the size of MSEC and INDEX. Put another way:
33  *
34  * MAX_LOG_HISTORY = ((4096 - TLV_HDR_SZ * 5 - LENGTH_SZ)
35  *                    / (FBNIC_FW_LOG_MAX_SIZE + TLV_HDR_SZ * 3 + MSEC_SZ
36  *                       + INDEX_SZ))
37  */
38 #define FBNIC_FW_MAX_LOG_HISTORY		14
39 
40 struct fbnic_fw_ver {
41 	u32 version;
42 	char commit[FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE];
43 };
44 
45 struct fbnic_fw_cap {
46 	struct {
47 		struct fbnic_fw_ver mgmt, bootloader;
48 	} running;
49 	struct {
50 		struct fbnic_fw_ver mgmt, bootloader, undi;
51 	} stored;
52 	u8	active_slot;
53 	u8	bmc_mac_addr[4][ETH_ALEN];
54 	u8	bmc_present		: 1;
55 	u8	need_bmc_tcam_reinit	: 1;
56 	u8	need_bmc_macda_sync	: 1;
57 	u8	all_multi		: 1;
58 	u8	link_speed;
59 	u8	link_fec;
60 	u32	anti_rollback_version;
61 };
62 
63 struct fbnic_fw_completion {
64 	u32 msg_type;
65 	struct completion done;
66 	struct kref ref_count;
67 	int result;
68 	union {
69 		struct {
70 			u32 size;
71 		} coredump_info;
72 		struct {
73 			u32 size;
74 			u16 stride;
75 			u8 *data[];
76 		} coredump;
77 		struct {
78 			u32 offset;
79 			u32 length;
80 		} fw_update;
81 		struct {
82 			u16 length;
83 			u8 offset;
84 			u8 page;
85 			u8 bank;
86 			u8 data[] __aligned(sizeof(u32)) __counted_by(length);
87 		} qsfp;
88 		struct {
89 			s32 millivolts;
90 			s32 millidegrees;
91 		} tsene;
92 	} u;
93 };
94 
95 void fbnic_mbx_init(struct fbnic_dev *fbd);
96 void fbnic_mbx_clean(struct fbnic_dev *fbd);
97 int fbnic_mbx_set_cmpl(struct fbnic_dev *fbd,
98 		       struct fbnic_fw_completion *cmpl_data);
99 void fbnic_mbx_clear_cmpl(struct fbnic_dev *fbd,
100 			  struct fbnic_fw_completion *cmpl_data);
101 void fbnic_mbx_poll(struct fbnic_dev *fbd);
102 int fbnic_mbx_poll_tx_ready(struct fbnic_dev *fbd);
103 void fbnic_mbx_flush_tx(struct fbnic_dev *fbd);
104 int fbnic_fw_xmit_ownership_msg(struct fbnic_dev *fbd, bool take_ownership);
105 int fbnic_fw_init_heartbeat(struct fbnic_dev *fbd, bool poll);
106 void fbnic_fw_check_heartbeat(struct fbnic_dev *fbd);
107 int fbnic_fw_xmit_coredump_info_msg(struct fbnic_dev *fbd,
108 				    struct fbnic_fw_completion *cmpl_data,
109 				    bool force);
110 int fbnic_fw_xmit_coredump_read_msg(struct fbnic_dev *fbd,
111 				    struct fbnic_fw_completion *cmpl_data,
112 				    u32 offset, u32 length);
113 int fbnic_fw_xmit_fw_start_upgrade(struct fbnic_dev *fbd,
114 				   struct fbnic_fw_completion *cmpl_data,
115 				   unsigned int id, unsigned int len);
116 int fbnic_fw_xmit_fw_write_chunk(struct fbnic_dev *fbd,
117 				 const u8 *data, u32 offset, u16 length,
118 				 int cancel_error);
119 int fbnic_fw_xmit_qsfp_read_msg(struct fbnic_dev *fbd,
120 				struct fbnic_fw_completion *cmpl_data,
121 				u32 page, u32 bank, u32 offset, u32 length);
122 int fbnic_fw_xmit_tsene_read_msg(struct fbnic_dev *fbd,
123 				 struct fbnic_fw_completion *cmpl_data);
124 int fbnic_fw_xmit_send_logs(struct fbnic_dev *fbd, bool enable,
125 			    bool send_log_history);
126 int fbnic_fw_xmit_rpc_macda_sync(struct fbnic_dev *fbd);
127 struct fbnic_fw_completion *__fbnic_fw_alloc_cmpl(u32 msg_type,
128 						  size_t priv_size);
129 struct fbnic_fw_completion *fbnic_fw_alloc_cmpl(u32 msg_type);
130 void fbnic_fw_put_cmpl(struct fbnic_fw_completion *cmpl_data);
131 
132 #define fbnic_mk_full_fw_ver_str(_rev_id, _delim, _commit, _str, _str_sz) \
133 do {									\
134 	const u32 __rev_id = _rev_id;					\
135 	snprintf(_str, _str_sz, "%02lu.%02lu.%02lu-%03lu%s%s",	\
136 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MAJOR, __rev_id),	\
137 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MINOR, __rev_id),	\
138 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_PATCH, __rev_id),	\
139 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_BUILD, __rev_id),	\
140 		 _delim, _commit);					\
141 } while (0)
142 
143 #define fbnic_mk_fw_ver_str(_rev_id, _str) \
144 	fbnic_mk_full_fw_ver_str(_rev_id, "", "", _str, sizeof(_str))
145 
146 enum {
147 	QSPI_SECTION_CMRT			= 0,
148 	QSPI_SECTION_CONTROL_FW			= 1,
149 	QSPI_SECTION_UCODE			= 2,
150 	QSPI_SECTION_OPTION_ROM			= 3,
151 	QSPI_SECTION_USER			= 4,
152 	QSPI_SECTION_INVALID,
153 };
154 
155 #define FW_HEARTBEAT_PERIOD		(10 * HZ)
156 
157 enum {
158 	FBNIC_TLV_MSG_ID_HOST_CAP_REQ			= 0x10,
159 	FBNIC_TLV_MSG_ID_FW_CAP_RESP			= 0x11,
160 	FBNIC_TLV_MSG_ID_OWNERSHIP_REQ			= 0x12,
161 	FBNIC_TLV_MSG_ID_OWNERSHIP_RESP			= 0x13,
162 	FBNIC_TLV_MSG_ID_HEARTBEAT_REQ			= 0x14,
163 	FBNIC_TLV_MSG_ID_HEARTBEAT_RESP			= 0x15,
164 	FBNIC_TLV_MSG_ID_COREDUMP_GET_INFO_REQ		= 0x18,
165 	FBNIC_TLV_MSG_ID_COREDUMP_GET_INFO_RESP		= 0x19,
166 	FBNIC_TLV_MSG_ID_COREDUMP_READ_REQ		= 0x20,
167 	FBNIC_TLV_MSG_ID_COREDUMP_READ_RESP		= 0x21,
168 	FBNIC_TLV_MSG_ID_FW_START_UPGRADE_REQ		= 0x22,
169 	FBNIC_TLV_MSG_ID_FW_START_UPGRADE_RESP		= 0x23,
170 	FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_REQ		= 0x24,
171 	FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_RESP		= 0x25,
172 	FBNIC_TLV_MSG_ID_FW_FINISH_UPGRADE_REQ		= 0x28,
173 	FBNIC_TLV_MSG_ID_FW_FINISH_UPGRADE_RESP		= 0x29,
174 	FBNIC_TLV_MSG_ID_QSFP_READ_REQ			= 0x38,
175 	FBNIC_TLV_MSG_ID_QSFP_READ_RESP			= 0x39,
176 	FBNIC_TLV_MSG_ID_TSENE_READ_REQ			= 0x3C,
177 	FBNIC_TLV_MSG_ID_TSENE_READ_RESP		= 0x3D,
178 	FBNIC_TLV_MSG_ID_LOG_SEND_LOGS_REQ		= 0x43,
179 	FBNIC_TLV_MSG_ID_LOG_MSG_REQ			= 0x44,
180 	FBNIC_TLV_MSG_ID_LOG_MSG_RESP			= 0x45,
181 	FBNIC_TLV_MSG_ID_RPC_MAC_SYNC_REQ		= 0x46,
182 };
183 
184 #define FBNIC_FW_CAP_RESP_VERSION_MAJOR		CSR_GENMASK(31, 24)
185 #define FBNIC_FW_CAP_RESP_VERSION_MINOR		CSR_GENMASK(23, 16)
186 #define FBNIC_FW_CAP_RESP_VERSION_PATCH		CSR_GENMASK(15, 8)
187 #define FBNIC_FW_CAP_RESP_VERSION_BUILD		CSR_GENMASK(7, 0)
188 enum {
189 	FBNIC_FW_CAP_RESP_VERSION			= 0x0,
190 	FBNIC_FW_CAP_RESP_BMC_PRESENT			= 0x1,
191 	FBNIC_FW_CAP_RESP_BMC_MAC_ADDR			= 0x2,
192 	FBNIC_FW_CAP_RESP_BMC_MAC_ARRAY			= 0x3,
193 	FBNIC_FW_CAP_RESP_STORED_VERSION		= 0x4,
194 	FBNIC_FW_CAP_RESP_ACTIVE_FW_SLOT		= 0x5,
195 	FBNIC_FW_CAP_RESP_VERSION_COMMIT_STR		= 0x6,
196 	FBNIC_FW_CAP_RESP_BMC_ALL_MULTI			= 0x8,
197 	FBNIC_FW_CAP_RESP_FW_STATE			= 0x9,
198 	FBNIC_FW_CAP_RESP_FW_LINK_SPEED			= 0xa,
199 	FBNIC_FW_CAP_RESP_FW_LINK_FEC			= 0xb,
200 	FBNIC_FW_CAP_RESP_STORED_COMMIT_STR		= 0xc,
201 	FBNIC_FW_CAP_RESP_CMRT_VERSION			= 0xd,
202 	FBNIC_FW_CAP_RESP_STORED_CMRT_VERSION		= 0xe,
203 	FBNIC_FW_CAP_RESP_CMRT_COMMIT_STR		= 0xf,
204 	FBNIC_FW_CAP_RESP_STORED_CMRT_COMMIT_STR	= 0x10,
205 	FBNIC_FW_CAP_RESP_UEFI_VERSION			= 0x11,
206 	FBNIC_FW_CAP_RESP_UEFI_COMMIT_STR		= 0x12,
207 	FBNIC_FW_CAP_RESP_ANTI_ROLLBACK_VERSION		= 0x15,
208 	FBNIC_FW_CAP_RESP_MSG_MAX
209 };
210 
211 enum {
212 	FBNIC_FW_LINK_MODE_25CR			= 1,
213 	FBNIC_FW_LINK_MODE_50CR2		= 2,
214 	FBNIC_FW_LINK_MODE_50CR			= 3,
215 	FBNIC_FW_LINK_MODE_100CR2		= 4,
216 };
217 
218 enum {
219 	FBNIC_FW_LINK_FEC_NONE			= 1,
220 	FBNIC_FW_LINK_FEC_RS			= 2,
221 	FBNIC_FW_LINK_FEC_BASER			= 3,
222 };
223 
224 enum {
225 	FBNIC_FW_QSFP_BANK			= 0x0,
226 	FBNIC_FW_QSFP_PAGE			= 0x1,
227 	FBNIC_FW_QSFP_OFFSET			= 0x2,
228 	FBNIC_FW_QSFP_LENGTH			= 0x3,
229 	FBNIC_FW_QSFP_ERROR			= 0x4,
230 	FBNIC_FW_QSFP_DATA			= 0x5,
231 	FBNIC_FW_QSFP_MSG_MAX
232 };
233 
234 enum {
235 	FBNIC_FW_TSENE_THERM			= 0x0,
236 	FBNIC_FW_TSENE_VOLT			= 0x1,
237 	FBNIC_FW_TSENE_ERROR			= 0x2,
238 	FBNIC_FW_TSENE_MSG_MAX
239 };
240 
241 enum {
242 	FBNIC_FW_OWNERSHIP_FLAG			= 0x0,
243 	FBNIC_FW_OWNERSHIP_TIME			= 0x1,
244 	FBNIC_FW_OWNERSHIP_MSG_MAX
245 };
246 
247 enum {
248 	FBNIC_FW_HEARTBEAT_UPTIME               = 0x0,
249 	FBNIC_FW_HEARTBEAT_NUMBER_OF_MESSAGES   = 0x1,
250 	FBNIC_FW_HEARTBEAT_MSG_MAX
251 };
252 
253 enum {
254 	FBNIC_FW_COREDUMP_REQ_INFO_CREATE	= 0x0,
255 	FBNIC_FW_COREDUMP_REQ_INFO_MSG_MAX
256 };
257 
258 enum {
259 	FBNIC_FW_COREDUMP_INFO_AVAILABLE	= 0x0,
260 	FBNIC_FW_COREDUMP_INFO_SIZE		= 0x1,
261 	FBNIC_FW_COREDUMP_INFO_ERROR		= 0x2,
262 	FBNIC_FW_COREDUMP_INFO_MSG_MAX
263 };
264 
265 enum {
266 	FBNIC_FW_COREDUMP_READ_OFFSET		= 0x0,
267 	FBNIC_FW_COREDUMP_READ_LENGTH		= 0x1,
268 	FBNIC_FW_COREDUMP_READ_DATA		= 0x2,
269 	FBNIC_FW_COREDUMP_READ_ERROR		= 0x3,
270 	FBNIC_FW_COREDUMP_READ_MSG_MAX
271 };
272 
273 enum {
274 	FBNIC_FW_START_UPGRADE_ERROR		= 0x0,
275 	FBNIC_FW_START_UPGRADE_SECTION		= 0x1,
276 	FBNIC_FW_START_UPGRADE_IMAGE_LENGTH	= 0x2,
277 	FBNIC_FW_START_UPGRADE_MSG_MAX
278 };
279 
280 enum {
281 	FBNIC_FW_WRITE_CHUNK_OFFSET		= 0x0,
282 	FBNIC_FW_WRITE_CHUNK_LENGTH		= 0x1,
283 	FBNIC_FW_WRITE_CHUNK_DATA		= 0x2,
284 	FBNIC_FW_WRITE_CHUNK_ERROR		= 0x3,
285 	FBNIC_FW_WRITE_CHUNK_MSG_MAX
286 };
287 
288 enum {
289 	FBNIC_FW_FINISH_UPGRADE_ERROR		= 0x0,
290 	FBNIC_FW_FINISH_UPGRADE_MSG_MAX
291 };
292 
293 enum {
294 	FBNIC_SEND_LOGS				= 0x0,
295 	FBNIC_SEND_LOGS_VERSION			= 0x1,
296 	FBNIC_SEND_LOGS_HISTORY			= 0x2,
297 	FBNIC_SEND_LOGS_MSG_MAX
298 };
299 
300 enum {
301 	FBNIC_FW_LOG_MSEC			= 0x0,
302 	FBNIC_FW_LOG_INDEX			= 0x1,
303 	FBNIC_FW_LOG_MSG			= 0x2,
304 	FBNIC_FW_LOG_LENGTH			= 0x3,
305 	FBNIC_FW_LOG_MSEC_ARRAY			= 0x4,
306 	FBNIC_FW_LOG_INDEX_ARRAY		= 0x5,
307 	FBNIC_FW_LOG_MSG_ARRAY			= 0x6,
308 	FBNIC_FW_LOG_MSG_MAX
309 };
310 
311 enum {
312 	FBNIC_FW_RPC_MAC_SYNC_RX_FLAGS		= 0x0,
313 	FBNIC_FW_RPC_MAC_SYNC_UC_ARRAY		= 0x1,
314 	FBNIC_FW_RPC_MAC_SYNC_MC_ARRAY		= 0x2,
315 	FBNIC_FW_RPC_MAC_SYNC_MAC_ADDR		= 0x3,
316 	FBNIC_FW_RPC_MAC_SYNC_MSG_MAX
317 };
318 
319 #define FW_RPC_MAC_SYNC_RX_FLAGS_PROMISC	1
320 #define FW_RPC_MAC_SYNC_RX_FLAGS_ALLMULTI	2
321 #define FW_RPC_MAC_SYNC_RX_FLAGS_BROADCAST	4
322 
323 #define FW_RPC_MAC_SYNC_UC_ARRAY_SIZE		8
324 #define FW_RPC_MAC_SYNC_MC_ARRAY_SIZE		8
325 
326 #endif /* _FBNIC_FW_H_ */
327