xref: /linux/drivers/net/ethernet/meta/fbnic/fbnic_fw.h (revision 23313771c7b99b3b8dba169bc71dae619d41ab56)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */
3 
4 #ifndef _FBNIC_FW_H_
5 #define _FBNIC_FW_H_
6 
7 #include <linux/if_ether.h>
8 #include <linux/types.h>
9 
10 struct fbnic_dev;
11 struct fbnic_tlv_msg;
12 
13 struct fbnic_fw_mbx {
14 	u8 ready, head, tail;
15 	struct {
16 		struct fbnic_tlv_msg	*msg;
17 		dma_addr_t		addr;
18 	} buf_info[FBNIC_IPC_MBX_DESC_LEN];
19 };
20 
21 // FW_VER_MAX_SIZE must match ETHTOOL_FWVERS_LEN
22 #define FBNIC_FW_VER_MAX_SIZE			32
23 // Formatted version is in the format XX.YY.ZZ_RRR_COMMIT
24 #define FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE	(FBNIC_FW_VER_MAX_SIZE - 13)
25 #define FBNIC_FW_LOG_VERSION			1
26 #define FBNIC_FW_LOG_MAX_SIZE			256
27 /*
28  * The max amount of logs which can fit in a single mailbox message. Firmware
29  * assumes each mailbox message is 4096B. The amount of messages supported is
30  * calculated as 4096 minus headers for message, arrays, and length minus the
31  * size of length divided by headers for each array plus the maximum LOG size,
32  * and the size of MSEC and INDEX. Put another way:
33  *
34  * MAX_LOG_HISTORY = ((4096 - TLV_HDR_SZ * 5 - LENGTH_SZ)
35  *                    / (FBNIC_FW_LOG_MAX_SIZE + TLV_HDR_SZ * 3 + MSEC_SZ
36  *                       + INDEX_SZ))
37  */
38 #define FBNIC_FW_MAX_LOG_HISTORY		14
39 
40 struct fbnic_fw_ver {
41 	u32 version;
42 	char commit[FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE];
43 };
44 
45 struct fbnic_fw_cap {
46 	struct {
47 		struct fbnic_fw_ver mgmt, bootloader;
48 	} running;
49 	struct {
50 		struct fbnic_fw_ver mgmt, bootloader, undi;
51 	} stored;
52 	u8	active_slot;
53 	u8	bmc_mac_addr[4][ETH_ALEN];
54 	u8	bmc_present		: 1;
55 	u8	need_bmc_tcam_reinit	: 1;
56 	u8	need_bmc_macda_sync	: 1;
57 	u8	all_multi		: 1;
58 	u8	link_speed;
59 	u8	link_fec;
60 	u32	anti_rollback_version;
61 };
62 
63 struct fbnic_fw_completion {
64 	u32 msg_type;
65 	struct completion done;
66 	struct kref ref_count;
67 	int result;
68 	union {
69 		struct {
70 			u32 offset;
71 			u32 length;
72 		} fw_update;
73 		struct {
74 			s32 millivolts;
75 			s32 millidegrees;
76 		} tsene;
77 	} u;
78 };
79 
80 void fbnic_mbx_init(struct fbnic_dev *fbd);
81 void fbnic_mbx_clean(struct fbnic_dev *fbd);
82 int fbnic_mbx_set_cmpl(struct fbnic_dev *fbd,
83 		       struct fbnic_fw_completion *cmpl_data);
84 void fbnic_mbx_clear_cmpl(struct fbnic_dev *fbd,
85 			  struct fbnic_fw_completion *cmpl_data);
86 void fbnic_mbx_poll(struct fbnic_dev *fbd);
87 int fbnic_mbx_poll_tx_ready(struct fbnic_dev *fbd);
88 void fbnic_mbx_flush_tx(struct fbnic_dev *fbd);
89 int fbnic_fw_xmit_ownership_msg(struct fbnic_dev *fbd, bool take_ownership);
90 int fbnic_fw_init_heartbeat(struct fbnic_dev *fbd, bool poll);
91 void fbnic_fw_check_heartbeat(struct fbnic_dev *fbd);
92 int fbnic_fw_xmit_fw_start_upgrade(struct fbnic_dev *fbd,
93 				   struct fbnic_fw_completion *cmpl_data,
94 				   unsigned int id, unsigned int len);
95 int fbnic_fw_xmit_fw_write_chunk(struct fbnic_dev *fbd,
96 				 const u8 *data, u32 offset, u16 length,
97 				 int cancel_error);
98 int fbnic_fw_xmit_tsene_read_msg(struct fbnic_dev *fbd,
99 				 struct fbnic_fw_completion *cmpl_data);
100 int fbnic_fw_xmit_send_logs(struct fbnic_dev *fbd, bool enable,
101 			    bool send_log_history);
102 int fbnic_fw_xmit_rpc_macda_sync(struct fbnic_dev *fbd);
103 struct fbnic_fw_completion *fbnic_fw_alloc_cmpl(u32 msg_type);
104 void fbnic_fw_put_cmpl(struct fbnic_fw_completion *cmpl_data);
105 
106 #define fbnic_mk_full_fw_ver_str(_rev_id, _delim, _commit, _str, _str_sz) \
107 do {									\
108 	const u32 __rev_id = _rev_id;					\
109 	snprintf(_str, _str_sz, "%02lu.%02lu.%02lu-%03lu%s%s",	\
110 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MAJOR, __rev_id),	\
111 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MINOR, __rev_id),	\
112 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_PATCH, __rev_id),	\
113 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_BUILD, __rev_id),	\
114 		 _delim, _commit);					\
115 } while (0)
116 
117 #define fbnic_mk_fw_ver_str(_rev_id, _str) \
118 	fbnic_mk_full_fw_ver_str(_rev_id, "", "", _str, sizeof(_str))
119 
120 enum {
121 	QSPI_SECTION_CMRT			= 0,
122 	QSPI_SECTION_CONTROL_FW			= 1,
123 	QSPI_SECTION_UCODE			= 2,
124 	QSPI_SECTION_OPTION_ROM			= 3,
125 	QSPI_SECTION_USER			= 4,
126 	QSPI_SECTION_INVALID,
127 };
128 
129 #define FW_HEARTBEAT_PERIOD		(10 * HZ)
130 
131 enum {
132 	FBNIC_TLV_MSG_ID_HOST_CAP_REQ			= 0x10,
133 	FBNIC_TLV_MSG_ID_FW_CAP_RESP			= 0x11,
134 	FBNIC_TLV_MSG_ID_OWNERSHIP_REQ			= 0x12,
135 	FBNIC_TLV_MSG_ID_OWNERSHIP_RESP			= 0x13,
136 	FBNIC_TLV_MSG_ID_HEARTBEAT_REQ			= 0x14,
137 	FBNIC_TLV_MSG_ID_HEARTBEAT_RESP			= 0x15,
138 	FBNIC_TLV_MSG_ID_FW_START_UPGRADE_REQ		= 0x22,
139 	FBNIC_TLV_MSG_ID_FW_START_UPGRADE_RESP		= 0x23,
140 	FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_REQ		= 0x24,
141 	FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_RESP		= 0x25,
142 	FBNIC_TLV_MSG_ID_FW_FINISH_UPGRADE_REQ		= 0x28,
143 	FBNIC_TLV_MSG_ID_FW_FINISH_UPGRADE_RESP		= 0x29,
144 	FBNIC_TLV_MSG_ID_TSENE_READ_REQ			= 0x3C,
145 	FBNIC_TLV_MSG_ID_TSENE_READ_RESP		= 0x3D,
146 	FBNIC_TLV_MSG_ID_LOG_SEND_LOGS_REQ		= 0x43,
147 	FBNIC_TLV_MSG_ID_LOG_MSG_REQ			= 0x44,
148 	FBNIC_TLV_MSG_ID_LOG_MSG_RESP			= 0x45,
149 	FBNIC_TLV_MSG_ID_RPC_MAC_SYNC_REQ		= 0x46,
150 };
151 
152 #define FBNIC_FW_CAP_RESP_VERSION_MAJOR		CSR_GENMASK(31, 24)
153 #define FBNIC_FW_CAP_RESP_VERSION_MINOR		CSR_GENMASK(23, 16)
154 #define FBNIC_FW_CAP_RESP_VERSION_PATCH		CSR_GENMASK(15, 8)
155 #define FBNIC_FW_CAP_RESP_VERSION_BUILD		CSR_GENMASK(7, 0)
156 enum {
157 	FBNIC_FW_CAP_RESP_VERSION			= 0x0,
158 	FBNIC_FW_CAP_RESP_BMC_PRESENT			= 0x1,
159 	FBNIC_FW_CAP_RESP_BMC_MAC_ADDR			= 0x2,
160 	FBNIC_FW_CAP_RESP_BMC_MAC_ARRAY			= 0x3,
161 	FBNIC_FW_CAP_RESP_STORED_VERSION		= 0x4,
162 	FBNIC_FW_CAP_RESP_ACTIVE_FW_SLOT		= 0x5,
163 	FBNIC_FW_CAP_RESP_VERSION_COMMIT_STR		= 0x6,
164 	FBNIC_FW_CAP_RESP_BMC_ALL_MULTI			= 0x8,
165 	FBNIC_FW_CAP_RESP_FW_STATE			= 0x9,
166 	FBNIC_FW_CAP_RESP_FW_LINK_SPEED			= 0xa,
167 	FBNIC_FW_CAP_RESP_FW_LINK_FEC			= 0xb,
168 	FBNIC_FW_CAP_RESP_STORED_COMMIT_STR		= 0xc,
169 	FBNIC_FW_CAP_RESP_CMRT_VERSION			= 0xd,
170 	FBNIC_FW_CAP_RESP_STORED_CMRT_VERSION		= 0xe,
171 	FBNIC_FW_CAP_RESP_CMRT_COMMIT_STR		= 0xf,
172 	FBNIC_FW_CAP_RESP_STORED_CMRT_COMMIT_STR	= 0x10,
173 	FBNIC_FW_CAP_RESP_UEFI_VERSION			= 0x11,
174 	FBNIC_FW_CAP_RESP_UEFI_COMMIT_STR		= 0x12,
175 	FBNIC_FW_CAP_RESP_ANTI_ROLLBACK_VERSION		= 0x15,
176 	FBNIC_FW_CAP_RESP_MSG_MAX
177 };
178 
179 enum {
180 	FBNIC_FW_LINK_MODE_25CR			= 1,
181 	FBNIC_FW_LINK_MODE_50CR2		= 2,
182 	FBNIC_FW_LINK_MODE_50CR			= 3,
183 	FBNIC_FW_LINK_MODE_100CR2		= 4,
184 };
185 
186 enum {
187 	FBNIC_FW_LINK_FEC_NONE			= 1,
188 	FBNIC_FW_LINK_FEC_RS			= 2,
189 	FBNIC_FW_LINK_FEC_BASER			= 3,
190 };
191 
192 enum {
193 	FBNIC_FW_TSENE_THERM			= 0x0,
194 	FBNIC_FW_TSENE_VOLT			= 0x1,
195 	FBNIC_FW_TSENE_ERROR			= 0x2,
196 	FBNIC_FW_TSENE_MSG_MAX
197 };
198 
199 enum {
200 	FBNIC_FW_OWNERSHIP_FLAG			= 0x0,
201 	FBNIC_FW_OWNERSHIP_MSG_MAX
202 };
203 
204 enum {
205 	FBNIC_FW_START_UPGRADE_ERROR		= 0x0,
206 	FBNIC_FW_START_UPGRADE_SECTION		= 0x1,
207 	FBNIC_FW_START_UPGRADE_IMAGE_LENGTH	= 0x2,
208 	FBNIC_FW_START_UPGRADE_MSG_MAX
209 };
210 
211 enum {
212 	FBNIC_FW_WRITE_CHUNK_OFFSET		= 0x0,
213 	FBNIC_FW_WRITE_CHUNK_LENGTH		= 0x1,
214 	FBNIC_FW_WRITE_CHUNK_DATA		= 0x2,
215 	FBNIC_FW_WRITE_CHUNK_ERROR		= 0x3,
216 	FBNIC_FW_WRITE_CHUNK_MSG_MAX
217 };
218 
219 enum {
220 	FBNIC_FW_FINISH_UPGRADE_ERROR		= 0x0,
221 	FBNIC_FW_FINISH_UPGRADE_MSG_MAX
222 };
223 
224 enum {
225 	FBNIC_SEND_LOGS				= 0x0,
226 	FBNIC_SEND_LOGS_VERSION			= 0x1,
227 	FBNIC_SEND_LOGS_HISTORY			= 0x2,
228 	FBNIC_SEND_LOGS_MSG_MAX
229 };
230 
231 enum {
232 	FBNIC_FW_LOG_MSEC			= 0x0,
233 	FBNIC_FW_LOG_INDEX			= 0x1,
234 	FBNIC_FW_LOG_MSG			= 0x2,
235 	FBNIC_FW_LOG_LENGTH			= 0x3,
236 	FBNIC_FW_LOG_MSEC_ARRAY			= 0x4,
237 	FBNIC_FW_LOG_INDEX_ARRAY		= 0x5,
238 	FBNIC_FW_LOG_MSG_ARRAY			= 0x6,
239 	FBNIC_FW_LOG_MSG_MAX
240 };
241 
242 enum {
243 	FBNIC_FW_RPC_MAC_SYNC_RX_FLAGS		= 0x0,
244 	FBNIC_FW_RPC_MAC_SYNC_UC_ARRAY		= 0x1,
245 	FBNIC_FW_RPC_MAC_SYNC_MC_ARRAY		= 0x2,
246 	FBNIC_FW_RPC_MAC_SYNC_MAC_ADDR		= 0x3,
247 	FBNIC_FW_RPC_MAC_SYNC_MSG_MAX
248 };
249 
250 #define FW_RPC_MAC_SYNC_RX_FLAGS_PROMISC	1
251 #define FW_RPC_MAC_SYNC_RX_FLAGS_ALLMULTI	2
252 #define FW_RPC_MAC_SYNC_RX_FLAGS_BROADCAST	4
253 
254 #define FW_RPC_MAC_SYNC_UC_ARRAY_SIZE		8
255 #define FW_RPC_MAC_SYNC_MC_ARRAY_SIZE		8
256 
257 #endif /* _FBNIC_FW_H_ */
258