1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */ 3 4 #ifndef _FBNIC_H_ 5 #define _FBNIC_H_ 6 7 #include <linux/interrupt.h> 8 #include <linux/io.h> 9 #include <linux/ptp_clock_kernel.h> 10 #include <linux/types.h> 11 #include <linux/workqueue.h> 12 13 #include "fbnic_csr.h" 14 #include "fbnic_fw.h" 15 #include "fbnic_fw_log.h" 16 #include "fbnic_hw_stats.h" 17 #include "fbnic_mac.h" 18 #include "fbnic_rpc.h" 19 20 struct fbnic_napi_vector; 21 22 #define FBNIC_MAX_NAPI_VECTORS 128u 23 #define FBNIC_MBX_CMPL_SLOTS 4 24 25 struct fbnic_dev { 26 struct device *dev; 27 struct net_device *netdev; 28 struct dentry *dbg_fbd; 29 struct device *hwmon; 30 struct devlink_health_reporter *fw_reporter; 31 struct devlink_health_reporter *otp_reporter; 32 33 u32 __iomem *uc_addr0; 34 u32 __iomem *uc_addr4; 35 const struct fbnic_mac *mac; 36 unsigned int fw_msix_vector; 37 unsigned int mac_msix_vector; 38 unsigned short num_irqs; 39 40 struct { 41 u8 users; 42 char name[IFNAMSIZ + 9]; 43 } napi_irq[FBNIC_MAX_NAPI_VECTORS]; 44 45 struct delayed_work service_task; 46 47 struct fbnic_fw_mbx mbx[FBNIC_IPC_MBX_INDICES]; 48 struct fbnic_fw_cap fw_cap; 49 struct fbnic_fw_completion *cmpl_data[FBNIC_MBX_CMPL_SLOTS]; 50 /* Lock protecting Tx Mailbox queue to prevent possible races */ 51 spinlock_t fw_tx_lock; 52 53 unsigned long last_heartbeat_request; 54 unsigned long last_heartbeat_response; 55 u8 fw_heartbeat_enabled; 56 57 u64 dsn; 58 u32 mps; 59 u32 readrq; 60 61 /* Local copy of the devices TCAM */ 62 struct fbnic_act_tcam act_tcam[FBNIC_RPC_TCAM_ACT_NUM_ENTRIES]; 63 struct fbnic_mac_addr mac_addr[FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES]; 64 u8 mac_addr_boundary; 65 u8 tce_tcam_last; 66 67 /* IP TCAM */ 68 struct fbnic_ip_addr ip_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES]; 69 struct fbnic_ip_addr ip_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES]; 70 struct fbnic_ip_addr ipo_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES]; 71 struct fbnic_ip_addr ipo_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES]; 72 73 /* Number of TCQs/RCQs available on hardware */ 74 u16 max_num_queues; 75 76 /* Lock protecting writes to @time_high, @time_offset of fbnic_netdev, 77 * and the HW time CSR machinery. 78 */ 79 spinlock_t time_lock; 80 /* Externally accessible PTP clock, may be NULL */ 81 struct ptp_clock *ptp; 82 struct ptp_clock_info ptp_info; 83 /* Last @time_high refresh time in jiffies (to catch stalls) */ 84 unsigned long last_read; 85 86 /* PMD specific data */ 87 unsigned long end_of_pmd_training; 88 u8 pmd_state; 89 90 /* Local copy of hardware statistics */ 91 struct fbnic_hw_stats hw_stats; 92 93 /* Firmware time since boot in milliseconds */ 94 u64 firmware_time; 95 u64 prev_firmware_time; 96 97 struct fbnic_fw_log fw_log; 98 99 /* MDIO bus for PHYs */ 100 struct mii_bus *mdio_bus; 101 }; 102 103 /* Reserve entry 0 in the MSI-X "others" array until we have filled all 104 * 32 of the possible interrupt slots. By doing this we can avoid any 105 * potential conflicts should we need to enable one of the debug interrupt 106 * causes later. 107 */ 108 enum { 109 FBNIC_FW_MSIX_ENTRY, 110 FBNIC_PCS_MSIX_ENTRY, 111 FBNIC_NON_NAPI_VECTORS 112 }; 113 114 static inline bool fbnic_present(struct fbnic_dev *fbd) 115 { 116 return !!READ_ONCE(fbd->uc_addr0); 117 } 118 119 static inline void fbnic_wr32(struct fbnic_dev *fbd, u32 reg, u32 val) 120 { 121 u32 __iomem *csr = READ_ONCE(fbd->uc_addr0); 122 123 if (csr) 124 writel(val, csr + reg); 125 } 126 127 u32 fbnic_rd32(struct fbnic_dev *fbd, u32 reg); 128 129 static inline void fbnic_wrfl(struct fbnic_dev *fbd) 130 { 131 fbnic_rd32(fbd, FBNIC_MASTER_SPARE_0); 132 } 133 134 static inline void 135 fbnic_rmw32(struct fbnic_dev *fbd, u32 reg, u32 mask, u32 val) 136 { 137 u32 v; 138 139 v = fbnic_rd32(fbd, reg); 140 v &= ~mask; 141 v |= val; 142 fbnic_wr32(fbd, reg, v); 143 } 144 145 #define wr32(_f, _r, _v) fbnic_wr32(_f, _r, _v) 146 #define rd32(_f, _r) fbnic_rd32(_f, _r) 147 #define wrfl(_f) fbnic_wrfl(_f) 148 149 bool fbnic_fw_present(struct fbnic_dev *fbd); 150 u32 fbnic_fw_rd32(struct fbnic_dev *fbd, u32 reg); 151 void fbnic_fw_wr32(struct fbnic_dev *fbd, u32 reg, u32 val); 152 153 #define fw_rd32(_f, _r) fbnic_fw_rd32(_f, _r) 154 #define fw_wr32(_f, _r, _v) fbnic_fw_wr32(_f, _r, _v) 155 #define fw_wrfl(_f) fbnic_fw_rd32(_f, FBNIC_FW_ZERO_REG) 156 157 static inline bool fbnic_bmc_present(struct fbnic_dev *fbd) 158 { 159 return fbd->fw_cap.bmc_present; 160 } 161 162 static inline bool fbnic_init_failure(struct fbnic_dev *fbd) 163 { 164 return !fbd->netdev; 165 } 166 167 extern char fbnic_driver_name[]; 168 169 void fbnic_devlink_free(struct fbnic_dev *fbd); 170 struct fbnic_dev *fbnic_devlink_alloc(struct pci_dev *pdev); 171 int fbnic_devlink_health_create(struct fbnic_dev *fbd); 172 void fbnic_devlink_health_destroy(struct fbnic_dev *fbd); 173 void fbnic_devlink_register(struct fbnic_dev *fbd); 174 void fbnic_devlink_unregister(struct fbnic_dev *fbd); 175 void __printf(2, 3) 176 fbnic_devlink_fw_report(struct fbnic_dev *fbd, const char *format, ...); 177 void fbnic_devlink_otp_check(struct fbnic_dev *fbd, const char *msg); 178 179 int fbnic_fw_request_mbx(struct fbnic_dev *fbd); 180 void fbnic_fw_free_mbx(struct fbnic_dev *fbd); 181 182 void fbnic_hwmon_register(struct fbnic_dev *fbd); 183 void fbnic_hwmon_unregister(struct fbnic_dev *fbd); 184 185 int fbnic_mac_request_irq(struct fbnic_dev *fbd); 186 void fbnic_mac_free_irq(struct fbnic_dev *fbd); 187 188 void fbnic_napi_name_irqs(struct fbnic_dev *fbd); 189 int fbnic_napi_request_irq(struct fbnic_dev *fbd, 190 struct fbnic_napi_vector *nv); 191 void fbnic_napi_free_irq(struct fbnic_dev *fbd, 192 struct fbnic_napi_vector *nv); 193 void fbnic_synchronize_irq(struct fbnic_dev *fbd, int nr); 194 int fbnic_request_irq(struct fbnic_dev *dev, int nr, irq_handler_t handler, 195 unsigned long flags, const char *name, void *data); 196 void fbnic_free_irq(struct fbnic_dev *dev, int nr, void *data); 197 void fbnic_free_irqs(struct fbnic_dev *fbd); 198 int fbnic_alloc_irqs(struct fbnic_dev *fbd); 199 200 void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version, 201 const size_t str_sz); 202 203 void fbnic_dbg_fbd_init(struct fbnic_dev *fbd); 204 void fbnic_dbg_fbd_exit(struct fbnic_dev *fbd); 205 void fbnic_dbg_init(void); 206 void fbnic_dbg_exit(void); 207 208 void fbnic_rpc_reset_valid_entries(struct fbnic_dev *fbd); 209 210 int fbnic_mdiobus_create(struct fbnic_dev *fbd); 211 212 void fbnic_csr_get_regs(struct fbnic_dev *fbd, u32 *data, u32 *regs_version); 213 int fbnic_csr_regs_len(struct fbnic_dev *fbd); 214 215 void fbnic_config_txrx_usecs(struct fbnic_napi_vector *nv, u32 arm); 216 void fbnic_config_rx_frames(struct fbnic_napi_vector *nv); 217 218 enum fbnic_boards { 219 fbnic_board_asic 220 }; 221 222 struct fbnic_info { 223 unsigned int max_num_queues; 224 unsigned int bar_mask; 225 }; 226 227 #endif /* _FBNIC_H_ */ 228