1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */ 3 4 #ifndef _FBNIC_H_ 5 #define _FBNIC_H_ 6 7 #include <linux/interrupt.h> 8 #include <linux/io.h> 9 #include <linux/ptp_clock_kernel.h> 10 #include <linux/types.h> 11 #include <linux/workqueue.h> 12 13 #include "fbnic_csr.h" 14 #include "fbnic_fw.h" 15 #include "fbnic_hw_stats.h" 16 #include "fbnic_mac.h" 17 #include "fbnic_rpc.h" 18 19 struct fbnic_napi_vector; 20 21 #define FBNIC_MAX_NAPI_VECTORS 128u 22 23 struct fbnic_dev { 24 struct device *dev; 25 struct net_device *netdev; 26 struct dentry *dbg_fbd; 27 struct device *hwmon; 28 29 u32 __iomem *uc_addr0; 30 u32 __iomem *uc_addr4; 31 const struct fbnic_mac *mac; 32 unsigned int fw_msix_vector; 33 unsigned int pcs_msix_vector; 34 unsigned short num_irqs; 35 36 struct { 37 u8 users; 38 char name[IFNAMSIZ + 9]; 39 } napi_irq[FBNIC_MAX_NAPI_VECTORS]; 40 41 struct delayed_work service_task; 42 43 struct fbnic_fw_mbx mbx[FBNIC_IPC_MBX_INDICES]; 44 struct fbnic_fw_cap fw_cap; 45 struct fbnic_fw_completion *cmpl_data; 46 /* Lock protecting Tx Mailbox queue to prevent possible races */ 47 spinlock_t fw_tx_lock; 48 49 unsigned long last_heartbeat_request; 50 unsigned long last_heartbeat_response; 51 u8 fw_heartbeat_enabled; 52 53 u64 dsn; 54 u32 mps; 55 u32 readrq; 56 57 /* Local copy of the devices TCAM */ 58 struct fbnic_act_tcam act_tcam[FBNIC_RPC_TCAM_ACT_NUM_ENTRIES]; 59 struct fbnic_mac_addr mac_addr[FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES]; 60 u8 mac_addr_boundary; 61 u8 tce_tcam_last; 62 63 /* IP TCAM */ 64 struct fbnic_ip_addr ip_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES]; 65 struct fbnic_ip_addr ip_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES]; 66 struct fbnic_ip_addr ipo_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES]; 67 struct fbnic_ip_addr ipo_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES]; 68 69 /* Number of TCQs/RCQs available on hardware */ 70 u16 max_num_queues; 71 72 /* Lock protecting writes to @time_high, @time_offset of fbnic_netdev, 73 * and the HW time CSR machinery. 74 */ 75 spinlock_t time_lock; 76 /* Externally accessible PTP clock, may be NULL */ 77 struct ptp_clock *ptp; 78 struct ptp_clock_info ptp_info; 79 /* Last @time_high refresh time in jiffies (to catch stalls) */ 80 unsigned long last_read; 81 82 /* Local copy of hardware statistics */ 83 struct fbnic_hw_stats hw_stats; 84 85 /* Lock protecting access to hw_stats */ 86 spinlock_t hw_stats_lock; 87 }; 88 89 /* Reserve entry 0 in the MSI-X "others" array until we have filled all 90 * 32 of the possible interrupt slots. By doing this we can avoid any 91 * potential conflicts should we need to enable one of the debug interrupt 92 * causes later. 93 */ 94 enum { 95 FBNIC_FW_MSIX_ENTRY, 96 FBNIC_PCS_MSIX_ENTRY, 97 FBNIC_NON_NAPI_VECTORS 98 }; 99 100 static inline bool fbnic_present(struct fbnic_dev *fbd) 101 { 102 return !!READ_ONCE(fbd->uc_addr0); 103 } 104 105 static inline void fbnic_wr32(struct fbnic_dev *fbd, u32 reg, u32 val) 106 { 107 u32 __iomem *csr = READ_ONCE(fbd->uc_addr0); 108 109 if (csr) 110 writel(val, csr + reg); 111 } 112 113 u32 fbnic_rd32(struct fbnic_dev *fbd, u32 reg); 114 115 static inline void fbnic_wrfl(struct fbnic_dev *fbd) 116 { 117 fbnic_rd32(fbd, FBNIC_MASTER_SPARE_0); 118 } 119 120 static inline void 121 fbnic_rmw32(struct fbnic_dev *fbd, u32 reg, u32 mask, u32 val) 122 { 123 u32 v; 124 125 v = fbnic_rd32(fbd, reg); 126 v &= ~mask; 127 v |= val; 128 fbnic_wr32(fbd, reg, v); 129 } 130 131 #define wr32(_f, _r, _v) fbnic_wr32(_f, _r, _v) 132 #define rd32(_f, _r) fbnic_rd32(_f, _r) 133 #define wrfl(_f) fbnic_wrfl(_f) 134 135 bool fbnic_fw_present(struct fbnic_dev *fbd); 136 u32 fbnic_fw_rd32(struct fbnic_dev *fbd, u32 reg); 137 void fbnic_fw_wr32(struct fbnic_dev *fbd, u32 reg, u32 val); 138 139 #define fw_rd32(_f, _r) fbnic_fw_rd32(_f, _r) 140 #define fw_wr32(_f, _r, _v) fbnic_fw_wr32(_f, _r, _v) 141 #define fw_wrfl(_f) fbnic_fw_rd32(_f, FBNIC_FW_ZERO_REG) 142 143 static inline bool fbnic_bmc_present(struct fbnic_dev *fbd) 144 { 145 return fbd->fw_cap.bmc_present; 146 } 147 148 static inline bool fbnic_init_failure(struct fbnic_dev *fbd) 149 { 150 return !fbd->netdev; 151 } 152 153 extern char fbnic_driver_name[]; 154 155 void fbnic_devlink_free(struct fbnic_dev *fbd); 156 struct fbnic_dev *fbnic_devlink_alloc(struct pci_dev *pdev); 157 void fbnic_devlink_register(struct fbnic_dev *fbd); 158 void fbnic_devlink_unregister(struct fbnic_dev *fbd); 159 160 int fbnic_fw_enable_mbx(struct fbnic_dev *fbd); 161 void fbnic_fw_disable_mbx(struct fbnic_dev *fbd); 162 163 void fbnic_hwmon_register(struct fbnic_dev *fbd); 164 void fbnic_hwmon_unregister(struct fbnic_dev *fbd); 165 166 int fbnic_pcs_irq_enable(struct fbnic_dev *fbd); 167 void fbnic_pcs_irq_disable(struct fbnic_dev *fbd); 168 169 void fbnic_napi_name_irqs(struct fbnic_dev *fbd); 170 int fbnic_napi_request_irq(struct fbnic_dev *fbd, 171 struct fbnic_napi_vector *nv); 172 void fbnic_napi_free_irq(struct fbnic_dev *fbd, 173 struct fbnic_napi_vector *nv); 174 void fbnic_synchronize_irq(struct fbnic_dev *fbd, int nr); 175 int fbnic_request_irq(struct fbnic_dev *dev, int nr, irq_handler_t handler, 176 unsigned long flags, const char *name, void *data); 177 void fbnic_free_irq(struct fbnic_dev *dev, int nr, void *data); 178 void fbnic_free_irqs(struct fbnic_dev *fbd); 179 int fbnic_alloc_irqs(struct fbnic_dev *fbd); 180 181 void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version, 182 const size_t str_sz); 183 184 void fbnic_dbg_fbd_init(struct fbnic_dev *fbd); 185 void fbnic_dbg_fbd_exit(struct fbnic_dev *fbd); 186 void fbnic_dbg_init(void); 187 void fbnic_dbg_exit(void); 188 189 void fbnic_csr_get_regs(struct fbnic_dev *fbd, u32 *data, u32 *regs_version); 190 int fbnic_csr_regs_len(struct fbnic_dev *fbd); 191 192 void fbnic_config_txrx_usecs(struct fbnic_napi_vector *nv, u32 arm); 193 void fbnic_config_rx_frames(struct fbnic_napi_vector *nv); 194 195 enum fbnic_boards { 196 fbnic_board_asic 197 }; 198 199 struct fbnic_info { 200 unsigned int max_num_queues; 201 unsigned int bar_mask; 202 }; 203 204 #endif /* _FBNIC_H_ */ 205