1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */ 3 4 #ifndef _FBNIC_H_ 5 #define _FBNIC_H_ 6 7 #include <linux/interrupt.h> 8 #include <linux/io.h> 9 #include <linux/types.h> 10 #include <linux/workqueue.h> 11 12 #include "fbnic_csr.h" 13 #include "fbnic_fw.h" 14 #include "fbnic_mac.h" 15 16 struct fbnic_dev { 17 struct device *dev; 18 struct net_device *netdev; 19 20 u32 __iomem *uc_addr0; 21 u32 __iomem *uc_addr4; 22 const struct fbnic_mac *mac; 23 unsigned int fw_msix_vector; 24 unsigned int pcs_msix_vector; 25 unsigned short num_irqs; 26 27 struct delayed_work service_task; 28 29 struct fbnic_fw_mbx mbx[FBNIC_IPC_MBX_INDICES]; 30 struct fbnic_fw_cap fw_cap; 31 /* Lock protecting Tx Mailbox queue to prevent possible races */ 32 spinlock_t fw_tx_lock; 33 34 unsigned long last_heartbeat_request; 35 unsigned long last_heartbeat_response; 36 u8 fw_heartbeat_enabled; 37 38 u64 dsn; 39 u32 mps; 40 u32 readrq; 41 42 /* Number of TCQs/RCQs available on hardware */ 43 u16 max_num_queues; 44 }; 45 46 /* Reserve entry 0 in the MSI-X "others" array until we have filled all 47 * 32 of the possible interrupt slots. By doing this we can avoid any 48 * potential conflicts should we need to enable one of the debug interrupt 49 * causes later. 50 */ 51 enum { 52 FBNIC_FW_MSIX_ENTRY, 53 FBNIC_PCS_MSIX_ENTRY, 54 FBNIC_NON_NAPI_VECTORS 55 }; 56 57 static inline bool fbnic_present(struct fbnic_dev *fbd) 58 { 59 return !!READ_ONCE(fbd->uc_addr0); 60 } 61 62 static inline void fbnic_wr32(struct fbnic_dev *fbd, u32 reg, u32 val) 63 { 64 u32 __iomem *csr = READ_ONCE(fbd->uc_addr0); 65 66 if (csr) 67 writel(val, csr + reg); 68 } 69 70 u32 fbnic_rd32(struct fbnic_dev *fbd, u32 reg); 71 72 static inline void fbnic_wrfl(struct fbnic_dev *fbd) 73 { 74 fbnic_rd32(fbd, FBNIC_MASTER_SPARE_0); 75 } 76 77 static inline void 78 fbnic_rmw32(struct fbnic_dev *fbd, u32 reg, u32 mask, u32 val) 79 { 80 u32 v; 81 82 v = fbnic_rd32(fbd, reg); 83 v &= ~mask; 84 v |= val; 85 fbnic_wr32(fbd, reg, v); 86 } 87 88 #define wr32(_f, _r, _v) fbnic_wr32(_f, _r, _v) 89 #define rd32(_f, _r) fbnic_rd32(_f, _r) 90 #define wrfl(_f) fbnic_wrfl(_f) 91 92 bool fbnic_fw_present(struct fbnic_dev *fbd); 93 u32 fbnic_fw_rd32(struct fbnic_dev *fbd, u32 reg); 94 void fbnic_fw_wr32(struct fbnic_dev *fbd, u32 reg, u32 val); 95 96 #define fw_rd32(_f, _r) fbnic_fw_rd32(_f, _r) 97 #define fw_wr32(_f, _r, _v) fbnic_fw_wr32(_f, _r, _v) 98 #define fw_wrfl(_f) fbnic_fw_rd32(_f, FBNIC_FW_ZERO_REG) 99 100 static inline bool fbnic_bmc_present(struct fbnic_dev *fbd) 101 { 102 return fbd->fw_cap.bmc_present; 103 } 104 105 static inline bool fbnic_init_failure(struct fbnic_dev *fbd) 106 { 107 return !fbd->netdev; 108 } 109 110 extern char fbnic_driver_name[]; 111 112 void fbnic_devlink_free(struct fbnic_dev *fbd); 113 struct fbnic_dev *fbnic_devlink_alloc(struct pci_dev *pdev); 114 void fbnic_devlink_register(struct fbnic_dev *fbd); 115 void fbnic_devlink_unregister(struct fbnic_dev *fbd); 116 117 int fbnic_fw_enable_mbx(struct fbnic_dev *fbd); 118 void fbnic_fw_disable_mbx(struct fbnic_dev *fbd); 119 120 int fbnic_pcs_irq_enable(struct fbnic_dev *fbd); 121 void fbnic_pcs_irq_disable(struct fbnic_dev *fbd); 122 123 int fbnic_request_irq(struct fbnic_dev *dev, int nr, irq_handler_t handler, 124 unsigned long flags, const char *name, void *data); 125 void fbnic_free_irq(struct fbnic_dev *dev, int nr, void *data); 126 void fbnic_free_irqs(struct fbnic_dev *fbd); 127 int fbnic_alloc_irqs(struct fbnic_dev *fbd); 128 129 enum fbnic_boards { 130 fbnic_board_asic 131 }; 132 133 struct fbnic_info { 134 unsigned int max_num_queues; 135 unsigned int bar_mask; 136 }; 137 138 #endif /* _FBNIC_H_ */ 139