1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */ 3 4 #ifndef _FBNIC_H_ 5 #define _FBNIC_H_ 6 7 #include <linux/interrupt.h> 8 #include <linux/io.h> 9 #include <linux/ptp_clock_kernel.h> 10 #include <linux/types.h> 11 #include <linux/workqueue.h> 12 13 #include "fbnic_csr.h" 14 #include "fbnic_fw.h" 15 #include "fbnic_hw_stats.h" 16 #include "fbnic_mac.h" 17 #include "fbnic_rpc.h" 18 19 struct fbnic_napi_vector; 20 21 #define FBNIC_MAX_NAPI_VECTORS 128u 22 23 struct fbnic_dev { 24 struct device *dev; 25 struct net_device *netdev; 26 struct dentry *dbg_fbd; 27 28 u32 __iomem *uc_addr0; 29 u32 __iomem *uc_addr4; 30 const struct fbnic_mac *mac; 31 unsigned int fw_msix_vector; 32 unsigned int pcs_msix_vector; 33 unsigned short num_irqs; 34 35 struct { 36 u8 users; 37 char name[IFNAMSIZ + 9]; 38 } napi_irq[FBNIC_MAX_NAPI_VECTORS]; 39 40 struct delayed_work service_task; 41 42 struct fbnic_fw_mbx mbx[FBNIC_IPC_MBX_INDICES]; 43 struct fbnic_fw_cap fw_cap; 44 /* Lock protecting Tx Mailbox queue to prevent possible races */ 45 spinlock_t fw_tx_lock; 46 47 unsigned long last_heartbeat_request; 48 unsigned long last_heartbeat_response; 49 u8 fw_heartbeat_enabled; 50 51 u64 dsn; 52 u32 mps; 53 u32 readrq; 54 55 /* Local copy of the devices TCAM */ 56 struct fbnic_act_tcam act_tcam[FBNIC_RPC_TCAM_ACT_NUM_ENTRIES]; 57 struct fbnic_mac_addr mac_addr[FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES]; 58 u8 mac_addr_boundary; 59 u8 tce_tcam_last; 60 61 /* Number of TCQs/RCQs available on hardware */ 62 u16 max_num_queues; 63 64 /* Lock protecting writes to @time_high, @time_offset of fbnic_netdev, 65 * and the HW time CSR machinery. 66 */ 67 spinlock_t time_lock; 68 /* Externally accessible PTP clock, may be NULL */ 69 struct ptp_clock *ptp; 70 struct ptp_clock_info ptp_info; 71 /* Last @time_high refresh time in jiffies (to catch stalls) */ 72 unsigned long last_read; 73 74 /* Local copy of hardware statistics */ 75 struct fbnic_hw_stats hw_stats; 76 }; 77 78 /* Reserve entry 0 in the MSI-X "others" array until we have filled all 79 * 32 of the possible interrupt slots. By doing this we can avoid any 80 * potential conflicts should we need to enable one of the debug interrupt 81 * causes later. 82 */ 83 enum { 84 FBNIC_FW_MSIX_ENTRY, 85 FBNIC_PCS_MSIX_ENTRY, 86 FBNIC_NON_NAPI_VECTORS 87 }; 88 89 static inline bool fbnic_present(struct fbnic_dev *fbd) 90 { 91 return !!READ_ONCE(fbd->uc_addr0); 92 } 93 94 static inline void fbnic_wr32(struct fbnic_dev *fbd, u32 reg, u32 val) 95 { 96 u32 __iomem *csr = READ_ONCE(fbd->uc_addr0); 97 98 if (csr) 99 writel(val, csr + reg); 100 } 101 102 u32 fbnic_rd32(struct fbnic_dev *fbd, u32 reg); 103 104 static inline void fbnic_wrfl(struct fbnic_dev *fbd) 105 { 106 fbnic_rd32(fbd, FBNIC_MASTER_SPARE_0); 107 } 108 109 static inline void 110 fbnic_rmw32(struct fbnic_dev *fbd, u32 reg, u32 mask, u32 val) 111 { 112 u32 v; 113 114 v = fbnic_rd32(fbd, reg); 115 v &= ~mask; 116 v |= val; 117 fbnic_wr32(fbd, reg, v); 118 } 119 120 #define wr32(_f, _r, _v) fbnic_wr32(_f, _r, _v) 121 #define rd32(_f, _r) fbnic_rd32(_f, _r) 122 #define wrfl(_f) fbnic_wrfl(_f) 123 124 bool fbnic_fw_present(struct fbnic_dev *fbd); 125 u32 fbnic_fw_rd32(struct fbnic_dev *fbd, u32 reg); 126 void fbnic_fw_wr32(struct fbnic_dev *fbd, u32 reg, u32 val); 127 128 #define fw_rd32(_f, _r) fbnic_fw_rd32(_f, _r) 129 #define fw_wr32(_f, _r, _v) fbnic_fw_wr32(_f, _r, _v) 130 #define fw_wrfl(_f) fbnic_fw_rd32(_f, FBNIC_FW_ZERO_REG) 131 132 static inline bool fbnic_bmc_present(struct fbnic_dev *fbd) 133 { 134 return fbd->fw_cap.bmc_present; 135 } 136 137 static inline bool fbnic_init_failure(struct fbnic_dev *fbd) 138 { 139 return !fbd->netdev; 140 } 141 142 extern char fbnic_driver_name[]; 143 144 void fbnic_devlink_free(struct fbnic_dev *fbd); 145 struct fbnic_dev *fbnic_devlink_alloc(struct pci_dev *pdev); 146 void fbnic_devlink_register(struct fbnic_dev *fbd); 147 void fbnic_devlink_unregister(struct fbnic_dev *fbd); 148 149 int fbnic_fw_enable_mbx(struct fbnic_dev *fbd); 150 void fbnic_fw_disable_mbx(struct fbnic_dev *fbd); 151 152 int fbnic_pcs_irq_enable(struct fbnic_dev *fbd); 153 void fbnic_pcs_irq_disable(struct fbnic_dev *fbd); 154 155 void fbnic_napi_name_irqs(struct fbnic_dev *fbd); 156 int fbnic_napi_request_irq(struct fbnic_dev *fbd, 157 struct fbnic_napi_vector *nv); 158 void fbnic_napi_free_irq(struct fbnic_dev *fbd, 159 struct fbnic_napi_vector *nv); 160 void fbnic_synchronize_irq(struct fbnic_dev *fbd, int nr); 161 int fbnic_request_irq(struct fbnic_dev *dev, int nr, irq_handler_t handler, 162 unsigned long flags, const char *name, void *data); 163 void fbnic_free_irq(struct fbnic_dev *dev, int nr, void *data); 164 void fbnic_free_irqs(struct fbnic_dev *fbd); 165 int fbnic_alloc_irqs(struct fbnic_dev *fbd); 166 167 void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version, 168 const size_t str_sz); 169 170 void fbnic_dbg_fbd_init(struct fbnic_dev *fbd); 171 void fbnic_dbg_fbd_exit(struct fbnic_dev *fbd); 172 void fbnic_dbg_init(void); 173 void fbnic_dbg_exit(void); 174 175 void fbnic_csr_get_regs(struct fbnic_dev *fbd, u32 *data, u32 *regs_version); 176 int fbnic_csr_regs_len(struct fbnic_dev *fbd); 177 178 enum fbnic_boards { 179 fbnic_board_asic 180 }; 181 182 struct fbnic_info { 183 unsigned int max_num_queues; 184 unsigned int bar_mask; 185 }; 186 187 #endif /* _FBNIC_H_ */ 188