1 /* 2 * drivers/net/ethernet/mellanox/mlxsw/txheader.h 3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved. 4 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com> 5 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the names of the copyright holders nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 #ifndef _MLXSW_TXHEADER_H 37 #define _MLXSW_TXHEADER_H 38 39 #define MLXSW_TXHDR_LEN 0x10 40 #define MLXSW_TXHDR_VERSION_0 0 41 #define MLXSW_TXHDR_VERSION_1 1 42 43 enum { 44 MLXSW_TXHDR_ETH_CTL, 45 MLXSW_TXHDR_ETH_DATA, 46 }; 47 48 #define MLXSW_TXHDR_PROTO_ETH 1 49 50 enum { 51 MLXSW_TXHDR_ETCLASS_0, 52 MLXSW_TXHDR_ETCLASS_1, 53 MLXSW_TXHDR_ETCLASS_2, 54 MLXSW_TXHDR_ETCLASS_3, 55 MLXSW_TXHDR_ETCLASS_4, 56 MLXSW_TXHDR_ETCLASS_5, 57 MLXSW_TXHDR_ETCLASS_6, 58 MLXSW_TXHDR_ETCLASS_7, 59 }; 60 61 enum { 62 MLXSW_TXHDR_RDQ_OTHER, 63 MLXSW_TXHDR_RDQ_EMAD = 0x1f, 64 }; 65 66 #define MLXSW_TXHDR_CTCLASS3 0 67 #define MLXSW_TXHDR_CPU_SIG 0 68 #define MLXSW_TXHDR_SIG 0xE0E0 69 #define MLXSW_TXHDR_STCLASS_NONE 0 70 71 enum { 72 MLXSW_TXHDR_NOT_EMAD, 73 MLXSW_TXHDR_EMAD, 74 }; 75 76 enum { 77 MLXSW_TXHDR_TYPE_DATA, 78 MLXSW_TXHDR_TYPE_CONTROL = 6, 79 }; 80 81 #endif 82