1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ 3 4 #ifndef _MLXSW_PORT_H 5 #define _MLXSW_PORT_H 6 7 #include <linux/types.h> 8 9 #define MLXSW_PORT_MAX_MTU (10 * 1024) 10 #define MLXSW_PORT_ETH_FRAME_HDR (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN) 11 12 #define MLXSW_PORT_DEFAULT_VID 1 13 14 #define MLXSW_PORT_SWID_DISABLED_PORT 255 15 #define MLXSW_PORT_SWID_ALL_SWIDS 254 16 #define MLXSW_PORT_SWID_TYPE_IB 1 17 #define MLXSW_PORT_SWID_TYPE_ETH 2 18 19 #define MLXSW_PORT_MAX_IB_PHY_PORTS 36 20 #define MLXSW_PORT_MAX_IB_PORTS (MLXSW_PORT_MAX_IB_PHY_PORTS + 1) 21 22 #define MLXSW_PORT_CPU_PORT 0x0 23 24 #define MLXSW_PORT_DONT_CARE 0xFF 25 26 enum mlxsw_port_admin_status { 27 MLXSW_PORT_ADMIN_STATUS_UP = 1, 28 MLXSW_PORT_ADMIN_STATUS_DOWN = 2, 29 MLXSW_PORT_ADMIN_STATUS_UP_ONCE = 3, 30 MLXSW_PORT_ADMIN_STATUS_DISABLED = 4, 31 }; 32 33 enum mlxsw_reg_pude_oper_status { 34 MLXSW_PORT_OPER_STATUS_UP = 1, 35 MLXSW_PORT_OPER_STATUS_DOWN = 2, 36 MLXSW_PORT_OPER_STATUS_FAILURE = 4, /* Can be set to up again. */ 37 }; 38 39 #endif /* _MLXSW_PORT_H */ 40