1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ 3 4 #ifndef _MLXSW_CORE_H 5 #define _MLXSW_CORE_H 6 7 #include <linux/module.h> 8 #include <linux/device.h> 9 #include <linux/slab.h> 10 #include <linux/gfp.h> 11 #include <linux/types.h> 12 #include <linux/skbuff.h> 13 #include <linux/workqueue.h> 14 #include <linux/net_namespace.h> 15 #include <linux/auxiliary_bus.h> 16 #include <net/devlink.h> 17 18 #include "trap.h" 19 #include "reg.h" 20 #include "cmd.h" 21 #include "resources.h" 22 #include "../mlxfw/mlxfw.h" 23 24 enum mlxsw_core_resource_id { 25 MLXSW_CORE_RESOURCE_PORTS = 1, 26 MLXSW_CORE_RESOURCE_MAX, 27 }; 28 29 struct mlxsw_core; 30 struct mlxsw_core_port; 31 struct mlxsw_driver; 32 struct mlxsw_bus; 33 struct mlxsw_bus_info; 34 struct mlxsw_fw_rev; 35 36 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core); 37 38 int mlxsw_core_max_lag(struct mlxsw_core *mlxsw_core, u16 *p_max_lag); 39 enum mlxsw_cmd_mbox_config_profile_lag_mode 40 mlxsw_core_lag_mode(struct mlxsw_core *mlxsw_core); 41 enum mlxsw_cmd_mbox_config_profile_flood_mode 42 mlxsw_core_flood_mode(struct mlxsw_core *mlxsw_core); 43 44 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core); 45 46 struct mlxsw_linecards *mlxsw_core_linecards(struct mlxsw_core *mlxsw_core); 47 48 void mlxsw_core_linecards_set(struct mlxsw_core *mlxsw_core, 49 struct mlxsw_linecards *linecard); 50 51 bool 52 mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev, 53 const struct mlxsw_fw_rev *req_rev); 54 55 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver); 56 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver); 57 58 int mlxsw_core_fw_flash(struct mlxsw_core *mlxsw_core, 59 struct mlxfw_dev *mlxfw_dev, 60 const struct firmware *firmware, 61 struct netlink_ext_ack *extack); 62 63 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 64 const struct mlxsw_bus *mlxsw_bus, 65 void *bus_priv, bool reload, 66 struct devlink *devlink, 67 struct netlink_ext_ack *extack); 68 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload); 69 70 struct mlxsw_tx_info { 71 u16 local_port; 72 bool is_emad; 73 }; 74 75 struct mlxsw_rx_md_info { 76 struct napi_struct *napi; 77 u32 cookie_index; 78 u32 latency; 79 u32 tx_congestion; 80 union { 81 /* Valid when 'tx_port_valid' is set. */ 82 u16 tx_sys_port; 83 u16 tx_lag_id; 84 }; 85 u16 tx_lag_port_index; /* Valid when 'tx_port_is_lag' is set. */ 86 u8 tx_tc; 87 u8 latency_valid:1, 88 tx_congestion_valid:1, 89 tx_tc_valid:1, 90 tx_port_valid:1, 91 tx_port_is_lag:1, 92 unused:3; 93 }; 94 95 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 96 const struct mlxsw_tx_info *tx_info); 97 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 98 const struct mlxsw_tx_info *tx_info); 99 void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core, 100 struct sk_buff *skb, u16 local_port); 101 102 struct mlxsw_rx_listener { 103 void (*func)(struct sk_buff *skb, u16 local_port, void *priv); 104 u16 local_port; 105 u8 mirror_reason; 106 u16 trap_id; 107 }; 108 109 struct mlxsw_event_listener { 110 void (*func)(const struct mlxsw_reg_info *reg, 111 char *payload, void *priv); 112 enum mlxsw_event_trap_id trap_id; 113 }; 114 115 struct mlxsw_listener { 116 u16 trap_id; 117 union { 118 struct mlxsw_rx_listener rx_listener; 119 struct mlxsw_event_listener event_listener; 120 }; 121 enum mlxsw_reg_hpkt_action en_action; /* Action when enabled */ 122 enum mlxsw_reg_hpkt_action dis_action; /* Action when disabled */ 123 u8 en_trap_group; /* Trap group when enabled */ 124 u8 dis_trap_group; /* Trap group when disabled */ 125 u8 is_ctrl:1, /* should go via control buffer or not */ 126 is_event:1, 127 enabled_on_register:1; /* Trap should be enabled when listener 128 * is registered. 129 */ 130 }; 131 132 #define __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group, \ 133 _dis_action, _enabled_on_register, _dis_trap_group, \ 134 _mirror_reason) \ 135 { \ 136 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 137 .rx_listener = \ 138 { \ 139 .func = _func, \ 140 .local_port = MLXSW_PORT_DONT_CARE, \ 141 .mirror_reason = _mirror_reason, \ 142 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 143 }, \ 144 .en_action = MLXSW_REG_HPKT_ACTION_##_en_action, \ 145 .dis_action = MLXSW_REG_HPKT_ACTION_##_dis_action, \ 146 .en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_en_trap_group, \ 147 .dis_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_dis_trap_group, \ 148 .is_ctrl = _is_ctrl, \ 149 .enabled_on_register = _enabled_on_register, \ 150 } 151 152 #define MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group, \ 153 _dis_action) \ 154 __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group, \ 155 _dis_action, true, _trap_group, 0) 156 157 #define MLXSW_RXL_DIS(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group, \ 158 _dis_action, _dis_trap_group) \ 159 __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group, \ 160 _dis_action, false, _dis_trap_group, 0) 161 162 #define MLXSW_RXL_MIRROR(_func, _session_id, _trap_group, _mirror_reason) \ 163 __MLXSW_RXL(_func, MIRROR_SESSION##_session_id, TRAP_TO_CPU, false, \ 164 _trap_group, TRAP_TO_CPU, true, _trap_group, \ 165 _mirror_reason) 166 167 #define MLXSW_EVENTL(_func, _trap_id, _trap_group) \ 168 { \ 169 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 170 .event_listener = \ 171 { \ 172 .func = _func, \ 173 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 174 }, \ 175 .en_action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, \ 176 .en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \ 177 .is_event = true, \ 178 .enabled_on_register = true, \ 179 } 180 181 #define MLXSW_CORE_EVENTL(_func, _trap_id) \ 182 MLXSW_EVENTL(_func, _trap_id, CORE_EVENT) 183 184 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 185 const struct mlxsw_rx_listener *rxl, 186 void *priv, bool enabled); 187 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 188 const struct mlxsw_rx_listener *rxl); 189 190 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 191 const struct mlxsw_event_listener *el, 192 void *priv); 193 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 194 const struct mlxsw_event_listener *el); 195 196 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 197 const struct mlxsw_listener *listener, 198 void *priv); 199 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 200 const struct mlxsw_listener *listener, 201 void *priv); 202 int mlxsw_core_traps_register(struct mlxsw_core *mlxsw_core, 203 const struct mlxsw_listener *listeners, 204 size_t listeners_count, void *priv); 205 void mlxsw_core_traps_unregister(struct mlxsw_core *mlxsw_core, 206 const struct mlxsw_listener *listeners, 207 size_t listeners_count, void *priv); 208 int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core, 209 const struct mlxsw_listener *listener, 210 bool enabled); 211 212 typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload, 213 size_t payload_len, unsigned long cb_priv); 214 215 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 216 const struct mlxsw_reg_info *reg, char *payload, 217 struct list_head *bulk_list, 218 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv); 219 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 220 const struct mlxsw_reg_info *reg, char *payload, 221 struct list_head *bulk_list, 222 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv); 223 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list); 224 225 typedef void mlxsw_irq_event_cb_t(struct mlxsw_core *mlxsw_core); 226 227 int mlxsw_core_irq_event_handler_register(struct mlxsw_core *mlxsw_core, 228 mlxsw_irq_event_cb_t cb); 229 void mlxsw_core_irq_event_handler_unregister(struct mlxsw_core *mlxsw_core, 230 mlxsw_irq_event_cb_t cb); 231 void mlxsw_core_irq_event_handlers_call(struct mlxsw_core *mlxsw_core); 232 233 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 234 const struct mlxsw_reg_info *reg, char *payload); 235 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 236 const struct mlxsw_reg_info *reg, char *payload); 237 238 struct mlxsw_rx_info { 239 bool is_lag; 240 union { 241 u16 sys_port; 242 u16 lag_id; 243 } u; 244 u16 lag_port_index; 245 u8 mirror_reason; 246 int trap_id; 247 }; 248 249 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 250 struct mlxsw_rx_info *rx_info); 251 252 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 253 u16 lag_id, u8 port_index, u16 local_port); 254 u16 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 255 u16 lag_id, u8 port_index); 256 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 257 u16 lag_id, u16 local_port); 258 259 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port); 260 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port, 261 u8 slot_index, u32 port_number, bool split, 262 u32 split_port_subnumber, 263 bool splittable, u32 lanes, 264 const unsigned char *switch_id, 265 unsigned char switch_id_len); 266 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port); 267 int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core, 268 void *port_driver_priv, 269 const unsigned char *switch_id, 270 unsigned char switch_id_len); 271 void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core); 272 void mlxsw_core_port_netdev_link(struct mlxsw_core *mlxsw_core, u16 local_port, 273 void *port_driver_priv, 274 struct net_device *dev); 275 struct devlink_port * 276 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, 277 u16 local_port); 278 struct mlxsw_linecard * 279 mlxsw_core_port_linecard_get(struct mlxsw_core *mlxsw_core, 280 u16 local_port); 281 void mlxsw_core_ports_remove_selected(struct mlxsw_core *mlxsw_core, 282 bool (*selector)(void *priv, 283 u16 local_port), 284 void *priv); 285 struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core); 286 287 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay); 288 bool mlxsw_core_schedule_work(struct work_struct *work); 289 void mlxsw_core_flush_owq(void); 290 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox, 291 struct mlxsw_res *res); 292 293 #define MLXSW_CONFIG_PROFILE_SWID_COUNT 8 294 295 struct mlxsw_swid_config { 296 u8 used_type:1, 297 used_properties:1; 298 u8 type; 299 u8 properties; 300 }; 301 302 struct mlxsw_config_profile { 303 u16 used_max_vepa_channels:1, 304 used_max_lag:1, 305 used_max_mid:1, 306 used_max_pgt:1, 307 used_max_system_port:1, 308 used_max_vlan_groups:1, 309 used_max_regions:1, 310 used_flood_tables:1, 311 used_flood_mode:1, 312 used_max_ib_mc:1, 313 used_max_pkey:1, 314 used_ar_sec:1, 315 used_adaptive_routing_group_cap:1, 316 used_ubridge:1, 317 used_kvd_sizes:1, 318 used_cqe_time_stamp_type:1; 319 u8 max_vepa_channels; 320 u16 max_lag; 321 u16 max_mid; 322 u16 max_pgt; 323 u16 max_system_port; 324 u16 max_vlan_groups; 325 u16 max_regions; 326 u8 max_flood_tables; 327 u8 max_vid_flood_tables; 328 329 /* Flood mode to use if used_flood_mode. If flood_mode_prefer_cff, 330 * the backup flood mode (if any) when CFF unsupported. 331 */ 332 u8 flood_mode; 333 334 u8 max_fid_offset_flood_tables; 335 u16 fid_offset_flood_table_size; 336 u8 max_fid_flood_tables; 337 u16 fid_flood_table_size; 338 u16 max_ib_mc; 339 u16 max_pkey; 340 u8 ar_sec; 341 u16 adaptive_routing_group_cap; 342 u8 arn; 343 u8 ubridge; 344 u32 kvd_linear_size; 345 u8 kvd_hash_single_parts; 346 u8 kvd_hash_double_parts; 347 u8 cqe_time_stamp_type; 348 bool lag_mode_prefer_sw; 349 bool flood_mode_prefer_cff; 350 struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT]; 351 }; 352 353 struct mlxsw_driver { 354 struct list_head list; 355 const char *kind; 356 size_t priv_size; 357 const struct mlxsw_fw_rev *fw_req_rev; 358 const char *fw_filename; 359 int (*init)(struct mlxsw_core *mlxsw_core, 360 const struct mlxsw_bus_info *mlxsw_bus_info, 361 struct netlink_ext_ack *extack); 362 void (*fini)(struct mlxsw_core *mlxsw_core); 363 int (*port_split)(struct mlxsw_core *mlxsw_core, u16 local_port, 364 unsigned int count, struct netlink_ext_ack *extack); 365 int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u16 local_port, 366 struct netlink_ext_ack *extack); 367 void (*ports_remove_selected)(struct mlxsw_core *mlxsw_core, 368 bool (*selector)(void *priv, 369 u16 local_port), 370 void *priv); 371 int (*sb_pool_get)(struct mlxsw_core *mlxsw_core, 372 unsigned int sb_index, u16 pool_index, 373 struct devlink_sb_pool_info *pool_info); 374 int (*sb_pool_set)(struct mlxsw_core *mlxsw_core, 375 unsigned int sb_index, u16 pool_index, u32 size, 376 enum devlink_sb_threshold_type threshold_type, 377 struct netlink_ext_ack *extack); 378 int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port, 379 unsigned int sb_index, u16 pool_index, 380 u32 *p_threshold); 381 int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port, 382 unsigned int sb_index, u16 pool_index, 383 u32 threshold, struct netlink_ext_ack *extack); 384 int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port, 385 unsigned int sb_index, u16 tc_index, 386 enum devlink_sb_pool_type pool_type, 387 u16 *p_pool_index, u32 *p_threshold); 388 int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port, 389 unsigned int sb_index, u16 tc_index, 390 enum devlink_sb_pool_type pool_type, 391 u16 pool_index, u32 threshold, 392 struct netlink_ext_ack *extack); 393 int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core, 394 unsigned int sb_index); 395 int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core, 396 unsigned int sb_index); 397 int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port, 398 unsigned int sb_index, u16 pool_index, 399 u32 *p_cur, u32 *p_max); 400 int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port, 401 unsigned int sb_index, u16 tc_index, 402 enum devlink_sb_pool_type pool_type, 403 u32 *p_cur, u32 *p_max); 404 int (*trap_init)(struct mlxsw_core *mlxsw_core, 405 const struct devlink_trap *trap, void *trap_ctx); 406 void (*trap_fini)(struct mlxsw_core *mlxsw_core, 407 const struct devlink_trap *trap, void *trap_ctx); 408 int (*trap_action_set)(struct mlxsw_core *mlxsw_core, 409 const struct devlink_trap *trap, 410 enum devlink_trap_action action, 411 struct netlink_ext_ack *extack); 412 int (*trap_group_init)(struct mlxsw_core *mlxsw_core, 413 const struct devlink_trap_group *group); 414 int (*trap_group_set)(struct mlxsw_core *mlxsw_core, 415 const struct devlink_trap_group *group, 416 const struct devlink_trap_policer *policer, 417 struct netlink_ext_ack *extack); 418 int (*trap_policer_init)(struct mlxsw_core *mlxsw_core, 419 const struct devlink_trap_policer *policer); 420 void (*trap_policer_fini)(struct mlxsw_core *mlxsw_core, 421 const struct devlink_trap_policer *policer); 422 int (*trap_policer_set)(struct mlxsw_core *mlxsw_core, 423 const struct devlink_trap_policer *policer, 424 u64 rate, u64 burst, 425 struct netlink_ext_ack *extack); 426 int (*trap_policer_counter_get)(struct mlxsw_core *mlxsw_core, 427 const struct devlink_trap_policer *policer, 428 u64 *p_drops); 429 void (*txhdr_construct)(struct sk_buff *skb, 430 const struct mlxsw_tx_info *tx_info); 431 int (*resources_register)(struct mlxsw_core *mlxsw_core); 432 int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core, 433 const struct mlxsw_config_profile *profile, 434 u64 *p_single_size, u64 *p_double_size, 435 u64 *p_linear_size); 436 437 /* Notify a driver that a timestamped packet was transmitted. Driver 438 * is responsible for freeing the passed-in SKB. 439 */ 440 void (*ptp_transmitted)(struct mlxsw_core *mlxsw_core, 441 struct sk_buff *skb, u16 local_port); 442 443 u8 txhdr_len; 444 const struct mlxsw_config_profile *profile; 445 bool sdq_supports_cqe_v2; 446 }; 447 448 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 449 const struct mlxsw_config_profile *profile, 450 u64 *p_single_size, u64 *p_double_size, 451 u64 *p_linear_size); 452 453 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core); 454 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core); 455 456 u32 mlxsw_core_read_utc_sec(struct mlxsw_core *mlxsw_core); 457 u32 mlxsw_core_read_utc_nsec(struct mlxsw_core *mlxsw_core); 458 459 bool mlxsw_core_sdq_supports_cqe_v2(struct mlxsw_core *mlxsw_core); 460 461 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 462 enum mlxsw_res_id res_id); 463 464 #define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id) \ 465 mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id) 466 467 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 468 enum mlxsw_res_id res_id); 469 470 #define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id) \ 471 mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id) 472 473 static inline struct net *mlxsw_core_net(struct mlxsw_core *mlxsw_core) 474 { 475 return devlink_net(priv_to_devlink(mlxsw_core)); 476 } 477 478 #define MLXSW_BUS_F_TXRX BIT(0) 479 #define MLXSW_BUS_F_RESET BIT(1) 480 481 struct mlxsw_bus { 482 const char *kind; 483 int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core, 484 const struct mlxsw_config_profile *profile, 485 struct mlxsw_res *res); 486 void (*fini)(void *bus_priv); 487 bool (*skb_transmit_busy)(void *bus_priv, 488 const struct mlxsw_tx_info *tx_info); 489 int (*skb_transmit)(void *bus_priv, struct sk_buff *skb, 490 const struct mlxsw_tx_info *tx_info); 491 int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod, 492 u32 in_mod, bool out_mbox_direct, 493 char *in_mbox, size_t in_mbox_size, 494 char *out_mbox, size_t out_mbox_size, 495 u8 *p_status); 496 u32 (*read_frc_h)(void *bus_priv); 497 u32 (*read_frc_l)(void *bus_priv); 498 u32 (*read_utc_sec)(void *bus_priv); 499 u32 (*read_utc_nsec)(void *bus_priv); 500 enum mlxsw_cmd_mbox_config_profile_lag_mode (*lag_mode)(void *bus_priv); 501 enum mlxsw_cmd_mbox_config_profile_flood_mode (*flood_mode)(void *priv); 502 u8 features; 503 }; 504 505 struct mlxsw_fw_rev { 506 u16 major; 507 u16 minor; 508 u16 subminor; 509 u16 can_reset_minor; 510 }; 511 512 struct mlxsw_bus_info { 513 const char *device_kind; 514 const char *device_name; 515 struct device *dev; 516 struct mlxsw_fw_rev fw_rev; 517 u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN]; 518 u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN]; 519 u8 low_frequency:1, 520 read_clock_capable:1; 521 }; 522 523 struct mlxsw_hwmon; 524 525 #ifdef CONFIG_MLXSW_CORE_HWMON 526 527 int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core, 528 const struct mlxsw_bus_info *mlxsw_bus_info, 529 struct mlxsw_hwmon **p_hwmon); 530 void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon); 531 532 #else 533 534 static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core, 535 const struct mlxsw_bus_info *mlxsw_bus_info, 536 struct mlxsw_hwmon **p_hwmon) 537 { 538 return 0; 539 } 540 541 static inline void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon) 542 { 543 } 544 545 #endif 546 547 struct mlxsw_thermal; 548 549 #ifdef CONFIG_MLXSW_CORE_THERMAL 550 551 int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core, 552 const struct mlxsw_bus_info *mlxsw_bus_info, 553 struct mlxsw_thermal **p_thermal); 554 void mlxsw_thermal_fini(struct mlxsw_thermal *thermal); 555 556 #else 557 558 static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core, 559 const struct mlxsw_bus_info *mlxsw_bus_info, 560 struct mlxsw_thermal **p_thermal) 561 { 562 return 0; 563 } 564 565 static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal) 566 { 567 } 568 569 #endif 570 571 enum mlxsw_devlink_param_id { 572 MLXSW_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, 573 MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL, 574 }; 575 576 struct mlxsw_cqe_ts { 577 u8 sec; 578 u32 nsec; 579 }; 580 581 struct mlxsw_skb_cb { 582 union { 583 struct mlxsw_tx_info tx_info; 584 struct mlxsw_rx_md_info rx_md_info; 585 }; 586 struct mlxsw_cqe_ts cqe_ts; 587 }; 588 589 static inline struct mlxsw_skb_cb *mlxsw_skb_cb(struct sk_buff *skb) 590 { 591 BUILD_BUG_ON(sizeof(mlxsw_skb_cb) > sizeof(skb->cb)); 592 return (struct mlxsw_skb_cb *) skb->cb; 593 } 594 595 struct mlxsw_linecards; 596 597 enum mlxsw_linecard_status_event_type { 598 MLXSW_LINECARD_STATUS_EVENT_TYPE_PROVISION, 599 MLXSW_LINECARD_STATUS_EVENT_TYPE_UNPROVISION, 600 }; 601 602 struct mlxsw_linecard_bdev; 603 604 struct mlxsw_linecard_device_info { 605 u16 fw_major; 606 u16 fw_minor; 607 u16 fw_sub_minor; 608 char psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE]; 609 }; 610 611 struct mlxsw_linecard { 612 u8 slot_index; 613 struct mlxsw_linecards *linecards; 614 struct devlink_linecard *devlink_linecard; 615 struct mutex lock; /* Locks accesses to the linecard structure */ 616 char name[MLXSW_REG_MDDQ_SLOT_ASCII_NAME_LEN]; 617 char mbct_pl[MLXSW_REG_MBCT_LEN]; /* Too big for stack */ 618 enum mlxsw_linecard_status_event_type status_event_type_to; 619 struct delayed_work status_event_to_dw; 620 u8 provisioned:1, 621 ready:1, 622 active:1; 623 u16 hw_revision; 624 u16 ini_version; 625 struct mlxsw_linecard_bdev *bdev; 626 struct { 627 struct mlxsw_linecard_device_info info; 628 u8 index; 629 } device; 630 }; 631 632 struct mlxsw_linecard_types_info; 633 634 struct mlxsw_linecards { 635 struct mlxsw_core *mlxsw_core; 636 const struct mlxsw_bus_info *bus_info; 637 u8 count; 638 struct mlxsw_linecard_types_info *types_info; 639 struct list_head event_ops_list; 640 struct mutex event_ops_list_lock; /* Locks accesses to event ops list */ 641 struct mlxsw_linecard linecards[] __counted_by(count); 642 }; 643 644 static inline struct mlxsw_linecard * 645 mlxsw_linecard_get(struct mlxsw_linecards *linecards, u8 slot_index) 646 { 647 return &linecards->linecards[slot_index - 1]; 648 } 649 650 int mlxsw_linecard_devlink_info_get(struct mlxsw_linecard *linecard, 651 struct devlink_info_req *req, 652 struct netlink_ext_ack *extack); 653 int mlxsw_linecard_flash_update(struct devlink *linecard_devlink, 654 struct mlxsw_linecard *linecard, 655 const struct firmware *firmware, 656 struct netlink_ext_ack *extack); 657 658 int mlxsw_linecards_init(struct mlxsw_core *mlxsw_core, 659 const struct mlxsw_bus_info *bus_info); 660 void mlxsw_linecards_fini(struct mlxsw_core *mlxsw_core); 661 662 typedef void mlxsw_linecards_event_op_t(struct mlxsw_core *mlxsw_core, 663 u8 slot_index, void *priv); 664 665 struct mlxsw_linecards_event_ops { 666 mlxsw_linecards_event_op_t *got_active; 667 mlxsw_linecards_event_op_t *got_inactive; 668 }; 669 670 int mlxsw_linecards_event_ops_register(struct mlxsw_core *mlxsw_core, 671 struct mlxsw_linecards_event_ops *ops, 672 void *priv); 673 void mlxsw_linecards_event_ops_unregister(struct mlxsw_core *mlxsw_core, 674 struct mlxsw_linecards_event_ops *ops, 675 void *priv); 676 677 int mlxsw_linecard_bdev_add(struct mlxsw_linecard *linecard); 678 void mlxsw_linecard_bdev_del(struct mlxsw_linecard *linecard); 679 680 int mlxsw_linecard_driver_register(void); 681 void mlxsw_linecard_driver_unregister(void); 682 683 #endif 684