xref: /linux/drivers/net/ethernet/mellanox/mlxsw/core.h (revision 335bbdf01d25517ae832ac1807fd8323c1f4f3b9)
1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3 
4 #ifndef _MLXSW_CORE_H
5 #define _MLXSW_CORE_H
6 
7 #include <linux/module.h>
8 #include <linux/device.h>
9 #include <linux/slab.h>
10 #include <linux/gfp.h>
11 #include <linux/types.h>
12 #include <linux/skbuff.h>
13 #include <linux/workqueue.h>
14 #include <linux/net_namespace.h>
15 #include <linux/auxiliary_bus.h>
16 #include <net/devlink.h>
17 
18 #include "trap.h"
19 #include "reg.h"
20 #include "cmd.h"
21 #include "resources.h"
22 #include "../mlxfw/mlxfw.h"
23 
24 enum mlxsw_core_resource_id {
25 	MLXSW_CORE_RESOURCE_PORTS = 1,
26 	MLXSW_CORE_RESOURCE_MAX,
27 };
28 
29 struct mlxsw_core;
30 struct mlxsw_core_port;
31 struct mlxsw_driver;
32 struct mlxsw_bus;
33 struct mlxsw_bus_info;
34 struct mlxsw_fw_rev;
35 
36 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);
37 
38 int mlxsw_core_max_lag(struct mlxsw_core *mlxsw_core, u16 *p_max_lag);
39 enum mlxsw_cmd_mbox_config_profile_lag_mode
40 mlxsw_core_lag_mode(struct mlxsw_core *mlxsw_core);
41 
42 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core);
43 
44 struct mlxsw_linecards *mlxsw_core_linecards(struct mlxsw_core *mlxsw_core);
45 
46 void mlxsw_core_linecards_set(struct mlxsw_core *mlxsw_core,
47 			      struct mlxsw_linecards *linecard);
48 
49 bool
50 mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev,
51 					  const struct mlxsw_fw_rev *req_rev);
52 
53 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
54 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);
55 
56 int mlxsw_core_fw_flash(struct mlxsw_core *mlxsw_core,
57 			struct mlxfw_dev *mlxfw_dev,
58 			const struct firmware *firmware,
59 			struct netlink_ext_ack *extack);
60 
61 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
62 				   const struct mlxsw_bus *mlxsw_bus,
63 				   void *bus_priv, bool reload,
64 				   struct devlink *devlink,
65 				   struct netlink_ext_ack *extack);
66 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload);
67 
68 struct mlxsw_tx_info {
69 	u16 local_port;
70 	bool is_emad;
71 };
72 
73 struct mlxsw_rx_md_info {
74 	u32 cookie_index;
75 	u32 latency;
76 	u32 tx_congestion;
77 	union {
78 		/* Valid when 'tx_port_valid' is set. */
79 		u16 tx_sys_port;
80 		u16 tx_lag_id;
81 	};
82 	u16 tx_lag_port_index; /* Valid when 'tx_port_is_lag' is set. */
83 	u8 tx_tc;
84 	u8 latency_valid:1,
85 	   tx_congestion_valid:1,
86 	   tx_tc_valid:1,
87 	   tx_port_valid:1,
88 	   tx_port_is_lag:1,
89 	   unused:3;
90 };
91 
92 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
93 				  const struct mlxsw_tx_info *tx_info);
94 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
95 			    const struct mlxsw_tx_info *tx_info);
96 void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
97 				struct sk_buff *skb, u16 local_port);
98 
99 struct mlxsw_rx_listener {
100 	void (*func)(struct sk_buff *skb, u16 local_port, void *priv);
101 	u16 local_port;
102 	u8 mirror_reason;
103 	u16 trap_id;
104 };
105 
106 struct mlxsw_event_listener {
107 	void (*func)(const struct mlxsw_reg_info *reg,
108 		     char *payload, void *priv);
109 	enum mlxsw_event_trap_id trap_id;
110 };
111 
112 struct mlxsw_listener {
113 	u16 trap_id;
114 	union {
115 		struct mlxsw_rx_listener rx_listener;
116 		struct mlxsw_event_listener event_listener;
117 	};
118 	enum mlxsw_reg_hpkt_action en_action; /* Action when enabled */
119 	enum mlxsw_reg_hpkt_action dis_action; /* Action when disabled */
120 	u8 en_trap_group; /* Trap group when enabled */
121 	u8 dis_trap_group; /* Trap group when disabled */
122 	u8 is_ctrl:1, /* should go via control buffer or not */
123 	   is_event:1,
124 	   enabled_on_register:1; /* Trap should be enabled when listener
125 				   * is registered.
126 				   */
127 };
128 
129 #define __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group,	\
130 		    _dis_action, _enabled_on_register, _dis_trap_group,		\
131 		    _mirror_reason)						\
132 	{									\
133 		.trap_id = MLXSW_TRAP_ID_##_trap_id,				\
134 		.rx_listener =							\
135 		{								\
136 			.func = _func,						\
137 			.local_port = MLXSW_PORT_DONT_CARE,			\
138 			.mirror_reason = _mirror_reason,			\
139 			.trap_id = MLXSW_TRAP_ID_##_trap_id,			\
140 		},								\
141 		.en_action = MLXSW_REG_HPKT_ACTION_##_en_action,		\
142 		.dis_action = MLXSW_REG_HPKT_ACTION_##_dis_action,		\
143 		.en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_en_trap_group,	\
144 		.dis_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_dis_trap_group,	\
145 		.is_ctrl = _is_ctrl,						\
146 		.enabled_on_register = _enabled_on_register,			\
147 	}
148 
149 #define MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group,		\
150 		  _dis_action)							\
151 	__MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group,		\
152 		    _dis_action, true, _trap_group, 0)
153 
154 #define MLXSW_RXL_DIS(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group,	\
155 		      _dis_action, _dis_trap_group)				\
156 	__MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group,	\
157 		    _dis_action, false, _dis_trap_group, 0)
158 
159 #define MLXSW_RXL_MIRROR(_func, _session_id, _trap_group, _mirror_reason)	\
160 	__MLXSW_RXL(_func, MIRROR_SESSION##_session_id,	TRAP_TO_CPU, false,	\
161 		    _trap_group, TRAP_TO_CPU, true, _trap_group,		\
162 		    _mirror_reason)
163 
164 #define MLXSW_EVENTL(_func, _trap_id, _trap_group)				\
165 	{									\
166 		.trap_id = MLXSW_TRAP_ID_##_trap_id,				\
167 		.event_listener =						\
168 		{								\
169 			.func = _func,						\
170 			.trap_id = MLXSW_TRAP_ID_##_trap_id,			\
171 		},								\
172 		.en_action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,			\
173 		.en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group,	\
174 		.is_event = true,						\
175 		.enabled_on_register = true,					\
176 	}
177 
178 #define MLXSW_CORE_EVENTL(_func, _trap_id)		\
179 	MLXSW_EVENTL(_func, _trap_id, CORE_EVENT)
180 
181 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
182 				    const struct mlxsw_rx_listener *rxl,
183 				    void *priv, bool enabled);
184 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
185 				       const struct mlxsw_rx_listener *rxl);
186 
187 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
188 				       const struct mlxsw_event_listener *el,
189 				       void *priv);
190 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
191 					  const struct mlxsw_event_listener *el);
192 
193 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
194 			     const struct mlxsw_listener *listener,
195 			     void *priv);
196 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
197 				const struct mlxsw_listener *listener,
198 				void *priv);
199 int mlxsw_core_traps_register(struct mlxsw_core *mlxsw_core,
200 			      const struct mlxsw_listener *listeners,
201 			      size_t listeners_count, void *priv);
202 void mlxsw_core_traps_unregister(struct mlxsw_core *mlxsw_core,
203 				 const struct mlxsw_listener *listeners,
204 				 size_t listeners_count, void *priv);
205 int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core,
206 			      const struct mlxsw_listener *listener,
207 			      bool enabled);
208 
209 typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload,
210 				  size_t payload_len, unsigned long cb_priv);
211 
212 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
213 			  const struct mlxsw_reg_info *reg, char *payload,
214 			  struct list_head *bulk_list,
215 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
216 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
217 			  const struct mlxsw_reg_info *reg, char *payload,
218 			  struct list_head *bulk_list,
219 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
220 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);
221 
222 typedef void mlxsw_irq_event_cb_t(struct mlxsw_core *mlxsw_core);
223 
224 int mlxsw_core_irq_event_handler_register(struct mlxsw_core *mlxsw_core,
225 					  mlxsw_irq_event_cb_t cb);
226 void mlxsw_core_irq_event_handler_unregister(struct mlxsw_core *mlxsw_core,
227 					     mlxsw_irq_event_cb_t cb);
228 void mlxsw_core_irq_event_handlers_call(struct mlxsw_core *mlxsw_core);
229 
230 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
231 		    const struct mlxsw_reg_info *reg, char *payload);
232 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
233 		    const struct mlxsw_reg_info *reg, char *payload);
234 
235 struct mlxsw_rx_info {
236 	bool is_lag;
237 	union {
238 		u16 sys_port;
239 		u16 lag_id;
240 	} u;
241 	u16 lag_port_index;
242 	u8 mirror_reason;
243 	int trap_id;
244 };
245 
246 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
247 			    struct mlxsw_rx_info *rx_info);
248 
249 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
250 				u16 lag_id, u8 port_index, u16 local_port);
251 u16 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
252 			       u16 lag_id, u8 port_index);
253 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
254 				  u16 lag_id, u16 local_port);
255 
256 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port);
257 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port,
258 			 u8 slot_index, u32 port_number, bool split,
259 			 u32 split_port_subnumber,
260 			 bool splittable, u32 lanes,
261 			 const unsigned char *switch_id,
262 			 unsigned char switch_id_len);
263 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port);
264 int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
265 			     void *port_driver_priv,
266 			     const unsigned char *switch_id,
267 			     unsigned char switch_id_len);
268 void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core);
269 void mlxsw_core_port_netdev_link(struct mlxsw_core *mlxsw_core, u16 local_port,
270 				 void *port_driver_priv,
271 				 struct net_device *dev);
272 struct devlink_port *
273 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
274 				 u16 local_port);
275 struct mlxsw_linecard *
276 mlxsw_core_port_linecard_get(struct mlxsw_core *mlxsw_core,
277 			     u16 local_port);
278 void mlxsw_core_ports_remove_selected(struct mlxsw_core *mlxsw_core,
279 				      bool (*selector)(void *priv,
280 						       u16 local_port),
281 				      void *priv);
282 struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core);
283 
284 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
285 bool mlxsw_core_schedule_work(struct work_struct *work);
286 void mlxsw_core_flush_owq(void);
287 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
288 			       struct mlxsw_res *res);
289 
290 #define MLXSW_CONFIG_PROFILE_SWID_COUNT 8
291 
292 struct mlxsw_swid_config {
293 	u8	used_type:1,
294 		used_properties:1;
295 	u8	type;
296 	u8	properties;
297 };
298 
299 struct mlxsw_config_profile {
300 	u16	used_max_vepa_channels:1,
301 		used_max_lag:1,
302 		used_max_mid:1,
303 		used_max_pgt:1,
304 		used_max_system_port:1,
305 		used_max_vlan_groups:1,
306 		used_max_regions:1,
307 		used_flood_tables:1,
308 		used_flood_mode:1,
309 		used_max_ib_mc:1,
310 		used_max_pkey:1,
311 		used_ar_sec:1,
312 		used_adaptive_routing_group_cap:1,
313 		used_ubridge:1,
314 		used_kvd_sizes:1,
315 		used_cqe_time_stamp_type:1;
316 	u8	max_vepa_channels;
317 	u16	max_lag;
318 	u16	max_mid;
319 	u16	max_pgt;
320 	u16	max_system_port;
321 	u16	max_vlan_groups;
322 	u16	max_regions;
323 	u8	max_flood_tables;
324 	u8	max_vid_flood_tables;
325 	u8	flood_mode;
326 	u8	max_fid_offset_flood_tables;
327 	u16	fid_offset_flood_table_size;
328 	u8	max_fid_flood_tables;
329 	u16	fid_flood_table_size;
330 	u16	max_ib_mc;
331 	u16	max_pkey;
332 	u8	ar_sec;
333 	u16	adaptive_routing_group_cap;
334 	u8	arn;
335 	u8	ubridge;
336 	u32	kvd_linear_size;
337 	u8	kvd_hash_single_parts;
338 	u8	kvd_hash_double_parts;
339 	u8	cqe_time_stamp_type;
340 	bool	lag_mode_prefer_sw;
341 	struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
342 };
343 
344 struct mlxsw_driver {
345 	struct list_head list;
346 	const char *kind;
347 	size_t priv_size;
348 	const struct mlxsw_fw_rev *fw_req_rev;
349 	const char *fw_filename;
350 	int (*init)(struct mlxsw_core *mlxsw_core,
351 		    const struct mlxsw_bus_info *mlxsw_bus_info,
352 		    struct netlink_ext_ack *extack);
353 	void (*fini)(struct mlxsw_core *mlxsw_core);
354 	int (*port_split)(struct mlxsw_core *mlxsw_core, u16 local_port,
355 			  unsigned int count, struct netlink_ext_ack *extack);
356 	int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u16 local_port,
357 			    struct netlink_ext_ack *extack);
358 	void (*ports_remove_selected)(struct mlxsw_core *mlxsw_core,
359 				      bool (*selector)(void *priv,
360 						       u16 local_port),
361 				      void *priv);
362 	int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
363 			   unsigned int sb_index, u16 pool_index,
364 			   struct devlink_sb_pool_info *pool_info);
365 	int (*sb_pool_set)(struct mlxsw_core *mlxsw_core,
366 			   unsigned int sb_index, u16 pool_index, u32 size,
367 			   enum devlink_sb_threshold_type threshold_type,
368 			   struct netlink_ext_ack *extack);
369 	int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
370 				unsigned int sb_index, u16 pool_index,
371 				u32 *p_threshold);
372 	int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port,
373 				unsigned int sb_index, u16 pool_index,
374 				u32 threshold, struct netlink_ext_ack *extack);
375 	int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
376 				   unsigned int sb_index, u16 tc_index,
377 				   enum devlink_sb_pool_type pool_type,
378 				   u16 *p_pool_index, u32 *p_threshold);
379 	int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port,
380 				   unsigned int sb_index, u16 tc_index,
381 				   enum devlink_sb_pool_type pool_type,
382 				   u16 pool_index, u32 threshold,
383 				   struct netlink_ext_ack *extack);
384 	int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core,
385 			       unsigned int sb_index);
386 	int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core,
387 				unsigned int sb_index);
388 	int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
389 				    unsigned int sb_index, u16 pool_index,
390 				    u32 *p_cur, u32 *p_max);
391 	int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
392 				       unsigned int sb_index, u16 tc_index,
393 				       enum devlink_sb_pool_type pool_type,
394 				       u32 *p_cur, u32 *p_max);
395 	int (*trap_init)(struct mlxsw_core *mlxsw_core,
396 			 const struct devlink_trap *trap, void *trap_ctx);
397 	void (*trap_fini)(struct mlxsw_core *mlxsw_core,
398 			  const struct devlink_trap *trap, void *trap_ctx);
399 	int (*trap_action_set)(struct mlxsw_core *mlxsw_core,
400 			       const struct devlink_trap *trap,
401 			       enum devlink_trap_action action,
402 			       struct netlink_ext_ack *extack);
403 	int (*trap_group_init)(struct mlxsw_core *mlxsw_core,
404 			       const struct devlink_trap_group *group);
405 	int (*trap_group_set)(struct mlxsw_core *mlxsw_core,
406 			      const struct devlink_trap_group *group,
407 			      const struct devlink_trap_policer *policer,
408 			      struct netlink_ext_ack *extack);
409 	int (*trap_policer_init)(struct mlxsw_core *mlxsw_core,
410 				 const struct devlink_trap_policer *policer);
411 	void (*trap_policer_fini)(struct mlxsw_core *mlxsw_core,
412 				  const struct devlink_trap_policer *policer);
413 	int (*trap_policer_set)(struct mlxsw_core *mlxsw_core,
414 				const struct devlink_trap_policer *policer,
415 				u64 rate, u64 burst,
416 				struct netlink_ext_ack *extack);
417 	int (*trap_policer_counter_get)(struct mlxsw_core *mlxsw_core,
418 					const struct devlink_trap_policer *policer,
419 					u64 *p_drops);
420 	void (*txhdr_construct)(struct sk_buff *skb,
421 				const struct mlxsw_tx_info *tx_info);
422 	int (*resources_register)(struct mlxsw_core *mlxsw_core);
423 	int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core,
424 			     const struct mlxsw_config_profile *profile,
425 			     u64 *p_single_size, u64 *p_double_size,
426 			     u64 *p_linear_size);
427 
428 	/* Notify a driver that a timestamped packet was transmitted. Driver
429 	 * is responsible for freeing the passed-in SKB.
430 	 */
431 	void (*ptp_transmitted)(struct mlxsw_core *mlxsw_core,
432 				struct sk_buff *skb, u16 local_port);
433 
434 	u8 txhdr_len;
435 	const struct mlxsw_config_profile *profile;
436 	bool sdq_supports_cqe_v2;
437 };
438 
439 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
440 			     const struct mlxsw_config_profile *profile,
441 			     u64 *p_single_size, u64 *p_double_size,
442 			     u64 *p_linear_size);
443 
444 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core);
445 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core);
446 
447 u32 mlxsw_core_read_utc_sec(struct mlxsw_core *mlxsw_core);
448 u32 mlxsw_core_read_utc_nsec(struct mlxsw_core *mlxsw_core);
449 
450 bool mlxsw_core_sdq_supports_cqe_v2(struct mlxsw_core *mlxsw_core);
451 
452 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
453 			  enum mlxsw_res_id res_id);
454 
455 #define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id)			\
456 	mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id)
457 
458 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
459 		       enum mlxsw_res_id res_id);
460 
461 #define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id)			\
462 	mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id)
463 
464 static inline struct net *mlxsw_core_net(struct mlxsw_core *mlxsw_core)
465 {
466 	return devlink_net(priv_to_devlink(mlxsw_core));
467 }
468 
469 #define MLXSW_BUS_F_TXRX	BIT(0)
470 #define MLXSW_BUS_F_RESET	BIT(1)
471 
472 struct mlxsw_bus {
473 	const char *kind;
474 	int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
475 		    const struct mlxsw_config_profile *profile,
476 		    struct mlxsw_res *res);
477 	void (*fini)(void *bus_priv);
478 	bool (*skb_transmit_busy)(void *bus_priv,
479 				  const struct mlxsw_tx_info *tx_info);
480 	int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
481 			    const struct mlxsw_tx_info *tx_info);
482 	int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
483 			u32 in_mod, bool out_mbox_direct,
484 			char *in_mbox, size_t in_mbox_size,
485 			char *out_mbox, size_t out_mbox_size,
486 			u8 *p_status);
487 	u32 (*read_frc_h)(void *bus_priv);
488 	u32 (*read_frc_l)(void *bus_priv);
489 	u32 (*read_utc_sec)(void *bus_priv);
490 	u32 (*read_utc_nsec)(void *bus_priv);
491 	enum mlxsw_cmd_mbox_config_profile_lag_mode (*lag_mode)(void *bus_priv);
492 	u8 features;
493 };
494 
495 struct mlxsw_fw_rev {
496 	u16 major;
497 	u16 minor;
498 	u16 subminor;
499 	u16 can_reset_minor;
500 };
501 
502 struct mlxsw_bus_info {
503 	const char *device_kind;
504 	const char *device_name;
505 	struct device *dev;
506 	struct mlxsw_fw_rev fw_rev;
507 	u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
508 	u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
509 	u8 low_frequency:1,
510 	   read_clock_capable:1;
511 };
512 
513 struct mlxsw_hwmon;
514 
515 #ifdef CONFIG_MLXSW_CORE_HWMON
516 
517 int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
518 		     const struct mlxsw_bus_info *mlxsw_bus_info,
519 		     struct mlxsw_hwmon **p_hwmon);
520 void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
521 
522 #else
523 
524 static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
525 				   const struct mlxsw_bus_info *mlxsw_bus_info,
526 				   struct mlxsw_hwmon **p_hwmon)
527 {
528 	return 0;
529 }
530 
531 static inline void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon)
532 {
533 }
534 
535 #endif
536 
537 struct mlxsw_thermal;
538 
539 #ifdef CONFIG_MLXSW_CORE_THERMAL
540 
541 int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
542 		       const struct mlxsw_bus_info *mlxsw_bus_info,
543 		       struct mlxsw_thermal **p_thermal);
544 void mlxsw_thermal_fini(struct mlxsw_thermal *thermal);
545 
546 #else
547 
548 static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
549 				     const struct mlxsw_bus_info *mlxsw_bus_info,
550 				     struct mlxsw_thermal **p_thermal)
551 {
552 	return 0;
553 }
554 
555 static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
556 {
557 }
558 
559 #endif
560 
561 enum mlxsw_devlink_param_id {
562 	MLXSW_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
563 	MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL,
564 };
565 
566 struct mlxsw_cqe_ts {
567 	u8 sec;
568 	u32 nsec;
569 };
570 
571 struct mlxsw_skb_cb {
572 	union {
573 		struct mlxsw_tx_info tx_info;
574 		struct mlxsw_rx_md_info rx_md_info;
575 	};
576 	struct mlxsw_cqe_ts cqe_ts;
577 };
578 
579 static inline struct mlxsw_skb_cb *mlxsw_skb_cb(struct sk_buff *skb)
580 {
581 	BUILD_BUG_ON(sizeof(mlxsw_skb_cb) > sizeof(skb->cb));
582 	return (struct mlxsw_skb_cb *) skb->cb;
583 }
584 
585 struct mlxsw_linecards;
586 
587 enum mlxsw_linecard_status_event_type {
588 	MLXSW_LINECARD_STATUS_EVENT_TYPE_PROVISION,
589 	MLXSW_LINECARD_STATUS_EVENT_TYPE_UNPROVISION,
590 };
591 
592 struct mlxsw_linecard_bdev;
593 
594 struct mlxsw_linecard_device_info {
595 	u16 fw_major;
596 	u16 fw_minor;
597 	u16 fw_sub_minor;
598 	char psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE];
599 };
600 
601 struct mlxsw_linecard {
602 	u8 slot_index;
603 	struct mlxsw_linecards *linecards;
604 	struct devlink_linecard *devlink_linecard;
605 	struct mutex lock; /* Locks accesses to the linecard structure */
606 	char name[MLXSW_REG_MDDQ_SLOT_ASCII_NAME_LEN];
607 	char mbct_pl[MLXSW_REG_MBCT_LEN]; /* Too big for stack */
608 	enum mlxsw_linecard_status_event_type status_event_type_to;
609 	struct delayed_work status_event_to_dw;
610 	u8 provisioned:1,
611 	   ready:1,
612 	   active:1;
613 	u16 hw_revision;
614 	u16 ini_version;
615 	struct mlxsw_linecard_bdev *bdev;
616 	struct {
617 		struct mlxsw_linecard_device_info info;
618 		u8 index;
619 	} device;
620 };
621 
622 struct mlxsw_linecard_types_info;
623 
624 struct mlxsw_linecards {
625 	struct mlxsw_core *mlxsw_core;
626 	const struct mlxsw_bus_info *bus_info;
627 	u8 count;
628 	struct mlxsw_linecard_types_info *types_info;
629 	struct list_head event_ops_list;
630 	struct mutex event_ops_list_lock; /* Locks accesses to event ops list */
631 	struct mlxsw_linecard linecards[] __counted_by(count);
632 };
633 
634 static inline struct mlxsw_linecard *
635 mlxsw_linecard_get(struct mlxsw_linecards *linecards, u8 slot_index)
636 {
637 	return &linecards->linecards[slot_index - 1];
638 }
639 
640 int mlxsw_linecard_devlink_info_get(struct mlxsw_linecard *linecard,
641 				    struct devlink_info_req *req,
642 				    struct netlink_ext_ack *extack);
643 int mlxsw_linecard_flash_update(struct devlink *linecard_devlink,
644 				struct mlxsw_linecard *linecard,
645 				const struct firmware *firmware,
646 				struct netlink_ext_ack *extack);
647 
648 int mlxsw_linecards_init(struct mlxsw_core *mlxsw_core,
649 			 const struct mlxsw_bus_info *bus_info);
650 void mlxsw_linecards_fini(struct mlxsw_core *mlxsw_core);
651 
652 typedef void mlxsw_linecards_event_op_t(struct mlxsw_core *mlxsw_core,
653 					u8 slot_index, void *priv);
654 
655 struct mlxsw_linecards_event_ops {
656 	mlxsw_linecards_event_op_t *got_active;
657 	mlxsw_linecards_event_op_t *got_inactive;
658 };
659 
660 int mlxsw_linecards_event_ops_register(struct mlxsw_core *mlxsw_core,
661 				       struct mlxsw_linecards_event_ops *ops,
662 				       void *priv);
663 void mlxsw_linecards_event_ops_unregister(struct mlxsw_core *mlxsw_core,
664 					  struct mlxsw_linecards_event_ops *ops,
665 					  void *priv);
666 
667 int mlxsw_linecard_bdev_add(struct mlxsw_linecard *linecard);
668 void mlxsw_linecard_bdev_del(struct mlxsw_linecard *linecard);
669 
670 int mlxsw_linecard_driver_register(void);
671 void mlxsw_linecard_driver_unregister(void);
672 
673 #endif
674