xref: /linux/drivers/net/ethernet/mellanox/mlxsw/core.c (revision 86919f9dd2dbb88bbbe4e381dc8e6b9e9a1b9eb5)
1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3 
4 #include <linux/kernel.h>
5 #include <linux/module.h>
6 #include <linux/device.h>
7 #include <linux/export.h>
8 #include <linux/err.h>
9 #include <linux/if_link.h>
10 #include <linux/netdevice.h>
11 #include <linux/completion.h>
12 #include <linux/skbuff.h>
13 #include <linux/etherdevice.h>
14 #include <linux/types.h>
15 #include <linux/string.h>
16 #include <linux/gfp.h>
17 #include <linux/random.h>
18 #include <linux/jiffies.h>
19 #include <linux/mutex.h>
20 #include <linux/rcupdate.h>
21 #include <linux/slab.h>
22 #include <linux/workqueue.h>
23 #include <asm/byteorder.h>
24 #include <net/devlink.h>
25 #include <trace/events/devlink.h>
26 
27 #include "core.h"
28 #include "item.h"
29 #include "cmd.h"
30 #include "port.h"
31 #include "trap.h"
32 #include "emad.h"
33 #include "reg.h"
34 #include "resources.h"
35 
36 static LIST_HEAD(mlxsw_core_driver_list);
37 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
38 
39 static const char mlxsw_core_driver_name[] = "mlxsw_core";
40 
41 static struct workqueue_struct *mlxsw_wq;
42 static struct workqueue_struct *mlxsw_owq;
43 
44 struct mlxsw_core_port {
45 	struct devlink_port devlink_port;
46 	void *port_driver_priv;
47 	u8 local_port;
48 };
49 
50 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
51 {
52 	return mlxsw_core_port->port_driver_priv;
53 }
54 EXPORT_SYMBOL(mlxsw_core_port_driver_priv);
55 
56 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port)
57 {
58 	return mlxsw_core_port->port_driver_priv != NULL;
59 }
60 
61 struct mlxsw_core {
62 	struct mlxsw_driver *driver;
63 	const struct mlxsw_bus *bus;
64 	void *bus_priv;
65 	const struct mlxsw_bus_info *bus_info;
66 	struct workqueue_struct *emad_wq;
67 	struct list_head rx_listener_list;
68 	struct list_head event_listener_list;
69 	struct {
70 		atomic64_t tid;
71 		struct list_head trans_list;
72 		spinlock_t trans_list_lock; /* protects trans_list writes */
73 		bool use_emad;
74 	} emad;
75 	struct {
76 		u8 *mapping; /* lag_id+port_index to local_port mapping */
77 	} lag;
78 	struct mlxsw_res res;
79 	struct mlxsw_hwmon *hwmon;
80 	struct mlxsw_thermal *thermal;
81 	struct mlxsw_core_port *ports;
82 	unsigned int max_ports;
83 	bool reload_fail;
84 	bool fw_flash_in_progress;
85 	unsigned long driver_priv[0];
86 	/* driver_priv has to be always the last item */
87 };
88 
89 #define MLXSW_PORT_MAX_PORTS_DEFAULT	0x40
90 
91 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core)
92 {
93 	/* Switch ports are numbered from 1 to queried value */
94 	if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT))
95 		mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core,
96 							   MAX_SYSTEM_PORT) + 1;
97 	else
98 		mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1;
99 
100 	mlxsw_core->ports = kcalloc(mlxsw_core->max_ports,
101 				    sizeof(struct mlxsw_core_port), GFP_KERNEL);
102 	if (!mlxsw_core->ports)
103 		return -ENOMEM;
104 
105 	return 0;
106 }
107 
108 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core)
109 {
110 	kfree(mlxsw_core->ports);
111 }
112 
113 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core)
114 {
115 	return mlxsw_core->max_ports;
116 }
117 EXPORT_SYMBOL(mlxsw_core_max_ports);
118 
119 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
120 {
121 	return mlxsw_core->driver_priv;
122 }
123 EXPORT_SYMBOL(mlxsw_core_driver_priv);
124 
125 struct mlxsw_rx_listener_item {
126 	struct list_head list;
127 	struct mlxsw_rx_listener rxl;
128 	void *priv;
129 };
130 
131 struct mlxsw_event_listener_item {
132 	struct list_head list;
133 	struct mlxsw_event_listener el;
134 	void *priv;
135 };
136 
137 /******************
138  * EMAD processing
139  ******************/
140 
141 /* emad_eth_hdr_dmac
142  * Destination MAC in EMAD's Ethernet header.
143  * Must be set to 01:02:c9:00:00:01
144  */
145 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
146 
147 /* emad_eth_hdr_smac
148  * Source MAC in EMAD's Ethernet header.
149  * Must be set to 00:02:c9:01:02:03
150  */
151 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
152 
153 /* emad_eth_hdr_ethertype
154  * Ethertype in EMAD's Ethernet header.
155  * Must be set to 0x8932
156  */
157 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
158 
159 /* emad_eth_hdr_mlx_proto
160  * Mellanox protocol.
161  * Must be set to 0x0.
162  */
163 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
164 
165 /* emad_eth_hdr_ver
166  * Mellanox protocol version.
167  * Must be set to 0x0.
168  */
169 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
170 
171 /* emad_op_tlv_type
172  * Type of the TLV.
173  * Must be set to 0x1 (operation TLV).
174  */
175 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
176 
177 /* emad_op_tlv_len
178  * Length of the operation TLV in u32.
179  * Must be set to 0x4.
180  */
181 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
182 
183 /* emad_op_tlv_dr
184  * Direct route bit. Setting to 1 indicates the EMAD is a direct route
185  * EMAD. DR TLV must follow.
186  *
187  * Note: Currently not supported and must not be set.
188  */
189 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
190 
191 /* emad_op_tlv_status
192  * Returned status in case of EMAD response. Must be set to 0 in case
193  * of EMAD request.
194  * 0x0 - success
195  * 0x1 - device is busy. Requester should retry
196  * 0x2 - Mellanox protocol version not supported
197  * 0x3 - unknown TLV
198  * 0x4 - register not supported
199  * 0x5 - operation class not supported
200  * 0x6 - EMAD method not supported
201  * 0x7 - bad parameter (e.g. port out of range)
202  * 0x8 - resource not available
203  * 0x9 - message receipt acknowledgment. Requester should retry
204  * 0x70 - internal error
205  */
206 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
207 
208 /* emad_op_tlv_register_id
209  * Register ID of register within register TLV.
210  */
211 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
212 
213 /* emad_op_tlv_r
214  * Response bit. Setting to 1 indicates Response, otherwise request.
215  */
216 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
217 
218 /* emad_op_tlv_method
219  * EMAD method type.
220  * 0x1 - query
221  * 0x2 - write
222  * 0x3 - send (currently not supported)
223  * 0x4 - event
224  */
225 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
226 
227 /* emad_op_tlv_class
228  * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
229  */
230 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
231 
232 /* emad_op_tlv_tid
233  * EMAD transaction ID. Used for pairing request and response EMADs.
234  */
235 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
236 
237 /* emad_reg_tlv_type
238  * Type of the TLV.
239  * Must be set to 0x3 (register TLV).
240  */
241 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
242 
243 /* emad_reg_tlv_len
244  * Length of the operation TLV in u32.
245  */
246 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
247 
248 /* emad_end_tlv_type
249  * Type of the TLV.
250  * Must be set to 0x0 (end TLV).
251  */
252 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
253 
254 /* emad_end_tlv_len
255  * Length of the end TLV in u32.
256  * Must be set to 1.
257  */
258 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
259 
260 enum mlxsw_core_reg_access_type {
261 	MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
262 	MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
263 };
264 
265 static inline const char *
266 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
267 {
268 	switch (type) {
269 	case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
270 		return "query";
271 	case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
272 		return "write";
273 	}
274 	BUG();
275 }
276 
277 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
278 {
279 	mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
280 	mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
281 }
282 
283 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
284 				    const struct mlxsw_reg_info *reg,
285 				    char *payload)
286 {
287 	mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
288 	mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
289 	memcpy(reg_tlv + sizeof(u32), payload, reg->len);
290 }
291 
292 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
293 				   const struct mlxsw_reg_info *reg,
294 				   enum mlxsw_core_reg_access_type type,
295 				   u64 tid)
296 {
297 	mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
298 	mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
299 	mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
300 	mlxsw_emad_op_tlv_status_set(op_tlv, 0);
301 	mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
302 	mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
303 	if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
304 		mlxsw_emad_op_tlv_method_set(op_tlv,
305 					     MLXSW_EMAD_OP_TLV_METHOD_QUERY);
306 	else
307 		mlxsw_emad_op_tlv_method_set(op_tlv,
308 					     MLXSW_EMAD_OP_TLV_METHOD_WRITE);
309 	mlxsw_emad_op_tlv_class_set(op_tlv,
310 				    MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
311 	mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
312 }
313 
314 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
315 {
316 	char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
317 
318 	mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
319 	mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
320 	mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
321 	mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
322 	mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
323 
324 	skb_reset_mac_header(skb);
325 
326 	return 0;
327 }
328 
329 static void mlxsw_emad_construct(struct sk_buff *skb,
330 				 const struct mlxsw_reg_info *reg,
331 				 char *payload,
332 				 enum mlxsw_core_reg_access_type type,
333 				 u64 tid)
334 {
335 	char *buf;
336 
337 	buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
338 	mlxsw_emad_pack_end_tlv(buf);
339 
340 	buf = skb_push(skb, reg->len + sizeof(u32));
341 	mlxsw_emad_pack_reg_tlv(buf, reg, payload);
342 
343 	buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
344 	mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
345 
346 	mlxsw_emad_construct_eth_hdr(skb);
347 }
348 
349 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
350 {
351 	return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN));
352 }
353 
354 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
355 {
356 	return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN +
357 				      MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)));
358 }
359 
360 static char *mlxsw_emad_reg_payload(const char *op_tlv)
361 {
362 	return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
363 }
364 
365 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
366 {
367 	char *op_tlv;
368 
369 	op_tlv = mlxsw_emad_op_tlv(skb);
370 	return mlxsw_emad_op_tlv_tid_get(op_tlv);
371 }
372 
373 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
374 {
375 	char *op_tlv;
376 
377 	op_tlv = mlxsw_emad_op_tlv(skb);
378 	return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
379 }
380 
381 static int mlxsw_emad_process_status(char *op_tlv,
382 				     enum mlxsw_emad_op_tlv_status *p_status)
383 {
384 	*p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
385 
386 	switch (*p_status) {
387 	case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
388 		return 0;
389 	case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
390 	case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
391 		return -EAGAIN;
392 	case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
393 	case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
394 	case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
395 	case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
396 	case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
397 	case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
398 	case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
399 	case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
400 	default:
401 		return -EIO;
402 	}
403 }
404 
405 static int
406 mlxsw_emad_process_status_skb(struct sk_buff *skb,
407 			      enum mlxsw_emad_op_tlv_status *p_status)
408 {
409 	return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
410 }
411 
412 struct mlxsw_reg_trans {
413 	struct list_head list;
414 	struct list_head bulk_list;
415 	struct mlxsw_core *core;
416 	struct sk_buff *tx_skb;
417 	struct mlxsw_tx_info tx_info;
418 	struct delayed_work timeout_dw;
419 	unsigned int retries;
420 	u64 tid;
421 	struct completion completion;
422 	atomic_t active;
423 	mlxsw_reg_trans_cb_t *cb;
424 	unsigned long cb_priv;
425 	const struct mlxsw_reg_info *reg;
426 	enum mlxsw_core_reg_access_type type;
427 	int err;
428 	enum mlxsw_emad_op_tlv_status emad_status;
429 	struct rcu_head rcu;
430 };
431 
432 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS	3000
433 #define MLXSW_EMAD_TIMEOUT_MS			200
434 
435 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
436 {
437 	unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
438 
439 	if (trans->core->fw_flash_in_progress)
440 		timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS);
441 
442 	queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout);
443 }
444 
445 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
446 			       struct mlxsw_reg_trans *trans)
447 {
448 	struct sk_buff *skb;
449 	int err;
450 
451 	skb = skb_copy(trans->tx_skb, GFP_KERNEL);
452 	if (!skb)
453 		return -ENOMEM;
454 
455 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
456 			    skb->data + mlxsw_core->driver->txhdr_len,
457 			    skb->len - mlxsw_core->driver->txhdr_len);
458 
459 	atomic_set(&trans->active, 1);
460 	err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
461 	if (err) {
462 		dev_kfree_skb(skb);
463 		return err;
464 	}
465 	mlxsw_emad_trans_timeout_schedule(trans);
466 	return 0;
467 }
468 
469 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
470 {
471 	struct mlxsw_core *mlxsw_core = trans->core;
472 
473 	dev_kfree_skb(trans->tx_skb);
474 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
475 	list_del_rcu(&trans->list);
476 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
477 	trans->err = err;
478 	complete(&trans->completion);
479 }
480 
481 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
482 				      struct mlxsw_reg_trans *trans)
483 {
484 	int err;
485 
486 	if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
487 		trans->retries++;
488 		err = mlxsw_emad_transmit(trans->core, trans);
489 		if (err == 0)
490 			return;
491 	} else {
492 		err = -EIO;
493 	}
494 	mlxsw_emad_trans_finish(trans, err);
495 }
496 
497 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
498 {
499 	struct mlxsw_reg_trans *trans = container_of(work,
500 						     struct mlxsw_reg_trans,
501 						     timeout_dw.work);
502 
503 	if (!atomic_dec_and_test(&trans->active))
504 		return;
505 
506 	mlxsw_emad_transmit_retry(trans->core, trans);
507 }
508 
509 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
510 					struct mlxsw_reg_trans *trans,
511 					struct sk_buff *skb)
512 {
513 	int err;
514 
515 	if (!atomic_dec_and_test(&trans->active))
516 		return;
517 
518 	err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
519 	if (err == -EAGAIN) {
520 		mlxsw_emad_transmit_retry(mlxsw_core, trans);
521 	} else {
522 		if (err == 0) {
523 			char *op_tlv = mlxsw_emad_op_tlv(skb);
524 
525 			if (trans->cb)
526 				trans->cb(mlxsw_core,
527 					  mlxsw_emad_reg_payload(op_tlv),
528 					  trans->reg->len, trans->cb_priv);
529 		}
530 		mlxsw_emad_trans_finish(trans, err);
531 	}
532 }
533 
534 /* called with rcu read lock held */
535 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
536 					void *priv)
537 {
538 	struct mlxsw_core *mlxsw_core = priv;
539 	struct mlxsw_reg_trans *trans;
540 
541 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
542 			    skb->data, skb->len);
543 
544 	if (!mlxsw_emad_is_resp(skb))
545 		goto free_skb;
546 
547 	list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
548 		if (mlxsw_emad_get_tid(skb) == trans->tid) {
549 			mlxsw_emad_process_response(mlxsw_core, trans, skb);
550 			break;
551 		}
552 	}
553 
554 free_skb:
555 	dev_kfree_skb(skb);
556 }
557 
558 static const struct mlxsw_listener mlxsw_emad_rx_listener =
559 	MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false,
560 		  EMAD, DISCARD);
561 
562 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
563 {
564 	struct workqueue_struct *emad_wq;
565 	u64 tid;
566 	int err;
567 
568 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
569 		return 0;
570 
571 	emad_wq = alloc_workqueue("mlxsw_core_emad", WQ_MEM_RECLAIM, 0);
572 	if (!emad_wq)
573 		return -ENOMEM;
574 	mlxsw_core->emad_wq = emad_wq;
575 
576 	/* Set the upper 32 bits of the transaction ID field to a random
577 	 * number. This allows us to discard EMADs addressed to other
578 	 * devices.
579 	 */
580 	get_random_bytes(&tid, 4);
581 	tid <<= 32;
582 	atomic64_set(&mlxsw_core->emad.tid, tid);
583 
584 	INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
585 	spin_lock_init(&mlxsw_core->emad.trans_list_lock);
586 
587 	err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
588 				       mlxsw_core);
589 	if (err)
590 		return err;
591 
592 	err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
593 	if (err)
594 		goto err_emad_trap_set;
595 	mlxsw_core->emad.use_emad = true;
596 
597 	return 0;
598 
599 err_emad_trap_set:
600 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
601 				   mlxsw_core);
602 	destroy_workqueue(mlxsw_core->emad_wq);
603 	return err;
604 }
605 
606 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
607 {
608 
609 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
610 		return;
611 
612 	mlxsw_core->emad.use_emad = false;
613 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
614 				   mlxsw_core);
615 	destroy_workqueue(mlxsw_core->emad_wq);
616 }
617 
618 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
619 					u16 reg_len)
620 {
621 	struct sk_buff *skb;
622 	u16 emad_len;
623 
624 	emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
625 		    (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
626 		    sizeof(u32) + mlxsw_core->driver->txhdr_len);
627 	if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
628 		return NULL;
629 
630 	skb = netdev_alloc_skb(NULL, emad_len);
631 	if (!skb)
632 		return NULL;
633 	memset(skb->data, 0, emad_len);
634 	skb_reserve(skb, emad_len);
635 
636 	return skb;
637 }
638 
639 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
640 				 const struct mlxsw_reg_info *reg,
641 				 char *payload,
642 				 enum mlxsw_core_reg_access_type type,
643 				 struct mlxsw_reg_trans *trans,
644 				 struct list_head *bulk_list,
645 				 mlxsw_reg_trans_cb_t *cb,
646 				 unsigned long cb_priv, u64 tid)
647 {
648 	struct sk_buff *skb;
649 	int err;
650 
651 	dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
652 		tid, reg->id, mlxsw_reg_id_str(reg->id),
653 		mlxsw_core_reg_access_type_str(type));
654 
655 	skb = mlxsw_emad_alloc(mlxsw_core, reg->len);
656 	if (!skb)
657 		return -ENOMEM;
658 
659 	list_add_tail(&trans->bulk_list, bulk_list);
660 	trans->core = mlxsw_core;
661 	trans->tx_skb = skb;
662 	trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
663 	trans->tx_info.is_emad = true;
664 	INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
665 	trans->tid = tid;
666 	init_completion(&trans->completion);
667 	trans->cb = cb;
668 	trans->cb_priv = cb_priv;
669 	trans->reg = reg;
670 	trans->type = type;
671 
672 	mlxsw_emad_construct(skb, reg, payload, type, trans->tid);
673 	mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
674 
675 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
676 	list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
677 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
678 	err = mlxsw_emad_transmit(mlxsw_core, trans);
679 	if (err)
680 		goto err_out;
681 	return 0;
682 
683 err_out:
684 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
685 	list_del_rcu(&trans->list);
686 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
687 	list_del(&trans->bulk_list);
688 	dev_kfree_skb(trans->tx_skb);
689 	return err;
690 }
691 
692 /*****************
693  * Core functions
694  *****************/
695 
696 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
697 {
698 	spin_lock(&mlxsw_core_driver_list_lock);
699 	list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
700 	spin_unlock(&mlxsw_core_driver_list_lock);
701 	return 0;
702 }
703 EXPORT_SYMBOL(mlxsw_core_driver_register);
704 
705 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
706 {
707 	spin_lock(&mlxsw_core_driver_list_lock);
708 	list_del(&mlxsw_driver->list);
709 	spin_unlock(&mlxsw_core_driver_list_lock);
710 }
711 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
712 
713 static struct mlxsw_driver *__driver_find(const char *kind)
714 {
715 	struct mlxsw_driver *mlxsw_driver;
716 
717 	list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
718 		if (strcmp(mlxsw_driver->kind, kind) == 0)
719 			return mlxsw_driver;
720 	}
721 	return NULL;
722 }
723 
724 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
725 {
726 	struct mlxsw_driver *mlxsw_driver;
727 
728 	spin_lock(&mlxsw_core_driver_list_lock);
729 	mlxsw_driver = __driver_find(kind);
730 	spin_unlock(&mlxsw_core_driver_list_lock);
731 	return mlxsw_driver;
732 }
733 
734 static int mlxsw_devlink_port_split(struct devlink *devlink,
735 				    unsigned int port_index,
736 				    unsigned int count,
737 				    struct netlink_ext_ack *extack)
738 {
739 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
740 
741 	if (port_index >= mlxsw_core->max_ports) {
742 		NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
743 		return -EINVAL;
744 	}
745 	if (!mlxsw_core->driver->port_split)
746 		return -EOPNOTSUPP;
747 	return mlxsw_core->driver->port_split(mlxsw_core, port_index, count,
748 					      extack);
749 }
750 
751 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
752 				      unsigned int port_index,
753 				      struct netlink_ext_ack *extack)
754 {
755 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
756 
757 	if (port_index >= mlxsw_core->max_ports) {
758 		NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
759 		return -EINVAL;
760 	}
761 	if (!mlxsw_core->driver->port_unsplit)
762 		return -EOPNOTSUPP;
763 	return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index,
764 						extack);
765 }
766 
767 static int
768 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
769 			  unsigned int sb_index, u16 pool_index,
770 			  struct devlink_sb_pool_info *pool_info)
771 {
772 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
773 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
774 
775 	if (!mlxsw_driver->sb_pool_get)
776 		return -EOPNOTSUPP;
777 	return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
778 					 pool_index, pool_info);
779 }
780 
781 static int
782 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
783 			  unsigned int sb_index, u16 pool_index, u32 size,
784 			  enum devlink_sb_threshold_type threshold_type)
785 {
786 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
787 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
788 
789 	if (!mlxsw_driver->sb_pool_set)
790 		return -EOPNOTSUPP;
791 	return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
792 					 pool_index, size, threshold_type);
793 }
794 
795 static void *__dl_port(struct devlink_port *devlink_port)
796 {
797 	return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
798 }
799 
800 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port,
801 				       enum devlink_port_type port_type)
802 {
803 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
804 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
805 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
806 
807 	if (!mlxsw_driver->port_type_set)
808 		return -EOPNOTSUPP;
809 
810 	return mlxsw_driver->port_type_set(mlxsw_core,
811 					   mlxsw_core_port->local_port,
812 					   port_type);
813 }
814 
815 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
816 					  unsigned int sb_index, u16 pool_index,
817 					  u32 *p_threshold)
818 {
819 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
820 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
821 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
822 
823 	if (!mlxsw_driver->sb_port_pool_get ||
824 	    !mlxsw_core_port_check(mlxsw_core_port))
825 		return -EOPNOTSUPP;
826 	return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
827 					      pool_index, p_threshold);
828 }
829 
830 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
831 					  unsigned int sb_index, u16 pool_index,
832 					  u32 threshold)
833 {
834 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
835 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
836 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
837 
838 	if (!mlxsw_driver->sb_port_pool_set ||
839 	    !mlxsw_core_port_check(mlxsw_core_port))
840 		return -EOPNOTSUPP;
841 	return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
842 					      pool_index, threshold);
843 }
844 
845 static int
846 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
847 				  unsigned int sb_index, u16 tc_index,
848 				  enum devlink_sb_pool_type pool_type,
849 				  u16 *p_pool_index, u32 *p_threshold)
850 {
851 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
852 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
853 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
854 
855 	if (!mlxsw_driver->sb_tc_pool_bind_get ||
856 	    !mlxsw_core_port_check(mlxsw_core_port))
857 		return -EOPNOTSUPP;
858 	return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
859 						 tc_index, pool_type,
860 						 p_pool_index, p_threshold);
861 }
862 
863 static int
864 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
865 				  unsigned int sb_index, u16 tc_index,
866 				  enum devlink_sb_pool_type pool_type,
867 				  u16 pool_index, u32 threshold)
868 {
869 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
870 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
871 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
872 
873 	if (!mlxsw_driver->sb_tc_pool_bind_set ||
874 	    !mlxsw_core_port_check(mlxsw_core_port))
875 		return -EOPNOTSUPP;
876 	return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
877 						 tc_index, pool_type,
878 						 pool_index, threshold);
879 }
880 
881 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
882 					 unsigned int sb_index)
883 {
884 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
885 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
886 
887 	if (!mlxsw_driver->sb_occ_snapshot)
888 		return -EOPNOTSUPP;
889 	return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
890 }
891 
892 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
893 					  unsigned int sb_index)
894 {
895 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
896 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
897 
898 	if (!mlxsw_driver->sb_occ_max_clear)
899 		return -EOPNOTSUPP;
900 	return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
901 }
902 
903 static int
904 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
905 				   unsigned int sb_index, u16 pool_index,
906 				   u32 *p_cur, u32 *p_max)
907 {
908 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
909 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
910 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
911 
912 	if (!mlxsw_driver->sb_occ_port_pool_get ||
913 	    !mlxsw_core_port_check(mlxsw_core_port))
914 		return -EOPNOTSUPP;
915 	return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
916 						  pool_index, p_cur, p_max);
917 }
918 
919 static int
920 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
921 				      unsigned int sb_index, u16 tc_index,
922 				      enum devlink_sb_pool_type pool_type,
923 				      u32 *p_cur, u32 *p_max)
924 {
925 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
926 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
927 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
928 
929 	if (!mlxsw_driver->sb_occ_tc_port_bind_get ||
930 	    !mlxsw_core_port_check(mlxsw_core_port))
931 		return -EOPNOTSUPP;
932 	return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
933 						     sb_index, tc_index,
934 						     pool_type, p_cur, p_max);
935 }
936 
937 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink,
938 						struct netlink_ext_ack *extack)
939 {
940 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
941 	int err;
942 
943 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET))
944 		return -EOPNOTSUPP;
945 
946 	mlxsw_core_bus_device_unregister(mlxsw_core, true);
947 	err = mlxsw_core_bus_device_register(mlxsw_core->bus_info,
948 					     mlxsw_core->bus,
949 					     mlxsw_core->bus_priv, true,
950 					     devlink);
951 	mlxsw_core->reload_fail = !!err;
952 
953 	return err;
954 }
955 
956 static const struct devlink_ops mlxsw_devlink_ops = {
957 	.reload				= mlxsw_devlink_core_bus_device_reload,
958 	.port_type_set			= mlxsw_devlink_port_type_set,
959 	.port_split			= mlxsw_devlink_port_split,
960 	.port_unsplit			= mlxsw_devlink_port_unsplit,
961 	.sb_pool_get			= mlxsw_devlink_sb_pool_get,
962 	.sb_pool_set			= mlxsw_devlink_sb_pool_set,
963 	.sb_port_pool_get		= mlxsw_devlink_sb_port_pool_get,
964 	.sb_port_pool_set		= mlxsw_devlink_sb_port_pool_set,
965 	.sb_tc_pool_bind_get		= mlxsw_devlink_sb_tc_pool_bind_get,
966 	.sb_tc_pool_bind_set		= mlxsw_devlink_sb_tc_pool_bind_set,
967 	.sb_occ_snapshot		= mlxsw_devlink_sb_occ_snapshot,
968 	.sb_occ_max_clear		= mlxsw_devlink_sb_occ_max_clear,
969 	.sb_occ_port_pool_get		= mlxsw_devlink_sb_occ_port_pool_get,
970 	.sb_occ_tc_port_bind_get	= mlxsw_devlink_sb_occ_tc_port_bind_get,
971 };
972 
973 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
974 				   const struct mlxsw_bus *mlxsw_bus,
975 				   void *bus_priv, bool reload,
976 				   struct devlink *devlink)
977 {
978 	const char *device_kind = mlxsw_bus_info->device_kind;
979 	struct mlxsw_core *mlxsw_core;
980 	struct mlxsw_driver *mlxsw_driver;
981 	struct mlxsw_res *res;
982 	size_t alloc_size;
983 	int err;
984 
985 	mlxsw_driver = mlxsw_core_driver_get(device_kind);
986 	if (!mlxsw_driver)
987 		return -EINVAL;
988 
989 	if (!reload) {
990 		alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
991 		devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size);
992 		if (!devlink) {
993 			err = -ENOMEM;
994 			goto err_devlink_alloc;
995 		}
996 	}
997 
998 	mlxsw_core = devlink_priv(devlink);
999 	INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1000 	INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1001 	mlxsw_core->driver = mlxsw_driver;
1002 	mlxsw_core->bus = mlxsw_bus;
1003 	mlxsw_core->bus_priv = bus_priv;
1004 	mlxsw_core->bus_info = mlxsw_bus_info;
1005 
1006 	res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL;
1007 	err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res);
1008 	if (err)
1009 		goto err_bus_init;
1010 
1011 	if (mlxsw_driver->resources_register && !reload) {
1012 		err = mlxsw_driver->resources_register(mlxsw_core);
1013 		if (err)
1014 			goto err_register_resources;
1015 	}
1016 
1017 	err = mlxsw_ports_init(mlxsw_core);
1018 	if (err)
1019 		goto err_ports_init;
1020 
1021 	if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) &&
1022 	    MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
1023 		alloc_size = sizeof(u8) *
1024 			MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) *
1025 			MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
1026 		mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1027 		if (!mlxsw_core->lag.mapping) {
1028 			err = -ENOMEM;
1029 			goto err_alloc_lag_mapping;
1030 		}
1031 	}
1032 
1033 	err = mlxsw_emad_init(mlxsw_core);
1034 	if (err)
1035 		goto err_emad_init;
1036 
1037 	if (!reload) {
1038 		err = devlink_register(devlink, mlxsw_bus_info->dev);
1039 		if (err)
1040 			goto err_devlink_register;
1041 	}
1042 
1043 	err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
1044 	if (err)
1045 		goto err_hwmon_init;
1046 
1047 	err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info,
1048 				 &mlxsw_core->thermal);
1049 	if (err)
1050 		goto err_thermal_init;
1051 
1052 	if (mlxsw_driver->init) {
1053 		err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info);
1054 		if (err)
1055 			goto err_driver_init;
1056 	}
1057 
1058 	return 0;
1059 
1060 err_driver_init:
1061 	mlxsw_thermal_fini(mlxsw_core->thermal);
1062 err_thermal_init:
1063 	mlxsw_hwmon_fini(mlxsw_core->hwmon);
1064 err_hwmon_init:
1065 	if (!reload)
1066 		devlink_unregister(devlink);
1067 err_devlink_register:
1068 	mlxsw_emad_fini(mlxsw_core);
1069 err_emad_init:
1070 	kfree(mlxsw_core->lag.mapping);
1071 err_alloc_lag_mapping:
1072 	mlxsw_ports_fini(mlxsw_core);
1073 err_ports_init:
1074 	if (!reload)
1075 		devlink_resources_unregister(devlink, NULL);
1076 err_register_resources:
1077 	mlxsw_bus->fini(bus_priv);
1078 err_bus_init:
1079 	if (!reload)
1080 		devlink_free(devlink);
1081 err_devlink_alloc:
1082 	return err;
1083 }
1084 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
1085 
1086 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core,
1087 				      bool reload)
1088 {
1089 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
1090 
1091 	if (mlxsw_core->reload_fail) {
1092 		if (!reload)
1093 			/* Only the parts that were not de-initialized in the
1094 			 * failed reload attempt need to be de-initialized.
1095 			 */
1096 			goto reload_fail_deinit;
1097 		else
1098 			return;
1099 	}
1100 
1101 	if (mlxsw_core->driver->fini)
1102 		mlxsw_core->driver->fini(mlxsw_core);
1103 	mlxsw_thermal_fini(mlxsw_core->thermal);
1104 	mlxsw_hwmon_fini(mlxsw_core->hwmon);
1105 	if (!reload)
1106 		devlink_unregister(devlink);
1107 	mlxsw_emad_fini(mlxsw_core);
1108 	kfree(mlxsw_core->lag.mapping);
1109 	mlxsw_ports_fini(mlxsw_core);
1110 	if (!reload)
1111 		devlink_resources_unregister(devlink, NULL);
1112 	mlxsw_core->bus->fini(mlxsw_core->bus_priv);
1113 
1114 	return;
1115 
1116 reload_fail_deinit:
1117 	devlink_unregister(devlink);
1118 	devlink_resources_unregister(devlink, NULL);
1119 	devlink_free(devlink);
1120 }
1121 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
1122 
1123 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
1124 				  const struct mlxsw_tx_info *tx_info)
1125 {
1126 	return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
1127 						  tx_info);
1128 }
1129 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
1130 
1131 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1132 			    const struct mlxsw_tx_info *tx_info)
1133 {
1134 	return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
1135 					     tx_info);
1136 }
1137 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
1138 
1139 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
1140 				   const struct mlxsw_rx_listener *rxl_b)
1141 {
1142 	return (rxl_a->func == rxl_b->func &&
1143 		rxl_a->local_port == rxl_b->local_port &&
1144 		rxl_a->trap_id == rxl_b->trap_id);
1145 }
1146 
1147 static struct mlxsw_rx_listener_item *
1148 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
1149 			const struct mlxsw_rx_listener *rxl,
1150 			void *priv)
1151 {
1152 	struct mlxsw_rx_listener_item *rxl_item;
1153 
1154 	list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
1155 		if (__is_rx_listener_equal(&rxl_item->rxl, rxl) &&
1156 		    rxl_item->priv == priv)
1157 			return rxl_item;
1158 	}
1159 	return NULL;
1160 }
1161 
1162 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
1163 				    const struct mlxsw_rx_listener *rxl,
1164 				    void *priv)
1165 {
1166 	struct mlxsw_rx_listener_item *rxl_item;
1167 
1168 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1169 	if (rxl_item)
1170 		return -EEXIST;
1171 	rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
1172 	if (!rxl_item)
1173 		return -ENOMEM;
1174 	rxl_item->rxl = *rxl;
1175 	rxl_item->priv = priv;
1176 
1177 	list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
1178 	return 0;
1179 }
1180 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
1181 
1182 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
1183 				       const struct mlxsw_rx_listener *rxl,
1184 				       void *priv)
1185 {
1186 	struct mlxsw_rx_listener_item *rxl_item;
1187 
1188 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1189 	if (!rxl_item)
1190 		return;
1191 	list_del_rcu(&rxl_item->list);
1192 	synchronize_rcu();
1193 	kfree(rxl_item);
1194 }
1195 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
1196 
1197 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
1198 					   void *priv)
1199 {
1200 	struct mlxsw_event_listener_item *event_listener_item = priv;
1201 	struct mlxsw_reg_info reg;
1202 	char *payload;
1203 	char *op_tlv = mlxsw_emad_op_tlv(skb);
1204 	char *reg_tlv = mlxsw_emad_reg_tlv(skb);
1205 
1206 	reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
1207 	reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
1208 	payload = mlxsw_emad_reg_payload(op_tlv);
1209 	event_listener_item->el.func(&reg, payload, event_listener_item->priv);
1210 	dev_kfree_skb(skb);
1211 }
1212 
1213 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
1214 				      const struct mlxsw_event_listener *el_b)
1215 {
1216 	return (el_a->func == el_b->func &&
1217 		el_a->trap_id == el_b->trap_id);
1218 }
1219 
1220 static struct mlxsw_event_listener_item *
1221 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
1222 			   const struct mlxsw_event_listener *el,
1223 			   void *priv)
1224 {
1225 	struct mlxsw_event_listener_item *el_item;
1226 
1227 	list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
1228 		if (__is_event_listener_equal(&el_item->el, el) &&
1229 		    el_item->priv == priv)
1230 			return el_item;
1231 	}
1232 	return NULL;
1233 }
1234 
1235 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
1236 				       const struct mlxsw_event_listener *el,
1237 				       void *priv)
1238 {
1239 	int err;
1240 	struct mlxsw_event_listener_item *el_item;
1241 	const struct mlxsw_rx_listener rxl = {
1242 		.func = mlxsw_core_event_listener_func,
1243 		.local_port = MLXSW_PORT_DONT_CARE,
1244 		.trap_id = el->trap_id,
1245 	};
1246 
1247 	el_item = __find_event_listener_item(mlxsw_core, el, priv);
1248 	if (el_item)
1249 		return -EEXIST;
1250 	el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
1251 	if (!el_item)
1252 		return -ENOMEM;
1253 	el_item->el = *el;
1254 	el_item->priv = priv;
1255 
1256 	err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item);
1257 	if (err)
1258 		goto err_rx_listener_register;
1259 
1260 	/* No reason to save item if we did not manage to register an RX
1261 	 * listener for it.
1262 	 */
1263 	list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
1264 
1265 	return 0;
1266 
1267 err_rx_listener_register:
1268 	kfree(el_item);
1269 	return err;
1270 }
1271 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
1272 
1273 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
1274 					  const struct mlxsw_event_listener *el,
1275 					  void *priv)
1276 {
1277 	struct mlxsw_event_listener_item *el_item;
1278 	const struct mlxsw_rx_listener rxl = {
1279 		.func = mlxsw_core_event_listener_func,
1280 		.local_port = MLXSW_PORT_DONT_CARE,
1281 		.trap_id = el->trap_id,
1282 	};
1283 
1284 	el_item = __find_event_listener_item(mlxsw_core, el, priv);
1285 	if (!el_item)
1286 		return;
1287 	mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item);
1288 	list_del(&el_item->list);
1289 	kfree(el_item);
1290 }
1291 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
1292 
1293 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core,
1294 					const struct mlxsw_listener *listener,
1295 					void *priv)
1296 {
1297 	if (listener->is_event)
1298 		return mlxsw_core_event_listener_register(mlxsw_core,
1299 						&listener->u.event_listener,
1300 						priv);
1301 	else
1302 		return mlxsw_core_rx_listener_register(mlxsw_core,
1303 						&listener->u.rx_listener,
1304 						priv);
1305 }
1306 
1307 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core,
1308 				      const struct mlxsw_listener *listener,
1309 				      void *priv)
1310 {
1311 	if (listener->is_event)
1312 		mlxsw_core_event_listener_unregister(mlxsw_core,
1313 						     &listener->u.event_listener,
1314 						     priv);
1315 	else
1316 		mlxsw_core_rx_listener_unregister(mlxsw_core,
1317 						  &listener->u.rx_listener,
1318 						  priv);
1319 }
1320 
1321 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
1322 			     const struct mlxsw_listener *listener, void *priv)
1323 {
1324 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
1325 	int err;
1326 
1327 	err = mlxsw_core_listener_register(mlxsw_core, listener, priv);
1328 	if (err)
1329 		return err;
1330 
1331 	mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id,
1332 			    listener->trap_group, listener->is_ctrl);
1333 	err = mlxsw_reg_write(mlxsw_core,  MLXSW_REG(hpkt), hpkt_pl);
1334 	if (err)
1335 		goto err_trap_set;
1336 
1337 	return 0;
1338 
1339 err_trap_set:
1340 	mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1341 	return err;
1342 }
1343 EXPORT_SYMBOL(mlxsw_core_trap_register);
1344 
1345 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
1346 				const struct mlxsw_listener *listener,
1347 				void *priv)
1348 {
1349 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
1350 
1351 	if (!listener->is_event) {
1352 		mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action,
1353 				    listener->trap_id, listener->trap_group,
1354 				    listener->is_ctrl);
1355 		mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
1356 	}
1357 
1358 	mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1359 }
1360 EXPORT_SYMBOL(mlxsw_core_trap_unregister);
1361 
1362 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
1363 {
1364 	return atomic64_inc_return(&mlxsw_core->emad.tid);
1365 }
1366 
1367 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
1368 				      const struct mlxsw_reg_info *reg,
1369 				      char *payload,
1370 				      enum mlxsw_core_reg_access_type type,
1371 				      struct list_head *bulk_list,
1372 				      mlxsw_reg_trans_cb_t *cb,
1373 				      unsigned long cb_priv)
1374 {
1375 	u64 tid = mlxsw_core_tid_get(mlxsw_core);
1376 	struct mlxsw_reg_trans *trans;
1377 	int err;
1378 
1379 	trans = kzalloc(sizeof(*trans), GFP_KERNEL);
1380 	if (!trans)
1381 		return -ENOMEM;
1382 
1383 	err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
1384 				    bulk_list, cb, cb_priv, tid);
1385 	if (err) {
1386 		kfree(trans);
1387 		return err;
1388 	}
1389 	return 0;
1390 }
1391 
1392 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
1393 			  const struct mlxsw_reg_info *reg, char *payload,
1394 			  struct list_head *bulk_list,
1395 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1396 {
1397 	return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1398 					  MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
1399 					  bulk_list, cb, cb_priv);
1400 }
1401 EXPORT_SYMBOL(mlxsw_reg_trans_query);
1402 
1403 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
1404 			  const struct mlxsw_reg_info *reg, char *payload,
1405 			  struct list_head *bulk_list,
1406 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1407 {
1408 	return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1409 					  MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
1410 					  bulk_list, cb, cb_priv);
1411 }
1412 EXPORT_SYMBOL(mlxsw_reg_trans_write);
1413 
1414 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
1415 {
1416 	struct mlxsw_core *mlxsw_core = trans->core;
1417 	int err;
1418 
1419 	wait_for_completion(&trans->completion);
1420 	cancel_delayed_work_sync(&trans->timeout_dw);
1421 	err = trans->err;
1422 
1423 	if (trans->retries)
1424 		dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
1425 			 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
1426 	if (err)
1427 		dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
1428 			trans->tid, trans->reg->id,
1429 			mlxsw_reg_id_str(trans->reg->id),
1430 			mlxsw_core_reg_access_type_str(trans->type),
1431 			trans->emad_status,
1432 			mlxsw_emad_op_tlv_status_str(trans->emad_status));
1433 
1434 	list_del(&trans->bulk_list);
1435 	kfree_rcu(trans, rcu);
1436 	return err;
1437 }
1438 
1439 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
1440 {
1441 	struct mlxsw_reg_trans *trans;
1442 	struct mlxsw_reg_trans *tmp;
1443 	int sum_err = 0;
1444 	int err;
1445 
1446 	list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
1447 		err = mlxsw_reg_trans_wait(trans);
1448 		if (err && sum_err == 0)
1449 			sum_err = err; /* first error to be returned */
1450 	}
1451 	return sum_err;
1452 }
1453 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
1454 
1455 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
1456 				     const struct mlxsw_reg_info *reg,
1457 				     char *payload,
1458 				     enum mlxsw_core_reg_access_type type)
1459 {
1460 	enum mlxsw_emad_op_tlv_status status;
1461 	int err, n_retry;
1462 	bool reset_ok;
1463 	char *in_mbox, *out_mbox, *tmp;
1464 
1465 	dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
1466 		reg->id, mlxsw_reg_id_str(reg->id),
1467 		mlxsw_core_reg_access_type_str(type));
1468 
1469 	in_mbox = mlxsw_cmd_mbox_alloc();
1470 	if (!in_mbox)
1471 		return -ENOMEM;
1472 
1473 	out_mbox = mlxsw_cmd_mbox_alloc();
1474 	if (!out_mbox) {
1475 		err = -ENOMEM;
1476 		goto free_in_mbox;
1477 	}
1478 
1479 	mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
1480 			       mlxsw_core_tid_get(mlxsw_core));
1481 	tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
1482 	mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
1483 
1484 	/* There is a special treatment needed for MRSR (reset) register.
1485 	 * The command interface will return error after the command
1486 	 * is executed, so tell the lower layer to expect it
1487 	 * and cope accordingly.
1488 	 */
1489 	reset_ok = reg->id == MLXSW_REG_MRSR_ID;
1490 
1491 	n_retry = 0;
1492 retry:
1493 	err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox);
1494 	if (!err) {
1495 		err = mlxsw_emad_process_status(out_mbox, &status);
1496 		if (err) {
1497 			if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
1498 				goto retry;
1499 			dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
1500 				status, mlxsw_emad_op_tlv_status_str(status));
1501 		}
1502 	}
1503 
1504 	if (!err)
1505 		memcpy(payload, mlxsw_emad_reg_payload(out_mbox),
1506 		       reg->len);
1507 
1508 	mlxsw_cmd_mbox_free(out_mbox);
1509 free_in_mbox:
1510 	mlxsw_cmd_mbox_free(in_mbox);
1511 	if (err)
1512 		dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
1513 			reg->id, mlxsw_reg_id_str(reg->id),
1514 			mlxsw_core_reg_access_type_str(type));
1515 	return err;
1516 }
1517 
1518 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
1519 				     char *payload, size_t payload_len,
1520 				     unsigned long cb_priv)
1521 {
1522 	char *orig_payload = (char *) cb_priv;
1523 
1524 	memcpy(orig_payload, payload, payload_len);
1525 }
1526 
1527 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
1528 				 const struct mlxsw_reg_info *reg,
1529 				 char *payload,
1530 				 enum mlxsw_core_reg_access_type type)
1531 {
1532 	LIST_HEAD(bulk_list);
1533 	int err;
1534 
1535 	/* During initialization EMAD interface is not available to us,
1536 	 * so we default to command interface. We switch to EMAD interface
1537 	 * after setting the appropriate traps.
1538 	 */
1539 	if (!mlxsw_core->emad.use_emad)
1540 		return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
1541 						 payload, type);
1542 
1543 	err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
1544 					 payload, type, &bulk_list,
1545 					 mlxsw_core_reg_access_cb,
1546 					 (unsigned long) payload);
1547 	if (err)
1548 		return err;
1549 	return mlxsw_reg_trans_bulk_wait(&bulk_list);
1550 }
1551 
1552 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
1553 		    const struct mlxsw_reg_info *reg, char *payload)
1554 {
1555 	return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1556 				     MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
1557 }
1558 EXPORT_SYMBOL(mlxsw_reg_query);
1559 
1560 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
1561 		    const struct mlxsw_reg_info *reg, char *payload)
1562 {
1563 	return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1564 				     MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
1565 }
1566 EXPORT_SYMBOL(mlxsw_reg_write);
1567 
1568 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1569 			    struct mlxsw_rx_info *rx_info)
1570 {
1571 	struct mlxsw_rx_listener_item *rxl_item;
1572 	const struct mlxsw_rx_listener *rxl;
1573 	u8 local_port;
1574 	bool found = false;
1575 
1576 	if (rx_info->is_lag) {
1577 		dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
1578 				    __func__, rx_info->u.lag_id,
1579 				    rx_info->trap_id);
1580 		/* Upper layer does not care if the skb came from LAG or not,
1581 		 * so just get the local_port for the lag port and push it up.
1582 		 */
1583 		local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
1584 							rx_info->u.lag_id,
1585 							rx_info->lag_port_index);
1586 	} else {
1587 		local_port = rx_info->u.sys_port;
1588 	}
1589 
1590 	dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
1591 			    __func__, local_port, rx_info->trap_id);
1592 
1593 	if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
1594 	    (local_port >= mlxsw_core->max_ports))
1595 		goto drop;
1596 
1597 	rcu_read_lock();
1598 	list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
1599 		rxl = &rxl_item->rxl;
1600 		if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
1601 		     rxl->local_port == local_port) &&
1602 		    rxl->trap_id == rx_info->trap_id) {
1603 			found = true;
1604 			break;
1605 		}
1606 	}
1607 	rcu_read_unlock();
1608 	if (!found)
1609 		goto drop;
1610 
1611 	rxl->func(skb, local_port, rxl_item->priv);
1612 	return;
1613 
1614 drop:
1615 	dev_kfree_skb(skb);
1616 }
1617 EXPORT_SYMBOL(mlxsw_core_skb_receive);
1618 
1619 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
1620 					u16 lag_id, u8 port_index)
1621 {
1622 	return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
1623 	       port_index;
1624 }
1625 
1626 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
1627 				u16 lag_id, u8 port_index, u8 local_port)
1628 {
1629 	int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1630 						 lag_id, port_index);
1631 
1632 	mlxsw_core->lag.mapping[index] = local_port;
1633 }
1634 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
1635 
1636 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
1637 			      u16 lag_id, u8 port_index)
1638 {
1639 	int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1640 						 lag_id, port_index);
1641 
1642 	return mlxsw_core->lag.mapping[index];
1643 }
1644 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
1645 
1646 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
1647 				  u16 lag_id, u8 local_port)
1648 {
1649 	int i;
1650 
1651 	for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
1652 		int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1653 							 lag_id, i);
1654 
1655 		if (mlxsw_core->lag.mapping[index] == local_port)
1656 			mlxsw_core->lag.mapping[index] = 0;
1657 	}
1658 }
1659 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
1660 
1661 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
1662 			  enum mlxsw_res_id res_id)
1663 {
1664 	return mlxsw_res_valid(&mlxsw_core->res, res_id);
1665 }
1666 EXPORT_SYMBOL(mlxsw_core_res_valid);
1667 
1668 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
1669 		       enum mlxsw_res_id res_id)
1670 {
1671 	return mlxsw_res_get(&mlxsw_core->res, res_id);
1672 }
1673 EXPORT_SYMBOL(mlxsw_core_res_get);
1674 
1675 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port)
1676 {
1677 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
1678 	struct mlxsw_core_port *mlxsw_core_port =
1679 					&mlxsw_core->ports[local_port];
1680 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1681 	int err;
1682 
1683 	mlxsw_core_port->local_port = local_port;
1684 	err = devlink_port_register(devlink, devlink_port, local_port);
1685 	if (err)
1686 		memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1687 	return err;
1688 }
1689 EXPORT_SYMBOL(mlxsw_core_port_init);
1690 
1691 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
1692 {
1693 	struct mlxsw_core_port *mlxsw_core_port =
1694 					&mlxsw_core->ports[local_port];
1695 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1696 
1697 	devlink_port_unregister(devlink_port);
1698 	memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1699 }
1700 EXPORT_SYMBOL(mlxsw_core_port_fini);
1701 
1702 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1703 			     void *port_driver_priv, struct net_device *dev,
1704 			     u32 port_number, bool split,
1705 			     u32 split_port_subnumber)
1706 {
1707 	struct mlxsw_core_port *mlxsw_core_port =
1708 					&mlxsw_core->ports[local_port];
1709 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1710 
1711 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1712 	devlink_port_attrs_set(devlink_port, DEVLINK_PORT_FLAVOUR_PHYSICAL,
1713 			       port_number, split, split_port_subnumber);
1714 	devlink_port_type_eth_set(devlink_port, dev);
1715 }
1716 EXPORT_SYMBOL(mlxsw_core_port_eth_set);
1717 
1718 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1719 			    void *port_driver_priv)
1720 {
1721 	struct mlxsw_core_port *mlxsw_core_port =
1722 					&mlxsw_core->ports[local_port];
1723 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1724 
1725 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1726 	devlink_port_type_ib_set(devlink_port, NULL);
1727 }
1728 EXPORT_SYMBOL(mlxsw_core_port_ib_set);
1729 
1730 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
1731 			   void *port_driver_priv)
1732 {
1733 	struct mlxsw_core_port *mlxsw_core_port =
1734 					&mlxsw_core->ports[local_port];
1735 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1736 
1737 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1738 	devlink_port_type_clear(devlink_port);
1739 }
1740 EXPORT_SYMBOL(mlxsw_core_port_clear);
1741 
1742 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
1743 						u8 local_port)
1744 {
1745 	struct mlxsw_core_port *mlxsw_core_port =
1746 					&mlxsw_core->ports[local_port];
1747 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1748 
1749 	return devlink_port->type;
1750 }
1751 EXPORT_SYMBOL(mlxsw_core_port_type_get);
1752 
1753 int mlxsw_core_port_get_phys_port_name(struct mlxsw_core *mlxsw_core,
1754 				       u8 local_port, char *name, size_t len)
1755 {
1756 	struct mlxsw_core_port *mlxsw_core_port =
1757 					&mlxsw_core->ports[local_port];
1758 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1759 
1760 	return devlink_port_get_phys_port_name(devlink_port, name, len);
1761 }
1762 EXPORT_SYMBOL(mlxsw_core_port_get_phys_port_name);
1763 
1764 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
1765 				    const char *buf, size_t size)
1766 {
1767 	__be32 *m = (__be32 *) buf;
1768 	int i;
1769 	int count = size / sizeof(__be32);
1770 
1771 	for (i = count - 1; i >= 0; i--)
1772 		if (m[i])
1773 			break;
1774 	i++;
1775 	count = i ? i : 1;
1776 	for (i = 0; i < count; i += 4)
1777 		dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
1778 			i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
1779 			be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
1780 }
1781 
1782 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
1783 		   u32 in_mod, bool out_mbox_direct, bool reset_ok,
1784 		   char *in_mbox, size_t in_mbox_size,
1785 		   char *out_mbox, size_t out_mbox_size)
1786 {
1787 	u8 status;
1788 	int err;
1789 
1790 	BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
1791 	if (!mlxsw_core->bus->cmd_exec)
1792 		return -EOPNOTSUPP;
1793 
1794 	dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1795 		opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
1796 	if (in_mbox) {
1797 		dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
1798 		mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
1799 	}
1800 
1801 	err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
1802 					opcode_mod, in_mod, out_mbox_direct,
1803 					in_mbox, in_mbox_size,
1804 					out_mbox, out_mbox_size, &status);
1805 
1806 	if (!err && out_mbox) {
1807 		dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
1808 		mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
1809 	}
1810 
1811 	if (reset_ok && err == -EIO &&
1812 	    status == MLXSW_CMD_STATUS_RUNNING_RESET) {
1813 		err = 0;
1814 	} else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
1815 		dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
1816 			opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1817 			in_mod, status, mlxsw_cmd_status_str(status));
1818 	} else if (err == -ETIMEDOUT) {
1819 		dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1820 			opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1821 			in_mod);
1822 	}
1823 
1824 	return err;
1825 }
1826 EXPORT_SYMBOL(mlxsw_cmd_exec);
1827 
1828 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
1829 {
1830 	return queue_delayed_work(mlxsw_wq, dwork, delay);
1831 }
1832 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
1833 
1834 bool mlxsw_core_schedule_work(struct work_struct *work)
1835 {
1836 	return queue_work(mlxsw_owq, work);
1837 }
1838 EXPORT_SYMBOL(mlxsw_core_schedule_work);
1839 
1840 void mlxsw_core_flush_owq(void)
1841 {
1842 	flush_workqueue(mlxsw_owq);
1843 }
1844 EXPORT_SYMBOL(mlxsw_core_flush_owq);
1845 
1846 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
1847 			     const struct mlxsw_config_profile *profile,
1848 			     u64 *p_single_size, u64 *p_double_size,
1849 			     u64 *p_linear_size)
1850 {
1851 	struct mlxsw_driver *driver = mlxsw_core->driver;
1852 
1853 	if (!driver->kvd_sizes_get)
1854 		return -EINVAL;
1855 
1856 	return driver->kvd_sizes_get(mlxsw_core, profile,
1857 				     p_single_size, p_double_size,
1858 				     p_linear_size);
1859 }
1860 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get);
1861 
1862 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core)
1863 {
1864 	mlxsw_core->fw_flash_in_progress = true;
1865 }
1866 EXPORT_SYMBOL(mlxsw_core_fw_flash_start);
1867 
1868 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core)
1869 {
1870 	mlxsw_core->fw_flash_in_progress = false;
1871 }
1872 EXPORT_SYMBOL(mlxsw_core_fw_flash_end);
1873 
1874 static int __init mlxsw_core_module_init(void)
1875 {
1876 	int err;
1877 
1878 	mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, WQ_MEM_RECLAIM, 0);
1879 	if (!mlxsw_wq)
1880 		return -ENOMEM;
1881 	mlxsw_owq = alloc_ordered_workqueue("%s_ordered", WQ_MEM_RECLAIM,
1882 					    mlxsw_core_driver_name);
1883 	if (!mlxsw_owq) {
1884 		err = -ENOMEM;
1885 		goto err_alloc_ordered_workqueue;
1886 	}
1887 	return 0;
1888 
1889 err_alloc_ordered_workqueue:
1890 	destroy_workqueue(mlxsw_wq);
1891 	return err;
1892 }
1893 
1894 static void __exit mlxsw_core_module_exit(void)
1895 {
1896 	destroy_workqueue(mlxsw_owq);
1897 	destroy_workqueue(mlxsw_wq);
1898 }
1899 
1900 module_init(mlxsw_core_module_init);
1901 module_exit(mlxsw_core_module_exit);
1902 
1903 MODULE_LICENSE("Dual BSD/GPL");
1904 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
1905 MODULE_DESCRIPTION("Mellanox switch device core driver");
1906