xref: /linux/drivers/net/ethernet/mellanox/mlxsw/core.c (revision 4201c9260a8d3c4ef238e51692a7e9b4e1e29efe)
1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3 
4 #include <linux/kernel.h>
5 #include <linux/module.h>
6 #include <linux/device.h>
7 #include <linux/export.h>
8 #include <linux/err.h>
9 #include <linux/if_link.h>
10 #include <linux/netdevice.h>
11 #include <linux/completion.h>
12 #include <linux/skbuff.h>
13 #include <linux/etherdevice.h>
14 #include <linux/types.h>
15 #include <linux/string.h>
16 #include <linux/gfp.h>
17 #include <linux/random.h>
18 #include <linux/jiffies.h>
19 #include <linux/mutex.h>
20 #include <linux/rcupdate.h>
21 #include <linux/slab.h>
22 #include <linux/workqueue.h>
23 #include <asm/byteorder.h>
24 #include <net/devlink.h>
25 #include <trace/events/devlink.h>
26 
27 #include "core.h"
28 #include "item.h"
29 #include "cmd.h"
30 #include "port.h"
31 #include "trap.h"
32 #include "emad.h"
33 #include "reg.h"
34 #include "resources.h"
35 
36 static LIST_HEAD(mlxsw_core_driver_list);
37 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
38 
39 static const char mlxsw_core_driver_name[] = "mlxsw_core";
40 
41 static struct workqueue_struct *mlxsw_wq;
42 static struct workqueue_struct *mlxsw_owq;
43 
44 struct mlxsw_core_port {
45 	struct devlink_port devlink_port;
46 	void *port_driver_priv;
47 	u8 local_port;
48 };
49 
50 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
51 {
52 	return mlxsw_core_port->port_driver_priv;
53 }
54 EXPORT_SYMBOL(mlxsw_core_port_driver_priv);
55 
56 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port)
57 {
58 	return mlxsw_core_port->port_driver_priv != NULL;
59 }
60 
61 struct mlxsw_core {
62 	struct mlxsw_driver *driver;
63 	const struct mlxsw_bus *bus;
64 	void *bus_priv;
65 	const struct mlxsw_bus_info *bus_info;
66 	struct workqueue_struct *emad_wq;
67 	struct list_head rx_listener_list;
68 	struct list_head event_listener_list;
69 	struct {
70 		atomic64_t tid;
71 		struct list_head trans_list;
72 		spinlock_t trans_list_lock; /* protects trans_list writes */
73 		bool use_emad;
74 	} emad;
75 	struct {
76 		u8 *mapping; /* lag_id+port_index to local_port mapping */
77 	} lag;
78 	struct mlxsw_res res;
79 	struct mlxsw_hwmon *hwmon;
80 	struct mlxsw_thermal *thermal;
81 	struct mlxsw_core_port *ports;
82 	unsigned int max_ports;
83 	bool reload_fail;
84 	bool fw_flash_in_progress;
85 	unsigned long driver_priv[0];
86 	/* driver_priv has to be always the last item */
87 };
88 
89 #define MLXSW_PORT_MAX_PORTS_DEFAULT	0x40
90 
91 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core)
92 {
93 	/* Switch ports are numbered from 1 to queried value */
94 	if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT))
95 		mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core,
96 							   MAX_SYSTEM_PORT) + 1;
97 	else
98 		mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1;
99 
100 	mlxsw_core->ports = kcalloc(mlxsw_core->max_ports,
101 				    sizeof(struct mlxsw_core_port), GFP_KERNEL);
102 	if (!mlxsw_core->ports)
103 		return -ENOMEM;
104 
105 	return 0;
106 }
107 
108 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core)
109 {
110 	kfree(mlxsw_core->ports);
111 }
112 
113 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core)
114 {
115 	return mlxsw_core->max_ports;
116 }
117 EXPORT_SYMBOL(mlxsw_core_max_ports);
118 
119 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
120 {
121 	return mlxsw_core->driver_priv;
122 }
123 EXPORT_SYMBOL(mlxsw_core_driver_priv);
124 
125 bool mlxsw_core_res_query_enabled(const struct mlxsw_core *mlxsw_core)
126 {
127 	return mlxsw_core->driver->res_query_enabled;
128 }
129 EXPORT_SYMBOL(mlxsw_core_res_query_enabled);
130 
131 struct mlxsw_rx_listener_item {
132 	struct list_head list;
133 	struct mlxsw_rx_listener rxl;
134 	void *priv;
135 };
136 
137 struct mlxsw_event_listener_item {
138 	struct list_head list;
139 	struct mlxsw_event_listener el;
140 	void *priv;
141 };
142 
143 /******************
144  * EMAD processing
145  ******************/
146 
147 /* emad_eth_hdr_dmac
148  * Destination MAC in EMAD's Ethernet header.
149  * Must be set to 01:02:c9:00:00:01
150  */
151 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
152 
153 /* emad_eth_hdr_smac
154  * Source MAC in EMAD's Ethernet header.
155  * Must be set to 00:02:c9:01:02:03
156  */
157 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
158 
159 /* emad_eth_hdr_ethertype
160  * Ethertype in EMAD's Ethernet header.
161  * Must be set to 0x8932
162  */
163 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
164 
165 /* emad_eth_hdr_mlx_proto
166  * Mellanox protocol.
167  * Must be set to 0x0.
168  */
169 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
170 
171 /* emad_eth_hdr_ver
172  * Mellanox protocol version.
173  * Must be set to 0x0.
174  */
175 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
176 
177 /* emad_op_tlv_type
178  * Type of the TLV.
179  * Must be set to 0x1 (operation TLV).
180  */
181 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
182 
183 /* emad_op_tlv_len
184  * Length of the operation TLV in u32.
185  * Must be set to 0x4.
186  */
187 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
188 
189 /* emad_op_tlv_dr
190  * Direct route bit. Setting to 1 indicates the EMAD is a direct route
191  * EMAD. DR TLV must follow.
192  *
193  * Note: Currently not supported and must not be set.
194  */
195 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
196 
197 /* emad_op_tlv_status
198  * Returned status in case of EMAD response. Must be set to 0 in case
199  * of EMAD request.
200  * 0x0 - success
201  * 0x1 - device is busy. Requester should retry
202  * 0x2 - Mellanox protocol version not supported
203  * 0x3 - unknown TLV
204  * 0x4 - register not supported
205  * 0x5 - operation class not supported
206  * 0x6 - EMAD method not supported
207  * 0x7 - bad parameter (e.g. port out of range)
208  * 0x8 - resource not available
209  * 0x9 - message receipt acknowledgment. Requester should retry
210  * 0x70 - internal error
211  */
212 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
213 
214 /* emad_op_tlv_register_id
215  * Register ID of register within register TLV.
216  */
217 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
218 
219 /* emad_op_tlv_r
220  * Response bit. Setting to 1 indicates Response, otherwise request.
221  */
222 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
223 
224 /* emad_op_tlv_method
225  * EMAD method type.
226  * 0x1 - query
227  * 0x2 - write
228  * 0x3 - send (currently not supported)
229  * 0x4 - event
230  */
231 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
232 
233 /* emad_op_tlv_class
234  * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
235  */
236 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
237 
238 /* emad_op_tlv_tid
239  * EMAD transaction ID. Used for pairing request and response EMADs.
240  */
241 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
242 
243 /* emad_reg_tlv_type
244  * Type of the TLV.
245  * Must be set to 0x3 (register TLV).
246  */
247 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
248 
249 /* emad_reg_tlv_len
250  * Length of the operation TLV in u32.
251  */
252 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
253 
254 /* emad_end_tlv_type
255  * Type of the TLV.
256  * Must be set to 0x0 (end TLV).
257  */
258 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
259 
260 /* emad_end_tlv_len
261  * Length of the end TLV in u32.
262  * Must be set to 1.
263  */
264 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
265 
266 enum mlxsw_core_reg_access_type {
267 	MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
268 	MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
269 };
270 
271 static inline const char *
272 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
273 {
274 	switch (type) {
275 	case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
276 		return "query";
277 	case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
278 		return "write";
279 	}
280 	BUG();
281 }
282 
283 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
284 {
285 	mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
286 	mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
287 }
288 
289 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
290 				    const struct mlxsw_reg_info *reg,
291 				    char *payload)
292 {
293 	mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
294 	mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
295 	memcpy(reg_tlv + sizeof(u32), payload, reg->len);
296 }
297 
298 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
299 				   const struct mlxsw_reg_info *reg,
300 				   enum mlxsw_core_reg_access_type type,
301 				   u64 tid)
302 {
303 	mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
304 	mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
305 	mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
306 	mlxsw_emad_op_tlv_status_set(op_tlv, 0);
307 	mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
308 	mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
309 	if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
310 		mlxsw_emad_op_tlv_method_set(op_tlv,
311 					     MLXSW_EMAD_OP_TLV_METHOD_QUERY);
312 	else
313 		mlxsw_emad_op_tlv_method_set(op_tlv,
314 					     MLXSW_EMAD_OP_TLV_METHOD_WRITE);
315 	mlxsw_emad_op_tlv_class_set(op_tlv,
316 				    MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
317 	mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
318 }
319 
320 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
321 {
322 	char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
323 
324 	mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
325 	mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
326 	mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
327 	mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
328 	mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
329 
330 	skb_reset_mac_header(skb);
331 
332 	return 0;
333 }
334 
335 static void mlxsw_emad_construct(struct sk_buff *skb,
336 				 const struct mlxsw_reg_info *reg,
337 				 char *payload,
338 				 enum mlxsw_core_reg_access_type type,
339 				 u64 tid)
340 {
341 	char *buf;
342 
343 	buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
344 	mlxsw_emad_pack_end_tlv(buf);
345 
346 	buf = skb_push(skb, reg->len + sizeof(u32));
347 	mlxsw_emad_pack_reg_tlv(buf, reg, payload);
348 
349 	buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
350 	mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
351 
352 	mlxsw_emad_construct_eth_hdr(skb);
353 }
354 
355 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
356 {
357 	return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN));
358 }
359 
360 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
361 {
362 	return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN +
363 				      MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)));
364 }
365 
366 static char *mlxsw_emad_reg_payload(const char *op_tlv)
367 {
368 	return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
369 }
370 
371 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
372 {
373 	char *op_tlv;
374 
375 	op_tlv = mlxsw_emad_op_tlv(skb);
376 	return mlxsw_emad_op_tlv_tid_get(op_tlv);
377 }
378 
379 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
380 {
381 	char *op_tlv;
382 
383 	op_tlv = mlxsw_emad_op_tlv(skb);
384 	return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
385 }
386 
387 static int mlxsw_emad_process_status(char *op_tlv,
388 				     enum mlxsw_emad_op_tlv_status *p_status)
389 {
390 	*p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
391 
392 	switch (*p_status) {
393 	case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
394 		return 0;
395 	case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
396 	case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
397 		return -EAGAIN;
398 	case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
399 	case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
400 	case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
401 	case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
402 	case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
403 	case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
404 	case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
405 	case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
406 	default:
407 		return -EIO;
408 	}
409 }
410 
411 static int
412 mlxsw_emad_process_status_skb(struct sk_buff *skb,
413 			      enum mlxsw_emad_op_tlv_status *p_status)
414 {
415 	return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
416 }
417 
418 struct mlxsw_reg_trans {
419 	struct list_head list;
420 	struct list_head bulk_list;
421 	struct mlxsw_core *core;
422 	struct sk_buff *tx_skb;
423 	struct mlxsw_tx_info tx_info;
424 	struct delayed_work timeout_dw;
425 	unsigned int retries;
426 	u64 tid;
427 	struct completion completion;
428 	atomic_t active;
429 	mlxsw_reg_trans_cb_t *cb;
430 	unsigned long cb_priv;
431 	const struct mlxsw_reg_info *reg;
432 	enum mlxsw_core_reg_access_type type;
433 	int err;
434 	enum mlxsw_emad_op_tlv_status emad_status;
435 	struct rcu_head rcu;
436 };
437 
438 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS	3000
439 #define MLXSW_EMAD_TIMEOUT_MS			200
440 
441 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
442 {
443 	unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
444 
445 	if (trans->core->fw_flash_in_progress)
446 		timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS);
447 
448 	queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout);
449 }
450 
451 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
452 			       struct mlxsw_reg_trans *trans)
453 {
454 	struct sk_buff *skb;
455 	int err;
456 
457 	skb = skb_copy(trans->tx_skb, GFP_KERNEL);
458 	if (!skb)
459 		return -ENOMEM;
460 
461 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
462 			    skb->data + mlxsw_core->driver->txhdr_len,
463 			    skb->len - mlxsw_core->driver->txhdr_len);
464 
465 	atomic_set(&trans->active, 1);
466 	err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
467 	if (err) {
468 		dev_kfree_skb(skb);
469 		return err;
470 	}
471 	mlxsw_emad_trans_timeout_schedule(trans);
472 	return 0;
473 }
474 
475 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
476 {
477 	struct mlxsw_core *mlxsw_core = trans->core;
478 
479 	dev_kfree_skb(trans->tx_skb);
480 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
481 	list_del_rcu(&trans->list);
482 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
483 	trans->err = err;
484 	complete(&trans->completion);
485 }
486 
487 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
488 				      struct mlxsw_reg_trans *trans)
489 {
490 	int err;
491 
492 	if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
493 		trans->retries++;
494 		err = mlxsw_emad_transmit(trans->core, trans);
495 		if (err == 0)
496 			return;
497 	} else {
498 		err = -EIO;
499 	}
500 	mlxsw_emad_trans_finish(trans, err);
501 }
502 
503 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
504 {
505 	struct mlxsw_reg_trans *trans = container_of(work,
506 						     struct mlxsw_reg_trans,
507 						     timeout_dw.work);
508 
509 	if (!atomic_dec_and_test(&trans->active))
510 		return;
511 
512 	mlxsw_emad_transmit_retry(trans->core, trans);
513 }
514 
515 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
516 					struct mlxsw_reg_trans *trans,
517 					struct sk_buff *skb)
518 {
519 	int err;
520 
521 	if (!atomic_dec_and_test(&trans->active))
522 		return;
523 
524 	err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
525 	if (err == -EAGAIN) {
526 		mlxsw_emad_transmit_retry(mlxsw_core, trans);
527 	} else {
528 		if (err == 0) {
529 			char *op_tlv = mlxsw_emad_op_tlv(skb);
530 
531 			if (trans->cb)
532 				trans->cb(mlxsw_core,
533 					  mlxsw_emad_reg_payload(op_tlv),
534 					  trans->reg->len, trans->cb_priv);
535 		}
536 		mlxsw_emad_trans_finish(trans, err);
537 	}
538 }
539 
540 /* called with rcu read lock held */
541 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
542 					void *priv)
543 {
544 	struct mlxsw_core *mlxsw_core = priv;
545 	struct mlxsw_reg_trans *trans;
546 
547 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
548 			    skb->data, skb->len);
549 
550 	if (!mlxsw_emad_is_resp(skb))
551 		goto free_skb;
552 
553 	list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
554 		if (mlxsw_emad_get_tid(skb) == trans->tid) {
555 			mlxsw_emad_process_response(mlxsw_core, trans, skb);
556 			break;
557 		}
558 	}
559 
560 free_skb:
561 	dev_kfree_skb(skb);
562 }
563 
564 static const struct mlxsw_listener mlxsw_emad_rx_listener =
565 	MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false,
566 		  EMAD, DISCARD);
567 
568 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
569 {
570 	struct workqueue_struct *emad_wq;
571 	u64 tid;
572 	int err;
573 
574 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
575 		return 0;
576 
577 	emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0);
578 	if (!emad_wq)
579 		return -ENOMEM;
580 	mlxsw_core->emad_wq = emad_wq;
581 
582 	/* Set the upper 32 bits of the transaction ID field to a random
583 	 * number. This allows us to discard EMADs addressed to other
584 	 * devices.
585 	 */
586 	get_random_bytes(&tid, 4);
587 	tid <<= 32;
588 	atomic64_set(&mlxsw_core->emad.tid, tid);
589 
590 	INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
591 	spin_lock_init(&mlxsw_core->emad.trans_list_lock);
592 
593 	err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
594 				       mlxsw_core);
595 	if (err)
596 		return err;
597 
598 	err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
599 	if (err)
600 		goto err_emad_trap_set;
601 	mlxsw_core->emad.use_emad = true;
602 
603 	return 0;
604 
605 err_emad_trap_set:
606 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
607 				   mlxsw_core);
608 	destroy_workqueue(mlxsw_core->emad_wq);
609 	return err;
610 }
611 
612 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
613 {
614 
615 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
616 		return;
617 
618 	mlxsw_core->emad.use_emad = false;
619 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
620 				   mlxsw_core);
621 	destroy_workqueue(mlxsw_core->emad_wq);
622 }
623 
624 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
625 					u16 reg_len)
626 {
627 	struct sk_buff *skb;
628 	u16 emad_len;
629 
630 	emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
631 		    (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
632 		    sizeof(u32) + mlxsw_core->driver->txhdr_len);
633 	if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
634 		return NULL;
635 
636 	skb = netdev_alloc_skb(NULL, emad_len);
637 	if (!skb)
638 		return NULL;
639 	memset(skb->data, 0, emad_len);
640 	skb_reserve(skb, emad_len);
641 
642 	return skb;
643 }
644 
645 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
646 				 const struct mlxsw_reg_info *reg,
647 				 char *payload,
648 				 enum mlxsw_core_reg_access_type type,
649 				 struct mlxsw_reg_trans *trans,
650 				 struct list_head *bulk_list,
651 				 mlxsw_reg_trans_cb_t *cb,
652 				 unsigned long cb_priv, u64 tid)
653 {
654 	struct sk_buff *skb;
655 	int err;
656 
657 	dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
658 		tid, reg->id, mlxsw_reg_id_str(reg->id),
659 		mlxsw_core_reg_access_type_str(type));
660 
661 	skb = mlxsw_emad_alloc(mlxsw_core, reg->len);
662 	if (!skb)
663 		return -ENOMEM;
664 
665 	list_add_tail(&trans->bulk_list, bulk_list);
666 	trans->core = mlxsw_core;
667 	trans->tx_skb = skb;
668 	trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
669 	trans->tx_info.is_emad = true;
670 	INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
671 	trans->tid = tid;
672 	init_completion(&trans->completion);
673 	trans->cb = cb;
674 	trans->cb_priv = cb_priv;
675 	trans->reg = reg;
676 	trans->type = type;
677 
678 	mlxsw_emad_construct(skb, reg, payload, type, trans->tid);
679 	mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
680 
681 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
682 	list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
683 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
684 	err = mlxsw_emad_transmit(mlxsw_core, trans);
685 	if (err)
686 		goto err_out;
687 	return 0;
688 
689 err_out:
690 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
691 	list_del_rcu(&trans->list);
692 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
693 	list_del(&trans->bulk_list);
694 	dev_kfree_skb(trans->tx_skb);
695 	return err;
696 }
697 
698 /*****************
699  * Core functions
700  *****************/
701 
702 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
703 {
704 	spin_lock(&mlxsw_core_driver_list_lock);
705 	list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
706 	spin_unlock(&mlxsw_core_driver_list_lock);
707 	return 0;
708 }
709 EXPORT_SYMBOL(mlxsw_core_driver_register);
710 
711 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
712 {
713 	spin_lock(&mlxsw_core_driver_list_lock);
714 	list_del(&mlxsw_driver->list);
715 	spin_unlock(&mlxsw_core_driver_list_lock);
716 }
717 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
718 
719 static struct mlxsw_driver *__driver_find(const char *kind)
720 {
721 	struct mlxsw_driver *mlxsw_driver;
722 
723 	list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
724 		if (strcmp(mlxsw_driver->kind, kind) == 0)
725 			return mlxsw_driver;
726 	}
727 	return NULL;
728 }
729 
730 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
731 {
732 	struct mlxsw_driver *mlxsw_driver;
733 
734 	spin_lock(&mlxsw_core_driver_list_lock);
735 	mlxsw_driver = __driver_find(kind);
736 	spin_unlock(&mlxsw_core_driver_list_lock);
737 	return mlxsw_driver;
738 }
739 
740 static int mlxsw_devlink_port_split(struct devlink *devlink,
741 				    unsigned int port_index,
742 				    unsigned int count,
743 				    struct netlink_ext_ack *extack)
744 {
745 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
746 
747 	if (port_index >= mlxsw_core->max_ports) {
748 		NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
749 		return -EINVAL;
750 	}
751 	if (!mlxsw_core->driver->port_split)
752 		return -EOPNOTSUPP;
753 	return mlxsw_core->driver->port_split(mlxsw_core, port_index, count,
754 					      extack);
755 }
756 
757 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
758 				      unsigned int port_index,
759 				      struct netlink_ext_ack *extack)
760 {
761 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
762 
763 	if (port_index >= mlxsw_core->max_ports) {
764 		NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
765 		return -EINVAL;
766 	}
767 	if (!mlxsw_core->driver->port_unsplit)
768 		return -EOPNOTSUPP;
769 	return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index,
770 						extack);
771 }
772 
773 static int
774 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
775 			  unsigned int sb_index, u16 pool_index,
776 			  struct devlink_sb_pool_info *pool_info)
777 {
778 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
779 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
780 
781 	if (!mlxsw_driver->sb_pool_get)
782 		return -EOPNOTSUPP;
783 	return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
784 					 pool_index, pool_info);
785 }
786 
787 static int
788 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
789 			  unsigned int sb_index, u16 pool_index, u32 size,
790 			  enum devlink_sb_threshold_type threshold_type,
791 			  struct netlink_ext_ack *extack)
792 {
793 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
794 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
795 
796 	if (!mlxsw_driver->sb_pool_set)
797 		return -EOPNOTSUPP;
798 	return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
799 					 pool_index, size, threshold_type,
800 					 extack);
801 }
802 
803 static void *__dl_port(struct devlink_port *devlink_port)
804 {
805 	return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
806 }
807 
808 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port,
809 				       enum devlink_port_type port_type)
810 {
811 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
812 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
813 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
814 
815 	if (!mlxsw_driver->port_type_set)
816 		return -EOPNOTSUPP;
817 
818 	return mlxsw_driver->port_type_set(mlxsw_core,
819 					   mlxsw_core_port->local_port,
820 					   port_type);
821 }
822 
823 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
824 					  unsigned int sb_index, u16 pool_index,
825 					  u32 *p_threshold)
826 {
827 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
828 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
829 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
830 
831 	if (!mlxsw_driver->sb_port_pool_get ||
832 	    !mlxsw_core_port_check(mlxsw_core_port))
833 		return -EOPNOTSUPP;
834 	return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
835 					      pool_index, p_threshold);
836 }
837 
838 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
839 					  unsigned int sb_index, u16 pool_index,
840 					  u32 threshold,
841 					  struct netlink_ext_ack *extack)
842 {
843 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
844 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
845 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
846 
847 	if (!mlxsw_driver->sb_port_pool_set ||
848 	    !mlxsw_core_port_check(mlxsw_core_port))
849 		return -EOPNOTSUPP;
850 	return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
851 					      pool_index, threshold, extack);
852 }
853 
854 static int
855 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
856 				  unsigned int sb_index, u16 tc_index,
857 				  enum devlink_sb_pool_type pool_type,
858 				  u16 *p_pool_index, u32 *p_threshold)
859 {
860 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
861 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
862 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
863 
864 	if (!mlxsw_driver->sb_tc_pool_bind_get ||
865 	    !mlxsw_core_port_check(mlxsw_core_port))
866 		return -EOPNOTSUPP;
867 	return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
868 						 tc_index, pool_type,
869 						 p_pool_index, p_threshold);
870 }
871 
872 static int
873 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
874 				  unsigned int sb_index, u16 tc_index,
875 				  enum devlink_sb_pool_type pool_type,
876 				  u16 pool_index, u32 threshold,
877 				  struct netlink_ext_ack *extack)
878 {
879 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
880 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
881 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
882 
883 	if (!mlxsw_driver->sb_tc_pool_bind_set ||
884 	    !mlxsw_core_port_check(mlxsw_core_port))
885 		return -EOPNOTSUPP;
886 	return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
887 						 tc_index, pool_type,
888 						 pool_index, threshold, extack);
889 }
890 
891 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
892 					 unsigned int sb_index)
893 {
894 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
895 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
896 
897 	if (!mlxsw_driver->sb_occ_snapshot)
898 		return -EOPNOTSUPP;
899 	return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
900 }
901 
902 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
903 					  unsigned int sb_index)
904 {
905 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
906 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
907 
908 	if (!mlxsw_driver->sb_occ_max_clear)
909 		return -EOPNOTSUPP;
910 	return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
911 }
912 
913 static int
914 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
915 				   unsigned int sb_index, u16 pool_index,
916 				   u32 *p_cur, u32 *p_max)
917 {
918 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
919 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
920 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
921 
922 	if (!mlxsw_driver->sb_occ_port_pool_get ||
923 	    !mlxsw_core_port_check(mlxsw_core_port))
924 		return -EOPNOTSUPP;
925 	return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
926 						  pool_index, p_cur, p_max);
927 }
928 
929 static int
930 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
931 				      unsigned int sb_index, u16 tc_index,
932 				      enum devlink_sb_pool_type pool_type,
933 				      u32 *p_cur, u32 *p_max)
934 {
935 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
936 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
937 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
938 
939 	if (!mlxsw_driver->sb_occ_tc_port_bind_get ||
940 	    !mlxsw_core_port_check(mlxsw_core_port))
941 		return -EOPNOTSUPP;
942 	return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
943 						     sb_index, tc_index,
944 						     pool_type, p_cur, p_max);
945 }
946 
947 static int
948 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
949 		       struct netlink_ext_ack *extack)
950 {
951 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
952 	char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE];
953 	u32 hw_rev, fw_major, fw_minor, fw_sub_minor;
954 	char mgir_pl[MLXSW_REG_MGIR_LEN];
955 	char buf[32];
956 	int err;
957 
958 	err = devlink_info_driver_name_put(req,
959 					   mlxsw_core->bus_info->device_kind);
960 	if (err)
961 		return err;
962 
963 	mlxsw_reg_mgir_pack(mgir_pl);
964 	err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl);
965 	if (err)
966 		return err;
967 	mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major,
968 			      &fw_minor, &fw_sub_minor);
969 
970 	sprintf(buf, "%X", hw_rev);
971 	err = devlink_info_version_fixed_put(req, "hw.revision", buf);
972 	if (err)
973 		return err;
974 
975 	err = devlink_info_version_fixed_put(req, "fw.psid", fw_info_psid);
976 	if (err)
977 		return err;
978 
979 	sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor);
980 	err = devlink_info_version_running_put(req, "fw.version", buf);
981 	if (err)
982 		return err;
983 
984 	return 0;
985 }
986 
987 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink,
988 						struct netlink_ext_ack *extack)
989 {
990 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
991 	int err;
992 
993 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET))
994 		return -EOPNOTSUPP;
995 
996 	mlxsw_core_bus_device_unregister(mlxsw_core, true);
997 	err = mlxsw_core_bus_device_register(mlxsw_core->bus_info,
998 					     mlxsw_core->bus,
999 					     mlxsw_core->bus_priv, true,
1000 					     devlink);
1001 	mlxsw_core->reload_fail = !!err;
1002 
1003 	return err;
1004 }
1005 
1006 static int mlxsw_devlink_flash_update(struct devlink *devlink,
1007 				      const char *file_name,
1008 				      const char *component,
1009 				      struct netlink_ext_ack *extack)
1010 {
1011 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1012 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1013 
1014 	if (!mlxsw_driver->flash_update)
1015 		return -EOPNOTSUPP;
1016 	return mlxsw_driver->flash_update(mlxsw_core, file_name,
1017 					  component, extack);
1018 }
1019 
1020 static const struct devlink_ops mlxsw_devlink_ops = {
1021 	.reload				= mlxsw_devlink_core_bus_device_reload,
1022 	.port_type_set			= mlxsw_devlink_port_type_set,
1023 	.port_split			= mlxsw_devlink_port_split,
1024 	.port_unsplit			= mlxsw_devlink_port_unsplit,
1025 	.sb_pool_get			= mlxsw_devlink_sb_pool_get,
1026 	.sb_pool_set			= mlxsw_devlink_sb_pool_set,
1027 	.sb_port_pool_get		= mlxsw_devlink_sb_port_pool_get,
1028 	.sb_port_pool_set		= mlxsw_devlink_sb_port_pool_set,
1029 	.sb_tc_pool_bind_get		= mlxsw_devlink_sb_tc_pool_bind_get,
1030 	.sb_tc_pool_bind_set		= mlxsw_devlink_sb_tc_pool_bind_set,
1031 	.sb_occ_snapshot		= mlxsw_devlink_sb_occ_snapshot,
1032 	.sb_occ_max_clear		= mlxsw_devlink_sb_occ_max_clear,
1033 	.sb_occ_port_pool_get		= mlxsw_devlink_sb_occ_port_pool_get,
1034 	.sb_occ_tc_port_bind_get	= mlxsw_devlink_sb_occ_tc_port_bind_get,
1035 	.info_get			= mlxsw_devlink_info_get,
1036 	.flash_update			= mlxsw_devlink_flash_update,
1037 };
1038 
1039 static int
1040 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
1041 				 const struct mlxsw_bus *mlxsw_bus,
1042 				 void *bus_priv, bool reload,
1043 				 struct devlink *devlink)
1044 {
1045 	const char *device_kind = mlxsw_bus_info->device_kind;
1046 	struct mlxsw_core *mlxsw_core;
1047 	struct mlxsw_driver *mlxsw_driver;
1048 	struct mlxsw_res *res;
1049 	size_t alloc_size;
1050 	int err;
1051 
1052 	mlxsw_driver = mlxsw_core_driver_get(device_kind);
1053 	if (!mlxsw_driver)
1054 		return -EINVAL;
1055 
1056 	if (!reload) {
1057 		alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
1058 		devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size);
1059 		if (!devlink) {
1060 			err = -ENOMEM;
1061 			goto err_devlink_alloc;
1062 		}
1063 	}
1064 
1065 	mlxsw_core = devlink_priv(devlink);
1066 	INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1067 	INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1068 	mlxsw_core->driver = mlxsw_driver;
1069 	mlxsw_core->bus = mlxsw_bus;
1070 	mlxsw_core->bus_priv = bus_priv;
1071 	mlxsw_core->bus_info = mlxsw_bus_info;
1072 
1073 	res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL;
1074 	err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res);
1075 	if (err)
1076 		goto err_bus_init;
1077 
1078 	if (mlxsw_driver->resources_register && !reload) {
1079 		err = mlxsw_driver->resources_register(mlxsw_core);
1080 		if (err)
1081 			goto err_register_resources;
1082 	}
1083 
1084 	err = mlxsw_ports_init(mlxsw_core);
1085 	if (err)
1086 		goto err_ports_init;
1087 
1088 	if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) &&
1089 	    MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
1090 		alloc_size = sizeof(u8) *
1091 			MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) *
1092 			MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
1093 		mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1094 		if (!mlxsw_core->lag.mapping) {
1095 			err = -ENOMEM;
1096 			goto err_alloc_lag_mapping;
1097 		}
1098 	}
1099 
1100 	err = mlxsw_emad_init(mlxsw_core);
1101 	if (err)
1102 		goto err_emad_init;
1103 
1104 	if (!reload) {
1105 		err = devlink_register(devlink, mlxsw_bus_info->dev);
1106 		if (err)
1107 			goto err_devlink_register;
1108 	}
1109 
1110 	if (mlxsw_driver->params_register && !reload) {
1111 		err = mlxsw_driver->params_register(mlxsw_core);
1112 		if (err)
1113 			goto err_register_params;
1114 	}
1115 
1116 	if (mlxsw_driver->init) {
1117 		err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info);
1118 		if (err)
1119 			goto err_driver_init;
1120 	}
1121 
1122 	err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
1123 	if (err)
1124 		goto err_hwmon_init;
1125 
1126 	err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info,
1127 				 &mlxsw_core->thermal);
1128 	if (err)
1129 		goto err_thermal_init;
1130 
1131 	if (mlxsw_driver->params_register && !reload)
1132 		devlink_params_publish(devlink);
1133 
1134 	return 0;
1135 
1136 err_thermal_init:
1137 	mlxsw_hwmon_fini(mlxsw_core->hwmon);
1138 err_hwmon_init:
1139 	if (mlxsw_core->driver->fini)
1140 		mlxsw_core->driver->fini(mlxsw_core);
1141 err_driver_init:
1142 	if (mlxsw_driver->params_unregister && !reload)
1143 		mlxsw_driver->params_unregister(mlxsw_core);
1144 err_register_params:
1145 	if (!reload)
1146 		devlink_unregister(devlink);
1147 err_devlink_register:
1148 	mlxsw_emad_fini(mlxsw_core);
1149 err_emad_init:
1150 	kfree(mlxsw_core->lag.mapping);
1151 err_alloc_lag_mapping:
1152 	mlxsw_ports_fini(mlxsw_core);
1153 err_ports_init:
1154 	if (!reload)
1155 		devlink_resources_unregister(devlink, NULL);
1156 err_register_resources:
1157 	mlxsw_bus->fini(bus_priv);
1158 err_bus_init:
1159 	if (!reload)
1160 		devlink_free(devlink);
1161 err_devlink_alloc:
1162 	return err;
1163 }
1164 
1165 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
1166 				   const struct mlxsw_bus *mlxsw_bus,
1167 				   void *bus_priv, bool reload,
1168 				   struct devlink *devlink)
1169 {
1170 	bool called_again = false;
1171 	int err;
1172 
1173 again:
1174 	err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus,
1175 					       bus_priv, reload, devlink);
1176 	/* -EAGAIN is returned in case the FW was updated. FW needs
1177 	 * a reset, so lets try to call __mlxsw_core_bus_device_register()
1178 	 * again.
1179 	 */
1180 	if (err == -EAGAIN && !called_again) {
1181 		called_again = true;
1182 		goto again;
1183 	}
1184 
1185 	return err;
1186 }
1187 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
1188 
1189 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core,
1190 				      bool reload)
1191 {
1192 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
1193 
1194 	if (mlxsw_core->reload_fail) {
1195 		if (!reload)
1196 			/* Only the parts that were not de-initialized in the
1197 			 * failed reload attempt need to be de-initialized.
1198 			 */
1199 			goto reload_fail_deinit;
1200 		else
1201 			return;
1202 	}
1203 
1204 	if (mlxsw_core->driver->params_unregister && !reload)
1205 		devlink_params_unpublish(devlink);
1206 	mlxsw_thermal_fini(mlxsw_core->thermal);
1207 	mlxsw_hwmon_fini(mlxsw_core->hwmon);
1208 	if (mlxsw_core->driver->fini)
1209 		mlxsw_core->driver->fini(mlxsw_core);
1210 	if (mlxsw_core->driver->params_unregister && !reload)
1211 		mlxsw_core->driver->params_unregister(mlxsw_core);
1212 	if (!reload)
1213 		devlink_unregister(devlink);
1214 	mlxsw_emad_fini(mlxsw_core);
1215 	kfree(mlxsw_core->lag.mapping);
1216 	mlxsw_ports_fini(mlxsw_core);
1217 	if (!reload)
1218 		devlink_resources_unregister(devlink, NULL);
1219 	mlxsw_core->bus->fini(mlxsw_core->bus_priv);
1220 
1221 	return;
1222 
1223 reload_fail_deinit:
1224 	if (mlxsw_core->driver->params_unregister)
1225 		mlxsw_core->driver->params_unregister(mlxsw_core);
1226 	devlink_unregister(devlink);
1227 	devlink_resources_unregister(devlink, NULL);
1228 	devlink_free(devlink);
1229 }
1230 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
1231 
1232 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
1233 				  const struct mlxsw_tx_info *tx_info)
1234 {
1235 	return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
1236 						  tx_info);
1237 }
1238 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
1239 
1240 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1241 			    const struct mlxsw_tx_info *tx_info)
1242 {
1243 	return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
1244 					     tx_info);
1245 }
1246 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
1247 
1248 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
1249 				   const struct mlxsw_rx_listener *rxl_b)
1250 {
1251 	return (rxl_a->func == rxl_b->func &&
1252 		rxl_a->local_port == rxl_b->local_port &&
1253 		rxl_a->trap_id == rxl_b->trap_id);
1254 }
1255 
1256 static struct mlxsw_rx_listener_item *
1257 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
1258 			const struct mlxsw_rx_listener *rxl,
1259 			void *priv)
1260 {
1261 	struct mlxsw_rx_listener_item *rxl_item;
1262 
1263 	list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
1264 		if (__is_rx_listener_equal(&rxl_item->rxl, rxl) &&
1265 		    rxl_item->priv == priv)
1266 			return rxl_item;
1267 	}
1268 	return NULL;
1269 }
1270 
1271 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
1272 				    const struct mlxsw_rx_listener *rxl,
1273 				    void *priv)
1274 {
1275 	struct mlxsw_rx_listener_item *rxl_item;
1276 
1277 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1278 	if (rxl_item)
1279 		return -EEXIST;
1280 	rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
1281 	if (!rxl_item)
1282 		return -ENOMEM;
1283 	rxl_item->rxl = *rxl;
1284 	rxl_item->priv = priv;
1285 
1286 	list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
1287 	return 0;
1288 }
1289 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
1290 
1291 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
1292 				       const struct mlxsw_rx_listener *rxl,
1293 				       void *priv)
1294 {
1295 	struct mlxsw_rx_listener_item *rxl_item;
1296 
1297 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1298 	if (!rxl_item)
1299 		return;
1300 	list_del_rcu(&rxl_item->list);
1301 	synchronize_rcu();
1302 	kfree(rxl_item);
1303 }
1304 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
1305 
1306 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
1307 					   void *priv)
1308 {
1309 	struct mlxsw_event_listener_item *event_listener_item = priv;
1310 	struct mlxsw_reg_info reg;
1311 	char *payload;
1312 	char *op_tlv = mlxsw_emad_op_tlv(skb);
1313 	char *reg_tlv = mlxsw_emad_reg_tlv(skb);
1314 
1315 	reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
1316 	reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
1317 	payload = mlxsw_emad_reg_payload(op_tlv);
1318 	event_listener_item->el.func(&reg, payload, event_listener_item->priv);
1319 	dev_kfree_skb(skb);
1320 }
1321 
1322 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
1323 				      const struct mlxsw_event_listener *el_b)
1324 {
1325 	return (el_a->func == el_b->func &&
1326 		el_a->trap_id == el_b->trap_id);
1327 }
1328 
1329 static struct mlxsw_event_listener_item *
1330 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
1331 			   const struct mlxsw_event_listener *el,
1332 			   void *priv)
1333 {
1334 	struct mlxsw_event_listener_item *el_item;
1335 
1336 	list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
1337 		if (__is_event_listener_equal(&el_item->el, el) &&
1338 		    el_item->priv == priv)
1339 			return el_item;
1340 	}
1341 	return NULL;
1342 }
1343 
1344 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
1345 				       const struct mlxsw_event_listener *el,
1346 				       void *priv)
1347 {
1348 	int err;
1349 	struct mlxsw_event_listener_item *el_item;
1350 	const struct mlxsw_rx_listener rxl = {
1351 		.func = mlxsw_core_event_listener_func,
1352 		.local_port = MLXSW_PORT_DONT_CARE,
1353 		.trap_id = el->trap_id,
1354 	};
1355 
1356 	el_item = __find_event_listener_item(mlxsw_core, el, priv);
1357 	if (el_item)
1358 		return -EEXIST;
1359 	el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
1360 	if (!el_item)
1361 		return -ENOMEM;
1362 	el_item->el = *el;
1363 	el_item->priv = priv;
1364 
1365 	err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item);
1366 	if (err)
1367 		goto err_rx_listener_register;
1368 
1369 	/* No reason to save item if we did not manage to register an RX
1370 	 * listener for it.
1371 	 */
1372 	list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
1373 
1374 	return 0;
1375 
1376 err_rx_listener_register:
1377 	kfree(el_item);
1378 	return err;
1379 }
1380 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
1381 
1382 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
1383 					  const struct mlxsw_event_listener *el,
1384 					  void *priv)
1385 {
1386 	struct mlxsw_event_listener_item *el_item;
1387 	const struct mlxsw_rx_listener rxl = {
1388 		.func = mlxsw_core_event_listener_func,
1389 		.local_port = MLXSW_PORT_DONT_CARE,
1390 		.trap_id = el->trap_id,
1391 	};
1392 
1393 	el_item = __find_event_listener_item(mlxsw_core, el, priv);
1394 	if (!el_item)
1395 		return;
1396 	mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item);
1397 	list_del(&el_item->list);
1398 	kfree(el_item);
1399 }
1400 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
1401 
1402 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core,
1403 					const struct mlxsw_listener *listener,
1404 					void *priv)
1405 {
1406 	if (listener->is_event)
1407 		return mlxsw_core_event_listener_register(mlxsw_core,
1408 						&listener->u.event_listener,
1409 						priv);
1410 	else
1411 		return mlxsw_core_rx_listener_register(mlxsw_core,
1412 						&listener->u.rx_listener,
1413 						priv);
1414 }
1415 
1416 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core,
1417 				      const struct mlxsw_listener *listener,
1418 				      void *priv)
1419 {
1420 	if (listener->is_event)
1421 		mlxsw_core_event_listener_unregister(mlxsw_core,
1422 						     &listener->u.event_listener,
1423 						     priv);
1424 	else
1425 		mlxsw_core_rx_listener_unregister(mlxsw_core,
1426 						  &listener->u.rx_listener,
1427 						  priv);
1428 }
1429 
1430 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
1431 			     const struct mlxsw_listener *listener, void *priv)
1432 {
1433 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
1434 	int err;
1435 
1436 	err = mlxsw_core_listener_register(mlxsw_core, listener, priv);
1437 	if (err)
1438 		return err;
1439 
1440 	mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id,
1441 			    listener->trap_group, listener->is_ctrl);
1442 	err = mlxsw_reg_write(mlxsw_core,  MLXSW_REG(hpkt), hpkt_pl);
1443 	if (err)
1444 		goto err_trap_set;
1445 
1446 	return 0;
1447 
1448 err_trap_set:
1449 	mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1450 	return err;
1451 }
1452 EXPORT_SYMBOL(mlxsw_core_trap_register);
1453 
1454 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
1455 				const struct mlxsw_listener *listener,
1456 				void *priv)
1457 {
1458 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
1459 
1460 	if (!listener->is_event) {
1461 		mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action,
1462 				    listener->trap_id, listener->trap_group,
1463 				    listener->is_ctrl);
1464 		mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
1465 	}
1466 
1467 	mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1468 }
1469 EXPORT_SYMBOL(mlxsw_core_trap_unregister);
1470 
1471 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
1472 {
1473 	return atomic64_inc_return(&mlxsw_core->emad.tid);
1474 }
1475 
1476 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
1477 				      const struct mlxsw_reg_info *reg,
1478 				      char *payload,
1479 				      enum mlxsw_core_reg_access_type type,
1480 				      struct list_head *bulk_list,
1481 				      mlxsw_reg_trans_cb_t *cb,
1482 				      unsigned long cb_priv)
1483 {
1484 	u64 tid = mlxsw_core_tid_get(mlxsw_core);
1485 	struct mlxsw_reg_trans *trans;
1486 	int err;
1487 
1488 	trans = kzalloc(sizeof(*trans), GFP_KERNEL);
1489 	if (!trans)
1490 		return -ENOMEM;
1491 
1492 	err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
1493 				    bulk_list, cb, cb_priv, tid);
1494 	if (err) {
1495 		kfree(trans);
1496 		return err;
1497 	}
1498 	return 0;
1499 }
1500 
1501 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
1502 			  const struct mlxsw_reg_info *reg, char *payload,
1503 			  struct list_head *bulk_list,
1504 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1505 {
1506 	return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1507 					  MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
1508 					  bulk_list, cb, cb_priv);
1509 }
1510 EXPORT_SYMBOL(mlxsw_reg_trans_query);
1511 
1512 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
1513 			  const struct mlxsw_reg_info *reg, char *payload,
1514 			  struct list_head *bulk_list,
1515 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1516 {
1517 	return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1518 					  MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
1519 					  bulk_list, cb, cb_priv);
1520 }
1521 EXPORT_SYMBOL(mlxsw_reg_trans_write);
1522 
1523 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
1524 {
1525 	struct mlxsw_core *mlxsw_core = trans->core;
1526 	int err;
1527 
1528 	wait_for_completion(&trans->completion);
1529 	cancel_delayed_work_sync(&trans->timeout_dw);
1530 	err = trans->err;
1531 
1532 	if (trans->retries)
1533 		dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
1534 			 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
1535 	if (err) {
1536 		dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
1537 			trans->tid, trans->reg->id,
1538 			mlxsw_reg_id_str(trans->reg->id),
1539 			mlxsw_core_reg_access_type_str(trans->type),
1540 			trans->emad_status,
1541 			mlxsw_emad_op_tlv_status_str(trans->emad_status));
1542 		trace_devlink_hwerr(priv_to_devlink(mlxsw_core),
1543 				    trans->emad_status,
1544 				    mlxsw_emad_op_tlv_status_str(trans->emad_status));
1545 	}
1546 
1547 	list_del(&trans->bulk_list);
1548 	kfree_rcu(trans, rcu);
1549 	return err;
1550 }
1551 
1552 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
1553 {
1554 	struct mlxsw_reg_trans *trans;
1555 	struct mlxsw_reg_trans *tmp;
1556 	int sum_err = 0;
1557 	int err;
1558 
1559 	list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
1560 		err = mlxsw_reg_trans_wait(trans);
1561 		if (err && sum_err == 0)
1562 			sum_err = err; /* first error to be returned */
1563 	}
1564 	return sum_err;
1565 }
1566 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
1567 
1568 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
1569 				     const struct mlxsw_reg_info *reg,
1570 				     char *payload,
1571 				     enum mlxsw_core_reg_access_type type)
1572 {
1573 	enum mlxsw_emad_op_tlv_status status;
1574 	int err, n_retry;
1575 	bool reset_ok;
1576 	char *in_mbox, *out_mbox, *tmp;
1577 
1578 	dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
1579 		reg->id, mlxsw_reg_id_str(reg->id),
1580 		mlxsw_core_reg_access_type_str(type));
1581 
1582 	in_mbox = mlxsw_cmd_mbox_alloc();
1583 	if (!in_mbox)
1584 		return -ENOMEM;
1585 
1586 	out_mbox = mlxsw_cmd_mbox_alloc();
1587 	if (!out_mbox) {
1588 		err = -ENOMEM;
1589 		goto free_in_mbox;
1590 	}
1591 
1592 	mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
1593 			       mlxsw_core_tid_get(mlxsw_core));
1594 	tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
1595 	mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
1596 
1597 	/* There is a special treatment needed for MRSR (reset) register.
1598 	 * The command interface will return error after the command
1599 	 * is executed, so tell the lower layer to expect it
1600 	 * and cope accordingly.
1601 	 */
1602 	reset_ok = reg->id == MLXSW_REG_MRSR_ID;
1603 
1604 	n_retry = 0;
1605 retry:
1606 	err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox);
1607 	if (!err) {
1608 		err = mlxsw_emad_process_status(out_mbox, &status);
1609 		if (err) {
1610 			if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
1611 				goto retry;
1612 			dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
1613 				status, mlxsw_emad_op_tlv_status_str(status));
1614 		}
1615 	}
1616 
1617 	if (!err)
1618 		memcpy(payload, mlxsw_emad_reg_payload(out_mbox),
1619 		       reg->len);
1620 
1621 	mlxsw_cmd_mbox_free(out_mbox);
1622 free_in_mbox:
1623 	mlxsw_cmd_mbox_free(in_mbox);
1624 	if (err)
1625 		dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
1626 			reg->id, mlxsw_reg_id_str(reg->id),
1627 			mlxsw_core_reg_access_type_str(type));
1628 	return err;
1629 }
1630 
1631 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
1632 				     char *payload, size_t payload_len,
1633 				     unsigned long cb_priv)
1634 {
1635 	char *orig_payload = (char *) cb_priv;
1636 
1637 	memcpy(orig_payload, payload, payload_len);
1638 }
1639 
1640 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
1641 				 const struct mlxsw_reg_info *reg,
1642 				 char *payload,
1643 				 enum mlxsw_core_reg_access_type type)
1644 {
1645 	LIST_HEAD(bulk_list);
1646 	int err;
1647 
1648 	/* During initialization EMAD interface is not available to us,
1649 	 * so we default to command interface. We switch to EMAD interface
1650 	 * after setting the appropriate traps.
1651 	 */
1652 	if (!mlxsw_core->emad.use_emad)
1653 		return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
1654 						 payload, type);
1655 
1656 	err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
1657 					 payload, type, &bulk_list,
1658 					 mlxsw_core_reg_access_cb,
1659 					 (unsigned long) payload);
1660 	if (err)
1661 		return err;
1662 	return mlxsw_reg_trans_bulk_wait(&bulk_list);
1663 }
1664 
1665 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
1666 		    const struct mlxsw_reg_info *reg, char *payload)
1667 {
1668 	return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1669 				     MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
1670 }
1671 EXPORT_SYMBOL(mlxsw_reg_query);
1672 
1673 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
1674 		    const struct mlxsw_reg_info *reg, char *payload)
1675 {
1676 	return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1677 				     MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
1678 }
1679 EXPORT_SYMBOL(mlxsw_reg_write);
1680 
1681 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1682 			    struct mlxsw_rx_info *rx_info)
1683 {
1684 	struct mlxsw_rx_listener_item *rxl_item;
1685 	const struct mlxsw_rx_listener *rxl;
1686 	u8 local_port;
1687 	bool found = false;
1688 
1689 	if (rx_info->is_lag) {
1690 		dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
1691 				    __func__, rx_info->u.lag_id,
1692 				    rx_info->trap_id);
1693 		/* Upper layer does not care if the skb came from LAG or not,
1694 		 * so just get the local_port for the lag port and push it up.
1695 		 */
1696 		local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
1697 							rx_info->u.lag_id,
1698 							rx_info->lag_port_index);
1699 	} else {
1700 		local_port = rx_info->u.sys_port;
1701 	}
1702 
1703 	dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
1704 			    __func__, local_port, rx_info->trap_id);
1705 
1706 	if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
1707 	    (local_port >= mlxsw_core->max_ports))
1708 		goto drop;
1709 
1710 	rcu_read_lock();
1711 	list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
1712 		rxl = &rxl_item->rxl;
1713 		if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
1714 		     rxl->local_port == local_port) &&
1715 		    rxl->trap_id == rx_info->trap_id) {
1716 			found = true;
1717 			break;
1718 		}
1719 	}
1720 	rcu_read_unlock();
1721 	if (!found)
1722 		goto drop;
1723 
1724 	rxl->func(skb, local_port, rxl_item->priv);
1725 	return;
1726 
1727 drop:
1728 	dev_kfree_skb(skb);
1729 }
1730 EXPORT_SYMBOL(mlxsw_core_skb_receive);
1731 
1732 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
1733 					u16 lag_id, u8 port_index)
1734 {
1735 	return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
1736 	       port_index;
1737 }
1738 
1739 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
1740 				u16 lag_id, u8 port_index, u8 local_port)
1741 {
1742 	int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1743 						 lag_id, port_index);
1744 
1745 	mlxsw_core->lag.mapping[index] = local_port;
1746 }
1747 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
1748 
1749 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
1750 			      u16 lag_id, u8 port_index)
1751 {
1752 	int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1753 						 lag_id, port_index);
1754 
1755 	return mlxsw_core->lag.mapping[index];
1756 }
1757 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
1758 
1759 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
1760 				  u16 lag_id, u8 local_port)
1761 {
1762 	int i;
1763 
1764 	for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
1765 		int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1766 							 lag_id, i);
1767 
1768 		if (mlxsw_core->lag.mapping[index] == local_port)
1769 			mlxsw_core->lag.mapping[index] = 0;
1770 	}
1771 }
1772 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
1773 
1774 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
1775 			  enum mlxsw_res_id res_id)
1776 {
1777 	return mlxsw_res_valid(&mlxsw_core->res, res_id);
1778 }
1779 EXPORT_SYMBOL(mlxsw_core_res_valid);
1780 
1781 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
1782 		       enum mlxsw_res_id res_id)
1783 {
1784 	return mlxsw_res_get(&mlxsw_core->res, res_id);
1785 }
1786 EXPORT_SYMBOL(mlxsw_core_res_get);
1787 
1788 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
1789 			 u32 port_number, bool split,
1790 			 u32 split_port_subnumber,
1791 			 const unsigned char *switch_id,
1792 			 unsigned char switch_id_len)
1793 {
1794 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
1795 	struct mlxsw_core_port *mlxsw_core_port =
1796 					&mlxsw_core->ports[local_port];
1797 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1798 	int err;
1799 
1800 	mlxsw_core_port->local_port = local_port;
1801 	devlink_port_attrs_set(devlink_port, DEVLINK_PORT_FLAVOUR_PHYSICAL,
1802 			       port_number, split, split_port_subnumber,
1803 			       switch_id, switch_id_len);
1804 	err = devlink_port_register(devlink, devlink_port, local_port);
1805 	if (err)
1806 		memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1807 	return err;
1808 }
1809 EXPORT_SYMBOL(mlxsw_core_port_init);
1810 
1811 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
1812 {
1813 	struct mlxsw_core_port *mlxsw_core_port =
1814 					&mlxsw_core->ports[local_port];
1815 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1816 
1817 	devlink_port_unregister(devlink_port);
1818 	memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1819 }
1820 EXPORT_SYMBOL(mlxsw_core_port_fini);
1821 
1822 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1823 			     void *port_driver_priv, struct net_device *dev)
1824 {
1825 	struct mlxsw_core_port *mlxsw_core_port =
1826 					&mlxsw_core->ports[local_port];
1827 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1828 
1829 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1830 	devlink_port_type_eth_set(devlink_port, dev);
1831 }
1832 EXPORT_SYMBOL(mlxsw_core_port_eth_set);
1833 
1834 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1835 			    void *port_driver_priv)
1836 {
1837 	struct mlxsw_core_port *mlxsw_core_port =
1838 					&mlxsw_core->ports[local_port];
1839 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1840 
1841 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1842 	devlink_port_type_ib_set(devlink_port, NULL);
1843 }
1844 EXPORT_SYMBOL(mlxsw_core_port_ib_set);
1845 
1846 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
1847 			   void *port_driver_priv)
1848 {
1849 	struct mlxsw_core_port *mlxsw_core_port =
1850 					&mlxsw_core->ports[local_port];
1851 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1852 
1853 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1854 	devlink_port_type_clear(devlink_port);
1855 }
1856 EXPORT_SYMBOL(mlxsw_core_port_clear);
1857 
1858 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
1859 						u8 local_port)
1860 {
1861 	struct mlxsw_core_port *mlxsw_core_port =
1862 					&mlxsw_core->ports[local_port];
1863 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1864 
1865 	return devlink_port->type;
1866 }
1867 EXPORT_SYMBOL(mlxsw_core_port_type_get);
1868 
1869 
1870 struct devlink_port *
1871 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
1872 				 u8 local_port)
1873 {
1874 	struct mlxsw_core_port *mlxsw_core_port =
1875 					&mlxsw_core->ports[local_port];
1876 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1877 
1878 	return devlink_port;
1879 }
1880 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get);
1881 
1882 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
1883 				    const char *buf, size_t size)
1884 {
1885 	__be32 *m = (__be32 *) buf;
1886 	int i;
1887 	int count = size / sizeof(__be32);
1888 
1889 	for (i = count - 1; i >= 0; i--)
1890 		if (m[i])
1891 			break;
1892 	i++;
1893 	count = i ? i : 1;
1894 	for (i = 0; i < count; i += 4)
1895 		dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
1896 			i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
1897 			be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
1898 }
1899 
1900 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
1901 		   u32 in_mod, bool out_mbox_direct, bool reset_ok,
1902 		   char *in_mbox, size_t in_mbox_size,
1903 		   char *out_mbox, size_t out_mbox_size)
1904 {
1905 	u8 status;
1906 	int err;
1907 
1908 	BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
1909 	if (!mlxsw_core->bus->cmd_exec)
1910 		return -EOPNOTSUPP;
1911 
1912 	dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1913 		opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
1914 	if (in_mbox) {
1915 		dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
1916 		mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
1917 	}
1918 
1919 	err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
1920 					opcode_mod, in_mod, out_mbox_direct,
1921 					in_mbox, in_mbox_size,
1922 					out_mbox, out_mbox_size, &status);
1923 
1924 	if (!err && out_mbox) {
1925 		dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
1926 		mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
1927 	}
1928 
1929 	if (reset_ok && err == -EIO &&
1930 	    status == MLXSW_CMD_STATUS_RUNNING_RESET) {
1931 		err = 0;
1932 	} else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
1933 		dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
1934 			opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1935 			in_mod, status, mlxsw_cmd_status_str(status));
1936 	} else if (err == -ETIMEDOUT) {
1937 		dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1938 			opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1939 			in_mod);
1940 	}
1941 
1942 	return err;
1943 }
1944 EXPORT_SYMBOL(mlxsw_cmd_exec);
1945 
1946 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
1947 {
1948 	return queue_delayed_work(mlxsw_wq, dwork, delay);
1949 }
1950 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
1951 
1952 bool mlxsw_core_schedule_work(struct work_struct *work)
1953 {
1954 	return queue_work(mlxsw_owq, work);
1955 }
1956 EXPORT_SYMBOL(mlxsw_core_schedule_work);
1957 
1958 void mlxsw_core_flush_owq(void)
1959 {
1960 	flush_workqueue(mlxsw_owq);
1961 }
1962 EXPORT_SYMBOL(mlxsw_core_flush_owq);
1963 
1964 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
1965 			     const struct mlxsw_config_profile *profile,
1966 			     u64 *p_single_size, u64 *p_double_size,
1967 			     u64 *p_linear_size)
1968 {
1969 	struct mlxsw_driver *driver = mlxsw_core->driver;
1970 
1971 	if (!driver->kvd_sizes_get)
1972 		return -EINVAL;
1973 
1974 	return driver->kvd_sizes_get(mlxsw_core, profile,
1975 				     p_single_size, p_double_size,
1976 				     p_linear_size);
1977 }
1978 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get);
1979 
1980 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core)
1981 {
1982 	mlxsw_core->fw_flash_in_progress = true;
1983 }
1984 EXPORT_SYMBOL(mlxsw_core_fw_flash_start);
1985 
1986 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core)
1987 {
1988 	mlxsw_core->fw_flash_in_progress = false;
1989 }
1990 EXPORT_SYMBOL(mlxsw_core_fw_flash_end);
1991 
1992 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
1993 			       struct mlxsw_res *res)
1994 {
1995 	int index, i;
1996 	u64 data;
1997 	u16 id;
1998 	int err;
1999 
2000 	if (!res)
2001 		return 0;
2002 
2003 	mlxsw_cmd_mbox_zero(mbox);
2004 
2005 	for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES;
2006 	     index++) {
2007 		err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index);
2008 		if (err)
2009 			return err;
2010 
2011 		for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) {
2012 			id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i);
2013 			data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i);
2014 
2015 			if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID)
2016 				return 0;
2017 
2018 			mlxsw_res_parse(res, id, data);
2019 		}
2020 	}
2021 
2022 	/* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get
2023 	 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW.
2024 	 */
2025 	return -EIO;
2026 }
2027 EXPORT_SYMBOL(mlxsw_core_resources_query);
2028 
2029 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core)
2030 {
2031 	return mlxsw_core->bus->read_frc_h(mlxsw_core->bus_priv);
2032 }
2033 EXPORT_SYMBOL(mlxsw_core_read_frc_h);
2034 
2035 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core)
2036 {
2037 	return mlxsw_core->bus->read_frc_l(mlxsw_core->bus_priv);
2038 }
2039 EXPORT_SYMBOL(mlxsw_core_read_frc_l);
2040 
2041 static int __init mlxsw_core_module_init(void)
2042 {
2043 	int err;
2044 
2045 	mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0);
2046 	if (!mlxsw_wq)
2047 		return -ENOMEM;
2048 	mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0,
2049 					    mlxsw_core_driver_name);
2050 	if (!mlxsw_owq) {
2051 		err = -ENOMEM;
2052 		goto err_alloc_ordered_workqueue;
2053 	}
2054 	return 0;
2055 
2056 err_alloc_ordered_workqueue:
2057 	destroy_workqueue(mlxsw_wq);
2058 	return err;
2059 }
2060 
2061 static void __exit mlxsw_core_module_exit(void)
2062 {
2063 	destroy_workqueue(mlxsw_owq);
2064 	destroy_workqueue(mlxsw_wq);
2065 }
2066 
2067 module_init(mlxsw_core_module_init);
2068 module_exit(mlxsw_core_module_exit);
2069 
2070 MODULE_LICENSE("Dual BSD/GPL");
2071 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
2072 MODULE_DESCRIPTION("Mellanox switch device core driver");
2073