1 /* 2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 * 32 */ 33 34 #ifndef _MLX4_EN_H_ 35 #define _MLX4_EN_H_ 36 37 #include <linux/bitops.h> 38 #include <linux/compiler.h> 39 #include <linux/ethtool.h> 40 #include <linux/list.h> 41 #include <linux/mutex.h> 42 #include <linux/netdevice.h> 43 #include <linux/if_vlan.h> 44 #include <linux/net_tstamp.h> 45 #ifdef CONFIG_MLX4_EN_DCB 46 #include <linux/dcbnl.h> 47 #endif 48 #include <linux/cpu_rmap.h> 49 #include <linux/ptp_clock_kernel.h> 50 #include <net/xdp.h> 51 52 #include <linux/mlx4/device.h> 53 #include <linux/mlx4/qp.h> 54 #include <linux/mlx4/cq.h> 55 #include <linux/mlx4/srq.h> 56 #include <linux/mlx4/doorbell.h> 57 #include <linux/mlx4/cmd.h> 58 59 #include "en_port.h" 60 #include "mlx4_stats.h" 61 62 #define DRV_NAME "mlx4_en" 63 #define DRV_VERSION "4.0-0" 64 65 #define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN) 66 67 /* 68 * Device constants 69 */ 70 71 72 #define MLX4_EN_PAGE_SHIFT 12 73 #define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT) 74 #define DEF_RX_RINGS 16 75 #define MAX_RX_RINGS 128 76 #define MIN_RX_RINGS 1 77 #define LOG_TXBB_SIZE 6 78 #define TXBB_SIZE BIT(LOG_TXBB_SIZE) 79 #define HEADROOM (2048 / TXBB_SIZE + 1) 80 #define STAMP_STRIDE 64 81 #define STAMP_DWORDS (STAMP_STRIDE / 4) 82 #define STAMP_SHIFT 31 83 #define STAMP_VAL 0x7fffffff 84 #define STATS_DELAY (HZ / 4) 85 #define SERVICE_TASK_DELAY (HZ / 4) 86 #define MAX_NUM_OF_FS_RULES 256 87 88 #define MLX4_EN_FILTER_HASH_SHIFT 4 89 #define MLX4_EN_FILTER_EXPIRY_QUOTA 60 90 91 /* Typical TSO descriptor with 16 gather entries is 352 bytes... */ 92 #define MAX_DESC_SIZE 512 93 #define MAX_DESC_TXBBS (MAX_DESC_SIZE / TXBB_SIZE) 94 95 /* 96 * OS related constants and tunables 97 */ 98 99 #define MLX4_EN_PRIV_FLAGS_BLUEFLAME 1 100 #define MLX4_EN_PRIV_FLAGS_PHV 2 101 102 #define MLX4_EN_WATCHDOG_TIMEOUT (15 * HZ) 103 104 /* Use the maximum between 16384 and a single page */ 105 #define MLX4_EN_ALLOC_SIZE PAGE_ALIGN(16384) 106 107 #define MLX4_EN_MAX_RX_FRAGS 4 108 109 /* Maximum ring sizes */ 110 #define MLX4_EN_MAX_TX_SIZE 8192 111 #define MLX4_EN_MAX_RX_SIZE 8192 112 113 /* Minimum ring size for our page-allocation scheme to work */ 114 #define MLX4_EN_MIN_RX_SIZE (MLX4_EN_ALLOC_SIZE / SMP_CACHE_BYTES) 115 #define MLX4_EN_MIN_TX_SIZE (4096 / TXBB_SIZE) 116 117 #define MLX4_EN_SMALL_PKT_SIZE 64 118 #define MLX4_EN_MIN_TX_RING_P_UP 1 119 #define MLX4_EN_MAX_TX_RING_P_UP 32 120 #define MLX4_EN_NUM_UP_LOW 1 121 #define MLX4_EN_NUM_UP_HIGH 8 122 #define MLX4_EN_DEF_RX_RING_SIZE 1024 123 #define MLX4_EN_DEF_TX_RING_SIZE MLX4_EN_DEF_RX_RING_SIZE 124 #define MAX_TX_RINGS (MLX4_EN_MAX_TX_RING_P_UP * \ 125 MLX4_EN_NUM_UP_HIGH) 126 127 #define MLX4_EN_DEFAULT_TX_WORK 256 128 129 /* Target number of packets to coalesce with interrupt moderation */ 130 #define MLX4_EN_RX_COAL_TARGET 44 131 #define MLX4_EN_RX_COAL_TIME 0x10 132 133 #define MLX4_EN_TX_COAL_PKTS 16 134 #define MLX4_EN_TX_COAL_TIME 0x10 135 136 #define MLX4_EN_MAX_COAL_PKTS U16_MAX 137 #define MLX4_EN_MAX_COAL_TIME U16_MAX 138 139 #define MLX4_EN_RX_RATE_LOW 400000 140 #define MLX4_EN_RX_COAL_TIME_LOW 0 141 #define MLX4_EN_RX_RATE_HIGH 450000 142 #define MLX4_EN_RX_COAL_TIME_HIGH 128 143 #define MLX4_EN_RX_SIZE_THRESH 1024 144 #define MLX4_EN_RX_RATE_THRESH (1000000 / MLX4_EN_RX_COAL_TIME_HIGH) 145 #define MLX4_EN_SAMPLE_INTERVAL 0 146 #define MLX4_EN_AVG_PKT_SMALL 256 147 148 #define MLX4_EN_AUTO_CONF 0xffff 149 150 #define MLX4_EN_DEF_RX_PAUSE 1 151 #define MLX4_EN_DEF_TX_PAUSE 1 152 153 /* Interval between successive polls in the Tx routine when polling is used 154 instead of interrupts (in per-core Tx rings) - should be power of 2 */ 155 #define MLX4_EN_TX_POLL_MODER 16 156 #define MLX4_EN_TX_POLL_TIMEOUT (HZ / 4) 157 158 #define SMALL_PACKET_SIZE (256 - NET_IP_ALIGN) 159 #define HEADER_COPY_SIZE (128 - NET_IP_ALIGN) 160 #define MLX4_LOOPBACK_TEST_PAYLOAD (HEADER_COPY_SIZE - ETH_HLEN) 161 #define PREAMBLE_LEN 8 162 #define MLX4_SELFTEST_LB_MIN_MTU (MLX4_LOOPBACK_TEST_PAYLOAD + NET_IP_ALIGN + \ 163 ETH_HLEN + PREAMBLE_LEN) 164 165 /* VLAN_HLEN is added twice,to support skb vlan tagged with multiple 166 * headers. (For example: ETH_P_8021Q and ETH_P_8021AD). 167 */ 168 #define MLX4_EN_EFF_MTU(mtu) ((mtu) + ETH_HLEN + (2 * VLAN_HLEN)) 169 #define ETH_BCAST 0xffffffffffffULL 170 171 #define MLX4_EN_LOOPBACK_RETRIES 5 172 #define MLX4_EN_LOOPBACK_TIMEOUT 100 173 174 /* Constants for TX flow */ 175 enum { 176 MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */ 177 MAX_BF = 256, 178 MIN_PKT_LEN = 17, 179 }; 180 181 /* 182 * Configurables 183 */ 184 185 enum cq_type { 186 /* keep tx types first */ 187 TX, 188 TX_XDP, 189 #define MLX4_EN_NUM_TX_TYPES (TX_XDP + 1) 190 RX, 191 }; 192 193 194 /* 195 * Useful macros 196 */ 197 #define ROUNDUP_LOG2(x) ilog2(roundup_pow_of_two(x)) 198 #define XNOR(x, y) (!(x) == !(y)) 199 200 201 struct mlx4_en_tx_info { 202 union { 203 struct sk_buff *skb; 204 struct page *page; 205 }; 206 dma_addr_t map0_dma; 207 u32 map0_byte_count; 208 u32 nr_txbb; 209 u32 nr_bytes; 210 u8 linear; 211 u8 data_offset; 212 u8 inl; 213 u8 ts_requested; 214 u8 nr_maps; 215 } ____cacheline_aligned_in_smp; 216 217 218 #define MLX4_EN_BIT_DESC_OWN 0x80000000 219 #define CTRL_SIZE sizeof(struct mlx4_wqe_ctrl_seg) 220 #define MLX4_EN_MEMTYPE_PAD 0x100 221 #define DS_SIZE sizeof(struct mlx4_wqe_data_seg) 222 223 224 struct mlx4_en_tx_desc { 225 struct mlx4_wqe_ctrl_seg ctrl; 226 union { 227 struct mlx4_wqe_data_seg data; /* at least one data segment */ 228 struct mlx4_wqe_lso_seg lso; 229 struct mlx4_wqe_inline_seg inl; 230 }; 231 }; 232 233 #define MLX4_EN_USE_SRQ 0x01000000 234 235 #define MLX4_EN_CX3_LOW_ID 0x1000 236 #define MLX4_EN_CX3_HIGH_ID 0x1005 237 238 struct mlx4_en_rx_alloc { 239 struct page *page; 240 dma_addr_t dma; 241 u32 page_offset; 242 }; 243 244 #define MLX4_EN_CACHE_SIZE (2 * NAPI_POLL_WEIGHT) 245 246 struct mlx4_en_page_cache { 247 u32 index; 248 struct { 249 struct page *page; 250 dma_addr_t dma; 251 } buf[MLX4_EN_CACHE_SIZE]; 252 }; 253 254 struct mlx4_en_priv; 255 256 struct mlx4_en_tx_ring { 257 /* cache line used and dirtied in tx completion 258 * (mlx4_en_free_tx_buf()) 259 */ 260 u32 last_nr_txbb; 261 u32 cons; 262 unsigned long wake_queue; 263 struct netdev_queue *tx_queue; 264 u32 (*free_tx_desc)(struct mlx4_en_priv *priv, 265 struct mlx4_en_tx_ring *ring, 266 int index, 267 u64 timestamp, int napi_mode); 268 struct mlx4_en_rx_ring *recycle_ring; 269 270 /* cache line used and dirtied in mlx4_en_xmit() */ 271 u32 prod ____cacheline_aligned_in_smp; 272 unsigned int tx_dropped; 273 unsigned long bytes; 274 unsigned long packets; 275 unsigned long tx_csum; 276 unsigned long tso_packets; 277 unsigned long xmit_more; 278 struct mlx4_bf bf; 279 280 /* Following part should be mostly read */ 281 __be32 doorbell_qpn; 282 __be32 mr_key; 283 u32 size; /* number of TXBBs */ 284 u32 size_mask; 285 u32 full_size; 286 u32 buf_size; 287 void *buf; 288 struct mlx4_en_tx_info *tx_info; 289 int qpn; 290 u8 queue_index; 291 bool bf_enabled; 292 bool bf_alloced; 293 u8 hwtstamp_tx_type; 294 u8 *bounce_buf; 295 296 /* Not used in fast path 297 * Only queue_stopped might be used if BQL is not properly working. 298 */ 299 unsigned long queue_stopped; 300 struct mlx4_hwq_resources sp_wqres; 301 struct mlx4_qp sp_qp; 302 struct mlx4_qp_context sp_context; 303 cpumask_t sp_affinity_mask; 304 enum mlx4_qp_state sp_qp_state; 305 u16 sp_stride; 306 u16 sp_cqn; /* index of port CQ associated with this ring */ 307 } ____cacheline_aligned_in_smp; 308 309 struct mlx4_en_rx_desc { 310 /* actual number of entries depends on rx ring stride */ 311 struct mlx4_wqe_data_seg data[0]; 312 }; 313 314 struct mlx4_en_rx_ring { 315 struct mlx4_hwq_resources wqres; 316 u32 size ; /* number of Rx descs*/ 317 u32 actual_size; 318 u32 size_mask; 319 u16 stride; 320 u16 log_stride; 321 u16 cqn; /* index of port CQ associated with this ring */ 322 u32 prod; 323 u32 cons; 324 u32 buf_size; 325 u8 fcs_del; 326 void *buf; 327 void *rx_info; 328 struct bpf_prog __rcu *xdp_prog; 329 struct mlx4_en_page_cache page_cache; 330 unsigned long bytes; 331 unsigned long packets; 332 unsigned long csum_ok; 333 unsigned long csum_none; 334 unsigned long csum_complete; 335 unsigned long rx_alloc_pages; 336 unsigned long xdp_drop; 337 unsigned long xdp_tx; 338 unsigned long xdp_tx_full; 339 unsigned long dropped; 340 int hwtstamp_rx_filter; 341 cpumask_var_t affinity_mask; 342 struct xdp_rxq_info xdp_rxq; 343 }; 344 345 struct mlx4_en_cq { 346 struct mlx4_cq mcq; 347 struct mlx4_hwq_resources wqres; 348 int ring; 349 struct net_device *dev; 350 union { 351 struct napi_struct napi; 352 bool xdp_busy; 353 }; 354 int size; 355 int buf_size; 356 int vector; 357 enum cq_type type; 358 u16 moder_time; 359 u16 moder_cnt; 360 struct mlx4_cqe *buf; 361 #define MLX4_EN_OPCODE_ERROR 0x1e 362 363 struct irq_desc *irq_desc; 364 }; 365 366 struct mlx4_en_port_profile { 367 u32 flags; 368 u32 tx_ring_num[MLX4_EN_NUM_TX_TYPES]; 369 u32 rx_ring_num; 370 u32 tx_ring_size; 371 u32 rx_ring_size; 372 u8 num_tx_rings_p_up; 373 u8 rx_pause; 374 u8 rx_ppp; 375 u8 tx_pause; 376 u8 tx_ppp; 377 u8 num_up; 378 int rss_rings; 379 int inline_thold; 380 struct hwtstamp_config hwtstamp_config; 381 }; 382 383 struct mlx4_en_profile { 384 int udp_rss; 385 u8 rss_mask; 386 u32 active_ports; 387 u32 small_pkt_int; 388 u8 no_reset; 389 u8 max_num_tx_rings_p_up; 390 struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1]; 391 }; 392 393 struct mlx4_en_dev { 394 struct mlx4_dev *dev; 395 struct pci_dev *pdev; 396 struct mutex state_lock; 397 struct net_device *pndev[MLX4_MAX_PORTS + 1]; 398 struct net_device *upper[MLX4_MAX_PORTS + 1]; 399 u32 port_cnt; 400 bool device_up; 401 struct mlx4_en_profile profile; 402 u32 LSO_support; 403 struct workqueue_struct *workqueue; 404 struct device *dma_device; 405 void __iomem *uar_map; 406 struct mlx4_uar priv_uar; 407 struct mlx4_mr mr; 408 u32 priv_pdn; 409 spinlock_t uar_lock; 410 u8 mac_removed[MLX4_MAX_PORTS + 1]; 411 u32 nominal_c_mult; 412 struct cyclecounter cycles; 413 seqlock_t clock_lock; 414 struct timecounter clock; 415 unsigned long last_overflow_check; 416 struct ptp_clock *ptp_clock; 417 struct ptp_clock_info ptp_clock_info; 418 struct notifier_block nb; 419 }; 420 421 422 struct mlx4_en_rss_map { 423 int base_qpn; 424 struct mlx4_qp qps[MAX_RX_RINGS]; 425 enum mlx4_qp_state state[MAX_RX_RINGS]; 426 struct mlx4_qp *indir_qp; 427 enum mlx4_qp_state indir_state; 428 }; 429 430 enum mlx4_en_port_flag { 431 MLX4_EN_PORT_ANC = 1<<0, /* Auto-negotiation complete */ 432 MLX4_EN_PORT_ANE = 1<<1, /* Auto-negotiation enabled */ 433 }; 434 435 struct mlx4_en_port_state { 436 int link_state; 437 int link_speed; 438 int transceiver; 439 u32 flags; 440 }; 441 442 enum mlx4_en_mclist_act { 443 MCLIST_NONE, 444 MCLIST_REM, 445 MCLIST_ADD, 446 }; 447 448 struct mlx4_en_mc_list { 449 struct list_head list; 450 enum mlx4_en_mclist_act action; 451 u8 addr[ETH_ALEN]; 452 u64 reg_id; 453 u64 tunnel_reg_id; 454 }; 455 456 struct mlx4_en_frag_info { 457 u16 frag_size; 458 u32 frag_stride; 459 }; 460 461 #ifdef CONFIG_MLX4_EN_DCB 462 /* Minimal TC BW - setting to 0 will block traffic */ 463 #define MLX4_EN_BW_MIN 1 464 #define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */ 465 466 #define MLX4_EN_TC_VENDOR 0 467 #define MLX4_EN_TC_ETS 7 468 469 enum dcb_pfc_type { 470 pfc_disabled = 0, 471 pfc_enabled_full, 472 pfc_enabled_tx, 473 pfc_enabled_rx 474 }; 475 476 struct mlx4_en_cee_config { 477 bool pfc_state; 478 enum dcb_pfc_type dcb_pfc[MLX4_EN_NUM_UP_HIGH]; 479 }; 480 #endif 481 482 struct ethtool_flow_id { 483 struct list_head list; 484 struct ethtool_rx_flow_spec flow_spec; 485 u64 id; 486 }; 487 488 enum { 489 MLX4_EN_FLAG_PROMISC = (1 << 0), 490 MLX4_EN_FLAG_MC_PROMISC = (1 << 1), 491 /* whether we need to enable hardware loopback by putting dmac 492 * in Tx WQE 493 */ 494 MLX4_EN_FLAG_ENABLE_HW_LOOPBACK = (1 << 2), 495 /* whether we need to drop packets that hardware loopback-ed */ 496 MLX4_EN_FLAG_RX_FILTER_NEEDED = (1 << 3), 497 MLX4_EN_FLAG_FORCE_PROMISC = (1 << 4), 498 MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP = (1 << 5), 499 #ifdef CONFIG_MLX4_EN_DCB 500 MLX4_EN_FLAG_DCB_ENABLED = (1 << 6), 501 #endif 502 }; 503 504 #define PORT_BEACON_MAX_LIMIT (65535) 505 #define MLX4_EN_MAC_HASH_SIZE (1 << BITS_PER_BYTE) 506 #define MLX4_EN_MAC_HASH_IDX 5 507 508 struct mlx4_en_stats_bitmap { 509 DECLARE_BITMAP(bitmap, NUM_ALL_STATS); 510 struct mutex mutex; /* for mutual access to stats bitmap */ 511 }; 512 513 struct mlx4_en_priv { 514 struct mlx4_en_dev *mdev; 515 struct mlx4_en_port_profile *prof; 516 struct net_device *dev; 517 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 518 struct mlx4_en_port_state port_state; 519 spinlock_t stats_lock; 520 struct ethtool_flow_id ethtool_rules[MAX_NUM_OF_FS_RULES]; 521 /* To allow rules removal while port is going down */ 522 struct list_head ethtool_list; 523 524 unsigned long last_moder_packets[MAX_RX_RINGS]; 525 unsigned long last_moder_tx_packets; 526 unsigned long last_moder_bytes[MAX_RX_RINGS]; 527 unsigned long last_moder_jiffies; 528 int last_moder_time[MAX_RX_RINGS]; 529 u16 rx_usecs; 530 u16 rx_frames; 531 u16 tx_usecs; 532 u16 tx_frames; 533 u32 pkt_rate_low; 534 u16 rx_usecs_low; 535 u32 pkt_rate_high; 536 u16 rx_usecs_high; 537 u32 sample_interval; 538 u32 adaptive_rx_coal; 539 u32 msg_enable; 540 u32 loopback_ok; 541 u32 validate_loopback; 542 543 struct mlx4_hwq_resources res; 544 int link_state; 545 int last_link_state; 546 bool port_up; 547 int port; 548 int registered; 549 int allocated; 550 int stride; 551 unsigned char current_mac[ETH_ALEN + 2]; 552 int mac_index; 553 unsigned max_mtu; 554 int base_qpn; 555 int cqe_factor; 556 int cqe_size; 557 558 struct mlx4_en_rss_map rss_map; 559 __be32 ctrl_flags; 560 u32 flags; 561 u8 num_tx_rings_p_up; 562 u32 tx_work_limit; 563 u32 tx_ring_num[MLX4_EN_NUM_TX_TYPES]; 564 u32 rx_ring_num; 565 u32 rx_skb_size; 566 struct mlx4_en_frag_info frag_info[MLX4_EN_MAX_RX_FRAGS]; 567 u8 num_frags; 568 u8 log_rx_info; 569 u8 dma_dir; 570 u16 rx_headroom; 571 572 struct mlx4_en_tx_ring **tx_ring[MLX4_EN_NUM_TX_TYPES]; 573 struct mlx4_en_rx_ring *rx_ring[MAX_RX_RINGS]; 574 struct mlx4_en_cq **tx_cq[MLX4_EN_NUM_TX_TYPES]; 575 struct mlx4_en_cq *rx_cq[MAX_RX_RINGS]; 576 struct mlx4_qp drop_qp; 577 struct work_struct rx_mode_task; 578 struct work_struct watchdog_task; 579 struct work_struct linkstate_task; 580 struct delayed_work stats_task; 581 struct delayed_work service_task; 582 struct mlx4_en_pkt_stats pkstats; 583 struct mlx4_en_counter_stats pf_stats; 584 struct mlx4_en_flow_stats_rx rx_priority_flowstats[MLX4_NUM_PRIORITIES]; 585 struct mlx4_en_flow_stats_tx tx_priority_flowstats[MLX4_NUM_PRIORITIES]; 586 struct mlx4_en_flow_stats_rx rx_flowstats; 587 struct mlx4_en_flow_stats_tx tx_flowstats; 588 struct mlx4_en_port_stats port_stats; 589 struct mlx4_en_xdp_stats xdp_stats; 590 struct mlx4_en_phy_stats phy_stats; 591 struct mlx4_en_stats_bitmap stats_bitmap; 592 struct list_head mc_list; 593 struct list_head curr_list; 594 u64 broadcast_id; 595 struct mlx4_en_stat_out_mbox hw_stats; 596 int vids[128]; 597 bool wol; 598 struct device *ddev; 599 struct hlist_head mac_hash[MLX4_EN_MAC_HASH_SIZE]; 600 struct hwtstamp_config hwtstamp_config; 601 u32 counter_index; 602 603 #ifdef CONFIG_MLX4_EN_DCB 604 #define MLX4_EN_DCB_ENABLED 0x3 605 struct ieee_ets ets; 606 u16 maxrate[IEEE_8021QAZ_MAX_TCS]; 607 enum dcbnl_cndd_states cndd_state[IEEE_8021QAZ_MAX_TCS]; 608 struct mlx4_en_cee_config cee_config; 609 u8 dcbx_cap; 610 #endif 611 #ifdef CONFIG_RFS_ACCEL 612 spinlock_t filters_lock; 613 int last_filter_id; 614 struct list_head filters; 615 struct hlist_head filter_hash[1 << MLX4_EN_FILTER_HASH_SHIFT]; 616 #endif 617 u64 tunnel_reg_id; 618 __be16 vxlan_port; 619 620 u32 pflags; 621 u8 rss_key[MLX4_EN_RSS_KEY_SIZE]; 622 u8 rss_hash_fn; 623 }; 624 625 enum mlx4_en_wol { 626 MLX4_EN_WOL_MAGIC = (1ULL << 61), 627 MLX4_EN_WOL_ENABLED = (1ULL << 62), 628 }; 629 630 struct mlx4_mac_entry { 631 struct hlist_node hlist; 632 unsigned char mac[ETH_ALEN + 2]; 633 u64 reg_id; 634 struct rcu_head rcu; 635 }; 636 637 static inline struct mlx4_cqe *mlx4_en_get_cqe(void *buf, int idx, int cqe_sz) 638 { 639 return buf + idx * cqe_sz; 640 } 641 642 #define MLX4_EN_WOL_DO_MODIFY (1ULL << 63) 643 644 void mlx4_en_init_ptys2ethtool_map(void); 645 void mlx4_en_update_loopback_state(struct net_device *dev, 646 netdev_features_t features); 647 648 void mlx4_en_destroy_netdev(struct net_device *dev); 649 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 650 struct mlx4_en_port_profile *prof); 651 652 int mlx4_en_start_port(struct net_device *dev); 653 void mlx4_en_stop_port(struct net_device *dev, int detach); 654 655 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev, 656 struct mlx4_en_stats_bitmap *stats_bitmap, 657 u8 rx_ppp, u8 rx_pause, 658 u8 tx_ppp, u8 tx_pause); 659 660 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv, 661 struct mlx4_en_priv *tmp, 662 struct mlx4_en_port_profile *prof, 663 bool carry_xdp_prog); 664 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv, 665 struct mlx4_en_priv *tmp); 666 667 int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq, 668 int entries, int ring, enum cq_type mode, int node); 669 void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq); 670 int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq, 671 int cq_idx); 672 void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 673 int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 674 void mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 675 676 void mlx4_en_tx_irq(struct mlx4_cq *mcq); 677 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb, 678 struct net_device *sb_dev); 679 netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev); 680 netdev_tx_t mlx4_en_xmit_frame(struct mlx4_en_rx_ring *rx_ring, 681 struct mlx4_en_rx_alloc *frame, 682 struct mlx4_en_priv *priv, unsigned int length, 683 int tx_ind, bool *doorbell_pending); 684 void mlx4_en_xmit_doorbell(struct mlx4_en_tx_ring *ring); 685 bool mlx4_en_rx_recycle(struct mlx4_en_rx_ring *ring, 686 struct mlx4_en_rx_alloc *frame); 687 688 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, 689 struct mlx4_en_tx_ring **pring, 690 u32 size, u16 stride, 691 int node, int queue_index); 692 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, 693 struct mlx4_en_tx_ring **pring); 694 void mlx4_en_init_tx_xdp_ring_descs(struct mlx4_en_priv *priv, 695 struct mlx4_en_tx_ring *ring); 696 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv, 697 struct mlx4_en_tx_ring *ring, 698 int cq, int user_prio); 699 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv, 700 struct mlx4_en_tx_ring *ring); 701 void mlx4_en_set_num_rx_rings(struct mlx4_en_dev *mdev); 702 void mlx4_en_recover_from_oom(struct mlx4_en_priv *priv); 703 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv, 704 struct mlx4_en_rx_ring **pring, 705 u32 size, u16 stride, int node, int queue_index); 706 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv, 707 struct mlx4_en_rx_ring **pring, 708 u32 size, u16 stride); 709 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv); 710 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv, 711 struct mlx4_en_rx_ring *ring); 712 int mlx4_en_process_rx_cq(struct net_device *dev, 713 struct mlx4_en_cq *cq, 714 int budget); 715 int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget); 716 int mlx4_en_poll_tx_cq(struct napi_struct *napi, int budget); 717 int mlx4_en_process_tx_cq(struct net_device *dev, 718 struct mlx4_en_cq *cq, int napi_budget); 719 u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv, 720 struct mlx4_en_tx_ring *ring, 721 int index, u64 timestamp, 722 int napi_mode); 723 u32 mlx4_en_recycle_tx_desc(struct mlx4_en_priv *priv, 724 struct mlx4_en_tx_ring *ring, 725 int index, u64 timestamp, 726 int napi_mode); 727 void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride, 728 int is_tx, int rss, int qpn, int cqn, int user_prio, 729 struct mlx4_qp_context *context); 730 void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event); 731 int mlx4_en_change_mcast_lb(struct mlx4_en_priv *priv, struct mlx4_qp *qp, 732 int loopback); 733 void mlx4_en_calc_rx_buf(struct net_device *dev); 734 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv); 735 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv); 736 int mlx4_en_create_drop_qp(struct mlx4_en_priv *priv); 737 void mlx4_en_destroy_drop_qp(struct mlx4_en_priv *priv); 738 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring); 739 void mlx4_en_rx_irq(struct mlx4_cq *mcq); 740 741 int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode); 742 int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv); 743 744 void mlx4_en_fold_software_stats(struct net_device *dev); 745 int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset); 746 int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port); 747 748 #ifdef CONFIG_MLX4_EN_DCB 749 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops; 750 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_pfc_ops; 751 #endif 752 753 int mlx4_en_setup_tc(struct net_device *dev, u8 up); 754 int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc); 755 756 #ifdef CONFIG_RFS_ACCEL 757 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv); 758 #endif 759 760 #define MLX4_EN_NUM_SELF_TEST 5 761 void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf); 762 void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev); 763 764 #define DEV_FEATURE_CHANGED(dev, new_features, feature) \ 765 ((dev->features & feature) ^ (new_features & feature)) 766 767 int mlx4_en_reset_config(struct net_device *dev, 768 struct hwtstamp_config ts_config, 769 netdev_features_t new_features); 770 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev, 771 struct mlx4_en_stats_bitmap *stats_bitmap, 772 u8 rx_ppp, u8 rx_pause, 773 u8 tx_ppp, u8 tx_pause); 774 int mlx4_en_netdev_event(struct notifier_block *this, 775 unsigned long event, void *ptr); 776 777 /* 778 * Functions for time stamping 779 */ 780 u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe); 781 void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev, 782 struct skb_shared_hwtstamps *hwts, 783 u64 timestamp); 784 void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev); 785 void mlx4_en_remove_timestamp(struct mlx4_en_dev *mdev); 786 787 /* Globals 788 */ 789 extern const struct ethtool_ops mlx4_en_ethtool_ops; 790 791 792 793 /* 794 * printk / logging functions 795 */ 796 797 __printf(3, 4) 798 void en_print(const char *level, const struct mlx4_en_priv *priv, 799 const char *format, ...); 800 801 #define en_dbg(mlevel, priv, format, ...) \ 802 do { \ 803 if (NETIF_MSG_##mlevel & (priv)->msg_enable) \ 804 en_print(KERN_DEBUG, priv, format, ##__VA_ARGS__); \ 805 } while (0) 806 #define en_warn(priv, format, ...) \ 807 en_print(KERN_WARNING, priv, format, ##__VA_ARGS__) 808 #define en_err(priv, format, ...) \ 809 en_print(KERN_ERR, priv, format, ##__VA_ARGS__) 810 #define en_info(priv, format, ...) \ 811 en_print(KERN_INFO, priv, format, ##__VA_ARGS__) 812 813 #define mlx4_err(mdev, format, ...) \ 814 pr_err(DRV_NAME " %s: " format, \ 815 dev_name(&(mdev)->pdev->dev), ##__VA_ARGS__) 816 #define mlx4_info(mdev, format, ...) \ 817 pr_info(DRV_NAME " %s: " format, \ 818 dev_name(&(mdev)->pdev->dev), ##__VA_ARGS__) 819 #define mlx4_warn(mdev, format, ...) \ 820 pr_warn(DRV_NAME " %s: " format, \ 821 dev_name(&(mdev)->pdev->dev), ##__VA_ARGS__) 822 823 #endif 824