1 /* 2 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved. 3 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/errno.h> 35 #include <linux/mm.h> 36 #include <linux/scatterlist.h> 37 #include <linux/slab.h> 38 39 #include <linux/mlx4/cmd.h> 40 41 #include "mlx4.h" 42 #include "icm.h" 43 #include "fw.h" 44 45 /* 46 * We allocate in as big chunks as we can, up to a maximum of 256 KB 47 * per chunk. 48 */ 49 enum { 50 MLX4_ICM_ALLOC_SIZE = 1 << 18, 51 MLX4_TABLE_CHUNK_SIZE = 1 << 18 52 }; 53 54 static void mlx4_free_icm_pages(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk) 55 { 56 int i; 57 58 if (chunk->nsg > 0) 59 pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages, 60 PCI_DMA_BIDIRECTIONAL); 61 62 for (i = 0; i < chunk->npages; ++i) 63 __free_pages(sg_page(&chunk->mem[i]), 64 get_order(chunk->mem[i].length)); 65 } 66 67 static void mlx4_free_icm_coherent(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk) 68 { 69 int i; 70 71 for (i = 0; i < chunk->npages; ++i) 72 dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length, 73 lowmem_page_address(sg_page(&chunk->mem[i])), 74 sg_dma_address(&chunk->mem[i])); 75 } 76 77 void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent) 78 { 79 struct mlx4_icm_chunk *chunk, *tmp; 80 81 if (!icm) 82 return; 83 84 list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) { 85 if (coherent) 86 mlx4_free_icm_coherent(dev, chunk); 87 else 88 mlx4_free_icm_pages(dev, chunk); 89 90 kfree(chunk); 91 } 92 93 kfree(icm); 94 } 95 96 static int mlx4_alloc_icm_pages(struct scatterlist *mem, int order, 97 gfp_t gfp_mask, int node) 98 { 99 struct page *page; 100 101 page = alloc_pages_node(node, gfp_mask, order); 102 if (!page) { 103 page = alloc_pages(gfp_mask, order); 104 if (!page) 105 return -ENOMEM; 106 } 107 108 sg_set_page(mem, page, PAGE_SIZE << order, 0); 109 return 0; 110 } 111 112 static int mlx4_alloc_icm_coherent(struct device *dev, struct scatterlist *mem, 113 int order, gfp_t gfp_mask) 114 { 115 void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order, 116 &sg_dma_address(mem), gfp_mask); 117 if (!buf) 118 return -ENOMEM; 119 120 sg_set_buf(mem, buf, PAGE_SIZE << order); 121 BUG_ON(mem->offset); 122 sg_dma_len(mem) = PAGE_SIZE << order; 123 return 0; 124 } 125 126 struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages, 127 gfp_t gfp_mask, int coherent) 128 { 129 struct mlx4_icm *icm; 130 struct mlx4_icm_chunk *chunk = NULL; 131 int cur_order; 132 int ret; 133 134 /* We use sg_set_buf for coherent allocs, which assumes low memory */ 135 BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM)); 136 137 icm = kmalloc_node(sizeof(*icm), 138 gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN), 139 dev->numa_node); 140 if (!icm) { 141 icm = kmalloc(sizeof(*icm), 142 gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); 143 if (!icm) 144 return NULL; 145 } 146 147 icm->refcount = 0; 148 INIT_LIST_HEAD(&icm->chunk_list); 149 150 cur_order = get_order(MLX4_ICM_ALLOC_SIZE); 151 152 while (npages > 0) { 153 if (!chunk) { 154 chunk = kmalloc_node(sizeof(*chunk), 155 gfp_mask & ~(__GFP_HIGHMEM | 156 __GFP_NOWARN), 157 dev->numa_node); 158 if (!chunk) { 159 chunk = kmalloc(sizeof(*chunk), 160 gfp_mask & ~(__GFP_HIGHMEM | 161 __GFP_NOWARN)); 162 if (!chunk) 163 goto fail; 164 } 165 166 sg_init_table(chunk->mem, MLX4_ICM_CHUNK_LEN); 167 chunk->npages = 0; 168 chunk->nsg = 0; 169 list_add_tail(&chunk->list, &icm->chunk_list); 170 } 171 172 while (1 << cur_order > npages) 173 --cur_order; 174 175 if (coherent) 176 ret = mlx4_alloc_icm_coherent(&dev->pdev->dev, 177 &chunk->mem[chunk->npages], 178 cur_order, gfp_mask); 179 else 180 ret = mlx4_alloc_icm_pages(&chunk->mem[chunk->npages], 181 cur_order, gfp_mask, 182 dev->numa_node); 183 184 if (ret) { 185 if (--cur_order < 0) 186 goto fail; 187 else 188 continue; 189 } 190 191 ++chunk->npages; 192 193 if (coherent) 194 ++chunk->nsg; 195 else if (chunk->npages == MLX4_ICM_CHUNK_LEN) { 196 chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, 197 chunk->npages, 198 PCI_DMA_BIDIRECTIONAL); 199 200 if (chunk->nsg <= 0) 201 goto fail; 202 } 203 204 if (chunk->npages == MLX4_ICM_CHUNK_LEN) 205 chunk = NULL; 206 207 npages -= 1 << cur_order; 208 } 209 210 if (!coherent && chunk) { 211 chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, 212 chunk->npages, 213 PCI_DMA_BIDIRECTIONAL); 214 215 if (chunk->nsg <= 0) 216 goto fail; 217 } 218 219 return icm; 220 221 fail: 222 mlx4_free_icm(dev, icm, coherent); 223 return NULL; 224 } 225 226 static int mlx4_MAP_ICM(struct mlx4_dev *dev, struct mlx4_icm *icm, u64 virt) 227 { 228 return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt); 229 } 230 231 static int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count) 232 { 233 return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM, 234 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); 235 } 236 237 int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm) 238 { 239 return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1); 240 } 241 242 int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev) 243 { 244 return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_ICM_AUX, 245 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); 246 } 247 248 int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj) 249 { 250 u32 i = (obj & (table->num_obj - 1)) / 251 (MLX4_TABLE_CHUNK_SIZE / table->obj_size); 252 int ret = 0; 253 254 mutex_lock(&table->mutex); 255 256 if (table->icm[i]) { 257 ++table->icm[i]->refcount; 258 goto out; 259 } 260 261 table->icm[i] = mlx4_alloc_icm(dev, MLX4_TABLE_CHUNK_SIZE >> PAGE_SHIFT, 262 (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) | 263 __GFP_NOWARN, table->coherent); 264 if (!table->icm[i]) { 265 ret = -ENOMEM; 266 goto out; 267 } 268 269 if (mlx4_MAP_ICM(dev, table->icm[i], table->virt + 270 (u64) i * MLX4_TABLE_CHUNK_SIZE)) { 271 mlx4_free_icm(dev, table->icm[i], table->coherent); 272 table->icm[i] = NULL; 273 ret = -ENOMEM; 274 goto out; 275 } 276 277 ++table->icm[i]->refcount; 278 279 out: 280 mutex_unlock(&table->mutex); 281 return ret; 282 } 283 284 void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj) 285 { 286 u32 i; 287 u64 offset; 288 289 i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size); 290 291 mutex_lock(&table->mutex); 292 293 if (--table->icm[i]->refcount == 0) { 294 offset = (u64) i * MLX4_TABLE_CHUNK_SIZE; 295 mlx4_UNMAP_ICM(dev, table->virt + offset, 296 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE); 297 mlx4_free_icm(dev, table->icm[i], table->coherent); 298 table->icm[i] = NULL; 299 } 300 301 mutex_unlock(&table->mutex); 302 } 303 304 void *mlx4_table_find(struct mlx4_icm_table *table, u32 obj, 305 dma_addr_t *dma_handle) 306 { 307 int offset, dma_offset, i; 308 u64 idx; 309 struct mlx4_icm_chunk *chunk; 310 struct mlx4_icm *icm; 311 struct page *page = NULL; 312 313 if (!table->lowmem) 314 return NULL; 315 316 mutex_lock(&table->mutex); 317 318 idx = (u64) (obj & (table->num_obj - 1)) * table->obj_size; 319 icm = table->icm[idx / MLX4_TABLE_CHUNK_SIZE]; 320 dma_offset = offset = idx % MLX4_TABLE_CHUNK_SIZE; 321 322 if (!icm) 323 goto out; 324 325 list_for_each_entry(chunk, &icm->chunk_list, list) { 326 for (i = 0; i < chunk->npages; ++i) { 327 if (dma_handle && dma_offset >= 0) { 328 if (sg_dma_len(&chunk->mem[i]) > dma_offset) 329 *dma_handle = sg_dma_address(&chunk->mem[i]) + 330 dma_offset; 331 dma_offset -= sg_dma_len(&chunk->mem[i]); 332 } 333 /* 334 * DMA mapping can merge pages but not split them, 335 * so if we found the page, dma_handle has already 336 * been assigned to. 337 */ 338 if (chunk->mem[i].length > offset) { 339 page = sg_page(&chunk->mem[i]); 340 goto out; 341 } 342 offset -= chunk->mem[i].length; 343 } 344 } 345 346 out: 347 mutex_unlock(&table->mutex); 348 return page ? lowmem_page_address(page) + offset : NULL; 349 } 350 351 int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table, 352 u32 start, u32 end) 353 { 354 int inc = MLX4_TABLE_CHUNK_SIZE / table->obj_size; 355 int err; 356 u32 i; 357 358 for (i = start; i <= end; i += inc) { 359 err = mlx4_table_get(dev, table, i); 360 if (err) 361 goto fail; 362 } 363 364 return 0; 365 366 fail: 367 while (i > start) { 368 i -= inc; 369 mlx4_table_put(dev, table, i); 370 } 371 372 return err; 373 } 374 375 void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table, 376 u32 start, u32 end) 377 { 378 u32 i; 379 380 for (i = start; i <= end; i += MLX4_TABLE_CHUNK_SIZE / table->obj_size) 381 mlx4_table_put(dev, table, i); 382 } 383 384 int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table, 385 u64 virt, int obj_size, u32 nobj, int reserved, 386 int use_lowmem, int use_coherent) 387 { 388 int obj_per_chunk; 389 int num_icm; 390 unsigned chunk_size; 391 int i; 392 u64 size; 393 394 obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size; 395 num_icm = (nobj + obj_per_chunk - 1) / obj_per_chunk; 396 397 table->icm = kcalloc(num_icm, sizeof *table->icm, GFP_KERNEL); 398 if (!table->icm) 399 return -ENOMEM; 400 table->virt = virt; 401 table->num_icm = num_icm; 402 table->num_obj = nobj; 403 table->obj_size = obj_size; 404 table->lowmem = use_lowmem; 405 table->coherent = use_coherent; 406 mutex_init(&table->mutex); 407 408 size = (u64) nobj * obj_size; 409 for (i = 0; i * MLX4_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) { 410 chunk_size = MLX4_TABLE_CHUNK_SIZE; 411 if ((i + 1) * MLX4_TABLE_CHUNK_SIZE > size) 412 chunk_size = PAGE_ALIGN(size - 413 i * MLX4_TABLE_CHUNK_SIZE); 414 415 table->icm[i] = mlx4_alloc_icm(dev, chunk_size >> PAGE_SHIFT, 416 (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) | 417 __GFP_NOWARN, use_coherent); 418 if (!table->icm[i]) 419 goto err; 420 if (mlx4_MAP_ICM(dev, table->icm[i], virt + i * MLX4_TABLE_CHUNK_SIZE)) { 421 mlx4_free_icm(dev, table->icm[i], use_coherent); 422 table->icm[i] = NULL; 423 goto err; 424 } 425 426 /* 427 * Add a reference to this ICM chunk so that it never 428 * gets freed (since it contains reserved firmware objects). 429 */ 430 ++table->icm[i]->refcount; 431 } 432 433 return 0; 434 435 err: 436 for (i = 0; i < num_icm; ++i) 437 if (table->icm[i]) { 438 mlx4_UNMAP_ICM(dev, virt + i * MLX4_TABLE_CHUNK_SIZE, 439 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE); 440 mlx4_free_icm(dev, table->icm[i], use_coherent); 441 } 442 443 kfree(table->icm); 444 445 return -ENOMEM; 446 } 447 448 void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table) 449 { 450 int i; 451 452 for (i = 0; i < table->num_icm; ++i) 453 if (table->icm[i]) { 454 mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE, 455 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE); 456 mlx4_free_icm(dev, table->icm[i], table->coherent); 457 } 458 459 kfree(table->icm); 460 } 461