1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (C) 2022 MediaTek Inc. 3 * 4 * Author: Lorenzo Bianconi <lorenzo@kernel.org> 5 * Sujuan Chen <sujuan.chen@mediatek.com> 6 */ 7 8 #include <linux/firmware.h> 9 #include <linux/of_address.h> 10 #include <linux/of_reserved_mem.h> 11 #include <linux/mfd/syscon.h> 12 #include <linux/soc/mediatek/mtk_wed.h> 13 #include <linux/unaligned.h> 14 15 #include "mtk_wed_regs.h" 16 #include "mtk_wed_wo.h" 17 #include "mtk_wed.h" 18 19 static struct mtk_wed_wo_memory_region mem_region[] = { 20 [MTK_WED_WO_REGION_EMI] = { 21 .name = "wo-emi", 22 }, 23 [MTK_WED_WO_REGION_ILM] = { 24 .name = "wo-ilm", 25 }, 26 [MTK_WED_WO_REGION_DATA] = { 27 .name = "wo-data", 28 .shared = true, 29 }, 30 [MTK_WED_WO_REGION_BOOT] = { 31 .name = "wo-boot", 32 }, 33 }; 34 35 static u32 wo_r32(u32 reg) 36 { 37 return readl(mem_region[MTK_WED_WO_REGION_BOOT].addr + reg); 38 } 39 40 static void wo_w32(u32 reg, u32 val) 41 { 42 writel(val, mem_region[MTK_WED_WO_REGION_BOOT].addr + reg); 43 } 44 45 static struct sk_buff * 46 mtk_wed_mcu_msg_alloc(const void *data, int data_len) 47 { 48 int length = sizeof(struct mtk_wed_mcu_hdr) + data_len; 49 struct sk_buff *skb; 50 51 skb = alloc_skb(length, GFP_KERNEL); 52 if (!skb) 53 return NULL; 54 55 memset(skb->head, 0, length); 56 skb_reserve(skb, sizeof(struct mtk_wed_mcu_hdr)); 57 if (data && data_len) 58 skb_put_data(skb, data, data_len); 59 60 return skb; 61 } 62 63 static struct sk_buff * 64 mtk_wed_mcu_get_response(struct mtk_wed_wo *wo, unsigned long expires) 65 { 66 if (!time_is_after_jiffies(expires)) 67 return NULL; 68 69 wait_event_timeout(wo->mcu.wait, !skb_queue_empty(&wo->mcu.res_q), 70 expires - jiffies); 71 return skb_dequeue(&wo->mcu.res_q); 72 } 73 74 void mtk_wed_mcu_rx_event(struct mtk_wed_wo *wo, struct sk_buff *skb) 75 { 76 skb_queue_tail(&wo->mcu.res_q, skb); 77 wake_up(&wo->mcu.wait); 78 } 79 80 static void 81 mtk_wed_update_rx_stats(struct mtk_wed_device *wed, struct sk_buff *skb) 82 { 83 u32 count = get_unaligned_le32(skb->data); 84 struct mtk_wed_wo_rx_stats *stats; 85 int i; 86 87 if (!wed->wlan.update_wo_rx_stats) 88 return; 89 90 if (count * sizeof(*stats) > skb->len - sizeof(u32)) 91 return; 92 93 stats = (struct mtk_wed_wo_rx_stats *)(skb->data + sizeof(u32)); 94 for (i = 0 ; i < count ; i++) 95 wed->wlan.update_wo_rx_stats(wed, &stats[i]); 96 } 97 98 void mtk_wed_mcu_rx_unsolicited_event(struct mtk_wed_wo *wo, 99 struct sk_buff *skb) 100 { 101 struct mtk_wed_mcu_hdr *hdr = (struct mtk_wed_mcu_hdr *)skb->data; 102 103 skb_pull(skb, sizeof(*hdr)); 104 105 switch (hdr->cmd) { 106 case MTK_WED_WO_EVT_LOG_DUMP: 107 dev_notice(wo->hw->dev, "%s\n", skb->data); 108 break; 109 case MTK_WED_WO_EVT_PROFILING: { 110 struct mtk_wed_wo_log_info *info = (void *)skb->data; 111 u32 count = skb->len / sizeof(*info); 112 int i; 113 114 for (i = 0 ; i < count ; i++) 115 dev_notice(wo->hw->dev, 116 "SN:%u latency: total=%u, rro:%u, mod:%u\n", 117 le32_to_cpu(info[i].sn), 118 le32_to_cpu(info[i].total), 119 le32_to_cpu(info[i].rro), 120 le32_to_cpu(info[i].mod)); 121 break; 122 } 123 case MTK_WED_WO_EVT_RXCNT_INFO: 124 mtk_wed_update_rx_stats(wo->hw->wed_dev, skb); 125 break; 126 default: 127 break; 128 } 129 130 dev_kfree_skb(skb); 131 } 132 133 static int 134 mtk_wed_mcu_skb_send_msg(struct mtk_wed_wo *wo, struct sk_buff *skb, 135 int id, int cmd, u16 *wait_seq, bool wait_resp) 136 { 137 struct mtk_wed_mcu_hdr *hdr; 138 139 /* TODO: make it dynamic based on cmd */ 140 wo->mcu.timeout = 20 * HZ; 141 142 hdr = (struct mtk_wed_mcu_hdr *)skb_push(skb, sizeof(*hdr)); 143 hdr->cmd = cmd; 144 hdr->length = cpu_to_le16(skb->len); 145 146 if (wait_resp && wait_seq) { 147 u16 seq = ++wo->mcu.seq; 148 149 if (!seq) 150 seq = ++wo->mcu.seq; 151 *wait_seq = seq; 152 153 hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_NEED_RSP); 154 hdr->seq = cpu_to_le16(seq); 155 } 156 if (id == MTK_WED_MODULE_ID_WO) 157 hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_FROM_TO_WO); 158 159 return mtk_wed_wo_queue_tx_skb(wo, &wo->q_tx, skb); 160 } 161 162 static int 163 mtk_wed_mcu_parse_response(struct mtk_wed_wo *wo, struct sk_buff *skb, 164 int cmd, int seq) 165 { 166 struct mtk_wed_mcu_hdr *hdr; 167 168 if (!skb) { 169 dev_err(wo->hw->dev, "Message %08x (seq %d) timeout\n", 170 cmd, seq); 171 return -ETIMEDOUT; 172 } 173 174 hdr = (struct mtk_wed_mcu_hdr *)skb->data; 175 if (le16_to_cpu(hdr->seq) != seq) 176 return -EAGAIN; 177 178 skb_pull(skb, sizeof(*hdr)); 179 switch (cmd) { 180 case MTK_WED_WO_CMD_RXCNT_INFO: 181 mtk_wed_update_rx_stats(wo->hw->wed_dev, skb); 182 break; 183 default: 184 break; 185 } 186 187 return 0; 188 } 189 190 int mtk_wed_mcu_send_msg(struct mtk_wed_wo *wo, int id, int cmd, 191 const void *data, int len, bool wait_resp) 192 { 193 unsigned long expires; 194 struct sk_buff *skb; 195 u16 seq; 196 int ret; 197 198 skb = mtk_wed_mcu_msg_alloc(data, len); 199 if (!skb) 200 return -ENOMEM; 201 202 mutex_lock(&wo->mcu.mutex); 203 204 ret = mtk_wed_mcu_skb_send_msg(wo, skb, id, cmd, &seq, wait_resp); 205 if (ret || !wait_resp) 206 goto unlock; 207 208 expires = jiffies + wo->mcu.timeout; 209 do { 210 skb = mtk_wed_mcu_get_response(wo, expires); 211 ret = mtk_wed_mcu_parse_response(wo, skb, cmd, seq); 212 dev_kfree_skb(skb); 213 } while (ret == -EAGAIN); 214 215 unlock: 216 mutex_unlock(&wo->mcu.mutex); 217 218 return ret; 219 } 220 221 int mtk_wed_mcu_msg_update(struct mtk_wed_device *dev, int id, void *data, 222 int len) 223 { 224 struct mtk_wed_wo *wo = dev->hw->wed_wo; 225 226 if (!mtk_wed_get_rx_capa(dev)) 227 return 0; 228 229 if (WARN_ON(!wo)) 230 return -ENODEV; 231 232 return mtk_wed_mcu_send_msg(wo, MTK_WED_MODULE_ID_WO, id, data, len, 233 true); 234 } 235 236 static int 237 mtk_wed_get_memory_region(struct mtk_wed_hw *hw, const char *name, 238 struct mtk_wed_wo_memory_region *region) 239 { 240 struct resource res; 241 int ret; 242 243 ret = of_reserved_mem_region_to_resource_byname(hw->node, name, &res); 244 if (ret) 245 return 0; 246 247 region->phy_addr = res.start; 248 region->size = resource_size(&res); 249 region->addr = devm_ioremap_resource(hw->dev, &res); 250 251 return !region->addr ? -EINVAL : 0; 252 } 253 254 static int 255 mtk_wed_mcu_run_firmware(struct mtk_wed_wo *wo, const struct firmware *fw) 256 { 257 const u8 *first_region_ptr, *region_ptr, *trailer_ptr, *ptr = fw->data; 258 const struct mtk_wed_fw_trailer *trailer; 259 const struct mtk_wed_fw_region *fw_region; 260 261 trailer_ptr = fw->data + fw->size - sizeof(*trailer); 262 trailer = (const struct mtk_wed_fw_trailer *)trailer_ptr; 263 region_ptr = trailer_ptr - trailer->num_region * sizeof(*fw_region); 264 first_region_ptr = region_ptr; 265 266 while (region_ptr < trailer_ptr) { 267 u32 length; 268 int i; 269 270 fw_region = (const struct mtk_wed_fw_region *)region_ptr; 271 length = le32_to_cpu(fw_region->len); 272 if (first_region_ptr < ptr + length) 273 goto next; 274 275 for (i = 0; i < ARRAY_SIZE(mem_region); i++) { 276 struct mtk_wed_wo_memory_region *region; 277 278 region = &mem_region[i]; 279 if (region->phy_addr != le32_to_cpu(fw_region->addr)) 280 continue; 281 282 if (region->size < length) 283 continue; 284 285 if (region->shared && region->consumed) 286 break; 287 288 if (!region->shared || !region->consumed) { 289 memcpy_toio(region->addr, ptr, length); 290 region->consumed = true; 291 break; 292 } 293 } 294 295 if (i == ARRAY_SIZE(mem_region)) 296 return -EINVAL; 297 next: 298 region_ptr += sizeof(*fw_region); 299 ptr += length; 300 } 301 302 return 0; 303 } 304 305 static int 306 mtk_wed_mcu_load_firmware(struct mtk_wed_wo *wo) 307 { 308 const struct mtk_wed_fw_trailer *trailer; 309 const struct firmware *fw; 310 const char *fw_name; 311 u32 val, boot_cr; 312 int ret, i; 313 314 /* load firmware region metadata */ 315 for (i = 0; i < ARRAY_SIZE(mem_region); i++) { 316 ret = mtk_wed_get_memory_region(wo->hw, mem_region[i].name, &mem_region[i]); 317 if (ret) 318 return ret; 319 } 320 321 /* set dummy cr */ 322 wed_w32(wo->hw->wed_dev, MTK_WED_SCR0 + 4 * MTK_WED_DUMMY_CR_FWDL, 323 wo->hw->index + 1); 324 325 /* load firmware */ 326 switch (wo->hw->version) { 327 case 2: 328 if (of_device_is_compatible(wo->hw->node, 329 "mediatek,mt7981-wed")) 330 fw_name = MT7981_FIRMWARE_WO; 331 else 332 fw_name = wo->hw->index ? MT7986_FIRMWARE_WO1 333 : MT7986_FIRMWARE_WO0; 334 break; 335 case 3: 336 fw_name = wo->hw->index ? MT7988_FIRMWARE_WO1 337 : MT7988_FIRMWARE_WO0; 338 break; 339 default: 340 return -EINVAL; 341 } 342 343 ret = request_firmware(&fw, fw_name, wo->hw->dev); 344 if (ret) 345 return ret; 346 347 trailer = (void *)(fw->data + fw->size - 348 sizeof(struct mtk_wed_fw_trailer)); 349 dev_info(wo->hw->dev, 350 "MTK WED WO Firmware Version: %.10s, Build Time: %.15s\n", 351 trailer->fw_ver, trailer->build_date); 352 dev_info(wo->hw->dev, "MTK WED WO Chip ID %02x Region %d\n", 353 trailer->chip_id, trailer->num_region); 354 355 ret = mtk_wed_mcu_run_firmware(wo, fw); 356 if (ret) 357 goto out; 358 359 /* set the start address */ 360 if (!mtk_wed_is_v3_or_greater(wo->hw) && wo->hw->index) 361 boot_cr = MTK_WO_MCU_CFG_LS_WA_BOOT_ADDR_ADDR; 362 else 363 boot_cr = MTK_WO_MCU_CFG_LS_WM_BOOT_ADDR_ADDR; 364 wo_w32(boot_cr, mem_region[MTK_WED_WO_REGION_EMI].phy_addr >> 16); 365 /* wo firmware reset */ 366 wo_w32(MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, 0xc00); 367 368 val = wo_r32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR) | 369 MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK; 370 wo_w32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val); 371 out: 372 release_firmware(fw); 373 374 return ret; 375 } 376 377 static u32 378 mtk_wed_mcu_read_fw_dl(struct mtk_wed_wo *wo) 379 { 380 return wed_r32(wo->hw->wed_dev, 381 MTK_WED_SCR0 + 4 * MTK_WED_DUMMY_CR_FWDL); 382 } 383 384 int mtk_wed_mcu_init(struct mtk_wed_wo *wo) 385 { 386 u32 val; 387 int ret; 388 389 skb_queue_head_init(&wo->mcu.res_q); 390 init_waitqueue_head(&wo->mcu.wait); 391 mutex_init(&wo->mcu.mutex); 392 393 ret = mtk_wed_mcu_load_firmware(wo); 394 if (ret) 395 return ret; 396 397 return readx_poll_timeout(mtk_wed_mcu_read_fw_dl, wo, val, !val, 398 100, MTK_FW_DL_TIMEOUT); 399 } 400 401 MODULE_FIRMWARE(MT7981_FIRMWARE_WO); 402 MODULE_FIRMWARE(MT7986_FIRMWARE_WO0); 403 MODULE_FIRMWARE(MT7986_FIRMWARE_WO1); 404 MODULE_FIRMWARE(MT7988_FIRMWARE_WO0); 405 MODULE_FIRMWARE(MT7988_FIRMWARE_WO1); 406