1efabce29SSuman Ghosh /* SPDX-License-Identifier: GPL-2.0 */ 2efabce29SSuman Ghosh /* Marvell RVU PF/VF Netdev Devlink 3efabce29SSuman Ghosh * 4efabce29SSuman Ghosh * Copyright (C) 2024 Marvell. 5efabce29SSuman Ghosh * 6efabce29SSuman Ghosh */ 7efabce29SSuman Ghosh 8efabce29SSuman Ghosh #ifndef OTX2_XSK_H 9efabce29SSuman Ghosh #define OTX2_XSK_H 10efabce29SSuman Ghosh 11efabce29SSuman Ghosh struct otx2_nic; 12efabce29SSuman Ghosh struct xsk_buff_pool; 13efabce29SSuman Ghosh 14efabce29SSuman Ghosh int otx2_xsk_pool_setup(struct otx2_nic *pf, struct xsk_buff_pool *pool, u16 qid); 15efabce29SSuman Ghosh int otx2_xsk_pool_enable(struct otx2_nic *pf, struct xsk_buff_pool *pool, u16 qid); 16efabce29SSuman Ghosh int otx2_xsk_pool_disable(struct otx2_nic *pf, u16 qid); 17efabce29SSuman Ghosh int otx2_xsk_pool_alloc_buf(struct otx2_nic *pfvf, struct otx2_pool *pool, 18efabce29SSuman Ghosh dma_addr_t *dma, int idx); 19efabce29SSuman Ghosh int otx2_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags); 20*53616af0SSuman Ghosh void otx2_zc_napi_handler(struct otx2_nic *pfvf, struct xsk_buff_pool *pool, 21*53616af0SSuman Ghosh int queue, int budget); 22*53616af0SSuman Ghosh void otx2_attach_xsk_buff(struct otx2_nic *pfvf, struct otx2_snd_queue *sq, int qidx); 23efabce29SSuman Ghosh 24efabce29SSuman Ghosh #endif /* OTX2_XSK_H */ 25