1 // SPDX-License-Identifier: GPL-2.0 2 /* Marvell OcteonTx2 RVU Ethernet driver 3 * 4 * Copyright (C) 2020 Marvell International Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #include <linux/pci.h> 12 #include <linux/ethtool.h> 13 #include <linux/stddef.h> 14 #include <linux/etherdevice.h> 15 #include <linux/log2.h> 16 #include <linux/net_tstamp.h> 17 #include <linux/linkmode.h> 18 19 #include "otx2_common.h" 20 #include "otx2_ptp.h" 21 22 #define DRV_NAME "octeontx2-nicpf" 23 #define DRV_VF_NAME "octeontx2-nicvf" 24 25 struct otx2_stat { 26 char name[ETH_GSTRING_LEN]; 27 unsigned int index; 28 }; 29 30 /* HW device stats */ 31 #define OTX2_DEV_STAT(stat) { \ 32 .name = #stat, \ 33 .index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \ 34 } 35 36 /* Physical link config */ 37 #define OTX2_ETHTOOL_SUPPORTED_MODES 0x638CCBF //110001110001100110010111111 38 39 enum link_mode { 40 OTX2_MODE_SUPPORTED, 41 OTX2_MODE_ADVERTISED 42 }; 43 44 static const struct otx2_stat otx2_dev_stats[] = { 45 OTX2_DEV_STAT(rx_ucast_frames), 46 OTX2_DEV_STAT(rx_bcast_frames), 47 OTX2_DEV_STAT(rx_mcast_frames), 48 49 OTX2_DEV_STAT(tx_ucast_frames), 50 OTX2_DEV_STAT(tx_bcast_frames), 51 OTX2_DEV_STAT(tx_mcast_frames), 52 }; 53 54 /* Driver level stats */ 55 #define OTX2_DRV_STAT(stat) { \ 56 .name = #stat, \ 57 .index = offsetof(struct otx2_drv_stats, stat) / sizeof(atomic_t), \ 58 } 59 60 static const struct otx2_stat otx2_drv_stats[] = { 61 OTX2_DRV_STAT(rx_fcs_errs), 62 OTX2_DRV_STAT(rx_oversize_errs), 63 OTX2_DRV_STAT(rx_undersize_errs), 64 OTX2_DRV_STAT(rx_csum_errs), 65 OTX2_DRV_STAT(rx_len_errs), 66 OTX2_DRV_STAT(rx_other_errs), 67 }; 68 69 static const struct otx2_stat otx2_queue_stats[] = { 70 { "bytes", 0 }, 71 { "frames", 1 }, 72 }; 73 74 static const unsigned int otx2_n_dev_stats = ARRAY_SIZE(otx2_dev_stats); 75 static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats); 76 static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats); 77 78 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf); 79 80 static void otx2_get_drvinfo(struct net_device *netdev, 81 struct ethtool_drvinfo *info) 82 { 83 struct otx2_nic *pfvf = netdev_priv(netdev); 84 85 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); 86 strlcpy(info->bus_info, pci_name(pfvf->pdev), sizeof(info->bus_info)); 87 } 88 89 static void otx2_get_qset_strings(struct otx2_nic *pfvf, u8 **data, int qset) 90 { 91 int start_qidx = qset * pfvf->hw.rx_queues; 92 int qidx, stats; 93 94 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 95 for (stats = 0; stats < otx2_n_queue_stats; stats++) { 96 sprintf(*data, "rxq%d: %s", qidx + start_qidx, 97 otx2_queue_stats[stats].name); 98 *data += ETH_GSTRING_LEN; 99 } 100 } 101 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) { 102 for (stats = 0; stats < otx2_n_queue_stats; stats++) { 103 sprintf(*data, "txq%d: %s", qidx + start_qidx, 104 otx2_queue_stats[stats].name); 105 *data += ETH_GSTRING_LEN; 106 } 107 } 108 } 109 110 static void otx2_get_strings(struct net_device *netdev, u32 sset, u8 *data) 111 { 112 struct otx2_nic *pfvf = netdev_priv(netdev); 113 int stats; 114 115 if (sset != ETH_SS_STATS) 116 return; 117 118 for (stats = 0; stats < otx2_n_dev_stats; stats++) { 119 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN); 120 data += ETH_GSTRING_LEN; 121 } 122 123 for (stats = 0; stats < otx2_n_drv_stats; stats++) { 124 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN); 125 data += ETH_GSTRING_LEN; 126 } 127 128 otx2_get_qset_strings(pfvf, &data, 0); 129 130 for (stats = 0; stats < CGX_RX_STATS_COUNT; stats++) { 131 sprintf(data, "cgx_rxstat%d: ", stats); 132 data += ETH_GSTRING_LEN; 133 } 134 135 for (stats = 0; stats < CGX_TX_STATS_COUNT; stats++) { 136 sprintf(data, "cgx_txstat%d: ", stats); 137 data += ETH_GSTRING_LEN; 138 } 139 140 strcpy(data, "reset_count"); 141 data += ETH_GSTRING_LEN; 142 sprintf(data, "Fec Corrected Errors: "); 143 data += ETH_GSTRING_LEN; 144 sprintf(data, "Fec Uncorrected Errors: "); 145 data += ETH_GSTRING_LEN; 146 } 147 148 static void otx2_get_qset_stats(struct otx2_nic *pfvf, 149 struct ethtool_stats *stats, u64 **data) 150 { 151 int stat, qidx; 152 153 if (!pfvf) 154 return; 155 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 156 if (!otx2_update_rq_stats(pfvf, qidx)) { 157 for (stat = 0; stat < otx2_n_queue_stats; stat++) 158 *((*data)++) = 0; 159 continue; 160 } 161 for (stat = 0; stat < otx2_n_queue_stats; stat++) 162 *((*data)++) = ((u64 *)&pfvf->qset.rq[qidx].stats) 163 [otx2_queue_stats[stat].index]; 164 } 165 166 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) { 167 if (!otx2_update_sq_stats(pfvf, qidx)) { 168 for (stat = 0; stat < otx2_n_queue_stats; stat++) 169 *((*data)++) = 0; 170 continue; 171 } 172 for (stat = 0; stat < otx2_n_queue_stats; stat++) 173 *((*data)++) = ((u64 *)&pfvf->qset.sq[qidx].stats) 174 [otx2_queue_stats[stat].index]; 175 } 176 } 177 178 static int otx2_get_phy_fec_stats(struct otx2_nic *pfvf) 179 { 180 struct msg_req *req; 181 int rc = -ENOMEM; 182 183 mutex_lock(&pfvf->mbox.lock); 184 req = otx2_mbox_alloc_msg_cgx_get_phy_fec_stats(&pfvf->mbox); 185 if (!req) 186 goto end; 187 188 if (!otx2_sync_mbox_msg(&pfvf->mbox)) 189 rc = 0; 190 end: 191 mutex_unlock(&pfvf->mbox.lock); 192 return rc; 193 } 194 195 /* Get device and per queue statistics */ 196 static void otx2_get_ethtool_stats(struct net_device *netdev, 197 struct ethtool_stats *stats, u64 *data) 198 { 199 struct otx2_nic *pfvf = netdev_priv(netdev); 200 u64 fec_corr_blks, fec_uncorr_blks; 201 struct cgx_fw_data *rsp; 202 int stat; 203 204 otx2_get_dev_stats(pfvf); 205 for (stat = 0; stat < otx2_n_dev_stats; stat++) 206 *(data++) = ((u64 *)&pfvf->hw.dev_stats) 207 [otx2_dev_stats[stat].index]; 208 209 for (stat = 0; stat < otx2_n_drv_stats; stat++) 210 *(data++) = atomic_read(&((atomic_t *)&pfvf->hw.drv_stats) 211 [otx2_drv_stats[stat].index]); 212 213 otx2_get_qset_stats(pfvf, stats, &data); 214 otx2_update_lmac_stats(pfvf); 215 for (stat = 0; stat < CGX_RX_STATS_COUNT; stat++) 216 *(data++) = pfvf->hw.cgx_rx_stats[stat]; 217 for (stat = 0; stat < CGX_TX_STATS_COUNT; stat++) 218 *(data++) = pfvf->hw.cgx_tx_stats[stat]; 219 *(data++) = pfvf->reset_count; 220 221 fec_corr_blks = pfvf->hw.cgx_fec_corr_blks; 222 fec_uncorr_blks = pfvf->hw.cgx_fec_uncorr_blks; 223 224 rsp = otx2_get_fwdata(pfvf); 225 if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats && 226 !otx2_get_phy_fec_stats(pfvf)) { 227 /* Fetch fwdata again because it's been recently populated with 228 * latest PHY FEC stats. 229 */ 230 rsp = otx2_get_fwdata(pfvf); 231 if (!IS_ERR(rsp)) { 232 struct fec_stats_s *p = &rsp->fwdata.phy.fec_stats; 233 234 if (pfvf->linfo.fec == OTX2_FEC_BASER) { 235 fec_corr_blks = p->brfec_corr_blks; 236 fec_uncorr_blks = p->brfec_uncorr_blks; 237 } else { 238 fec_corr_blks = p->rsfec_corr_cws; 239 fec_uncorr_blks = p->rsfec_uncorr_cws; 240 } 241 } 242 } 243 244 *(data++) = fec_corr_blks; 245 *(data++) = fec_uncorr_blks; 246 } 247 248 static int otx2_get_sset_count(struct net_device *netdev, int sset) 249 { 250 struct otx2_nic *pfvf = netdev_priv(netdev); 251 int qstats_count; 252 253 if (sset != ETH_SS_STATS) 254 return -EINVAL; 255 256 qstats_count = otx2_n_queue_stats * 257 (pfvf->hw.rx_queues + pfvf->hw.tx_queues); 258 otx2_update_lmac_fec_stats(pfvf); 259 260 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 261 CGX_RX_STATS_COUNT + CGX_TX_STATS_COUNT + OTX2_FEC_STATS_CNT 262 + 1; 263 } 264 265 /* Get no of queues device supports and current queue count */ 266 static void otx2_get_channels(struct net_device *dev, 267 struct ethtool_channels *channel) 268 { 269 struct otx2_nic *pfvf = netdev_priv(dev); 270 271 channel->max_rx = pfvf->hw.max_queues; 272 channel->max_tx = pfvf->hw.max_queues; 273 274 channel->rx_count = pfvf->hw.rx_queues; 275 channel->tx_count = pfvf->hw.tx_queues; 276 } 277 278 /* Set no of Tx, Rx queues to be used */ 279 static int otx2_set_channels(struct net_device *dev, 280 struct ethtool_channels *channel) 281 { 282 struct otx2_nic *pfvf = netdev_priv(dev); 283 bool if_up = netif_running(dev); 284 int err = 0; 285 286 if (!channel->rx_count || !channel->tx_count) 287 return -EINVAL; 288 289 if (if_up) 290 dev->netdev_ops->ndo_stop(dev); 291 292 err = otx2_set_real_num_queues(dev, channel->tx_count, 293 channel->rx_count); 294 if (err) 295 goto fail; 296 297 pfvf->hw.rx_queues = channel->rx_count; 298 pfvf->hw.tx_queues = channel->tx_count; 299 pfvf->qset.cq_cnt = pfvf->hw.tx_queues + pfvf->hw.rx_queues; 300 301 fail: 302 if (if_up) 303 dev->netdev_ops->ndo_open(dev); 304 305 netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n", 306 pfvf->hw.tx_queues, pfvf->hw.rx_queues); 307 308 return err; 309 } 310 311 static void otx2_get_pauseparam(struct net_device *netdev, 312 struct ethtool_pauseparam *pause) 313 { 314 struct otx2_nic *pfvf = netdev_priv(netdev); 315 struct cgx_pause_frm_cfg *req, *rsp; 316 317 if (is_otx2_lbkvf(pfvf->pdev)) 318 return; 319 320 req = otx2_mbox_alloc_msg_cgx_cfg_pause_frm(&pfvf->mbox); 321 if (!req) 322 return; 323 324 if (!otx2_sync_mbox_msg(&pfvf->mbox)) { 325 rsp = (struct cgx_pause_frm_cfg *) 326 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr); 327 pause->rx_pause = rsp->rx_pause; 328 pause->tx_pause = rsp->tx_pause; 329 } 330 } 331 332 static int otx2_set_pauseparam(struct net_device *netdev, 333 struct ethtool_pauseparam *pause) 334 { 335 struct otx2_nic *pfvf = netdev_priv(netdev); 336 337 if (pause->autoneg) 338 return -EOPNOTSUPP; 339 340 if (is_otx2_lbkvf(pfvf->pdev)) 341 return -EOPNOTSUPP; 342 343 if (pause->rx_pause) 344 pfvf->flags |= OTX2_FLAG_RX_PAUSE_ENABLED; 345 else 346 pfvf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED; 347 348 if (pause->tx_pause) 349 pfvf->flags |= OTX2_FLAG_TX_PAUSE_ENABLED; 350 else 351 pfvf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED; 352 353 return otx2_config_pause_frm(pfvf); 354 } 355 356 static void otx2_get_ringparam(struct net_device *netdev, 357 struct ethtool_ringparam *ring) 358 { 359 struct otx2_nic *pfvf = netdev_priv(netdev); 360 struct otx2_qset *qs = &pfvf->qset; 361 362 ring->rx_max_pending = Q_COUNT(Q_SIZE_MAX); 363 ring->rx_pending = qs->rqe_cnt ? qs->rqe_cnt : Q_COUNT(Q_SIZE_256); 364 ring->tx_max_pending = Q_COUNT(Q_SIZE_MAX); 365 ring->tx_pending = qs->sqe_cnt ? qs->sqe_cnt : Q_COUNT(Q_SIZE_4K); 366 } 367 368 static int otx2_set_ringparam(struct net_device *netdev, 369 struct ethtool_ringparam *ring) 370 { 371 struct otx2_nic *pfvf = netdev_priv(netdev); 372 bool if_up = netif_running(netdev); 373 struct otx2_qset *qs = &pfvf->qset; 374 u32 rx_count, tx_count; 375 376 if (ring->rx_mini_pending || ring->rx_jumbo_pending) 377 return -EINVAL; 378 379 /* Permitted lengths are 16 64 256 1K 4K 16K 64K 256K 1M */ 380 rx_count = ring->rx_pending; 381 /* On some silicon variants a skid or reserved CQEs are 382 * needed to avoid CQ overflow. 383 */ 384 if (rx_count < pfvf->hw.rq_skid) 385 rx_count = pfvf->hw.rq_skid; 386 rx_count = Q_COUNT(Q_SIZE(rx_count, 3)); 387 388 /* Due pipelining impact minimum 2000 unused SQ CQE's 389 * need to be maintained to avoid CQ overflow, hence the 390 * minimum 4K size. 391 */ 392 tx_count = clamp_t(u32, ring->tx_pending, 393 Q_COUNT(Q_SIZE_4K), Q_COUNT(Q_SIZE_MAX)); 394 tx_count = Q_COUNT(Q_SIZE(tx_count, 3)); 395 396 if (tx_count == qs->sqe_cnt && rx_count == qs->rqe_cnt) 397 return 0; 398 399 if (if_up) 400 netdev->netdev_ops->ndo_stop(netdev); 401 402 /* Assigned to the nearest possible exponent. */ 403 qs->sqe_cnt = tx_count; 404 qs->rqe_cnt = rx_count; 405 406 if (if_up) 407 netdev->netdev_ops->ndo_open(netdev); 408 409 return 0; 410 } 411 412 static int otx2_get_coalesce(struct net_device *netdev, 413 struct ethtool_coalesce *cmd) 414 { 415 struct otx2_nic *pfvf = netdev_priv(netdev); 416 struct otx2_hw *hw = &pfvf->hw; 417 418 cmd->rx_coalesce_usecs = hw->cq_time_wait; 419 cmd->rx_max_coalesced_frames = hw->cq_ecount_wait; 420 cmd->tx_coalesce_usecs = hw->cq_time_wait; 421 cmd->tx_max_coalesced_frames = hw->cq_ecount_wait; 422 423 return 0; 424 } 425 426 static int otx2_set_coalesce(struct net_device *netdev, 427 struct ethtool_coalesce *ec) 428 { 429 struct otx2_nic *pfvf = netdev_priv(netdev); 430 struct otx2_hw *hw = &pfvf->hw; 431 int qidx; 432 433 if (!ec->rx_max_coalesced_frames || !ec->tx_max_coalesced_frames) 434 return 0; 435 436 /* 'cq_time_wait' is 8bit and is in multiple of 100ns, 437 * so clamp the user given value to the range of 1 to 25usec. 438 */ 439 ec->rx_coalesce_usecs = clamp_t(u32, ec->rx_coalesce_usecs, 440 1, CQ_TIMER_THRESH_MAX); 441 ec->tx_coalesce_usecs = clamp_t(u32, ec->tx_coalesce_usecs, 442 1, CQ_TIMER_THRESH_MAX); 443 444 /* Rx and Tx are mapped to same CQ, check which one 445 * is changed, if both then choose the min. 446 */ 447 if (hw->cq_time_wait == ec->rx_coalesce_usecs) 448 hw->cq_time_wait = ec->tx_coalesce_usecs; 449 else if (hw->cq_time_wait == ec->tx_coalesce_usecs) 450 hw->cq_time_wait = ec->rx_coalesce_usecs; 451 else 452 hw->cq_time_wait = min_t(u8, ec->rx_coalesce_usecs, 453 ec->tx_coalesce_usecs); 454 455 /* Max ecount_wait supported is 16bit, 456 * so clamp the user given value to the range of 1 to 64k. 457 */ 458 ec->rx_max_coalesced_frames = clamp_t(u32, ec->rx_max_coalesced_frames, 459 1, U16_MAX); 460 ec->tx_max_coalesced_frames = clamp_t(u32, ec->tx_max_coalesced_frames, 461 1, U16_MAX); 462 463 /* Rx and Tx are mapped to same CQ, check which one 464 * is changed, if both then choose the min. 465 */ 466 if (hw->cq_ecount_wait == ec->rx_max_coalesced_frames) 467 hw->cq_ecount_wait = ec->tx_max_coalesced_frames; 468 else if (hw->cq_ecount_wait == ec->tx_max_coalesced_frames) 469 hw->cq_ecount_wait = ec->rx_max_coalesced_frames; 470 else 471 hw->cq_ecount_wait = min_t(u16, ec->rx_max_coalesced_frames, 472 ec->tx_max_coalesced_frames); 473 474 if (netif_running(netdev)) { 475 for (qidx = 0; qidx < pfvf->hw.cint_cnt; qidx++) 476 otx2_config_irq_coalescing(pfvf, qidx); 477 } 478 479 return 0; 480 } 481 482 static int otx2_get_rss_hash_opts(struct otx2_nic *pfvf, 483 struct ethtool_rxnfc *nfc) 484 { 485 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 486 487 if (!(rss->flowkey_cfg & 488 (NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6))) 489 return 0; 490 491 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 492 nfc->data = RXH_IP_SRC | RXH_IP_DST; 493 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_VLAN) 494 nfc->data |= RXH_VLAN; 495 496 switch (nfc->flow_type) { 497 case TCP_V4_FLOW: 498 case TCP_V6_FLOW: 499 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_TCP) 500 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 501 break; 502 case UDP_V4_FLOW: 503 case UDP_V6_FLOW: 504 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_UDP) 505 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 506 break; 507 case SCTP_V4_FLOW: 508 case SCTP_V6_FLOW: 509 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_SCTP) 510 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 511 break; 512 case AH_ESP_V4_FLOW: 513 case AH_ESP_V6_FLOW: 514 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_ESP) 515 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 516 break; 517 case AH_V4_FLOW: 518 case ESP_V4_FLOW: 519 case IPV4_FLOW: 520 break; 521 case AH_V6_FLOW: 522 case ESP_V6_FLOW: 523 case IPV6_FLOW: 524 break; 525 default: 526 return -EINVAL; 527 } 528 529 return 0; 530 } 531 532 static int otx2_set_rss_hash_opts(struct otx2_nic *pfvf, 533 struct ethtool_rxnfc *nfc) 534 { 535 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 536 u32 rxh_l4 = RXH_L4_B_0_1 | RXH_L4_B_2_3; 537 u32 rss_cfg = rss->flowkey_cfg; 538 539 if (!rss->enable) { 540 netdev_err(pfvf->netdev, 541 "RSS is disabled, cannot change settings\n"); 542 return -EIO; 543 } 544 545 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 546 if (!(nfc->data & RXH_IP_SRC) || !(nfc->data & RXH_IP_DST)) 547 return -EINVAL; 548 549 if (nfc->data & RXH_VLAN) 550 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN; 551 else 552 rss_cfg &= ~NIX_FLOW_KEY_TYPE_VLAN; 553 554 switch (nfc->flow_type) { 555 case TCP_V4_FLOW: 556 case TCP_V6_FLOW: 557 /* Different config for v4 and v6 is not supported. 558 * Both of them have to be either 4-tuple or 2-tuple. 559 */ 560 switch (nfc->data & rxh_l4) { 561 case 0: 562 rss_cfg &= ~NIX_FLOW_KEY_TYPE_TCP; 563 break; 564 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 565 rss_cfg |= NIX_FLOW_KEY_TYPE_TCP; 566 break; 567 default: 568 return -EINVAL; 569 } 570 break; 571 case UDP_V4_FLOW: 572 case UDP_V6_FLOW: 573 switch (nfc->data & rxh_l4) { 574 case 0: 575 rss_cfg &= ~NIX_FLOW_KEY_TYPE_UDP; 576 break; 577 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 578 rss_cfg |= NIX_FLOW_KEY_TYPE_UDP; 579 break; 580 default: 581 return -EINVAL; 582 } 583 break; 584 case SCTP_V4_FLOW: 585 case SCTP_V6_FLOW: 586 switch (nfc->data & rxh_l4) { 587 case 0: 588 rss_cfg &= ~NIX_FLOW_KEY_TYPE_SCTP; 589 break; 590 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 591 rss_cfg |= NIX_FLOW_KEY_TYPE_SCTP; 592 break; 593 default: 594 return -EINVAL; 595 } 596 break; 597 case AH_ESP_V4_FLOW: 598 case AH_ESP_V6_FLOW: 599 switch (nfc->data & rxh_l4) { 600 case 0: 601 rss_cfg &= ~(NIX_FLOW_KEY_TYPE_ESP | 602 NIX_FLOW_KEY_TYPE_AH); 603 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN | 604 NIX_FLOW_KEY_TYPE_IPV4_PROTO; 605 break; 606 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 607 /* If VLAN hashing is also requested for ESP then do not 608 * allow because of hardware 40 bytes flow key limit. 609 */ 610 if (rss_cfg & NIX_FLOW_KEY_TYPE_VLAN) { 611 netdev_err(pfvf->netdev, 612 "RSS hash of ESP or AH with VLAN is not supported\n"); 613 return -EOPNOTSUPP; 614 } 615 616 rss_cfg |= NIX_FLOW_KEY_TYPE_ESP | NIX_FLOW_KEY_TYPE_AH; 617 /* Disable IPv4 proto hashing since IPv6 SA+DA(32 bytes) 618 * and ESP SPI+sequence(8 bytes) uses hardware maximum 619 * limit of 40 byte flow key. 620 */ 621 rss_cfg &= ~NIX_FLOW_KEY_TYPE_IPV4_PROTO; 622 break; 623 default: 624 return -EINVAL; 625 } 626 break; 627 case IPV4_FLOW: 628 case IPV6_FLOW: 629 rss_cfg = NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6; 630 break; 631 default: 632 return -EINVAL; 633 } 634 635 rss->flowkey_cfg = rss_cfg; 636 otx2_set_flowkey_cfg(pfvf); 637 return 0; 638 } 639 640 static int otx2_get_rxnfc(struct net_device *dev, 641 struct ethtool_rxnfc *nfc, u32 *rules) 642 { 643 struct otx2_nic *pfvf = netdev_priv(dev); 644 int ret = -EOPNOTSUPP; 645 646 switch (nfc->cmd) { 647 case ETHTOOL_GRXRINGS: 648 nfc->data = pfvf->hw.rx_queues; 649 ret = 0; 650 break; 651 case ETHTOOL_GRXCLSRLCNT: 652 nfc->rule_cnt = pfvf->flow_cfg->nr_flows; 653 ret = 0; 654 break; 655 case ETHTOOL_GRXCLSRULE: 656 ret = otx2_get_flow(pfvf, nfc, nfc->fs.location); 657 break; 658 case ETHTOOL_GRXCLSRLALL: 659 ret = otx2_get_all_flows(pfvf, nfc, rules); 660 break; 661 case ETHTOOL_GRXFH: 662 return otx2_get_rss_hash_opts(pfvf, nfc); 663 default: 664 break; 665 } 666 return ret; 667 } 668 669 static int otx2_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc) 670 { 671 bool ntuple = !!(dev->features & NETIF_F_NTUPLE); 672 struct otx2_nic *pfvf = netdev_priv(dev); 673 int ret = -EOPNOTSUPP; 674 675 switch (nfc->cmd) { 676 case ETHTOOL_SRXFH: 677 ret = otx2_set_rss_hash_opts(pfvf, nfc); 678 break; 679 case ETHTOOL_SRXCLSRLINS: 680 if (netif_running(dev) && ntuple) 681 ret = otx2_add_flow(pfvf, nfc); 682 break; 683 case ETHTOOL_SRXCLSRLDEL: 684 if (netif_running(dev) && ntuple) 685 ret = otx2_remove_flow(pfvf, nfc->fs.location); 686 break; 687 default: 688 break; 689 } 690 691 return ret; 692 } 693 694 static int otx2vf_get_rxnfc(struct net_device *dev, 695 struct ethtool_rxnfc *nfc, u32 *rules) 696 { 697 struct otx2_nic *pfvf = netdev_priv(dev); 698 int ret = -EOPNOTSUPP; 699 700 switch (nfc->cmd) { 701 case ETHTOOL_GRXRINGS: 702 nfc->data = pfvf->hw.rx_queues; 703 ret = 0; 704 break; 705 case ETHTOOL_GRXFH: 706 return otx2_get_rss_hash_opts(pfvf, nfc); 707 default: 708 break; 709 } 710 return ret; 711 } 712 713 static int otx2vf_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc) 714 { 715 struct otx2_nic *pfvf = netdev_priv(dev); 716 int ret = -EOPNOTSUPP; 717 718 switch (nfc->cmd) { 719 case ETHTOOL_SRXFH: 720 ret = otx2_set_rss_hash_opts(pfvf, nfc); 721 break; 722 default: 723 break; 724 } 725 726 return ret; 727 } 728 729 static u32 otx2_get_rxfh_key_size(struct net_device *netdev) 730 { 731 struct otx2_nic *pfvf = netdev_priv(netdev); 732 struct otx2_rss_info *rss; 733 734 rss = &pfvf->hw.rss_info; 735 736 return sizeof(rss->key); 737 } 738 739 static u32 otx2_get_rxfh_indir_size(struct net_device *dev) 740 { 741 return MAX_RSS_INDIR_TBL_SIZE; 742 } 743 744 static int otx2_rss_ctx_delete(struct otx2_nic *pfvf, int ctx_id) 745 { 746 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 747 748 otx2_rss_ctx_flow_del(pfvf, ctx_id); 749 kfree(rss->rss_ctx[ctx_id]); 750 rss->rss_ctx[ctx_id] = NULL; 751 752 return 0; 753 } 754 755 static int otx2_rss_ctx_create(struct otx2_nic *pfvf, 756 u32 *rss_context) 757 { 758 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 759 u8 ctx; 760 761 for (ctx = 0; ctx < MAX_RSS_GROUPS; ctx++) { 762 if (!rss->rss_ctx[ctx]) 763 break; 764 } 765 if (ctx == MAX_RSS_GROUPS) 766 return -EINVAL; 767 768 rss->rss_ctx[ctx] = kzalloc(sizeof(*rss->rss_ctx[ctx]), GFP_KERNEL); 769 if (!rss->rss_ctx[ctx]) 770 return -ENOMEM; 771 *rss_context = ctx; 772 773 return 0; 774 } 775 776 /* RSS context configuration */ 777 static int otx2_set_rxfh_context(struct net_device *dev, const u32 *indir, 778 const u8 *hkey, const u8 hfunc, 779 u32 *rss_context, bool delete) 780 { 781 struct otx2_nic *pfvf = netdev_priv(dev); 782 struct otx2_rss_ctx *rss_ctx; 783 struct otx2_rss_info *rss; 784 int ret, idx; 785 786 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 787 return -EOPNOTSUPP; 788 789 rss = &pfvf->hw.rss_info; 790 791 if (!rss->enable) { 792 netdev_err(dev, "RSS is disabled, cannot change settings\n"); 793 return -EIO; 794 } 795 796 if (hkey) { 797 memcpy(rss->key, hkey, sizeof(rss->key)); 798 otx2_set_rss_key(pfvf); 799 } 800 if (delete) 801 return otx2_rss_ctx_delete(pfvf, *rss_context); 802 803 if (*rss_context == ETH_RXFH_CONTEXT_ALLOC) { 804 ret = otx2_rss_ctx_create(pfvf, rss_context); 805 if (ret) 806 return ret; 807 } 808 if (indir) { 809 rss_ctx = rss->rss_ctx[*rss_context]; 810 for (idx = 0; idx < rss->rss_size; idx++) 811 rss_ctx->ind_tbl[idx] = indir[idx]; 812 } 813 otx2_set_rss_table(pfvf, *rss_context); 814 815 return 0; 816 } 817 818 static int otx2_get_rxfh_context(struct net_device *dev, u32 *indir, 819 u8 *hkey, u8 *hfunc, u32 rss_context) 820 { 821 struct otx2_nic *pfvf = netdev_priv(dev); 822 struct otx2_rss_ctx *rss_ctx; 823 struct otx2_rss_info *rss; 824 int idx, rx_queues; 825 826 rss = &pfvf->hw.rss_info; 827 828 if (hfunc) 829 *hfunc = ETH_RSS_HASH_TOP; 830 831 if (!indir) 832 return 0; 833 834 if (!rss->enable && rss_context == DEFAULT_RSS_CONTEXT_GROUP) { 835 rx_queues = pfvf->hw.rx_queues; 836 for (idx = 0; idx < MAX_RSS_INDIR_TBL_SIZE; idx++) 837 indir[idx] = ethtool_rxfh_indir_default(idx, rx_queues); 838 return 0; 839 } 840 if (rss_context >= MAX_RSS_GROUPS) 841 return -ENOENT; 842 843 rss_ctx = rss->rss_ctx[rss_context]; 844 if (!rss_ctx) 845 return -ENOENT; 846 847 if (indir) { 848 for (idx = 0; idx < rss->rss_size; idx++) 849 indir[idx] = rss_ctx->ind_tbl[idx]; 850 } 851 if (hkey) 852 memcpy(hkey, rss->key, sizeof(rss->key)); 853 854 return 0; 855 } 856 857 /* Get RSS configuration */ 858 static int otx2_get_rxfh(struct net_device *dev, u32 *indir, 859 u8 *hkey, u8 *hfunc) 860 { 861 return otx2_get_rxfh_context(dev, indir, hkey, hfunc, 862 DEFAULT_RSS_CONTEXT_GROUP); 863 } 864 865 /* Configure RSS table and hash key */ 866 static int otx2_set_rxfh(struct net_device *dev, const u32 *indir, 867 const u8 *hkey, const u8 hfunc) 868 { 869 870 u32 rss_context = DEFAULT_RSS_CONTEXT_GROUP; 871 872 return otx2_set_rxfh_context(dev, indir, hkey, hfunc, &rss_context, 0); 873 } 874 875 static u32 otx2_get_msglevel(struct net_device *netdev) 876 { 877 struct otx2_nic *pfvf = netdev_priv(netdev); 878 879 return pfvf->msg_enable; 880 } 881 882 static void otx2_set_msglevel(struct net_device *netdev, u32 val) 883 { 884 struct otx2_nic *pfvf = netdev_priv(netdev); 885 886 pfvf->msg_enable = val; 887 } 888 889 static u32 otx2_get_link(struct net_device *netdev) 890 { 891 struct otx2_nic *pfvf = netdev_priv(netdev); 892 893 /* LBK link is internal and always UP */ 894 if (is_otx2_lbkvf(pfvf->pdev)) 895 return 1; 896 return pfvf->linfo.link_up; 897 } 898 899 static int otx2_get_ts_info(struct net_device *netdev, 900 struct ethtool_ts_info *info) 901 { 902 struct otx2_nic *pfvf = netdev_priv(netdev); 903 904 if (!pfvf->ptp) 905 return ethtool_op_get_ts_info(netdev, info); 906 907 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 908 SOF_TIMESTAMPING_RX_SOFTWARE | 909 SOF_TIMESTAMPING_SOFTWARE | 910 SOF_TIMESTAMPING_TX_HARDWARE | 911 SOF_TIMESTAMPING_RX_HARDWARE | 912 SOF_TIMESTAMPING_RAW_HARDWARE; 913 914 info->phc_index = otx2_ptp_clock_index(pfvf); 915 916 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 917 918 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 919 (1 << HWTSTAMP_FILTER_ALL); 920 921 return 0; 922 } 923 924 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf) 925 { 926 struct cgx_fw_data *rsp = NULL; 927 struct msg_req *req; 928 int err = 0; 929 930 mutex_lock(&pfvf->mbox.lock); 931 req = otx2_mbox_alloc_msg_cgx_get_aux_link_info(&pfvf->mbox); 932 if (!req) { 933 mutex_unlock(&pfvf->mbox.lock); 934 return ERR_PTR(-ENOMEM); 935 } 936 937 err = otx2_sync_mbox_msg(&pfvf->mbox); 938 if (!err) { 939 rsp = (struct cgx_fw_data *) 940 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr); 941 } else { 942 rsp = ERR_PTR(err); 943 } 944 945 mutex_unlock(&pfvf->mbox.lock); 946 return rsp; 947 } 948 949 static int otx2_get_fecparam(struct net_device *netdev, 950 struct ethtool_fecparam *fecparam) 951 { 952 struct otx2_nic *pfvf = netdev_priv(netdev); 953 struct cgx_fw_data *rsp; 954 const int fec[] = { 955 ETHTOOL_FEC_OFF, 956 ETHTOOL_FEC_BASER, 957 ETHTOOL_FEC_RS, 958 ETHTOOL_FEC_BASER | ETHTOOL_FEC_RS}; 959 #define FEC_MAX_INDEX 4 960 if (pfvf->linfo.fec < FEC_MAX_INDEX) 961 fecparam->active_fec = fec[pfvf->linfo.fec]; 962 963 rsp = otx2_get_fwdata(pfvf); 964 if (IS_ERR(rsp)) 965 return PTR_ERR(rsp); 966 967 if (rsp->fwdata.supported_fec < FEC_MAX_INDEX) { 968 if (!rsp->fwdata.supported_fec) 969 fecparam->fec = ETHTOOL_FEC_NONE; 970 else 971 fecparam->fec = fec[rsp->fwdata.supported_fec]; 972 } 973 return 0; 974 } 975 976 static int otx2_set_fecparam(struct net_device *netdev, 977 struct ethtool_fecparam *fecparam) 978 { 979 struct otx2_nic *pfvf = netdev_priv(netdev); 980 struct mbox *mbox = &pfvf->mbox; 981 struct fec_mode *req, *rsp; 982 int err = 0, fec = 0; 983 984 switch (fecparam->fec) { 985 /* Firmware does not support AUTO mode consider it as FEC_OFF */ 986 case ETHTOOL_FEC_OFF: 987 case ETHTOOL_FEC_AUTO: 988 fec = OTX2_FEC_OFF; 989 break; 990 case ETHTOOL_FEC_RS: 991 fec = OTX2_FEC_RS; 992 break; 993 case ETHTOOL_FEC_BASER: 994 fec = OTX2_FEC_BASER; 995 break; 996 default: 997 netdev_warn(pfvf->netdev, "Unsupported FEC mode: %d", 998 fecparam->fec); 999 return -EINVAL; 1000 } 1001 1002 if (fec == pfvf->linfo.fec) 1003 return 0; 1004 1005 mutex_lock(&mbox->lock); 1006 req = otx2_mbox_alloc_msg_cgx_set_fec_param(&pfvf->mbox); 1007 if (!req) { 1008 err = -ENOMEM; 1009 goto end; 1010 } 1011 req->fec = fec; 1012 err = otx2_sync_mbox_msg(&pfvf->mbox); 1013 if (err) 1014 goto end; 1015 1016 rsp = (struct fec_mode *)otx2_mbox_get_rsp(&pfvf->mbox.mbox, 1017 0, &req->hdr); 1018 if (rsp->fec >= 0) 1019 pfvf->linfo.fec = rsp->fec; 1020 else 1021 err = rsp->fec; 1022 end: 1023 mutex_unlock(&mbox->lock); 1024 return err; 1025 } 1026 1027 static void otx2_get_fec_info(u64 index, int req_mode, 1028 struct ethtool_link_ksettings *link_ksettings) 1029 { 1030 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, }; 1031 1032 switch (index) { 1033 case OTX2_FEC_NONE: 1034 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1035 otx2_fec_modes); 1036 break; 1037 case OTX2_FEC_BASER: 1038 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1039 otx2_fec_modes); 1040 break; 1041 case OTX2_FEC_RS: 1042 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1043 otx2_fec_modes); 1044 break; 1045 case OTX2_FEC_BASER | OTX2_FEC_RS: 1046 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1047 otx2_fec_modes); 1048 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1049 otx2_fec_modes); 1050 break; 1051 } 1052 1053 /* Add fec modes to existing modes */ 1054 if (req_mode == OTX2_MODE_ADVERTISED) 1055 linkmode_or(link_ksettings->link_modes.advertising, 1056 link_ksettings->link_modes.advertising, 1057 otx2_fec_modes); 1058 else 1059 linkmode_or(link_ksettings->link_modes.supported, 1060 link_ksettings->link_modes.supported, 1061 otx2_fec_modes); 1062 } 1063 1064 static void otx2_get_link_mode_info(u64 link_mode_bmap, 1065 bool req_mode, 1066 struct ethtool_link_ksettings 1067 *link_ksettings) 1068 { 1069 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, }; 1070 const int otx2_sgmii_features[6] = { 1071 ETHTOOL_LINK_MODE_10baseT_Half_BIT, 1072 ETHTOOL_LINK_MODE_10baseT_Full_BIT, 1073 ETHTOOL_LINK_MODE_100baseT_Half_BIT, 1074 ETHTOOL_LINK_MODE_100baseT_Full_BIT, 1075 ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1076 ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1077 }; 1078 /* CGX link modes to Ethtool link mode mapping */ 1079 const int cgx_link_mode[27] = { 1080 0, /* SGMII Mode */ 1081 ETHTOOL_LINK_MODE_1000baseX_Full_BIT, 1082 ETHTOOL_LINK_MODE_10000baseT_Full_BIT, 1083 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, 1084 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, 1085 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, 1086 0, 1087 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, 1088 0, 1089 0, 1090 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, 1091 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, 1092 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, 1093 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, 1094 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, 1095 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, 1096 0, 1097 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, 1098 0, 1099 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 1100 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, 1101 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, 1102 0, 1103 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, 1104 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 1105 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, 1106 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 1107 }; 1108 u8 bit; 1109 1110 link_mode_bmap = link_mode_bmap & OTX2_ETHTOOL_SUPPORTED_MODES; 1111 1112 for_each_set_bit(bit, (unsigned long *)&link_mode_bmap, 27) { 1113 /* SGMII mode is set */ 1114 if (bit == 0) 1115 linkmode_set_bit_array(otx2_sgmii_features, 1116 ARRAY_SIZE(otx2_sgmii_features), 1117 otx2_link_modes); 1118 else 1119 linkmode_set_bit(cgx_link_mode[bit], otx2_link_modes); 1120 } 1121 1122 if (req_mode == OTX2_MODE_ADVERTISED) 1123 linkmode_copy(link_ksettings->link_modes.advertising, 1124 otx2_link_modes); 1125 else 1126 linkmode_copy(link_ksettings->link_modes.supported, 1127 otx2_link_modes); 1128 } 1129 1130 static int otx2_get_link_ksettings(struct net_device *netdev, 1131 struct ethtool_link_ksettings *cmd) 1132 { 1133 struct otx2_nic *pfvf = netdev_priv(netdev); 1134 struct cgx_fw_data *rsp = NULL; 1135 1136 cmd->base.duplex = pfvf->linfo.full_duplex; 1137 cmd->base.speed = pfvf->linfo.speed; 1138 cmd->base.autoneg = pfvf->linfo.an; 1139 1140 rsp = otx2_get_fwdata(pfvf); 1141 if (IS_ERR(rsp)) 1142 return PTR_ERR(rsp); 1143 1144 if (rsp->fwdata.supported_an) 1145 ethtool_link_ksettings_add_link_mode(cmd, 1146 supported, 1147 Autoneg); 1148 1149 otx2_get_link_mode_info(rsp->fwdata.advertised_link_modes, 1150 OTX2_MODE_ADVERTISED, cmd); 1151 otx2_get_fec_info(rsp->fwdata.advertised_fec, 1152 OTX2_MODE_ADVERTISED, cmd); 1153 otx2_get_link_mode_info(rsp->fwdata.supported_link_modes, 1154 OTX2_MODE_SUPPORTED, cmd); 1155 otx2_get_fec_info(rsp->fwdata.supported_fec, 1156 OTX2_MODE_SUPPORTED, cmd); 1157 return 0; 1158 } 1159 1160 static void otx2_get_advertised_mode(const struct ethtool_link_ksettings *cmd, 1161 u64 *mode) 1162 { 1163 u32 bit_pos; 1164 1165 /* Firmware does not support requesting multiple advertised modes 1166 * return first set bit 1167 */ 1168 bit_pos = find_first_bit(cmd->link_modes.advertising, 1169 __ETHTOOL_LINK_MODE_MASK_NBITS); 1170 if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS) 1171 *mode = bit_pos; 1172 } 1173 1174 static int otx2_set_link_ksettings(struct net_device *netdev, 1175 const struct ethtool_link_ksettings *cmd) 1176 { 1177 struct otx2_nic *pf = netdev_priv(netdev); 1178 struct ethtool_link_ksettings cur_ks; 1179 struct cgx_set_link_mode_req *req; 1180 struct mbox *mbox = &pf->mbox; 1181 int err = 0; 1182 1183 memset(&cur_ks, 0, sizeof(struct ethtool_link_ksettings)); 1184 1185 if (!ethtool_validate_speed(cmd->base.speed) || 1186 !ethtool_validate_duplex(cmd->base.duplex)) 1187 return -EINVAL; 1188 1189 if (cmd->base.autoneg != AUTONEG_ENABLE && 1190 cmd->base.autoneg != AUTONEG_DISABLE) 1191 return -EINVAL; 1192 1193 otx2_get_link_ksettings(netdev, &cur_ks); 1194 1195 /* Check requested modes against supported modes by hardware */ 1196 if (!bitmap_subset(cmd->link_modes.advertising, 1197 cur_ks.link_modes.supported, 1198 __ETHTOOL_LINK_MODE_MASK_NBITS)) 1199 return -EINVAL; 1200 1201 mutex_lock(&mbox->lock); 1202 req = otx2_mbox_alloc_msg_cgx_set_link_mode(&pf->mbox); 1203 if (!req) { 1204 err = -ENOMEM; 1205 goto end; 1206 } 1207 1208 req->args.speed = cmd->base.speed; 1209 /* firmware expects 1 for half duplex and 0 for full duplex 1210 * hence inverting 1211 */ 1212 req->args.duplex = cmd->base.duplex ^ 0x1; 1213 req->args.an = cmd->base.autoneg; 1214 otx2_get_advertised_mode(cmd, &req->args.mode); 1215 1216 err = otx2_sync_mbox_msg(&pf->mbox); 1217 end: 1218 mutex_unlock(&mbox->lock); 1219 return err; 1220 } 1221 1222 static const struct ethtool_ops otx2_ethtool_ops = { 1223 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1224 ETHTOOL_COALESCE_MAX_FRAMES, 1225 .get_link = otx2_get_link, 1226 .get_drvinfo = otx2_get_drvinfo, 1227 .get_strings = otx2_get_strings, 1228 .get_ethtool_stats = otx2_get_ethtool_stats, 1229 .get_sset_count = otx2_get_sset_count, 1230 .set_channels = otx2_set_channels, 1231 .get_channels = otx2_get_channels, 1232 .get_ringparam = otx2_get_ringparam, 1233 .set_ringparam = otx2_set_ringparam, 1234 .get_coalesce = otx2_get_coalesce, 1235 .set_coalesce = otx2_set_coalesce, 1236 .get_rxnfc = otx2_get_rxnfc, 1237 .set_rxnfc = otx2_set_rxnfc, 1238 .get_rxfh_key_size = otx2_get_rxfh_key_size, 1239 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 1240 .get_rxfh = otx2_get_rxfh, 1241 .set_rxfh = otx2_set_rxfh, 1242 .get_rxfh_context = otx2_get_rxfh_context, 1243 .set_rxfh_context = otx2_set_rxfh_context, 1244 .get_msglevel = otx2_get_msglevel, 1245 .set_msglevel = otx2_set_msglevel, 1246 .get_pauseparam = otx2_get_pauseparam, 1247 .set_pauseparam = otx2_set_pauseparam, 1248 .get_ts_info = otx2_get_ts_info, 1249 .get_fecparam = otx2_get_fecparam, 1250 .set_fecparam = otx2_set_fecparam, 1251 .get_link_ksettings = otx2_get_link_ksettings, 1252 .set_link_ksettings = otx2_set_link_ksettings, 1253 }; 1254 1255 void otx2_set_ethtool_ops(struct net_device *netdev) 1256 { 1257 netdev->ethtool_ops = &otx2_ethtool_ops; 1258 } 1259 1260 /* VF's ethtool APIs */ 1261 static void otx2vf_get_drvinfo(struct net_device *netdev, 1262 struct ethtool_drvinfo *info) 1263 { 1264 struct otx2_nic *vf = netdev_priv(netdev); 1265 1266 strlcpy(info->driver, DRV_VF_NAME, sizeof(info->driver)); 1267 strlcpy(info->bus_info, pci_name(vf->pdev), sizeof(info->bus_info)); 1268 } 1269 1270 static void otx2vf_get_strings(struct net_device *netdev, u32 sset, u8 *data) 1271 { 1272 struct otx2_nic *vf = netdev_priv(netdev); 1273 int stats; 1274 1275 if (sset != ETH_SS_STATS) 1276 return; 1277 1278 for (stats = 0; stats < otx2_n_dev_stats; stats++) { 1279 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN); 1280 data += ETH_GSTRING_LEN; 1281 } 1282 1283 for (stats = 0; stats < otx2_n_drv_stats; stats++) { 1284 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN); 1285 data += ETH_GSTRING_LEN; 1286 } 1287 1288 otx2_get_qset_strings(vf, &data, 0); 1289 1290 strcpy(data, "reset_count"); 1291 data += ETH_GSTRING_LEN; 1292 } 1293 1294 static void otx2vf_get_ethtool_stats(struct net_device *netdev, 1295 struct ethtool_stats *stats, u64 *data) 1296 { 1297 struct otx2_nic *vf = netdev_priv(netdev); 1298 int stat; 1299 1300 otx2_get_dev_stats(vf); 1301 for (stat = 0; stat < otx2_n_dev_stats; stat++) 1302 *(data++) = ((u64 *)&vf->hw.dev_stats) 1303 [otx2_dev_stats[stat].index]; 1304 1305 for (stat = 0; stat < otx2_n_drv_stats; stat++) 1306 *(data++) = atomic_read(&((atomic_t *)&vf->hw.drv_stats) 1307 [otx2_drv_stats[stat].index]); 1308 1309 otx2_get_qset_stats(vf, stats, &data); 1310 *(data++) = vf->reset_count; 1311 } 1312 1313 static int otx2vf_get_sset_count(struct net_device *netdev, int sset) 1314 { 1315 struct otx2_nic *vf = netdev_priv(netdev); 1316 int qstats_count; 1317 1318 if (sset != ETH_SS_STATS) 1319 return -EINVAL; 1320 1321 qstats_count = otx2_n_queue_stats * 1322 (vf->hw.rx_queues + vf->hw.tx_queues); 1323 1324 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 1; 1325 } 1326 1327 static int otx2vf_get_link_ksettings(struct net_device *netdev, 1328 struct ethtool_link_ksettings *cmd) 1329 { 1330 struct otx2_nic *pfvf = netdev_priv(netdev); 1331 1332 if (is_otx2_lbkvf(pfvf->pdev)) { 1333 cmd->base.duplex = DUPLEX_FULL; 1334 cmd->base.speed = SPEED_100000; 1335 } else { 1336 return otx2_get_link_ksettings(netdev, cmd); 1337 } 1338 return 0; 1339 } 1340 1341 static const struct ethtool_ops otx2vf_ethtool_ops = { 1342 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1343 ETHTOOL_COALESCE_MAX_FRAMES, 1344 .get_link = otx2_get_link, 1345 .get_drvinfo = otx2vf_get_drvinfo, 1346 .get_strings = otx2vf_get_strings, 1347 .get_ethtool_stats = otx2vf_get_ethtool_stats, 1348 .get_sset_count = otx2vf_get_sset_count, 1349 .set_channels = otx2_set_channels, 1350 .get_channels = otx2_get_channels, 1351 .get_rxnfc = otx2vf_get_rxnfc, 1352 .set_rxnfc = otx2vf_set_rxnfc, 1353 .get_rxfh_key_size = otx2_get_rxfh_key_size, 1354 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 1355 .get_rxfh = otx2_get_rxfh, 1356 .set_rxfh = otx2_set_rxfh, 1357 .get_rxfh_context = otx2_get_rxfh_context, 1358 .set_rxfh_context = otx2_set_rxfh_context, 1359 .get_ringparam = otx2_get_ringparam, 1360 .set_ringparam = otx2_set_ringparam, 1361 .get_coalesce = otx2_get_coalesce, 1362 .set_coalesce = otx2_set_coalesce, 1363 .get_msglevel = otx2_get_msglevel, 1364 .set_msglevel = otx2_set_msglevel, 1365 .get_pauseparam = otx2_get_pauseparam, 1366 .set_pauseparam = otx2_set_pauseparam, 1367 .get_link_ksettings = otx2vf_get_link_ksettings, 1368 }; 1369 1370 void otx2vf_set_ethtool_ops(struct net_device *netdev) 1371 { 1372 netdev->ethtool_ops = &otx2vf_ethtool_ops; 1373 } 1374 EXPORT_SYMBOL(otx2vf_set_ethtool_ops); 1375