1 // SPDX-License-Identifier: GPL-2.0 2 /* Marvell RVU Ethernet driver 3 * 4 * Copyright (C) 2020 Marvell. 5 * 6 */ 7 8 #include <linux/pci.h> 9 #include <linux/ethtool.h> 10 #include <linux/stddef.h> 11 #include <linux/etherdevice.h> 12 #include <linux/log2.h> 13 #include <linux/net_tstamp.h> 14 #include <linux/linkmode.h> 15 16 #include "otx2_common.h" 17 #include "otx2_ptp.h" 18 #include <cgx_fw_if.h> 19 20 #define DRV_NAME "rvu-nicpf" 21 #define DRV_VF_NAME "rvu-nicvf" 22 23 struct otx2_stat { 24 char name[ETH_GSTRING_LEN]; 25 unsigned int index; 26 }; 27 28 /* HW device stats */ 29 #define OTX2_DEV_STAT(stat) { \ 30 .name = #stat, \ 31 .index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \ 32 } 33 34 enum link_mode { 35 OTX2_MODE_SUPPORTED, 36 OTX2_MODE_ADVERTISED 37 }; 38 39 static const struct otx2_stat otx2_dev_stats[] = { 40 OTX2_DEV_STAT(rx_ucast_frames), 41 OTX2_DEV_STAT(rx_bcast_frames), 42 OTX2_DEV_STAT(rx_mcast_frames), 43 44 OTX2_DEV_STAT(tx_ucast_frames), 45 OTX2_DEV_STAT(tx_bcast_frames), 46 OTX2_DEV_STAT(tx_mcast_frames), 47 }; 48 49 /* Driver level stats */ 50 #define OTX2_DRV_STAT(stat) { \ 51 .name = #stat, \ 52 .index = offsetof(struct otx2_drv_stats, stat) / sizeof(atomic_t), \ 53 } 54 55 static const struct otx2_stat otx2_drv_stats[] = { 56 OTX2_DRV_STAT(rx_fcs_errs), 57 OTX2_DRV_STAT(rx_oversize_errs), 58 OTX2_DRV_STAT(rx_undersize_errs), 59 OTX2_DRV_STAT(rx_csum_errs), 60 OTX2_DRV_STAT(rx_len_errs), 61 OTX2_DRV_STAT(rx_other_errs), 62 }; 63 64 static const struct otx2_stat otx2_queue_stats[] = { 65 { "bytes", 0 }, 66 { "frames", 1 }, 67 }; 68 69 static const unsigned int otx2_n_dev_stats = ARRAY_SIZE(otx2_dev_stats); 70 static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats); 71 static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats); 72 73 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf); 74 75 static void otx2_get_drvinfo(struct net_device *netdev, 76 struct ethtool_drvinfo *info) 77 { 78 struct otx2_nic *pfvf = netdev_priv(netdev); 79 80 strscpy(info->driver, DRV_NAME, sizeof(info->driver)); 81 strscpy(info->bus_info, pci_name(pfvf->pdev), sizeof(info->bus_info)); 82 } 83 84 static void otx2_get_qset_strings(struct otx2_nic *pfvf, u8 **data, int qset) 85 { 86 int start_qidx = qset * pfvf->hw.rx_queues; 87 int qidx, stats; 88 89 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) 90 for (stats = 0; stats < otx2_n_queue_stats; stats++) 91 ethtool_sprintf(data, "rxq%d: %s", qidx + start_qidx, 92 otx2_queue_stats[stats].name); 93 94 for (qidx = 0; qidx < otx2_get_total_tx_queues(pfvf); qidx++) 95 for (stats = 0; stats < otx2_n_queue_stats; stats++) 96 if (qidx >= pfvf->hw.non_qos_queues) 97 ethtool_sprintf(data, "txq_qos%d: %s", 98 qidx + start_qidx - 99 pfvf->hw.non_qos_queues, 100 otx2_queue_stats[stats].name); 101 else 102 ethtool_sprintf(data, "txq%d: %s", 103 qidx + start_qidx, 104 otx2_queue_stats[stats].name); 105 } 106 107 static void otx2_get_strings(struct net_device *netdev, u32 sset, u8 *data) 108 { 109 struct otx2_nic *pfvf = netdev_priv(netdev); 110 int stats; 111 112 if (sset != ETH_SS_STATS) 113 return; 114 115 for (stats = 0; stats < otx2_n_dev_stats; stats++) 116 ethtool_puts(&data, otx2_dev_stats[stats].name); 117 118 for (stats = 0; stats < otx2_n_drv_stats; stats++) 119 ethtool_puts(&data, otx2_drv_stats[stats].name); 120 121 otx2_get_qset_strings(pfvf, &data, 0); 122 123 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) { 124 for (stats = 0; stats < CGX_RX_STATS_COUNT; stats++) 125 ethtool_sprintf(&data, "cgx_rxstat%d: ", stats); 126 127 for (stats = 0; stats < CGX_TX_STATS_COUNT; stats++) 128 ethtool_sprintf(&data, "cgx_txstat%d: ", stats); 129 } 130 131 ethtool_puts(&data, "reset_count"); 132 ethtool_puts(&data, "Fec Corrected Errors: "); 133 ethtool_puts(&data, "Fec Uncorrected Errors: "); 134 } 135 136 static void otx2_get_qset_stats(struct otx2_nic *pfvf, 137 struct ethtool_stats *stats, u64 **data) 138 { 139 int stat, qidx; 140 141 if (!pfvf) 142 return; 143 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 144 if (!otx2_update_rq_stats(pfvf, qidx)) { 145 for (stat = 0; stat < otx2_n_queue_stats; stat++) 146 *((*data)++) = 0; 147 continue; 148 } 149 for (stat = 0; stat < otx2_n_queue_stats; stat++) 150 *((*data)++) = ((u64 *)&pfvf->qset.rq[qidx].stats) 151 [otx2_queue_stats[stat].index]; 152 } 153 154 for (qidx = 0; qidx < otx2_get_total_tx_queues(pfvf); qidx++) { 155 if (!otx2_update_sq_stats(pfvf, qidx)) { 156 for (stat = 0; stat < otx2_n_queue_stats; stat++) 157 *((*data)++) = 0; 158 continue; 159 } 160 for (stat = 0; stat < otx2_n_queue_stats; stat++) 161 *((*data)++) = ((u64 *)&pfvf->qset.sq[qidx].stats) 162 [otx2_queue_stats[stat].index]; 163 } 164 } 165 166 static int otx2_get_phy_fec_stats(struct otx2_nic *pfvf) 167 { 168 struct msg_req *req; 169 int rc = -ENOMEM; 170 171 mutex_lock(&pfvf->mbox.lock); 172 req = otx2_mbox_alloc_msg_cgx_get_phy_fec_stats(&pfvf->mbox); 173 if (!req) 174 goto end; 175 176 if (!otx2_sync_mbox_msg(&pfvf->mbox)) 177 rc = 0; 178 end: 179 mutex_unlock(&pfvf->mbox.lock); 180 return rc; 181 } 182 183 /* Get device and per queue statistics */ 184 static void otx2_get_ethtool_stats(struct net_device *netdev, 185 struct ethtool_stats *stats, u64 *data) 186 { 187 struct otx2_nic *pfvf = netdev_priv(netdev); 188 u64 fec_corr_blks, fec_uncorr_blks; 189 struct cgx_fw_data *rsp; 190 int stat; 191 192 otx2_get_dev_stats(pfvf); 193 for (stat = 0; stat < otx2_n_dev_stats; stat++) 194 *(data++) = ((u64 *)&pfvf->hw.dev_stats) 195 [otx2_dev_stats[stat].index]; 196 197 for (stat = 0; stat < otx2_n_drv_stats; stat++) 198 *(data++) = atomic_read(&((atomic_t *)&pfvf->hw.drv_stats) 199 [otx2_drv_stats[stat].index]); 200 201 otx2_get_qset_stats(pfvf, stats, &data); 202 203 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) { 204 otx2_update_lmac_stats(pfvf); 205 for (stat = 0; stat < CGX_RX_STATS_COUNT; stat++) 206 *(data++) = pfvf->hw.cgx_rx_stats[stat]; 207 for (stat = 0; stat < CGX_TX_STATS_COUNT; stat++) 208 *(data++) = pfvf->hw.cgx_tx_stats[stat]; 209 } 210 211 *(data++) = pfvf->reset_count; 212 213 fec_corr_blks = pfvf->hw.cgx_fec_corr_blks; 214 fec_uncorr_blks = pfvf->hw.cgx_fec_uncorr_blks; 215 216 rsp = otx2_get_fwdata(pfvf); 217 if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats && 218 !otx2_get_phy_fec_stats(pfvf)) { 219 /* Fetch fwdata again because it's been recently populated with 220 * latest PHY FEC stats. 221 */ 222 rsp = otx2_get_fwdata(pfvf); 223 if (!IS_ERR(rsp)) { 224 struct fec_stats_s *p = &rsp->fwdata.phy.fec_stats; 225 226 if (pfvf->linfo.fec == OTX2_FEC_BASER) { 227 fec_corr_blks = p->brfec_corr_blks; 228 fec_uncorr_blks = p->brfec_uncorr_blks; 229 } else { 230 fec_corr_blks = p->rsfec_corr_cws; 231 fec_uncorr_blks = p->rsfec_uncorr_cws; 232 } 233 } 234 } 235 236 *(data++) = fec_corr_blks; 237 *(data++) = fec_uncorr_blks; 238 } 239 240 static int otx2_get_sset_count(struct net_device *netdev, int sset) 241 { 242 struct otx2_nic *pfvf = netdev_priv(netdev); 243 int qstats_count, mac_stats = 0; 244 245 if (sset != ETH_SS_STATS) 246 return -EINVAL; 247 248 qstats_count = otx2_n_queue_stats * 249 (pfvf->hw.rx_queues + otx2_get_total_tx_queues(pfvf)); 250 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) 251 mac_stats = CGX_RX_STATS_COUNT + CGX_TX_STATS_COUNT; 252 otx2_update_lmac_fec_stats(pfvf); 253 254 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 255 mac_stats + OTX2_FEC_STATS_CNT + 1; 256 } 257 258 /* Get no of queues device supports and current queue count */ 259 static void otx2_get_channels(struct net_device *dev, 260 struct ethtool_channels *channel) 261 { 262 struct otx2_nic *pfvf = netdev_priv(dev); 263 264 channel->max_rx = pfvf->hw.max_queues; 265 channel->max_tx = pfvf->hw.max_queues; 266 267 channel->rx_count = pfvf->hw.rx_queues; 268 channel->tx_count = pfvf->hw.tx_queues; 269 } 270 271 /* Set no of Tx, Rx queues to be used */ 272 static int otx2_set_channels(struct net_device *dev, 273 struct ethtool_channels *channel) 274 { 275 struct otx2_nic *pfvf = netdev_priv(dev); 276 bool if_up = netif_running(dev); 277 int err, qos_txqs; 278 279 if (!channel->rx_count || !channel->tx_count) 280 return -EINVAL; 281 282 if (bitmap_weight(&pfvf->rq_bmap, pfvf->hw.rx_queues) > 1) { 283 netdev_err(dev, 284 "Receive queues are in use by TC police action\n"); 285 return -EINVAL; 286 } 287 288 if (if_up) 289 dev->netdev_ops->ndo_stop(dev); 290 291 qos_txqs = bitmap_weight(pfvf->qos.qos_sq_bmap, 292 OTX2_QOS_MAX_LEAF_NODES); 293 294 err = otx2_set_real_num_queues(dev, channel->tx_count + qos_txqs, 295 channel->rx_count); 296 if (err) 297 return err; 298 299 pfvf->hw.rx_queues = channel->rx_count; 300 pfvf->hw.tx_queues = channel->tx_count; 301 if (pfvf->xdp_prog) 302 pfvf->hw.xdp_queues = channel->rx_count; 303 304 if (if_up) 305 err = dev->netdev_ops->ndo_open(dev); 306 307 netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n", 308 pfvf->hw.tx_queues, pfvf->hw.rx_queues); 309 310 return err; 311 } 312 313 static void otx2_get_pauseparam(struct net_device *netdev, 314 struct ethtool_pauseparam *pause) 315 { 316 struct otx2_nic *pfvf = netdev_priv(netdev); 317 struct cgx_pause_frm_cfg *req, *rsp; 318 319 if (is_otx2_lbkvf(pfvf->pdev) || is_otx2_sdp_rep(pfvf->pdev)) 320 return; 321 322 mutex_lock(&pfvf->mbox.lock); 323 req = otx2_mbox_alloc_msg_cgx_cfg_pause_frm(&pfvf->mbox); 324 if (!req) { 325 mutex_unlock(&pfvf->mbox.lock); 326 return; 327 } 328 329 if (!otx2_sync_mbox_msg(&pfvf->mbox)) { 330 rsp = (struct cgx_pause_frm_cfg *) 331 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr); 332 if (IS_ERR(rsp)) { 333 mutex_unlock(&pfvf->mbox.lock); 334 return; 335 } 336 337 pause->rx_pause = rsp->rx_pause; 338 pause->tx_pause = rsp->tx_pause; 339 } 340 mutex_unlock(&pfvf->mbox.lock); 341 } 342 343 static int otx2_set_pauseparam(struct net_device *netdev, 344 struct ethtool_pauseparam *pause) 345 { 346 struct otx2_nic *pfvf = netdev_priv(netdev); 347 348 if (pause->autoneg) 349 return -EOPNOTSUPP; 350 351 if (is_otx2_lbkvf(pfvf->pdev) || is_otx2_sdp_rep(pfvf->pdev)) 352 return -EOPNOTSUPP; 353 354 if (pause->rx_pause) 355 pfvf->flags |= OTX2_FLAG_RX_PAUSE_ENABLED; 356 else 357 pfvf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED; 358 359 if (pause->tx_pause) 360 pfvf->flags |= OTX2_FLAG_TX_PAUSE_ENABLED; 361 else 362 pfvf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED; 363 364 return otx2_config_pause_frm(pfvf); 365 } 366 367 static void otx2_get_ringparam(struct net_device *netdev, 368 struct ethtool_ringparam *ring, 369 struct kernel_ethtool_ringparam *kernel_ring, 370 struct netlink_ext_ack *extack) 371 { 372 struct otx2_nic *pfvf = netdev_priv(netdev); 373 struct otx2_qset *qs = &pfvf->qset; 374 375 ring->rx_max_pending = Q_COUNT(Q_SIZE_MAX); 376 ring->rx_pending = qs->rqe_cnt ? qs->rqe_cnt : Q_COUNT(Q_SIZE_256); 377 ring->tx_max_pending = Q_COUNT(Q_SIZE_MAX); 378 ring->tx_pending = qs->sqe_cnt ? qs->sqe_cnt : Q_COUNT(Q_SIZE_4K); 379 kernel_ring->rx_buf_len = pfvf->hw.rbuf_len; 380 kernel_ring->cqe_size = pfvf->hw.xqe_size; 381 } 382 383 static int otx2_set_ringparam(struct net_device *netdev, 384 struct ethtool_ringparam *ring, 385 struct kernel_ethtool_ringparam *kernel_ring, 386 struct netlink_ext_ack *extack) 387 { 388 struct otx2_nic *pfvf = netdev_priv(netdev); 389 u32 rx_buf_len = kernel_ring->rx_buf_len; 390 u32 old_rx_buf_len = pfvf->hw.rbuf_len; 391 u32 xqe_size = kernel_ring->cqe_size; 392 bool if_up = netif_running(netdev); 393 struct otx2_qset *qs = &pfvf->qset; 394 u32 rx_count, tx_count; 395 396 if (ring->rx_mini_pending || ring->rx_jumbo_pending) 397 return -EINVAL; 398 399 /* Hardware supports max size of 32k for a receive buffer 400 * and 1536 is typical ethernet frame size. 401 */ 402 if (rx_buf_len && (rx_buf_len < 1536 || rx_buf_len > 32768)) { 403 netdev_err(netdev, 404 "Receive buffer range is 1536 - 32768"); 405 return -EINVAL; 406 } 407 408 if (xqe_size != 128 && xqe_size != 512) { 409 netdev_err(netdev, 410 "Completion event size must be 128 or 512"); 411 return -EINVAL; 412 } 413 414 /* Permitted lengths are 16 64 256 1K 4K 16K 64K 256K 1M */ 415 rx_count = ring->rx_pending; 416 /* On some silicon variants a skid or reserved CQEs are 417 * needed to avoid CQ overflow. 418 */ 419 if (rx_count < pfvf->hw.rq_skid) 420 rx_count = pfvf->hw.rq_skid; 421 rx_count = Q_COUNT(Q_SIZE(rx_count, 3)); 422 423 /* Due pipelining impact minimum 2000 unused SQ CQE's 424 * need to be maintained to avoid CQ overflow, hence the 425 * minimum 4K size. 426 */ 427 tx_count = clamp_t(u32, ring->tx_pending, 428 Q_COUNT(Q_SIZE_4K), Q_COUNT(Q_SIZE_MAX)); 429 tx_count = Q_COUNT(Q_SIZE(tx_count, 3)); 430 431 if (tx_count == qs->sqe_cnt && rx_count == qs->rqe_cnt && 432 rx_buf_len == old_rx_buf_len && xqe_size == pfvf->hw.xqe_size) 433 return 0; 434 435 if (if_up) 436 netdev->netdev_ops->ndo_stop(netdev); 437 438 /* Assigned to the nearest possible exponent. */ 439 qs->sqe_cnt = tx_count; 440 qs->rqe_cnt = rx_count; 441 442 pfvf->hw.rbuf_len = rx_buf_len; 443 pfvf->hw.xqe_size = xqe_size; 444 445 if (if_up) 446 return netdev->netdev_ops->ndo_open(netdev); 447 448 return 0; 449 } 450 451 static int otx2_get_coalesce(struct net_device *netdev, 452 struct ethtool_coalesce *cmd, 453 struct kernel_ethtool_coalesce *kernel_coal, 454 struct netlink_ext_ack *extack) 455 { 456 struct otx2_nic *pfvf = netdev_priv(netdev); 457 struct otx2_hw *hw = &pfvf->hw; 458 459 cmd->rx_coalesce_usecs = hw->cq_time_wait; 460 cmd->rx_max_coalesced_frames = hw->cq_ecount_wait; 461 cmd->tx_coalesce_usecs = hw->cq_time_wait; 462 cmd->tx_max_coalesced_frames = hw->cq_ecount_wait; 463 if ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) == 464 OTX2_FLAG_ADPTV_INT_COAL_ENABLED) { 465 cmd->use_adaptive_rx_coalesce = 1; 466 cmd->use_adaptive_tx_coalesce = 1; 467 } else { 468 cmd->use_adaptive_rx_coalesce = 0; 469 cmd->use_adaptive_tx_coalesce = 0; 470 } 471 472 return 0; 473 } 474 475 static int otx2_set_coalesce(struct net_device *netdev, 476 struct ethtool_coalesce *ec, 477 struct kernel_ethtool_coalesce *kernel_coal, 478 struct netlink_ext_ack *extack) 479 { 480 struct otx2_nic *pfvf = netdev_priv(netdev); 481 struct otx2_hw *hw = &pfvf->hw; 482 u8 priv_coalesce_status; 483 int qidx; 484 485 if (!ec->rx_max_coalesced_frames || !ec->tx_max_coalesced_frames) 486 return 0; 487 488 if (ec->use_adaptive_rx_coalesce != ec->use_adaptive_tx_coalesce) { 489 netdev_err(netdev, 490 "adaptive-rx should be same as adaptive-tx"); 491 return -EINVAL; 492 } 493 494 /* Check and update coalesce status */ 495 if ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) == 496 OTX2_FLAG_ADPTV_INT_COAL_ENABLED) { 497 priv_coalesce_status = 1; 498 if (!ec->use_adaptive_rx_coalesce) 499 pfvf->flags &= ~OTX2_FLAG_ADPTV_INT_COAL_ENABLED; 500 } else { 501 priv_coalesce_status = 0; 502 if (ec->use_adaptive_rx_coalesce) 503 pfvf->flags |= OTX2_FLAG_ADPTV_INT_COAL_ENABLED; 504 } 505 506 /* 'cq_time_wait' is 8bit and is in multiple of 100ns, 507 * so clamp the user given value to the range of 1 to 25usec. 508 */ 509 ec->rx_coalesce_usecs = clamp_t(u32, ec->rx_coalesce_usecs, 510 1, CQ_TIMER_THRESH_MAX); 511 ec->tx_coalesce_usecs = clamp_t(u32, ec->tx_coalesce_usecs, 512 1, CQ_TIMER_THRESH_MAX); 513 514 /* Rx and Tx are mapped to same CQ, check which one 515 * is changed, if both then choose the min. 516 */ 517 if (hw->cq_time_wait == ec->rx_coalesce_usecs) 518 hw->cq_time_wait = ec->tx_coalesce_usecs; 519 else if (hw->cq_time_wait == ec->tx_coalesce_usecs) 520 hw->cq_time_wait = ec->rx_coalesce_usecs; 521 else 522 hw->cq_time_wait = min_t(u8, ec->rx_coalesce_usecs, 523 ec->tx_coalesce_usecs); 524 525 /* Max ecount_wait supported is 16bit, 526 * so clamp the user given value to the range of 1 to 64k. 527 */ 528 ec->rx_max_coalesced_frames = clamp_t(u32, ec->rx_max_coalesced_frames, 529 1, NAPI_POLL_WEIGHT); 530 ec->tx_max_coalesced_frames = clamp_t(u32, ec->tx_max_coalesced_frames, 531 1, NAPI_POLL_WEIGHT); 532 533 /* Rx and Tx are mapped to same CQ, check which one 534 * is changed, if both then choose the min. 535 */ 536 if (hw->cq_ecount_wait == ec->rx_max_coalesced_frames) 537 hw->cq_ecount_wait = ec->tx_max_coalesced_frames; 538 else if (hw->cq_ecount_wait == ec->tx_max_coalesced_frames) 539 hw->cq_ecount_wait = ec->rx_max_coalesced_frames; 540 else 541 hw->cq_ecount_wait = min_t(u16, ec->rx_max_coalesced_frames, 542 ec->tx_max_coalesced_frames); 543 544 /* Reset 'cq_time_wait' and 'cq_ecount_wait' to 545 * default values if coalesce status changed from 546 * 'on' to 'off'. 547 */ 548 if (priv_coalesce_status && 549 ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) != 550 OTX2_FLAG_ADPTV_INT_COAL_ENABLED)) { 551 hw->cq_time_wait = CQ_TIMER_THRESH_DEFAULT; 552 hw->cq_ecount_wait = CQ_CQE_THRESH_DEFAULT; 553 } 554 555 if (netif_running(netdev)) { 556 for (qidx = 0; qidx < pfvf->hw.cint_cnt; qidx++) 557 otx2_config_irq_coalescing(pfvf, qidx); 558 } 559 560 return 0; 561 } 562 563 static int otx2_get_rss_hash_opts(struct net_device *dev, 564 struct ethtool_rxfh_fields *nfc) 565 { 566 struct otx2_nic *pfvf = netdev_priv(dev); 567 struct otx2_rss_info *rss; 568 569 rss = &pfvf->hw.rss_info; 570 571 if (!(rss->flowkey_cfg & 572 (NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6))) 573 return 0; 574 575 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 576 nfc->data = RXH_IP_SRC | RXH_IP_DST; 577 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_VLAN) 578 nfc->data |= RXH_VLAN; 579 580 switch (nfc->flow_type) { 581 case TCP_V4_FLOW: 582 case TCP_V6_FLOW: 583 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_TCP) 584 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 585 break; 586 case UDP_V4_FLOW: 587 case UDP_V6_FLOW: 588 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_UDP) 589 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 590 break; 591 case SCTP_V4_FLOW: 592 case SCTP_V6_FLOW: 593 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_SCTP) 594 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 595 break; 596 case AH_ESP_V4_FLOW: 597 case AH_ESP_V6_FLOW: 598 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_ESP) 599 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 600 break; 601 case AH_V4_FLOW: 602 case ESP_V4_FLOW: 603 case IPV4_FLOW: 604 break; 605 case AH_V6_FLOW: 606 case ESP_V6_FLOW: 607 case IPV6_FLOW: 608 break; 609 default: 610 return -EINVAL; 611 } 612 613 return 0; 614 } 615 616 static int otx2_set_rss_hash_opts(struct net_device *dev, 617 const struct ethtool_rxfh_fields *nfc, 618 struct netlink_ext_ack *extack) 619 { 620 struct otx2_nic *pfvf = netdev_priv(dev); 621 u32 rxh_l4 = RXH_L4_B_0_1 | RXH_L4_B_2_3; 622 struct otx2_rss_info *rss; 623 u32 rss_cfg; 624 625 rss = &pfvf->hw.rss_info; 626 rss_cfg = rss->flowkey_cfg; 627 628 if (!rss->enable) { 629 netdev_err(pfvf->netdev, 630 "RSS is disabled, cannot change settings\n"); 631 return -EIO; 632 } 633 634 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 635 if (!(nfc->data & RXH_IP_SRC) || !(nfc->data & RXH_IP_DST)) 636 return -EINVAL; 637 638 if (nfc->data & RXH_VLAN) 639 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN; 640 else 641 rss_cfg &= ~NIX_FLOW_KEY_TYPE_VLAN; 642 643 switch (nfc->flow_type) { 644 case TCP_V4_FLOW: 645 case TCP_V6_FLOW: 646 /* Different config for v4 and v6 is not supported. 647 * Both of them have to be either 4-tuple or 2-tuple. 648 */ 649 switch (nfc->data & rxh_l4) { 650 case 0: 651 rss_cfg &= ~NIX_FLOW_KEY_TYPE_TCP; 652 break; 653 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 654 rss_cfg |= NIX_FLOW_KEY_TYPE_TCP; 655 break; 656 default: 657 return -EINVAL; 658 } 659 break; 660 case UDP_V4_FLOW: 661 case UDP_V6_FLOW: 662 switch (nfc->data & rxh_l4) { 663 case 0: 664 rss_cfg &= ~NIX_FLOW_KEY_TYPE_UDP; 665 break; 666 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 667 rss_cfg |= NIX_FLOW_KEY_TYPE_UDP; 668 break; 669 default: 670 return -EINVAL; 671 } 672 break; 673 case SCTP_V4_FLOW: 674 case SCTP_V6_FLOW: 675 switch (nfc->data & rxh_l4) { 676 case 0: 677 rss_cfg &= ~NIX_FLOW_KEY_TYPE_SCTP; 678 break; 679 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 680 rss_cfg |= NIX_FLOW_KEY_TYPE_SCTP; 681 break; 682 default: 683 return -EINVAL; 684 } 685 break; 686 case AH_ESP_V4_FLOW: 687 case AH_ESP_V6_FLOW: 688 switch (nfc->data & rxh_l4) { 689 case 0: 690 rss_cfg &= ~(NIX_FLOW_KEY_TYPE_ESP | 691 NIX_FLOW_KEY_TYPE_AH); 692 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN | 693 NIX_FLOW_KEY_TYPE_IPV4_PROTO; 694 break; 695 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 696 /* If VLAN hashing is also requested for ESP then do not 697 * allow because of hardware 40 bytes flow key limit. 698 */ 699 if (rss_cfg & NIX_FLOW_KEY_TYPE_VLAN) { 700 netdev_err(pfvf->netdev, 701 "RSS hash of ESP or AH with VLAN is not supported\n"); 702 return -EOPNOTSUPP; 703 } 704 705 rss_cfg |= NIX_FLOW_KEY_TYPE_ESP | NIX_FLOW_KEY_TYPE_AH; 706 /* Disable IPv4 proto hashing since IPv6 SA+DA(32 bytes) 707 * and ESP SPI+sequence(8 bytes) uses hardware maximum 708 * limit of 40 byte flow key. 709 */ 710 rss_cfg &= ~NIX_FLOW_KEY_TYPE_IPV4_PROTO; 711 break; 712 default: 713 return -EINVAL; 714 } 715 break; 716 case IPV4_FLOW: 717 case IPV6_FLOW: 718 rss_cfg = NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6; 719 break; 720 default: 721 return -EINVAL; 722 } 723 724 rss->flowkey_cfg = rss_cfg; 725 otx2_set_flowkey_cfg(pfvf); 726 return 0; 727 } 728 729 static int otx2_get_rxnfc(struct net_device *dev, 730 struct ethtool_rxnfc *nfc, u32 *rules) 731 { 732 bool ntuple = !!(dev->features & NETIF_F_NTUPLE); 733 struct otx2_nic *pfvf = netdev_priv(dev); 734 int ret = -EOPNOTSUPP; 735 736 switch (nfc->cmd) { 737 case ETHTOOL_GRXRINGS: 738 nfc->data = pfvf->hw.rx_queues; 739 ret = 0; 740 break; 741 case ETHTOOL_GRXCLSRLCNT: 742 if (netif_running(dev) && ntuple) { 743 nfc->rule_cnt = pfvf->flow_cfg->nr_flows; 744 ret = 0; 745 } 746 break; 747 case ETHTOOL_GRXCLSRULE: 748 if (netif_running(dev) && ntuple) 749 ret = otx2_get_flow(pfvf, nfc, nfc->fs.location); 750 break; 751 case ETHTOOL_GRXCLSRLALL: 752 if (netif_running(dev) && ntuple) 753 ret = otx2_get_all_flows(pfvf, nfc, rules); 754 break; 755 default: 756 break; 757 } 758 return ret; 759 } 760 761 static int otx2_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc) 762 { 763 bool ntuple = !!(dev->features & NETIF_F_NTUPLE); 764 struct otx2_nic *pfvf = netdev_priv(dev); 765 int ret = -EOPNOTSUPP; 766 767 pfvf->flow_cfg->ntuple = ntuple; 768 switch (nfc->cmd) { 769 case ETHTOOL_SRXCLSRLINS: 770 if (netif_running(dev) && ntuple) 771 ret = otx2_add_flow(pfvf, nfc); 772 break; 773 case ETHTOOL_SRXCLSRLDEL: 774 if (netif_running(dev) && ntuple) 775 ret = otx2_remove_flow(pfvf, nfc->fs.location); 776 break; 777 default: 778 break; 779 } 780 781 return ret; 782 } 783 784 static u32 otx2_get_rxfh_key_size(struct net_device *netdev) 785 { 786 struct otx2_nic *pfvf = netdev_priv(netdev); 787 struct otx2_rss_info *rss; 788 789 rss = &pfvf->hw.rss_info; 790 791 return sizeof(rss->key); 792 } 793 794 static u32 otx2_get_rxfh_indir_size(struct net_device *dev) 795 { 796 return MAX_RSS_INDIR_TBL_SIZE; 797 } 798 799 static int otx2_rss_ctx_delete(struct otx2_nic *pfvf, int ctx_id) 800 { 801 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 802 803 otx2_rss_ctx_flow_del(pfvf, ctx_id); 804 kfree(rss->rss_ctx[ctx_id]); 805 rss->rss_ctx[ctx_id] = NULL; 806 807 return 0; 808 } 809 810 static int otx2_rss_ctx_create(struct otx2_nic *pfvf, 811 u32 *rss_context) 812 { 813 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 814 u8 ctx; 815 816 for (ctx = 0; ctx < MAX_RSS_GROUPS; ctx++) { 817 if (!rss->rss_ctx[ctx]) 818 break; 819 } 820 if (ctx == MAX_RSS_GROUPS) 821 return -EINVAL; 822 823 rss->rss_ctx[ctx] = kzalloc(sizeof(*rss->rss_ctx[ctx]), GFP_KERNEL); 824 if (!rss->rss_ctx[ctx]) 825 return -ENOMEM; 826 *rss_context = ctx; 827 828 return 0; 829 } 830 831 /* Configure RSS table and hash key */ 832 static int otx2_set_rxfh(struct net_device *dev, 833 struct ethtool_rxfh_param *rxfh, 834 struct netlink_ext_ack *extack) 835 { 836 u32 rss_context = DEFAULT_RSS_CONTEXT_GROUP; 837 struct otx2_nic *pfvf = netdev_priv(dev); 838 struct otx2_rss_ctx *rss_ctx; 839 struct otx2_rss_info *rss; 840 int ret, idx; 841 842 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE && 843 rxfh->hfunc != ETH_RSS_HASH_TOP) 844 return -EOPNOTSUPP; 845 846 if (rxfh->rss_context) 847 rss_context = rxfh->rss_context; 848 849 if (rss_context != ETH_RXFH_CONTEXT_ALLOC && 850 rss_context >= MAX_RSS_GROUPS) 851 return -EINVAL; 852 853 rss = &pfvf->hw.rss_info; 854 855 if (!rss->enable) { 856 netdev_err(dev, "RSS is disabled, cannot change settings\n"); 857 return -EIO; 858 } 859 860 if (rxfh->key) { 861 memcpy(rss->key, rxfh->key, sizeof(rss->key)); 862 otx2_set_rss_key(pfvf); 863 } 864 if (rxfh->rss_delete) 865 return otx2_rss_ctx_delete(pfvf, rss_context); 866 867 if (rss_context == ETH_RXFH_CONTEXT_ALLOC) { 868 ret = otx2_rss_ctx_create(pfvf, &rss_context); 869 rxfh->rss_context = rss_context; 870 if (ret) 871 return ret; 872 } 873 if (rxfh->indir) { 874 rss_ctx = rss->rss_ctx[rss_context]; 875 for (idx = 0; idx < rss->rss_size; idx++) 876 rss_ctx->ind_tbl[idx] = rxfh->indir[idx]; 877 } 878 otx2_set_rss_table(pfvf, rss_context); 879 880 return 0; 881 } 882 883 /* Get RSS configuration */ 884 static int otx2_get_rxfh(struct net_device *dev, 885 struct ethtool_rxfh_param *rxfh) 886 { 887 u32 rss_context = DEFAULT_RSS_CONTEXT_GROUP; 888 struct otx2_nic *pfvf = netdev_priv(dev); 889 struct otx2_rss_ctx *rss_ctx; 890 struct otx2_rss_info *rss; 891 u32 *indir = rxfh->indir; 892 int idx, rx_queues; 893 894 rss = &pfvf->hw.rss_info; 895 896 rxfh->hfunc = ETH_RSS_HASH_TOP; 897 if (rxfh->rss_context) 898 rss_context = rxfh->rss_context; 899 900 if (!indir) 901 return 0; 902 903 if (!rss->enable && rss_context == DEFAULT_RSS_CONTEXT_GROUP) { 904 rx_queues = pfvf->hw.rx_queues; 905 for (idx = 0; idx < MAX_RSS_INDIR_TBL_SIZE; idx++) 906 indir[idx] = ethtool_rxfh_indir_default(idx, rx_queues); 907 return 0; 908 } 909 if (rss_context >= MAX_RSS_GROUPS) 910 return -ENOENT; 911 912 rss_ctx = rss->rss_ctx[rss_context]; 913 if (!rss_ctx) 914 return -ENOENT; 915 916 if (indir) { 917 for (idx = 0; idx < rss->rss_size; idx++) { 918 /* Ignore if the rx queue is AF_XDP zero copy enabled */ 919 if (test_bit(rss_ctx->ind_tbl[idx], pfvf->af_xdp_zc_qidx)) 920 continue; 921 indir[idx] = rss_ctx->ind_tbl[idx]; 922 } 923 } 924 if (rxfh->key) 925 memcpy(rxfh->key, rss->key, sizeof(rss->key)); 926 927 return 0; 928 } 929 930 static u32 otx2_get_msglevel(struct net_device *netdev) 931 { 932 struct otx2_nic *pfvf = netdev_priv(netdev); 933 934 return pfvf->msg_enable; 935 } 936 937 static void otx2_set_msglevel(struct net_device *netdev, u32 val) 938 { 939 struct otx2_nic *pfvf = netdev_priv(netdev); 940 941 pfvf->msg_enable = val; 942 } 943 944 static u32 otx2_get_link(struct net_device *netdev) 945 { 946 struct otx2_nic *pfvf = netdev_priv(netdev); 947 948 /* LBK and SDP links are internal and always UP */ 949 if (is_otx2_lbkvf(pfvf->pdev) || is_otx2_sdp_rep(pfvf->pdev)) 950 return 1; 951 return pfvf->linfo.link_up; 952 } 953 954 static int otx2_get_ts_info(struct net_device *netdev, 955 struct kernel_ethtool_ts_info *info) 956 { 957 struct otx2_nic *pfvf = netdev_priv(netdev); 958 959 if (!pfvf->ptp) 960 return ethtool_op_get_ts_info(netdev, info); 961 962 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 963 SOF_TIMESTAMPING_TX_HARDWARE | 964 SOF_TIMESTAMPING_RX_HARDWARE | 965 SOF_TIMESTAMPING_RAW_HARDWARE; 966 967 info->phc_index = otx2_ptp_clock_index(pfvf); 968 969 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 970 if (test_bit(CN10K_PTP_ONESTEP, &pfvf->hw.cap_flag)) 971 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC); 972 973 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 974 BIT(HWTSTAMP_FILTER_ALL); 975 976 return 0; 977 } 978 979 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf) 980 { 981 struct cgx_fw_data *rsp = NULL; 982 struct msg_req *req; 983 int err = 0; 984 985 mutex_lock(&pfvf->mbox.lock); 986 req = otx2_mbox_alloc_msg_cgx_get_aux_link_info(&pfvf->mbox); 987 if (!req) { 988 mutex_unlock(&pfvf->mbox.lock); 989 return ERR_PTR(-ENOMEM); 990 } 991 992 err = otx2_sync_mbox_msg(&pfvf->mbox); 993 if (!err) { 994 rsp = (struct cgx_fw_data *) 995 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr); 996 } else { 997 rsp = ERR_PTR(err); 998 } 999 1000 mutex_unlock(&pfvf->mbox.lock); 1001 return rsp; 1002 } 1003 1004 static int otx2_get_fecparam(struct net_device *netdev, 1005 struct ethtool_fecparam *fecparam) 1006 { 1007 struct otx2_nic *pfvf = netdev_priv(netdev); 1008 struct cgx_fw_data *rsp; 1009 const int fec[] = { 1010 ETHTOOL_FEC_OFF, 1011 ETHTOOL_FEC_BASER, 1012 ETHTOOL_FEC_RS, 1013 ETHTOOL_FEC_BASER | ETHTOOL_FEC_RS}; 1014 #define FEC_MAX_INDEX 4 1015 if (pfvf->linfo.fec < FEC_MAX_INDEX) 1016 fecparam->active_fec = fec[pfvf->linfo.fec]; 1017 1018 rsp = otx2_get_fwdata(pfvf); 1019 if (IS_ERR(rsp)) 1020 return PTR_ERR(rsp); 1021 1022 if (rsp->fwdata.supported_fec < FEC_MAX_INDEX) { 1023 if (!rsp->fwdata.supported_fec) 1024 fecparam->fec = ETHTOOL_FEC_NONE; 1025 else 1026 fecparam->fec = fec[rsp->fwdata.supported_fec]; 1027 } 1028 return 0; 1029 } 1030 1031 static int otx2_set_fecparam(struct net_device *netdev, 1032 struct ethtool_fecparam *fecparam) 1033 { 1034 struct otx2_nic *pfvf = netdev_priv(netdev); 1035 struct mbox *mbox = &pfvf->mbox; 1036 struct fec_mode *req, *rsp; 1037 int err = 0, fec = 0; 1038 1039 switch (fecparam->fec) { 1040 /* Firmware does not support AUTO mode consider it as FEC_OFF */ 1041 case ETHTOOL_FEC_OFF: 1042 case ETHTOOL_FEC_AUTO: 1043 fec = OTX2_FEC_OFF; 1044 break; 1045 case ETHTOOL_FEC_RS: 1046 fec = OTX2_FEC_RS; 1047 break; 1048 case ETHTOOL_FEC_BASER: 1049 fec = OTX2_FEC_BASER; 1050 break; 1051 default: 1052 netdev_warn(pfvf->netdev, "Unsupported FEC mode: %d", 1053 fecparam->fec); 1054 return -EINVAL; 1055 } 1056 1057 if (fec == pfvf->linfo.fec) 1058 return 0; 1059 1060 mutex_lock(&mbox->lock); 1061 req = otx2_mbox_alloc_msg_cgx_set_fec_param(&pfvf->mbox); 1062 if (!req) { 1063 err = -ENOMEM; 1064 goto end; 1065 } 1066 req->fec = fec; 1067 err = otx2_sync_mbox_msg(&pfvf->mbox); 1068 if (err) 1069 goto end; 1070 1071 rsp = (struct fec_mode *)otx2_mbox_get_rsp(&pfvf->mbox.mbox, 1072 0, &req->hdr); 1073 if (IS_ERR(rsp)) { 1074 err = PTR_ERR(rsp); 1075 goto end; 1076 } 1077 1078 if (rsp->fec >= 0) 1079 pfvf->linfo.fec = rsp->fec; 1080 else 1081 err = rsp->fec; 1082 end: 1083 mutex_unlock(&mbox->lock); 1084 return err; 1085 } 1086 1087 static void otx2_get_fec_info(u64 index, int req_mode, 1088 struct ethtool_link_ksettings *link_ksettings) 1089 { 1090 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, }; 1091 1092 switch (index) { 1093 case OTX2_FEC_NONE: 1094 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1095 otx2_fec_modes); 1096 break; 1097 case OTX2_FEC_BASER: 1098 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1099 otx2_fec_modes); 1100 break; 1101 case OTX2_FEC_RS: 1102 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1103 otx2_fec_modes); 1104 break; 1105 case OTX2_FEC_BASER | OTX2_FEC_RS: 1106 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1107 otx2_fec_modes); 1108 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1109 otx2_fec_modes); 1110 break; 1111 } 1112 1113 /* Add fec modes to existing modes */ 1114 if (req_mode == OTX2_MODE_ADVERTISED) 1115 linkmode_or(link_ksettings->link_modes.advertising, 1116 link_ksettings->link_modes.advertising, 1117 otx2_fec_modes); 1118 else 1119 linkmode_or(link_ksettings->link_modes.supported, 1120 link_ksettings->link_modes.supported, 1121 otx2_fec_modes); 1122 } 1123 1124 static void otx2_get_link_mode_info(u64 link_mode_bmap, 1125 bool req_mode, 1126 struct ethtool_link_ksettings 1127 *link_ksettings) 1128 { 1129 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, }; 1130 /* CGX link modes to Ethtool link mode mapping */ 1131 const int cgx_link_mode[CGX_MODE_MAX] = { 1132 0, /* SGMII 1000baseT */ 1133 ETHTOOL_LINK_MODE_1000baseX_Full_BIT, 1134 ETHTOOL_LINK_MODE_10000baseT_Full_BIT, 1135 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, 1136 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, 1137 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, 1138 0, 1139 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, 1140 0, 1141 0, 1142 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, 1143 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, 1144 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, 1145 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, 1146 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, 1147 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, 1148 0, 1149 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, 1150 0, 1151 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 1152 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, 1153 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, 1154 0, 1155 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, 1156 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 1157 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, 1158 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 1159 }; 1160 u8 bit; 1161 1162 for_each_set_bit(bit, (unsigned long *)&link_mode_bmap, ARRAY_SIZE(cgx_link_mode)) { 1163 if (bit == CGX_MODE_SGMII_10M_BIT) { 1164 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, otx2_link_modes); 1165 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, otx2_link_modes); 1166 } else if (bit == CGX_MODE_SGMII_100M_BIT) { 1167 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, otx2_link_modes); 1168 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, otx2_link_modes); 1169 } else if (bit == CGX_MODE_SGMII) { 1170 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, otx2_link_modes); 1171 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, otx2_link_modes); 1172 } else { 1173 linkmode_set_bit(cgx_link_mode[bit], otx2_link_modes); 1174 } 1175 } 1176 1177 if (req_mode == OTX2_MODE_ADVERTISED) 1178 linkmode_copy(link_ksettings->link_modes.advertising, 1179 otx2_link_modes); 1180 else 1181 linkmode_copy(link_ksettings->link_modes.supported, 1182 otx2_link_modes); 1183 } 1184 1185 static int otx2_get_link_ksettings(struct net_device *netdev, 1186 struct ethtool_link_ksettings *cmd) 1187 { 1188 struct otx2_nic *pfvf = netdev_priv(netdev); 1189 struct cgx_fw_data *rsp = NULL; 1190 1191 cmd->base.duplex = pfvf->linfo.full_duplex; 1192 cmd->base.speed = pfvf->linfo.speed; 1193 cmd->base.autoneg = pfvf->linfo.an; 1194 1195 rsp = otx2_get_fwdata(pfvf); 1196 if (IS_ERR(rsp)) 1197 return PTR_ERR(rsp); 1198 1199 if (rsp->fwdata.supported_an) 1200 ethtool_link_ksettings_add_link_mode(cmd, 1201 supported, 1202 Autoneg); 1203 1204 otx2_get_link_mode_info(rsp->fwdata.advertised_link_modes, 1205 OTX2_MODE_ADVERTISED, cmd); 1206 otx2_get_fec_info(rsp->fwdata.advertised_fec, 1207 OTX2_MODE_ADVERTISED, cmd); 1208 otx2_get_link_mode_info(rsp->fwdata.supported_link_modes, 1209 OTX2_MODE_SUPPORTED, cmd); 1210 otx2_get_fec_info(rsp->fwdata.supported_fec, 1211 OTX2_MODE_SUPPORTED, cmd); 1212 return 0; 1213 } 1214 1215 static int otx2_set_link_ksettings(struct net_device *netdev, 1216 const struct ethtool_link_ksettings *cmd) 1217 { 1218 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 1219 struct otx2_nic *pf = netdev_priv(netdev); 1220 struct ethtool_link_ksettings cur_ks; 1221 struct cgx_set_link_mode_req *req; 1222 struct mbox *mbox = &pf->mbox; 1223 int err = 0; 1224 1225 memset(&cur_ks, 0, sizeof(struct ethtool_link_ksettings)); 1226 1227 if (!ethtool_validate_speed(cmd->base.speed) || 1228 !ethtool_validate_duplex(cmd->base.duplex)) 1229 return -EINVAL; 1230 1231 if (cmd->base.autoneg != AUTONEG_ENABLE && 1232 cmd->base.autoneg != AUTONEG_DISABLE) 1233 return -EINVAL; 1234 1235 otx2_get_link_ksettings(netdev, &cur_ks); 1236 1237 /* Check requested modes against supported modes by hardware */ 1238 if (!linkmode_subset(cmd->link_modes.advertising, 1239 cur_ks.link_modes.supported)) 1240 return -EINVAL; 1241 1242 mutex_lock(&mbox->lock); 1243 req = otx2_mbox_alloc_msg_cgx_set_link_mode(&pf->mbox); 1244 if (!req) { 1245 err = -ENOMEM; 1246 goto end; 1247 } 1248 1249 req->args.speed = cmd->base.speed; 1250 /* firmware expects 1 for half duplex and 0 for full duplex 1251 * hence inverting 1252 */ 1253 req->args.duplex = cmd->base.duplex ^ 0x1; 1254 req->args.an = cmd->base.autoneg; 1255 /* Mask unsupported modes and send message to AF */ 1256 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, mask); 1257 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, mask); 1258 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, mask); 1259 1260 linkmode_copy(req->args.advertising, 1261 cmd->link_modes.advertising); 1262 linkmode_andnot(req->args.advertising, 1263 req->args.advertising, mask); 1264 1265 /* inform AF that we need parse this differently */ 1266 if (bitmap_weight(req->args.advertising, 1267 __ETHTOOL_LINK_MODE_MASK_NBITS) >= 2) 1268 req->args.multimode = true; 1269 1270 err = otx2_sync_mbox_msg(&pf->mbox); 1271 end: 1272 mutex_unlock(&mbox->lock); 1273 return err; 1274 } 1275 1276 static void otx2_get_fec_stats(struct net_device *netdev, 1277 struct ethtool_fec_stats *fec_stats) 1278 { 1279 struct otx2_nic *pfvf = netdev_priv(netdev); 1280 struct cgx_fw_data *rsp; 1281 1282 otx2_update_lmac_fec_stats(pfvf); 1283 1284 /* Report MAC FEC stats */ 1285 fec_stats->corrected_blocks.total = pfvf->hw.cgx_fec_corr_blks; 1286 fec_stats->uncorrectable_blocks.total = pfvf->hw.cgx_fec_uncorr_blks; 1287 1288 rsp = otx2_get_fwdata(pfvf); 1289 if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats && 1290 !otx2_get_phy_fec_stats(pfvf)) { 1291 /* Fetch fwdata again because it's been recently populated with 1292 * latest PHY FEC stats. 1293 */ 1294 rsp = otx2_get_fwdata(pfvf); 1295 if (!IS_ERR(rsp)) { 1296 struct fec_stats_s *p = &rsp->fwdata.phy.fec_stats; 1297 1298 if (pfvf->linfo.fec == OTX2_FEC_BASER) { 1299 fec_stats->corrected_blocks.total = p->brfec_corr_blks; 1300 fec_stats->uncorrectable_blocks.total = p->brfec_uncorr_blks; 1301 } else { 1302 fec_stats->corrected_blocks.total = p->rsfec_corr_cws; 1303 fec_stats->uncorrectable_blocks.total = p->rsfec_uncorr_cws; 1304 } 1305 } 1306 } 1307 } 1308 1309 static const struct ethtool_ops otx2_ethtool_ops = { 1310 .cap_rss_ctx_supported = true, 1311 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1312 ETHTOOL_COALESCE_MAX_FRAMES | 1313 ETHTOOL_COALESCE_USE_ADAPTIVE, 1314 .supported_ring_params = ETHTOOL_RING_USE_RX_BUF_LEN | 1315 ETHTOOL_RING_USE_CQE_SIZE, 1316 .get_link = otx2_get_link, 1317 .get_drvinfo = otx2_get_drvinfo, 1318 .get_strings = otx2_get_strings, 1319 .get_ethtool_stats = otx2_get_ethtool_stats, 1320 .get_sset_count = otx2_get_sset_count, 1321 .set_channels = otx2_set_channels, 1322 .get_channels = otx2_get_channels, 1323 .get_ringparam = otx2_get_ringparam, 1324 .set_ringparam = otx2_set_ringparam, 1325 .get_coalesce = otx2_get_coalesce, 1326 .set_coalesce = otx2_set_coalesce, 1327 .get_rxnfc = otx2_get_rxnfc, 1328 .set_rxnfc = otx2_set_rxnfc, 1329 .get_rxfh_key_size = otx2_get_rxfh_key_size, 1330 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 1331 .get_rxfh = otx2_get_rxfh, 1332 .set_rxfh = otx2_set_rxfh, 1333 .get_rxfh_fields = otx2_get_rss_hash_opts, 1334 .set_rxfh_fields = otx2_set_rss_hash_opts, 1335 .get_msglevel = otx2_get_msglevel, 1336 .set_msglevel = otx2_set_msglevel, 1337 .get_pauseparam = otx2_get_pauseparam, 1338 .set_pauseparam = otx2_set_pauseparam, 1339 .get_ts_info = otx2_get_ts_info, 1340 .get_fec_stats = otx2_get_fec_stats, 1341 .get_fecparam = otx2_get_fecparam, 1342 .set_fecparam = otx2_set_fecparam, 1343 .get_link_ksettings = otx2_get_link_ksettings, 1344 .set_link_ksettings = otx2_set_link_ksettings, 1345 }; 1346 1347 void otx2_set_ethtool_ops(struct net_device *netdev) 1348 { 1349 netdev->ethtool_ops = &otx2_ethtool_ops; 1350 } 1351 1352 /* VF's ethtool APIs */ 1353 static void otx2vf_get_drvinfo(struct net_device *netdev, 1354 struct ethtool_drvinfo *info) 1355 { 1356 struct otx2_nic *vf = netdev_priv(netdev); 1357 1358 strscpy(info->driver, DRV_VF_NAME, sizeof(info->driver)); 1359 strscpy(info->bus_info, pci_name(vf->pdev), sizeof(info->bus_info)); 1360 } 1361 1362 static void otx2vf_get_strings(struct net_device *netdev, u32 sset, u8 *data) 1363 { 1364 struct otx2_nic *vf = netdev_priv(netdev); 1365 int stats; 1366 1367 if (sset != ETH_SS_STATS) 1368 return; 1369 1370 for (stats = 0; stats < otx2_n_dev_stats; stats++) 1371 ethtool_puts(&data, otx2_dev_stats[stats].name); 1372 1373 for (stats = 0; stats < otx2_n_drv_stats; stats++) 1374 ethtool_puts(&data, otx2_drv_stats[stats].name); 1375 1376 otx2_get_qset_strings(vf, &data, 0); 1377 1378 ethtool_puts(&data, "reset_count"); 1379 } 1380 1381 static void otx2vf_get_ethtool_stats(struct net_device *netdev, 1382 struct ethtool_stats *stats, u64 *data) 1383 { 1384 struct otx2_nic *vf = netdev_priv(netdev); 1385 int stat; 1386 1387 otx2_get_dev_stats(vf); 1388 for (stat = 0; stat < otx2_n_dev_stats; stat++) 1389 *(data++) = ((u64 *)&vf->hw.dev_stats) 1390 [otx2_dev_stats[stat].index]; 1391 1392 for (stat = 0; stat < otx2_n_drv_stats; stat++) 1393 *(data++) = atomic_read(&((atomic_t *)&vf->hw.drv_stats) 1394 [otx2_drv_stats[stat].index]); 1395 1396 otx2_get_qset_stats(vf, stats, &data); 1397 *(data++) = vf->reset_count; 1398 } 1399 1400 static int otx2vf_get_sset_count(struct net_device *netdev, int sset) 1401 { 1402 struct otx2_nic *vf = netdev_priv(netdev); 1403 int qstats_count; 1404 1405 if (sset != ETH_SS_STATS) 1406 return -EINVAL; 1407 1408 qstats_count = otx2_n_queue_stats * 1409 (vf->hw.rx_queues + otx2_get_total_tx_queues(vf)); 1410 1411 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 1; 1412 } 1413 1414 static int otx2vf_get_link_ksettings(struct net_device *netdev, 1415 struct ethtool_link_ksettings *cmd) 1416 { 1417 struct otx2_nic *pfvf = netdev_priv(netdev); 1418 1419 if (is_otx2_lbkvf(pfvf->pdev) || is_otx2_sdp_rep(pfvf->pdev)) { 1420 cmd->base.duplex = DUPLEX_FULL; 1421 cmd->base.speed = SPEED_100000; 1422 } else { 1423 return otx2_get_link_ksettings(netdev, cmd); 1424 } 1425 return 0; 1426 } 1427 1428 static const struct ethtool_ops otx2vf_ethtool_ops = { 1429 .cap_rss_ctx_supported = true, 1430 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1431 ETHTOOL_COALESCE_MAX_FRAMES | 1432 ETHTOOL_COALESCE_USE_ADAPTIVE, 1433 .supported_ring_params = ETHTOOL_RING_USE_RX_BUF_LEN | 1434 ETHTOOL_RING_USE_CQE_SIZE, 1435 .get_link = otx2_get_link, 1436 .get_drvinfo = otx2vf_get_drvinfo, 1437 .get_strings = otx2vf_get_strings, 1438 .get_ethtool_stats = otx2vf_get_ethtool_stats, 1439 .get_sset_count = otx2vf_get_sset_count, 1440 .set_channels = otx2_set_channels, 1441 .get_channels = otx2_get_channels, 1442 .get_rxnfc = otx2_get_rxnfc, 1443 .set_rxnfc = otx2_set_rxnfc, 1444 .get_rxfh_key_size = otx2_get_rxfh_key_size, 1445 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 1446 .get_rxfh = otx2_get_rxfh, 1447 .set_rxfh = otx2_set_rxfh, 1448 .get_rxfh_fields = otx2_get_rss_hash_opts, 1449 .set_rxfh_fields = otx2_set_rss_hash_opts, 1450 .get_ringparam = otx2_get_ringparam, 1451 .set_ringparam = otx2_set_ringparam, 1452 .get_coalesce = otx2_get_coalesce, 1453 .set_coalesce = otx2_set_coalesce, 1454 .get_msglevel = otx2_get_msglevel, 1455 .set_msglevel = otx2_set_msglevel, 1456 .get_pauseparam = otx2_get_pauseparam, 1457 .set_pauseparam = otx2_set_pauseparam, 1458 .get_link_ksettings = otx2vf_get_link_ksettings, 1459 .get_ts_info = otx2_get_ts_info, 1460 }; 1461 1462 void otx2vf_set_ethtool_ops(struct net_device *netdev) 1463 { 1464 netdev->ethtool_ops = &otx2vf_ethtool_ops; 1465 } 1466 EXPORT_SYMBOL(otx2vf_set_ethtool_ops); 1467