1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Marvell RVU Admin Function driver 3 * 4 * Copyright (C) 2018 Marvell. 5 * 6 */ 7 8 #ifndef NPC_H 9 #define NPC_H 10 11 #define NPC_KEX_CHAN_MASK 0xFFFULL 12 13 enum NPC_LID_E { 14 NPC_LID_LA = 0, 15 NPC_LID_LB, 16 NPC_LID_LC, 17 NPC_LID_LD, 18 NPC_LID_LE, 19 NPC_LID_LF, 20 NPC_LID_LG, 21 NPC_LID_LH, 22 }; 23 24 #define NPC_LT_NA 0 25 26 enum npc_kpu_la_ltype { 27 NPC_LT_LA_8023 = 1, 28 NPC_LT_LA_ETHER, 29 NPC_LT_LA_IH_NIX_ETHER, 30 NPC_LT_LA_HIGIG2_ETHER = 7, 31 NPC_LT_LA_IH_NIX_HIGIG2_ETHER, 32 NPC_LT_LA_CUSTOM_L2_90B_ETHER, 33 NPC_LT_LA_CPT_HDR, 34 NPC_LT_LA_CUSTOM_L2_24B_ETHER, 35 NPC_LT_LA_CUSTOM_PRE_L2_ETHER, 36 NPC_LT_LA_CUSTOM0 = 0xE, 37 NPC_LT_LA_CUSTOM1 = 0xF, 38 }; 39 40 enum npc_kpu_lb_ltype { 41 NPC_LT_LB_ETAG = 1, 42 NPC_LT_LB_CTAG, 43 NPC_LT_LB_STAG_QINQ, 44 NPC_LT_LB_BTAG, 45 NPC_LT_LB_PPPOE, 46 NPC_LT_LB_DSA, 47 NPC_LT_LB_DSA_VLAN, 48 NPC_LT_LB_EDSA, 49 NPC_LT_LB_EDSA_VLAN, 50 NPC_LT_LB_EXDSA, 51 NPC_LT_LB_EXDSA_VLAN, 52 NPC_LT_LB_FDSA, 53 NPC_LT_LB_VLAN_EXDSA, 54 NPC_LT_LB_CUSTOM0 = 0xE, 55 NPC_LT_LB_CUSTOM1 = 0xF, 56 }; 57 58 enum npc_kpu_lc_ltype { 59 NPC_LT_LC_IP = 1, 60 NPC_LT_LC_IP_OPT, 61 NPC_LT_LC_IP6, 62 NPC_LT_LC_IP6_EXT, 63 NPC_LT_LC_ARP, 64 NPC_LT_LC_RARP, 65 NPC_LT_LC_MPLS, 66 NPC_LT_LC_NSH, 67 NPC_LT_LC_PTP, 68 NPC_LT_LC_FCOE, 69 NPC_LT_LC_NGIO, 70 NPC_LT_LC_CUSTOM0 = 0xE, 71 NPC_LT_LC_CUSTOM1 = 0xF, 72 }; 73 74 /* Don't modify Ltypes upto SCTP, otherwise it will 75 * effect flow tag calculation and thus RSS. 76 */ 77 enum npc_kpu_ld_ltype { 78 NPC_LT_LD_TCP = 1, 79 NPC_LT_LD_UDP, 80 NPC_LT_LD_ICMP, 81 NPC_LT_LD_SCTP, 82 NPC_LT_LD_ICMP6, 83 NPC_LT_LD_CUSTOM0, 84 NPC_LT_LD_CUSTOM1, 85 NPC_LT_LD_IGMP = 8, 86 NPC_LT_LD_AH, 87 NPC_LT_LD_GRE, 88 NPC_LT_LD_NVGRE, 89 NPC_LT_LD_NSH, 90 NPC_LT_LD_TU_MPLS_IN_NSH, 91 NPC_LT_LD_TU_MPLS_IN_IP, 92 }; 93 94 enum npc_kpu_le_ltype { 95 NPC_LT_LE_VXLAN = 1, 96 NPC_LT_LE_GENEVE, 97 NPC_LT_LE_ESP, 98 NPC_LT_LE_GTPU = 4, 99 NPC_LT_LE_VXLANGPE, 100 NPC_LT_LE_GTPC, 101 NPC_LT_LE_NSH, 102 NPC_LT_LE_TU_MPLS_IN_GRE, 103 NPC_LT_LE_TU_NSH_IN_GRE, 104 NPC_LT_LE_TU_MPLS_IN_UDP, 105 NPC_LT_LE_CUSTOM0 = 0xE, 106 NPC_LT_LE_CUSTOM1 = 0xF, 107 }; 108 109 enum npc_kpu_lf_ltype { 110 NPC_LT_LF_TU_ETHER = 1, 111 NPC_LT_LF_TU_PPP, 112 NPC_LT_LF_TU_MPLS_IN_VXLANGPE, 113 NPC_LT_LF_TU_NSH_IN_VXLANGPE, 114 NPC_LT_LF_TU_MPLS_IN_NSH, 115 NPC_LT_LF_TU_3RD_NSH, 116 NPC_LT_LF_CUSTOM0 = 0xE, 117 NPC_LT_LF_CUSTOM1 = 0xF, 118 }; 119 120 enum npc_kpu_lg_ltype { 121 NPC_LT_LG_TU_IP = 1, 122 NPC_LT_LG_TU_IP6, 123 NPC_LT_LG_TU_ARP, 124 NPC_LT_LG_TU_ETHER_IN_NSH, 125 NPC_LT_LG_CUSTOM0 = 0xE, 126 NPC_LT_LG_CUSTOM1 = 0xF, 127 }; 128 129 /* Don't modify Ltypes upto SCTP, otherwise it will 130 * effect flow tag calculation and thus RSS. 131 */ 132 enum npc_kpu_lh_ltype { 133 NPC_LT_LH_TU_TCP = 1, 134 NPC_LT_LH_TU_UDP, 135 NPC_LT_LH_TU_ICMP, 136 NPC_LT_LH_TU_SCTP, 137 NPC_LT_LH_TU_ICMP6, 138 NPC_LT_LH_TU_IGMP = 8, 139 NPC_LT_LH_TU_ESP, 140 NPC_LT_LH_TU_AH, 141 NPC_LT_LH_CUSTOM0 = 0xE, 142 NPC_LT_LH_CUSTOM1 = 0xF, 143 }; 144 145 /* NPC port kind defines how the incoming or outgoing packets 146 * are processed. NPC accepts packets from up to 64 pkinds. 147 * Software assigns pkind for each incoming port such as CGX 148 * Ethernet interfaces, LBK interfaces, etc. 149 */ 150 #define NPC_UNRESERVED_PKIND_COUNT NPC_RX_CUSTOM_PRE_L2_PKIND 151 152 enum npc_pkind_type { 153 NPC_RX_LBK_PKIND = 0ULL, 154 NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL, 155 NPC_RX_VLAN_EXDSA_PKIND = 56ULL, 156 NPC_RX_CHLEN24B_PKIND = 57ULL, 157 NPC_RX_CPT_HDR_PKIND, 158 NPC_RX_CHLEN90B_PKIND, 159 NPC_TX_HIGIG_PKIND, 160 NPC_RX_HIGIG_PKIND, 161 NPC_RX_EDSA_PKIND, 162 NPC_TX_DEF_PKIND, /* NIX-TX PKIND */ 163 }; 164 165 enum npc_interface_type { 166 NPC_INTF_MODE_DEF, 167 }; 168 169 /* list of known and supported fields in packet header and 170 * fields present in key structure. 171 */ 172 enum key_fields { 173 NPC_DMAC, 174 NPC_SMAC, 175 NPC_ETYPE, 176 NPC_VLAN_ETYPE_CTAG, /* 0x8100 */ 177 NPC_VLAN_ETYPE_STAG, /* 0x88A8 */ 178 NPC_OUTER_VID, 179 NPC_TOS, 180 NPC_SIP_IPV4, 181 NPC_DIP_IPV4, 182 NPC_SIP_IPV6, 183 NPC_DIP_IPV6, 184 NPC_IPPROTO_TCP, 185 NPC_IPPROTO_UDP, 186 NPC_IPPROTO_SCTP, 187 NPC_IPPROTO_AH, 188 NPC_IPPROTO_ESP, 189 NPC_IPPROTO_ICMP, 190 NPC_IPPROTO_ICMP6, 191 NPC_SPORT_TCP, 192 NPC_DPORT_TCP, 193 NPC_SPORT_UDP, 194 NPC_DPORT_UDP, 195 NPC_SPORT_SCTP, 196 NPC_DPORT_SCTP, 197 NPC_HEADER_FIELDS_MAX, 198 NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */ 199 NPC_PF_FUNC, /* Valid when Tx */ 200 NPC_ERRLEV, 201 NPC_ERRCODE, 202 NPC_LXMB, 203 NPC_LA, 204 NPC_LB, 205 NPC_LC, 206 NPC_LD, 207 NPC_LE, 208 NPC_LF, 209 NPC_LG, 210 NPC_LH, 211 /* Ethertype for untagged frame */ 212 NPC_ETYPE_ETHER, 213 /* Ethertype for single tagged frame */ 214 NPC_ETYPE_TAG1, 215 /* Ethertype for double tagged frame */ 216 NPC_ETYPE_TAG2, 217 /* outer vlan tci for single tagged frame */ 218 NPC_VLAN_TAG1, 219 /* outer vlan tci for double tagged frame */ 220 NPC_VLAN_TAG2, 221 /* other header fields programmed to extract but not of our interest */ 222 NPC_UNKNOWN, 223 NPC_KEY_FIELDS_MAX, 224 }; 225 226 struct npc_kpu_profile_cam { 227 u8 state; 228 u8 state_mask; 229 u16 dp0; 230 u16 dp0_mask; 231 u16 dp1; 232 u16 dp1_mask; 233 u16 dp2; 234 u16 dp2_mask; 235 } __packed; 236 237 struct npc_kpu_profile_action { 238 u8 errlev; 239 u8 errcode; 240 u8 dp0_offset; 241 u8 dp1_offset; 242 u8 dp2_offset; 243 u8 bypass_count; 244 u8 parse_done; 245 u8 next_state; 246 u8 ptr_advance; 247 u8 cap_ena; 248 u8 lid; 249 u8 ltype; 250 u8 flags; 251 u8 offset; 252 u8 mask; 253 u8 right; 254 u8 shift; 255 } __packed; 256 257 struct npc_kpu_profile { 258 int cam_entries; 259 int action_entries; 260 struct npc_kpu_profile_cam *cam; 261 struct npc_kpu_profile_action *action; 262 }; 263 264 /* NPC KPU register formats */ 265 struct npc_kpu_cam { 266 #if defined(__BIG_ENDIAN_BITFIELD) 267 u64 rsvd_63_56 : 8; 268 u64 state : 8; 269 u64 dp2_data : 16; 270 u64 dp1_data : 16; 271 u64 dp0_data : 16; 272 #else 273 u64 dp0_data : 16; 274 u64 dp1_data : 16; 275 u64 dp2_data : 16; 276 u64 state : 8; 277 u64 rsvd_63_56 : 8; 278 #endif 279 }; 280 281 struct npc_kpu_action0 { 282 #if defined(__BIG_ENDIAN_BITFIELD) 283 u64 rsvd_63_57 : 7; 284 u64 byp_count : 3; 285 u64 capture_ena : 1; 286 u64 parse_done : 1; 287 u64 next_state : 8; 288 u64 rsvd_43 : 1; 289 u64 capture_lid : 3; 290 u64 capture_ltype : 4; 291 u64 capture_flags : 8; 292 u64 ptr_advance : 8; 293 u64 var_len_offset : 8; 294 u64 var_len_mask : 8; 295 u64 var_len_right : 1; 296 u64 var_len_shift : 3; 297 #else 298 u64 var_len_shift : 3; 299 u64 var_len_right : 1; 300 u64 var_len_mask : 8; 301 u64 var_len_offset : 8; 302 u64 ptr_advance : 8; 303 u64 capture_flags : 8; 304 u64 capture_ltype : 4; 305 u64 capture_lid : 3; 306 u64 rsvd_43 : 1; 307 u64 next_state : 8; 308 u64 parse_done : 1; 309 u64 capture_ena : 1; 310 u64 byp_count : 3; 311 u64 rsvd_63_57 : 7; 312 #endif 313 }; 314 315 struct npc_kpu_action1 { 316 #if defined(__BIG_ENDIAN_BITFIELD) 317 u64 rsvd_63_36 : 28; 318 u64 errlev : 4; 319 u64 errcode : 8; 320 u64 dp2_offset : 8; 321 u64 dp1_offset : 8; 322 u64 dp0_offset : 8; 323 #else 324 u64 dp0_offset : 8; 325 u64 dp1_offset : 8; 326 u64 dp2_offset : 8; 327 u64 errcode : 8; 328 u64 errlev : 4; 329 u64 rsvd_63_36 : 28; 330 #endif 331 }; 332 333 struct npc_kpu_pkind_cpi_def { 334 #if defined(__BIG_ENDIAN_BITFIELD) 335 u64 ena : 1; 336 u64 rsvd_62_59 : 4; 337 u64 lid : 3; 338 u64 ltype_match : 4; 339 u64 ltype_mask : 4; 340 u64 flags_match : 8; 341 u64 flags_mask : 8; 342 u64 add_offset : 8; 343 u64 add_mask : 8; 344 u64 rsvd_15 : 1; 345 u64 add_shift : 3; 346 u64 rsvd_11_10 : 2; 347 u64 cpi_base : 10; 348 #else 349 u64 cpi_base : 10; 350 u64 rsvd_11_10 : 2; 351 u64 add_shift : 3; 352 u64 rsvd_15 : 1; 353 u64 add_mask : 8; 354 u64 add_offset : 8; 355 u64 flags_mask : 8; 356 u64 flags_match : 8; 357 u64 ltype_mask : 4; 358 u64 ltype_match : 4; 359 u64 lid : 3; 360 u64 rsvd_62_59 : 4; 361 u64 ena : 1; 362 #endif 363 }; 364 365 struct nix_rx_action { 366 #if defined(__BIG_ENDIAN_BITFIELD) 367 u64 rsvd_63_61 :3; 368 u64 flow_key_alg :5; 369 u64 match_id :16; 370 u64 index :20; 371 u64 pf_func :16; 372 u64 op :4; 373 #else 374 u64 op :4; 375 u64 pf_func :16; 376 u64 index :20; 377 u64 match_id :16; 378 u64 flow_key_alg :5; 379 u64 rsvd_63_61 :3; 380 #endif 381 }; 382 383 /* NPC_AF_INTFX_KEX_CFG field masks */ 384 #define NPC_PARSE_NIBBLE GENMASK_ULL(30, 0) 385 386 /* NPC_PARSE_KEX_S nibble definitions for each field */ 387 #define NPC_PARSE_NIBBLE_CHAN GENMASK_ULL(2, 0) 388 #define NPC_PARSE_NIBBLE_ERRLEV BIT_ULL(3) 389 #define NPC_PARSE_NIBBLE_ERRCODE GENMASK_ULL(5, 4) 390 #define NPC_PARSE_NIBBLE_L2L3_BCAST BIT_ULL(6) 391 #define NPC_PARSE_NIBBLE_LA_FLAGS GENMASK_ULL(8, 7) 392 #define NPC_PARSE_NIBBLE_LA_LTYPE BIT_ULL(9) 393 #define NPC_PARSE_NIBBLE_LB_FLAGS GENMASK_ULL(11, 10) 394 #define NPC_PARSE_NIBBLE_LB_LTYPE BIT_ULL(12) 395 #define NPC_PARSE_NIBBLE_LC_FLAGS GENMASK_ULL(14, 13) 396 #define NPC_PARSE_NIBBLE_LC_LTYPE BIT_ULL(15) 397 #define NPC_PARSE_NIBBLE_LD_FLAGS GENMASK_ULL(17, 16) 398 #define NPC_PARSE_NIBBLE_LD_LTYPE BIT_ULL(18) 399 #define NPC_PARSE_NIBBLE_LE_FLAGS GENMASK_ULL(20, 19) 400 #define NPC_PARSE_NIBBLE_LE_LTYPE BIT_ULL(21) 401 #define NPC_PARSE_NIBBLE_LF_FLAGS GENMASK_ULL(23, 22) 402 #define NPC_PARSE_NIBBLE_LF_LTYPE BIT_ULL(24) 403 #define NPC_PARSE_NIBBLE_LG_FLAGS GENMASK_ULL(26, 25) 404 #define NPC_PARSE_NIBBLE_LG_LTYPE BIT_ULL(27) 405 #define NPC_PARSE_NIBBLE_LH_FLAGS GENMASK_ULL(29, 28) 406 #define NPC_PARSE_NIBBLE_LH_LTYPE BIT_ULL(30) 407 408 struct nix_tx_action { 409 #if defined(__BIG_ENDIAN_BITFIELD) 410 u64 rsvd_63_48 :16; 411 u64 match_id :16; 412 u64 index :20; 413 u64 rsvd_11_8 :8; 414 u64 op :4; 415 #else 416 u64 op :4; 417 u64 rsvd_11_8 :8; 418 u64 index :20; 419 u64 match_id :16; 420 u64 rsvd_63_48 :16; 421 #endif 422 }; 423 424 /* NIX Receive Vtag Action Structure */ 425 #define RX_VTAG0_VALID_BIT BIT_ULL(15) 426 #define RX_VTAG0_TYPE_MASK GENMASK_ULL(14, 12) 427 #define RX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 428 #define RX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 429 #define RX_VTAG1_VALID_BIT BIT_ULL(47) 430 #define RX_VTAG1_TYPE_MASK GENMASK_ULL(46, 44) 431 #define RX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 432 #define RX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 433 434 /* NIX Transmit Vtag Action Structure */ 435 #define TX_VTAG0_DEF_MASK GENMASK_ULL(25, 16) 436 #define TX_VTAG0_OP_MASK GENMASK_ULL(13, 12) 437 #define TX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 438 #define TX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 439 #define TX_VTAG1_DEF_MASK GENMASK_ULL(57, 48) 440 #define TX_VTAG1_OP_MASK GENMASK_ULL(45, 44) 441 #define TX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 442 #define TX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 443 444 /* NPC MCAM reserved entry index per nixlf */ 445 #define NIXLF_UCAST_ENTRY 0 446 #define NIXLF_BCAST_ENTRY 1 447 #define NIXLF_ALLMULTI_ENTRY 2 448 #define NIXLF_PROMISC_ENTRY 3 449 450 struct npc_coalesced_kpu_prfl { 451 #define NPC_SIGN 0x00666f727063706e 452 #define NPC_PRFL_NAME "npc_prfls_array" 453 #define NPC_NAME_LEN 32 454 __le64 signature; /* "npcprof\0" (8 bytes/ASCII characters) */ 455 u8 name[NPC_NAME_LEN]; /* KPU Profile name */ 456 u64 version; /* KPU firmware/profile version */ 457 u8 num_prfl; /* No of NPC profiles. */ 458 u16 prfl_sz[]; 459 }; 460 461 struct npc_mcam_kex { 462 /* MKEX Profle Header */ 463 u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */ 464 u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */ 465 u64 cpu_model; /* Format as profiled by CPU hardware */ 466 u64 kpu_version; /* KPU firmware/profile version */ 467 u64 reserved; /* Reserved for extension */ 468 469 /* MKEX Profle Data */ 470 u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */ 471 /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */ 472 u64 kex_ld_flags[NPC_MAX_LD]; 473 /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */ 474 u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD]; 475 /* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */ 476 u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL]; 477 } __packed; 478 479 struct npc_kpu_fwdata { 480 int entries; 481 /* What follows is: 482 * struct npc_kpu_profile_cam[entries]; 483 * struct npc_kpu_profile_action[entries]; 484 */ 485 u8 data[]; 486 } __packed; 487 488 struct npc_lt_def { 489 u8 ltype_mask; 490 u8 ltype_match; 491 u8 lid; 492 }; 493 494 struct npc_lt_def_ipsec { 495 u8 ltype_mask; 496 u8 ltype_match; 497 u8 lid; 498 u8 spi_offset; 499 u8 spi_nz; 500 }; 501 502 struct npc_lt_def_apad { 503 u8 ltype_mask; 504 u8 ltype_match; 505 u8 lid; 506 u8 valid; 507 } __packed; 508 509 struct npc_lt_def_color { 510 u8 ltype_mask; 511 u8 ltype_match; 512 u8 lid; 513 u8 noffset; 514 u8 offset; 515 } __packed; 516 517 struct npc_lt_def_et { 518 u8 ltype_mask; 519 u8 ltype_match; 520 u8 lid; 521 u8 valid; 522 u8 offset; 523 } __packed; 524 525 struct npc_lt_def_cfg { 526 struct npc_lt_def rx_ol2; 527 struct npc_lt_def rx_oip4; 528 struct npc_lt_def rx_iip4; 529 struct npc_lt_def rx_oip6; 530 struct npc_lt_def rx_iip6; 531 struct npc_lt_def rx_otcp; 532 struct npc_lt_def rx_itcp; 533 struct npc_lt_def rx_oudp; 534 struct npc_lt_def rx_iudp; 535 struct npc_lt_def rx_osctp; 536 struct npc_lt_def rx_isctp; 537 struct npc_lt_def_ipsec rx_ipsec[2]; 538 struct npc_lt_def pck_ol2; 539 struct npc_lt_def pck_oip4; 540 struct npc_lt_def pck_oip6; 541 struct npc_lt_def pck_iip4; 542 struct npc_lt_def_apad rx_apad0; 543 struct npc_lt_def_apad rx_apad1; 544 struct npc_lt_def_color ovlan; 545 struct npc_lt_def_color ivlan; 546 struct npc_lt_def_color rx_gen0_color; 547 struct npc_lt_def_color rx_gen1_color; 548 struct npc_lt_def_et rx_et[2]; 549 } __packed; 550 551 /* Loadable KPU profile firmware data */ 552 struct npc_kpu_profile_fwdata { 553 #define KPU_SIGN 0x00666f727075706b 554 #define KPU_NAME_LEN 32 555 /** Maximum number of custom KPU entries supported by the built-in profile. */ 556 #define KPU_MAX_CST_ENT 6 557 /* KPU Profle Header */ 558 __le64 signature; /* "kpuprof\0" (8 bytes/ASCII characters) */ 559 u8 name[KPU_NAME_LEN]; /* KPU Profile name */ 560 __le64 version; /* KPU profile version */ 561 u8 kpus; 562 u8 reserved[7]; 563 564 /* Default MKEX profile to be used with this KPU profile. May be 565 * overridden with mkex_profile module parameter. Format is same as for 566 * the MKEX profile to streamline processing. 567 */ 568 struct npc_mcam_kex mkex; 569 /* LTYPE values for specific HW offloaded protocols. */ 570 struct npc_lt_def_cfg lt_def; 571 /* Dynamically sized data: 572 * Custom KPU CAM and ACTION configuration entries. 573 * struct npc_kpu_fwdata kpu[kpus]; 574 */ 575 u8 data[]; 576 } __packed; 577 578 struct rvu_npc_mcam_rule { 579 struct flow_msg packet; 580 struct flow_msg mask; 581 u8 intf; 582 union { 583 struct nix_tx_action tx_action; 584 struct nix_rx_action rx_action; 585 }; 586 u64 vtag_action; 587 struct list_head list; 588 u64 features; 589 u16 owner; 590 u16 entry; 591 u16 cntr; 592 bool has_cntr; 593 u8 default_rule; 594 bool enable; 595 bool vfvlan_cfg; 596 u16 chan; 597 u16 chan_mask; 598 }; 599 600 #endif /* NPC_H */ 601