1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Marvell OcteonTx2 RVU Admin Function driver 3 * 4 * Copyright (C) 2018 Marvell International Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #ifndef NPC_H 12 #define NPC_H 13 14 enum NPC_LID_E { 15 NPC_LID_LA = 0, 16 NPC_LID_LB, 17 NPC_LID_LC, 18 NPC_LID_LD, 19 NPC_LID_LE, 20 NPC_LID_LF, 21 NPC_LID_LG, 22 NPC_LID_LH, 23 }; 24 25 #define NPC_LT_NA 0 26 27 enum npc_kpu_la_ltype { 28 NPC_LT_LA_8023 = 1, 29 NPC_LT_LA_ETHER, 30 NPC_LT_LA_IH_NIX_ETHER, 31 NPC_LT_LA_IH_8_ETHER, 32 NPC_LT_LA_IH_4_ETHER, 33 NPC_LT_LA_IH_2_ETHER, 34 NPC_LT_LA_HIGIG2_ETHER, 35 NPC_LT_LA_IH_NIX_HIGIG2_ETHER, 36 NPC_LT_LA_CUSTOM_L2_90B_ETHER, 37 NPC_LT_LA_CH_LEN_90B_ETHER, 38 NPC_LT_LA_CPT_HDR, 39 NPC_LT_LA_CUSTOM_L2_24B_ETHER, 40 NPC_LT_LA_CUSTOM0 = 0xE, 41 NPC_LT_LA_CUSTOM1 = 0xF, 42 }; 43 44 enum npc_kpu_lb_ltype { 45 NPC_LT_LB_ETAG = 1, 46 NPC_LT_LB_CTAG, 47 NPC_LT_LB_STAG_QINQ, 48 NPC_LT_LB_BTAG, 49 NPC_LT_LB_PPPOE, 50 NPC_LT_LB_DSA, 51 NPC_LT_LB_DSA_VLAN, 52 NPC_LT_LB_EDSA, 53 NPC_LT_LB_EDSA_VLAN, 54 NPC_LT_LB_EXDSA, 55 NPC_LT_LB_EXDSA_VLAN, 56 NPC_LT_LB_FDSA, 57 NPC_LT_LB_VLAN_EXDSA, 58 NPC_LT_LB_CUSTOM0 = 0xE, 59 NPC_LT_LB_CUSTOM1 = 0xF, 60 }; 61 62 enum npc_kpu_lc_ltype { 63 NPC_LT_LC_IP = 1, 64 NPC_LT_LC_IP_OPT, 65 NPC_LT_LC_IP6, 66 NPC_LT_LC_IP6_EXT, 67 NPC_LT_LC_ARP, 68 NPC_LT_LC_RARP, 69 NPC_LT_LC_MPLS, 70 NPC_LT_LC_NSH, 71 NPC_LT_LC_PTP, 72 NPC_LT_LC_FCOE, 73 NPC_LT_LC_NGIO, 74 NPC_LT_LC_CUSTOM0 = 0xE, 75 NPC_LT_LC_CUSTOM1 = 0xF, 76 }; 77 78 /* Don't modify Ltypes upto SCTP, otherwise it will 79 * effect flow tag calculation and thus RSS. 80 */ 81 enum npc_kpu_ld_ltype { 82 NPC_LT_LD_TCP = 1, 83 NPC_LT_LD_UDP, 84 NPC_LT_LD_ICMP, 85 NPC_LT_LD_SCTP, 86 NPC_LT_LD_ICMP6, 87 NPC_LT_LD_CUSTOM0, 88 NPC_LT_LD_CUSTOM1, 89 NPC_LT_LD_IGMP = 8, 90 NPC_LT_LD_AH, 91 NPC_LT_LD_GRE, 92 NPC_LT_LD_NVGRE, 93 NPC_LT_LD_NSH, 94 NPC_LT_LD_TU_MPLS_IN_NSH, 95 NPC_LT_LD_TU_MPLS_IN_IP, 96 }; 97 98 enum npc_kpu_le_ltype { 99 NPC_LT_LE_VXLAN = 1, 100 NPC_LT_LE_GENEVE, 101 NPC_LT_LE_ESP, 102 NPC_LT_LE_GTPU = 4, 103 NPC_LT_LE_VXLANGPE, 104 NPC_LT_LE_GTPC, 105 NPC_LT_LE_NSH, 106 NPC_LT_LE_TU_MPLS_IN_GRE, 107 NPC_LT_LE_TU_NSH_IN_GRE, 108 NPC_LT_LE_TU_MPLS_IN_UDP, 109 NPC_LT_LE_CUSTOM0 = 0xE, 110 NPC_LT_LE_CUSTOM1 = 0xF, 111 }; 112 113 enum npc_kpu_lf_ltype { 114 NPC_LT_LF_TU_ETHER = 1, 115 NPC_LT_LF_TU_PPP, 116 NPC_LT_LF_TU_MPLS_IN_VXLANGPE, 117 NPC_LT_LF_TU_NSH_IN_VXLANGPE, 118 NPC_LT_LF_TU_MPLS_IN_NSH, 119 NPC_LT_LF_TU_3RD_NSH, 120 NPC_LT_LF_CUSTOM0 = 0xE, 121 NPC_LT_LF_CUSTOM1 = 0xF, 122 }; 123 124 enum npc_kpu_lg_ltype { 125 NPC_LT_LG_TU_IP = 1, 126 NPC_LT_LG_TU_IP6, 127 NPC_LT_LG_TU_ARP, 128 NPC_LT_LG_TU_ETHER_IN_NSH, 129 NPC_LT_LG_CUSTOM0 = 0xE, 130 NPC_LT_LG_CUSTOM1 = 0xF, 131 }; 132 133 /* Don't modify Ltypes upto SCTP, otherwise it will 134 * effect flow tag calculation and thus RSS. 135 */ 136 enum npc_kpu_lh_ltype { 137 NPC_LT_LH_TU_TCP = 1, 138 NPC_LT_LH_TU_UDP, 139 NPC_LT_LH_TU_ICMP, 140 NPC_LT_LH_TU_SCTP, 141 NPC_LT_LH_TU_ICMP6, 142 NPC_LT_LH_TU_IGMP = 8, 143 NPC_LT_LH_TU_ESP, 144 NPC_LT_LH_TU_AH, 145 NPC_LT_LH_CUSTOM0 = 0xE, 146 NPC_LT_LH_CUSTOM1 = 0xF, 147 }; 148 149 /* NPC port kind defines how the incoming or outgoing packets 150 * are processed. NPC accepts packets from up to 64 pkinds. 151 * Software assigns pkind for each incoming port such as CGX 152 * Ethernet interfaces, LBK interfaces, etc. 153 */ 154 enum npc_pkind_type { 155 NPC_RX_VLAN_EXDSA_PKIND = 56ULL, 156 NPC_RX_CHLEN24B_PKIND = 57ULL, 157 NPC_RX_CPT_HDR_PKIND, 158 NPC_RX_CHLEN90B_PKIND, 159 NPC_TX_HIGIG_PKIND, 160 NPC_RX_HIGIG_PKIND, 161 NPC_RX_EDSA_PKIND, 162 NPC_TX_DEF_PKIND, /* NIX-TX PKIND */ 163 }; 164 165 /* list of known and supported fields in packet header and 166 * fields present in key structure. 167 */ 168 enum key_fields { 169 NPC_DMAC, 170 NPC_SMAC, 171 NPC_ETYPE, 172 NPC_OUTER_VID, 173 NPC_TOS, 174 NPC_SIP_IPV4, 175 NPC_DIP_IPV4, 176 NPC_SIP_IPV6, 177 NPC_DIP_IPV6, 178 NPC_IPPROTO_TCP, 179 NPC_IPPROTO_UDP, 180 NPC_IPPROTO_SCTP, 181 NPC_IPPROTO_AH, 182 NPC_IPPROTO_ESP, 183 NPC_IPPROTO_ICMP, 184 NPC_IPPROTO_ICMP6, 185 NPC_SPORT_TCP, 186 NPC_DPORT_TCP, 187 NPC_SPORT_UDP, 188 NPC_DPORT_UDP, 189 NPC_SPORT_SCTP, 190 NPC_DPORT_SCTP, 191 NPC_HEADER_FIELDS_MAX, 192 NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */ 193 NPC_PF_FUNC, /* Valid when Tx */ 194 NPC_ERRLEV, 195 NPC_ERRCODE, 196 NPC_LXMB, 197 NPC_LA, 198 NPC_LB, 199 NPC_LC, 200 NPC_LD, 201 NPC_LE, 202 NPC_LF, 203 NPC_LG, 204 NPC_LH, 205 /* Ethertype for untagged frame */ 206 NPC_ETYPE_ETHER, 207 /* Ethertype for single tagged frame */ 208 NPC_ETYPE_TAG1, 209 /* Ethertype for double tagged frame */ 210 NPC_ETYPE_TAG2, 211 /* outer vlan tci for single tagged frame */ 212 NPC_VLAN_TAG1, 213 /* outer vlan tci for double tagged frame */ 214 NPC_VLAN_TAG2, 215 /* other header fields programmed to extract but not of our interest */ 216 NPC_UNKNOWN, 217 NPC_KEY_FIELDS_MAX, 218 }; 219 220 struct npc_kpu_profile_cam { 221 u8 state; 222 u8 state_mask; 223 u16 dp0; 224 u16 dp0_mask; 225 u16 dp1; 226 u16 dp1_mask; 227 u16 dp2; 228 u16 dp2_mask; 229 } __packed; 230 231 struct npc_kpu_profile_action { 232 u8 errlev; 233 u8 errcode; 234 u8 dp0_offset; 235 u8 dp1_offset; 236 u8 dp2_offset; 237 u8 bypass_count; 238 u8 parse_done; 239 u8 next_state; 240 u8 ptr_advance; 241 u8 cap_ena; 242 u8 lid; 243 u8 ltype; 244 u8 flags; 245 u8 offset; 246 u8 mask; 247 u8 right; 248 u8 shift; 249 } __packed; 250 251 struct npc_kpu_profile { 252 int cam_entries; 253 int action_entries; 254 struct npc_kpu_profile_cam *cam; 255 struct npc_kpu_profile_action *action; 256 }; 257 258 /* NPC KPU register formats */ 259 struct npc_kpu_cam { 260 #if defined(__BIG_ENDIAN_BITFIELD) 261 u64 rsvd_63_56 : 8; 262 u64 state : 8; 263 u64 dp2_data : 16; 264 u64 dp1_data : 16; 265 u64 dp0_data : 16; 266 #else 267 u64 dp0_data : 16; 268 u64 dp1_data : 16; 269 u64 dp2_data : 16; 270 u64 state : 8; 271 u64 rsvd_63_56 : 8; 272 #endif 273 }; 274 275 struct npc_kpu_action0 { 276 #if defined(__BIG_ENDIAN_BITFIELD) 277 u64 rsvd_63_57 : 7; 278 u64 byp_count : 3; 279 u64 capture_ena : 1; 280 u64 parse_done : 1; 281 u64 next_state : 8; 282 u64 rsvd_43 : 1; 283 u64 capture_lid : 3; 284 u64 capture_ltype : 4; 285 u64 capture_flags : 8; 286 u64 ptr_advance : 8; 287 u64 var_len_offset : 8; 288 u64 var_len_mask : 8; 289 u64 var_len_right : 1; 290 u64 var_len_shift : 3; 291 #else 292 u64 var_len_shift : 3; 293 u64 var_len_right : 1; 294 u64 var_len_mask : 8; 295 u64 var_len_offset : 8; 296 u64 ptr_advance : 8; 297 u64 capture_flags : 8; 298 u64 capture_ltype : 4; 299 u64 capture_lid : 3; 300 u64 rsvd_43 : 1; 301 u64 next_state : 8; 302 u64 parse_done : 1; 303 u64 capture_ena : 1; 304 u64 byp_count : 3; 305 u64 rsvd_63_57 : 7; 306 #endif 307 }; 308 309 struct npc_kpu_action1 { 310 #if defined(__BIG_ENDIAN_BITFIELD) 311 u64 rsvd_63_36 : 28; 312 u64 errlev : 4; 313 u64 errcode : 8; 314 u64 dp2_offset : 8; 315 u64 dp1_offset : 8; 316 u64 dp0_offset : 8; 317 #else 318 u64 dp0_offset : 8; 319 u64 dp1_offset : 8; 320 u64 dp2_offset : 8; 321 u64 errcode : 8; 322 u64 errlev : 4; 323 u64 rsvd_63_36 : 28; 324 #endif 325 }; 326 327 struct npc_kpu_pkind_cpi_def { 328 #if defined(__BIG_ENDIAN_BITFIELD) 329 u64 ena : 1; 330 u64 rsvd_62_59 : 4; 331 u64 lid : 3; 332 u64 ltype_match : 4; 333 u64 ltype_mask : 4; 334 u64 flags_match : 8; 335 u64 flags_mask : 8; 336 u64 add_offset : 8; 337 u64 add_mask : 8; 338 u64 rsvd_15 : 1; 339 u64 add_shift : 3; 340 u64 rsvd_11_10 : 2; 341 u64 cpi_base : 10; 342 #else 343 u64 cpi_base : 10; 344 u64 rsvd_11_10 : 2; 345 u64 add_shift : 3; 346 u64 rsvd_15 : 1; 347 u64 add_mask : 8; 348 u64 add_offset : 8; 349 u64 flags_mask : 8; 350 u64 flags_match : 8; 351 u64 ltype_mask : 4; 352 u64 ltype_match : 4; 353 u64 lid : 3; 354 u64 rsvd_62_59 : 4; 355 u64 ena : 1; 356 #endif 357 }; 358 359 struct nix_rx_action { 360 #if defined(__BIG_ENDIAN_BITFIELD) 361 u64 rsvd_63_61 :3; 362 u64 flow_key_alg :5; 363 u64 match_id :16; 364 u64 index :20; 365 u64 pf_func :16; 366 u64 op :4; 367 #else 368 u64 op :4; 369 u64 pf_func :16; 370 u64 index :20; 371 u64 match_id :16; 372 u64 flow_key_alg :5; 373 u64 rsvd_63_61 :3; 374 #endif 375 }; 376 377 /* NPC_AF_INTFX_KEX_CFG field masks */ 378 #define NPC_PARSE_NIBBLE GENMASK_ULL(30, 0) 379 380 /* NPC_PARSE_KEX_S nibble definitions for each field */ 381 #define NPC_PARSE_NIBBLE_CHAN GENMASK_ULL(2, 0) 382 #define NPC_PARSE_NIBBLE_ERRLEV BIT_ULL(3) 383 #define NPC_PARSE_NIBBLE_ERRCODE GENMASK_ULL(5, 4) 384 #define NPC_PARSE_NIBBLE_L2L3_BCAST BIT_ULL(6) 385 #define NPC_PARSE_NIBBLE_LA_FLAGS GENMASK_ULL(8, 7) 386 #define NPC_PARSE_NIBBLE_LA_LTYPE BIT_ULL(9) 387 #define NPC_PARSE_NIBBLE_LB_FLAGS GENMASK_ULL(11, 10) 388 #define NPC_PARSE_NIBBLE_LB_LTYPE BIT_ULL(12) 389 #define NPC_PARSE_NIBBLE_LC_FLAGS GENMASK_ULL(14, 13) 390 #define NPC_PARSE_NIBBLE_LC_LTYPE BIT_ULL(15) 391 #define NPC_PARSE_NIBBLE_LD_FLAGS GENMASK_ULL(17, 16) 392 #define NPC_PARSE_NIBBLE_LD_LTYPE BIT_ULL(18) 393 #define NPC_PARSE_NIBBLE_LE_FLAGS GENMASK_ULL(20, 19) 394 #define NPC_PARSE_NIBBLE_LE_LTYPE BIT_ULL(21) 395 #define NPC_PARSE_NIBBLE_LF_FLAGS GENMASK_ULL(23, 22) 396 #define NPC_PARSE_NIBBLE_LF_LTYPE BIT_ULL(24) 397 #define NPC_PARSE_NIBBLE_LG_FLAGS GENMASK_ULL(26, 25) 398 #define NPC_PARSE_NIBBLE_LG_LTYPE BIT_ULL(27) 399 #define NPC_PARSE_NIBBLE_LH_FLAGS GENMASK_ULL(29, 28) 400 #define NPC_PARSE_NIBBLE_LH_LTYPE BIT_ULL(30) 401 402 struct nix_tx_action { 403 #if defined(__BIG_ENDIAN_BITFIELD) 404 u64 rsvd_63_48 :16; 405 u64 match_id :16; 406 u64 index :20; 407 u64 rsvd_11_8 :8; 408 u64 op :4; 409 #else 410 u64 op :4; 411 u64 rsvd_11_8 :8; 412 u64 index :20; 413 u64 match_id :16; 414 u64 rsvd_63_48 :16; 415 #endif 416 }; 417 418 /* NIX Receive Vtag Action Structure */ 419 #define RX_VTAG0_VALID_BIT BIT_ULL(15) 420 #define RX_VTAG0_TYPE_MASK GENMASK_ULL(14, 12) 421 #define RX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 422 #define RX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 423 #define RX_VTAG1_VALID_BIT BIT_ULL(47) 424 #define RX_VTAG1_TYPE_MASK GENMASK_ULL(46, 44) 425 #define RX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 426 #define RX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 427 428 /* NIX Transmit Vtag Action Structure */ 429 #define TX_VTAG0_DEF_MASK GENMASK_ULL(25, 16) 430 #define TX_VTAG0_OP_MASK GENMASK_ULL(13, 12) 431 #define TX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 432 #define TX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 433 #define TX_VTAG1_DEF_MASK GENMASK_ULL(57, 48) 434 #define TX_VTAG1_OP_MASK GENMASK_ULL(45, 44) 435 #define TX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 436 #define TX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 437 438 /* NPC MCAM reserved entry index per nixlf */ 439 #define NIXLF_UCAST_ENTRY 0 440 #define NIXLF_BCAST_ENTRY 1 441 #define NIXLF_ALLMULTI_ENTRY 2 442 #define NIXLF_PROMISC_ENTRY 3 443 444 struct npc_coalesced_kpu_prfl { 445 #define NPC_SIGN 0x00666f727063706e 446 #define NPC_PRFL_NAME "npc_prfls_array" 447 #define NPC_NAME_LEN 32 448 __le64 signature; /* "npcprof\0" (8 bytes/ASCII characters) */ 449 u8 name[NPC_NAME_LEN]; /* KPU Profile name */ 450 u64 version; /* KPU firmware/profile version */ 451 u8 num_prfl; /* No of NPC profiles. */ 452 u16 prfl_sz[0]; 453 }; 454 455 struct npc_mcam_kex { 456 /* MKEX Profle Header */ 457 u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */ 458 u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */ 459 u64 cpu_model; /* Format as profiled by CPU hardware */ 460 u64 kpu_version; /* KPU firmware/profile version */ 461 u64 reserved; /* Reserved for extension */ 462 463 /* MKEX Profle Data */ 464 u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */ 465 /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */ 466 u64 kex_ld_flags[NPC_MAX_LD]; 467 /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */ 468 u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD]; 469 /* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */ 470 u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL]; 471 } __packed; 472 473 struct npc_kpu_fwdata { 474 int entries; 475 /* What follows is: 476 * struct npc_kpu_profile_cam[entries]; 477 * struct npc_kpu_profile_action[entries]; 478 */ 479 u8 data[0]; 480 } __packed; 481 482 struct npc_lt_def { 483 u8 ltype_mask; 484 u8 ltype_match; 485 u8 lid; 486 }; 487 488 struct npc_lt_def_ipsec { 489 u8 ltype_mask; 490 u8 ltype_match; 491 u8 lid; 492 u8 spi_offset; 493 u8 spi_nz; 494 }; 495 496 struct npc_lt_def_apad { 497 u8 ltype_mask; 498 u8 ltype_match; 499 u8 lid; 500 u8 valid; 501 } __packed; 502 503 struct npc_lt_def_color { 504 u8 ltype_mask; 505 u8 ltype_match; 506 u8 lid; 507 u8 noffset; 508 u8 offset; 509 } __packed; 510 511 struct npc_lt_def_et { 512 u8 ltype_mask; 513 u8 ltype_match; 514 u8 lid; 515 u8 valid; 516 u8 offset; 517 } __packed; 518 519 struct npc_lt_def_cfg { 520 struct npc_lt_def rx_ol2; 521 struct npc_lt_def rx_oip4; 522 struct npc_lt_def rx_iip4; 523 struct npc_lt_def rx_oip6; 524 struct npc_lt_def rx_iip6; 525 struct npc_lt_def rx_otcp; 526 struct npc_lt_def rx_itcp; 527 struct npc_lt_def rx_oudp; 528 struct npc_lt_def rx_iudp; 529 struct npc_lt_def rx_osctp; 530 struct npc_lt_def rx_isctp; 531 struct npc_lt_def_ipsec rx_ipsec[2]; 532 struct npc_lt_def pck_ol2; 533 struct npc_lt_def pck_oip4; 534 struct npc_lt_def pck_oip6; 535 struct npc_lt_def pck_iip4; 536 struct npc_lt_def_apad rx_apad0; 537 struct npc_lt_def_apad rx_apad1; 538 struct npc_lt_def_color ovlan; 539 struct npc_lt_def_color ivlan; 540 struct npc_lt_def_color rx_gen0_color; 541 struct npc_lt_def_color rx_gen1_color; 542 struct npc_lt_def_et rx_et[2]; 543 } __packed; 544 545 /* Loadable KPU profile firmware data */ 546 struct npc_kpu_profile_fwdata { 547 #define KPU_SIGN 0x00666f727075706b 548 #define KPU_NAME_LEN 32 549 /** Maximum number of custom KPU entries supported by the built-in profile. */ 550 #define KPU_MAX_CST_ENT 2 551 /* KPU Profle Header */ 552 __le64 signature; /* "kpuprof\0" (8 bytes/ASCII characters) */ 553 u8 name[KPU_NAME_LEN]; /* KPU Profile name */ 554 __le64 version; /* KPU profile version */ 555 u8 kpus; 556 u8 reserved[7]; 557 558 /* Default MKEX profile to be used with this KPU profile. May be 559 * overridden with mkex_profile module parameter. Format is same as for 560 * the MKEX profile to streamline processing. 561 */ 562 struct npc_mcam_kex mkex; 563 /* LTYPE values for specific HW offloaded protocols. */ 564 struct npc_lt_def_cfg lt_def; 565 /* Dynamically sized data: 566 * Custom KPU CAM and ACTION configuration entries. 567 * struct npc_kpu_fwdata kpu[kpus]; 568 */ 569 u8 data[0]; 570 } __packed; 571 572 struct rvu_npc_mcam_rule { 573 struct flow_msg packet; 574 struct flow_msg mask; 575 u8 intf; 576 union { 577 struct nix_tx_action tx_action; 578 struct nix_rx_action rx_action; 579 }; 580 u64 vtag_action; 581 struct list_head list; 582 u64 features; 583 u16 owner; 584 u16 entry; 585 u16 cntr; 586 bool has_cntr; 587 u8 default_rule; 588 bool enable; 589 bool vfvlan_cfg; 590 }; 591 592 #endif /* NPC_H */ 593