1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Marvell RVU Admin Function driver 3 * 4 * Copyright (C) 2018 Marvell. 5 * 6 */ 7 8 #ifndef NPC_H 9 #define NPC_H 10 11 enum NPC_LID_E { 12 NPC_LID_LA = 0, 13 NPC_LID_LB, 14 NPC_LID_LC, 15 NPC_LID_LD, 16 NPC_LID_LE, 17 NPC_LID_LF, 18 NPC_LID_LG, 19 NPC_LID_LH, 20 }; 21 22 #define NPC_LT_NA 0 23 24 enum npc_kpu_la_ltype { 25 NPC_LT_LA_8023 = 1, 26 NPC_LT_LA_ETHER, 27 NPC_LT_LA_IH_NIX_ETHER, 28 NPC_LT_LA_HIGIG2_ETHER = 7, 29 NPC_LT_LA_IH_NIX_HIGIG2_ETHER, 30 NPC_LT_LA_CUSTOM_L2_90B_ETHER, 31 NPC_LT_LA_CPT_HDR, 32 NPC_LT_LA_CUSTOM_L2_24B_ETHER, 33 NPC_LT_LA_CUSTOM_PRE_L2_ETHER, 34 NPC_LT_LA_CUSTOM0 = 0xE, 35 NPC_LT_LA_CUSTOM1 = 0xF, 36 }; 37 38 enum npc_kpu_lb_ltype { 39 NPC_LT_LB_ETAG = 1, 40 NPC_LT_LB_CTAG, 41 NPC_LT_LB_STAG_QINQ, 42 NPC_LT_LB_BTAG, 43 NPC_LT_LB_PPPOE, 44 NPC_LT_LB_DSA, 45 NPC_LT_LB_DSA_VLAN, 46 NPC_LT_LB_EDSA, 47 NPC_LT_LB_EDSA_VLAN, 48 NPC_LT_LB_EXDSA, 49 NPC_LT_LB_EXDSA_VLAN, 50 NPC_LT_LB_FDSA, 51 NPC_LT_LB_VLAN_EXDSA, 52 NPC_LT_LB_CUSTOM0 = 0xE, 53 NPC_LT_LB_CUSTOM1 = 0xF, 54 }; 55 56 enum npc_kpu_lc_ltype { 57 NPC_LT_LC_IP = 1, 58 NPC_LT_LC_IP_OPT, 59 NPC_LT_LC_IP6, 60 NPC_LT_LC_IP6_EXT, 61 NPC_LT_LC_ARP, 62 NPC_LT_LC_RARP, 63 NPC_LT_LC_MPLS, 64 NPC_LT_LC_NSH, 65 NPC_LT_LC_PTP, 66 NPC_LT_LC_FCOE, 67 NPC_LT_LC_NGIO, 68 NPC_LT_LC_CUSTOM0 = 0xE, 69 NPC_LT_LC_CUSTOM1 = 0xF, 70 }; 71 72 /* Don't modify Ltypes upto SCTP, otherwise it will 73 * effect flow tag calculation and thus RSS. 74 */ 75 enum npc_kpu_ld_ltype { 76 NPC_LT_LD_TCP = 1, 77 NPC_LT_LD_UDP, 78 NPC_LT_LD_ICMP, 79 NPC_LT_LD_SCTP, 80 NPC_LT_LD_ICMP6, 81 NPC_LT_LD_CUSTOM0, 82 NPC_LT_LD_CUSTOM1, 83 NPC_LT_LD_IGMP = 8, 84 NPC_LT_LD_AH, 85 NPC_LT_LD_GRE, 86 NPC_LT_LD_NVGRE, 87 NPC_LT_LD_NSH, 88 NPC_LT_LD_TU_MPLS_IN_NSH, 89 NPC_LT_LD_TU_MPLS_IN_IP, 90 }; 91 92 enum npc_kpu_le_ltype { 93 NPC_LT_LE_VXLAN = 1, 94 NPC_LT_LE_GENEVE, 95 NPC_LT_LE_ESP, 96 NPC_LT_LE_GTPU = 4, 97 NPC_LT_LE_VXLANGPE, 98 NPC_LT_LE_GTPC, 99 NPC_LT_LE_NSH, 100 NPC_LT_LE_TU_MPLS_IN_GRE, 101 NPC_LT_LE_TU_NSH_IN_GRE, 102 NPC_LT_LE_TU_MPLS_IN_UDP, 103 NPC_LT_LE_CUSTOM0 = 0xE, 104 NPC_LT_LE_CUSTOM1 = 0xF, 105 }; 106 107 enum npc_kpu_lf_ltype { 108 NPC_LT_LF_TU_ETHER = 1, 109 NPC_LT_LF_TU_PPP, 110 NPC_LT_LF_TU_MPLS_IN_VXLANGPE, 111 NPC_LT_LF_TU_NSH_IN_VXLANGPE, 112 NPC_LT_LF_TU_MPLS_IN_NSH, 113 NPC_LT_LF_TU_3RD_NSH, 114 NPC_LT_LF_CUSTOM0 = 0xE, 115 NPC_LT_LF_CUSTOM1 = 0xF, 116 }; 117 118 enum npc_kpu_lg_ltype { 119 NPC_LT_LG_TU_IP = 1, 120 NPC_LT_LG_TU_IP6, 121 NPC_LT_LG_TU_ARP, 122 NPC_LT_LG_TU_ETHER_IN_NSH, 123 NPC_LT_LG_CUSTOM0 = 0xE, 124 NPC_LT_LG_CUSTOM1 = 0xF, 125 }; 126 127 /* Don't modify Ltypes upto SCTP, otherwise it will 128 * effect flow tag calculation and thus RSS. 129 */ 130 enum npc_kpu_lh_ltype { 131 NPC_LT_LH_TU_TCP = 1, 132 NPC_LT_LH_TU_UDP, 133 NPC_LT_LH_TU_ICMP, 134 NPC_LT_LH_TU_SCTP, 135 NPC_LT_LH_TU_ICMP6, 136 NPC_LT_LH_TU_IGMP = 8, 137 NPC_LT_LH_TU_ESP, 138 NPC_LT_LH_TU_AH, 139 NPC_LT_LH_CUSTOM0 = 0xE, 140 NPC_LT_LH_CUSTOM1 = 0xF, 141 }; 142 143 /* NPC port kind defines how the incoming or outgoing packets 144 * are processed. NPC accepts packets from up to 64 pkinds. 145 * Software assigns pkind for each incoming port such as CGX 146 * Ethernet interfaces, LBK interfaces, etc. 147 */ 148 #define NPC_UNRESERVED_PKIND_COUNT NPC_RX_CUSTOM_PRE_L2_PKIND 149 150 enum npc_pkind_type { 151 NPC_RX_LBK_PKIND = 0ULL, 152 NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL, 153 NPC_RX_VLAN_EXDSA_PKIND = 56ULL, 154 NPC_RX_CHLEN24B_PKIND = 57ULL, 155 NPC_RX_CPT_HDR_PKIND, 156 NPC_RX_CHLEN90B_PKIND, 157 NPC_TX_HIGIG_PKIND, 158 NPC_RX_HIGIG_PKIND, 159 NPC_RX_EDSA_PKIND, 160 NPC_TX_DEF_PKIND, /* NIX-TX PKIND */ 161 }; 162 163 enum npc_interface_type { 164 NPC_INTF_MODE_DEF, 165 }; 166 167 /* list of known and supported fields in packet header and 168 * fields present in key structure. 169 */ 170 enum key_fields { 171 NPC_DMAC, 172 NPC_SMAC, 173 NPC_ETYPE, 174 NPC_VLAN_ETYPE_CTAG, /* 0x8100 */ 175 NPC_VLAN_ETYPE_STAG, /* 0x88A8 */ 176 NPC_OUTER_VID, 177 NPC_TOS, 178 NPC_SIP_IPV4, 179 NPC_DIP_IPV4, 180 NPC_SIP_IPV6, 181 NPC_DIP_IPV6, 182 NPC_IPPROTO_TCP, 183 NPC_IPPROTO_UDP, 184 NPC_IPPROTO_SCTP, 185 NPC_IPPROTO_AH, 186 NPC_IPPROTO_ESP, 187 NPC_IPPROTO_ICMP, 188 NPC_IPPROTO_ICMP6, 189 NPC_SPORT_TCP, 190 NPC_DPORT_TCP, 191 NPC_SPORT_UDP, 192 NPC_DPORT_UDP, 193 NPC_SPORT_SCTP, 194 NPC_DPORT_SCTP, 195 NPC_HEADER_FIELDS_MAX, 196 NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */ 197 NPC_PF_FUNC, /* Valid when Tx */ 198 NPC_ERRLEV, 199 NPC_ERRCODE, 200 NPC_LXMB, 201 NPC_LA, 202 NPC_LB, 203 NPC_LC, 204 NPC_LD, 205 NPC_LE, 206 NPC_LF, 207 NPC_LG, 208 NPC_LH, 209 /* Ethertype for untagged frame */ 210 NPC_ETYPE_ETHER, 211 /* Ethertype for single tagged frame */ 212 NPC_ETYPE_TAG1, 213 /* Ethertype for double tagged frame */ 214 NPC_ETYPE_TAG2, 215 /* outer vlan tci for single tagged frame */ 216 NPC_VLAN_TAG1, 217 /* outer vlan tci for double tagged frame */ 218 NPC_VLAN_TAG2, 219 /* other header fields programmed to extract but not of our interest */ 220 NPC_UNKNOWN, 221 NPC_KEY_FIELDS_MAX, 222 }; 223 224 struct npc_kpu_profile_cam { 225 u8 state; 226 u8 state_mask; 227 u16 dp0; 228 u16 dp0_mask; 229 u16 dp1; 230 u16 dp1_mask; 231 u16 dp2; 232 u16 dp2_mask; 233 } __packed; 234 235 struct npc_kpu_profile_action { 236 u8 errlev; 237 u8 errcode; 238 u8 dp0_offset; 239 u8 dp1_offset; 240 u8 dp2_offset; 241 u8 bypass_count; 242 u8 parse_done; 243 u8 next_state; 244 u8 ptr_advance; 245 u8 cap_ena; 246 u8 lid; 247 u8 ltype; 248 u8 flags; 249 u8 offset; 250 u8 mask; 251 u8 right; 252 u8 shift; 253 } __packed; 254 255 struct npc_kpu_profile { 256 int cam_entries; 257 int action_entries; 258 struct npc_kpu_profile_cam *cam; 259 struct npc_kpu_profile_action *action; 260 }; 261 262 /* NPC KPU register formats */ 263 struct npc_kpu_cam { 264 #if defined(__BIG_ENDIAN_BITFIELD) 265 u64 rsvd_63_56 : 8; 266 u64 state : 8; 267 u64 dp2_data : 16; 268 u64 dp1_data : 16; 269 u64 dp0_data : 16; 270 #else 271 u64 dp0_data : 16; 272 u64 dp1_data : 16; 273 u64 dp2_data : 16; 274 u64 state : 8; 275 u64 rsvd_63_56 : 8; 276 #endif 277 }; 278 279 struct npc_kpu_action0 { 280 #if defined(__BIG_ENDIAN_BITFIELD) 281 u64 rsvd_63_57 : 7; 282 u64 byp_count : 3; 283 u64 capture_ena : 1; 284 u64 parse_done : 1; 285 u64 next_state : 8; 286 u64 rsvd_43 : 1; 287 u64 capture_lid : 3; 288 u64 capture_ltype : 4; 289 u64 capture_flags : 8; 290 u64 ptr_advance : 8; 291 u64 var_len_offset : 8; 292 u64 var_len_mask : 8; 293 u64 var_len_right : 1; 294 u64 var_len_shift : 3; 295 #else 296 u64 var_len_shift : 3; 297 u64 var_len_right : 1; 298 u64 var_len_mask : 8; 299 u64 var_len_offset : 8; 300 u64 ptr_advance : 8; 301 u64 capture_flags : 8; 302 u64 capture_ltype : 4; 303 u64 capture_lid : 3; 304 u64 rsvd_43 : 1; 305 u64 next_state : 8; 306 u64 parse_done : 1; 307 u64 capture_ena : 1; 308 u64 byp_count : 3; 309 u64 rsvd_63_57 : 7; 310 #endif 311 }; 312 313 struct npc_kpu_action1 { 314 #if defined(__BIG_ENDIAN_BITFIELD) 315 u64 rsvd_63_36 : 28; 316 u64 errlev : 4; 317 u64 errcode : 8; 318 u64 dp2_offset : 8; 319 u64 dp1_offset : 8; 320 u64 dp0_offset : 8; 321 #else 322 u64 dp0_offset : 8; 323 u64 dp1_offset : 8; 324 u64 dp2_offset : 8; 325 u64 errcode : 8; 326 u64 errlev : 4; 327 u64 rsvd_63_36 : 28; 328 #endif 329 }; 330 331 struct npc_kpu_pkind_cpi_def { 332 #if defined(__BIG_ENDIAN_BITFIELD) 333 u64 ena : 1; 334 u64 rsvd_62_59 : 4; 335 u64 lid : 3; 336 u64 ltype_match : 4; 337 u64 ltype_mask : 4; 338 u64 flags_match : 8; 339 u64 flags_mask : 8; 340 u64 add_offset : 8; 341 u64 add_mask : 8; 342 u64 rsvd_15 : 1; 343 u64 add_shift : 3; 344 u64 rsvd_11_10 : 2; 345 u64 cpi_base : 10; 346 #else 347 u64 cpi_base : 10; 348 u64 rsvd_11_10 : 2; 349 u64 add_shift : 3; 350 u64 rsvd_15 : 1; 351 u64 add_mask : 8; 352 u64 add_offset : 8; 353 u64 flags_mask : 8; 354 u64 flags_match : 8; 355 u64 ltype_mask : 4; 356 u64 ltype_match : 4; 357 u64 lid : 3; 358 u64 rsvd_62_59 : 4; 359 u64 ena : 1; 360 #endif 361 }; 362 363 struct nix_rx_action { 364 #if defined(__BIG_ENDIAN_BITFIELD) 365 u64 rsvd_63_61 :3; 366 u64 flow_key_alg :5; 367 u64 match_id :16; 368 u64 index :20; 369 u64 pf_func :16; 370 u64 op :4; 371 #else 372 u64 op :4; 373 u64 pf_func :16; 374 u64 index :20; 375 u64 match_id :16; 376 u64 flow_key_alg :5; 377 u64 rsvd_63_61 :3; 378 #endif 379 }; 380 381 /* NPC_AF_INTFX_KEX_CFG field masks */ 382 #define NPC_PARSE_NIBBLE GENMASK_ULL(30, 0) 383 384 /* NPC_PARSE_KEX_S nibble definitions for each field */ 385 #define NPC_PARSE_NIBBLE_CHAN GENMASK_ULL(2, 0) 386 #define NPC_PARSE_NIBBLE_ERRLEV BIT_ULL(3) 387 #define NPC_PARSE_NIBBLE_ERRCODE GENMASK_ULL(5, 4) 388 #define NPC_PARSE_NIBBLE_L2L3_BCAST BIT_ULL(6) 389 #define NPC_PARSE_NIBBLE_LA_FLAGS GENMASK_ULL(8, 7) 390 #define NPC_PARSE_NIBBLE_LA_LTYPE BIT_ULL(9) 391 #define NPC_PARSE_NIBBLE_LB_FLAGS GENMASK_ULL(11, 10) 392 #define NPC_PARSE_NIBBLE_LB_LTYPE BIT_ULL(12) 393 #define NPC_PARSE_NIBBLE_LC_FLAGS GENMASK_ULL(14, 13) 394 #define NPC_PARSE_NIBBLE_LC_LTYPE BIT_ULL(15) 395 #define NPC_PARSE_NIBBLE_LD_FLAGS GENMASK_ULL(17, 16) 396 #define NPC_PARSE_NIBBLE_LD_LTYPE BIT_ULL(18) 397 #define NPC_PARSE_NIBBLE_LE_FLAGS GENMASK_ULL(20, 19) 398 #define NPC_PARSE_NIBBLE_LE_LTYPE BIT_ULL(21) 399 #define NPC_PARSE_NIBBLE_LF_FLAGS GENMASK_ULL(23, 22) 400 #define NPC_PARSE_NIBBLE_LF_LTYPE BIT_ULL(24) 401 #define NPC_PARSE_NIBBLE_LG_FLAGS GENMASK_ULL(26, 25) 402 #define NPC_PARSE_NIBBLE_LG_LTYPE BIT_ULL(27) 403 #define NPC_PARSE_NIBBLE_LH_FLAGS GENMASK_ULL(29, 28) 404 #define NPC_PARSE_NIBBLE_LH_LTYPE BIT_ULL(30) 405 406 struct nix_tx_action { 407 #if defined(__BIG_ENDIAN_BITFIELD) 408 u64 rsvd_63_48 :16; 409 u64 match_id :16; 410 u64 index :20; 411 u64 rsvd_11_8 :8; 412 u64 op :4; 413 #else 414 u64 op :4; 415 u64 rsvd_11_8 :8; 416 u64 index :20; 417 u64 match_id :16; 418 u64 rsvd_63_48 :16; 419 #endif 420 }; 421 422 /* NIX Receive Vtag Action Structure */ 423 #define RX_VTAG0_VALID_BIT BIT_ULL(15) 424 #define RX_VTAG0_TYPE_MASK GENMASK_ULL(14, 12) 425 #define RX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 426 #define RX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 427 #define RX_VTAG1_VALID_BIT BIT_ULL(47) 428 #define RX_VTAG1_TYPE_MASK GENMASK_ULL(46, 44) 429 #define RX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 430 #define RX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 431 432 /* NIX Transmit Vtag Action Structure */ 433 #define TX_VTAG0_DEF_MASK GENMASK_ULL(25, 16) 434 #define TX_VTAG0_OP_MASK GENMASK_ULL(13, 12) 435 #define TX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 436 #define TX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 437 #define TX_VTAG1_DEF_MASK GENMASK_ULL(57, 48) 438 #define TX_VTAG1_OP_MASK GENMASK_ULL(45, 44) 439 #define TX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 440 #define TX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 441 442 /* NPC MCAM reserved entry index per nixlf */ 443 #define NIXLF_UCAST_ENTRY 0 444 #define NIXLF_BCAST_ENTRY 1 445 #define NIXLF_ALLMULTI_ENTRY 2 446 #define NIXLF_PROMISC_ENTRY 3 447 448 struct npc_coalesced_kpu_prfl { 449 #define NPC_SIGN 0x00666f727063706e 450 #define NPC_PRFL_NAME "npc_prfls_array" 451 #define NPC_NAME_LEN 32 452 __le64 signature; /* "npcprof\0" (8 bytes/ASCII characters) */ 453 u8 name[NPC_NAME_LEN]; /* KPU Profile name */ 454 u64 version; /* KPU firmware/profile version */ 455 u8 num_prfl; /* No of NPC profiles. */ 456 u16 prfl_sz[0]; 457 }; 458 459 struct npc_mcam_kex { 460 /* MKEX Profle Header */ 461 u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */ 462 u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */ 463 u64 cpu_model; /* Format as profiled by CPU hardware */ 464 u64 kpu_version; /* KPU firmware/profile version */ 465 u64 reserved; /* Reserved for extension */ 466 467 /* MKEX Profle Data */ 468 u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */ 469 /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */ 470 u64 kex_ld_flags[NPC_MAX_LD]; 471 /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */ 472 u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD]; 473 /* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */ 474 u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL]; 475 } __packed; 476 477 struct npc_kpu_fwdata { 478 int entries; 479 /* What follows is: 480 * struct npc_kpu_profile_cam[entries]; 481 * struct npc_kpu_profile_action[entries]; 482 */ 483 u8 data[0]; 484 } __packed; 485 486 struct npc_lt_def { 487 u8 ltype_mask; 488 u8 ltype_match; 489 u8 lid; 490 }; 491 492 struct npc_lt_def_ipsec { 493 u8 ltype_mask; 494 u8 ltype_match; 495 u8 lid; 496 u8 spi_offset; 497 u8 spi_nz; 498 }; 499 500 struct npc_lt_def_apad { 501 u8 ltype_mask; 502 u8 ltype_match; 503 u8 lid; 504 u8 valid; 505 } __packed; 506 507 struct npc_lt_def_color { 508 u8 ltype_mask; 509 u8 ltype_match; 510 u8 lid; 511 u8 noffset; 512 u8 offset; 513 } __packed; 514 515 struct npc_lt_def_et { 516 u8 ltype_mask; 517 u8 ltype_match; 518 u8 lid; 519 u8 valid; 520 u8 offset; 521 } __packed; 522 523 struct npc_lt_def_cfg { 524 struct npc_lt_def rx_ol2; 525 struct npc_lt_def rx_oip4; 526 struct npc_lt_def rx_iip4; 527 struct npc_lt_def rx_oip6; 528 struct npc_lt_def rx_iip6; 529 struct npc_lt_def rx_otcp; 530 struct npc_lt_def rx_itcp; 531 struct npc_lt_def rx_oudp; 532 struct npc_lt_def rx_iudp; 533 struct npc_lt_def rx_osctp; 534 struct npc_lt_def rx_isctp; 535 struct npc_lt_def_ipsec rx_ipsec[2]; 536 struct npc_lt_def pck_ol2; 537 struct npc_lt_def pck_oip4; 538 struct npc_lt_def pck_oip6; 539 struct npc_lt_def pck_iip4; 540 struct npc_lt_def_apad rx_apad0; 541 struct npc_lt_def_apad rx_apad1; 542 struct npc_lt_def_color ovlan; 543 struct npc_lt_def_color ivlan; 544 struct npc_lt_def_color rx_gen0_color; 545 struct npc_lt_def_color rx_gen1_color; 546 struct npc_lt_def_et rx_et[2]; 547 } __packed; 548 549 /* Loadable KPU profile firmware data */ 550 struct npc_kpu_profile_fwdata { 551 #define KPU_SIGN 0x00666f727075706b 552 #define KPU_NAME_LEN 32 553 /** Maximum number of custom KPU entries supported by the built-in profile. */ 554 #define KPU_MAX_CST_ENT 6 555 /* KPU Profle Header */ 556 __le64 signature; /* "kpuprof\0" (8 bytes/ASCII characters) */ 557 u8 name[KPU_NAME_LEN]; /* KPU Profile name */ 558 __le64 version; /* KPU profile version */ 559 u8 kpus; 560 u8 reserved[7]; 561 562 /* Default MKEX profile to be used with this KPU profile. May be 563 * overridden with mkex_profile module parameter. Format is same as for 564 * the MKEX profile to streamline processing. 565 */ 566 struct npc_mcam_kex mkex; 567 /* LTYPE values for specific HW offloaded protocols. */ 568 struct npc_lt_def_cfg lt_def; 569 /* Dynamically sized data: 570 * Custom KPU CAM and ACTION configuration entries. 571 * struct npc_kpu_fwdata kpu[kpus]; 572 */ 573 u8 data[0]; 574 } __packed; 575 576 struct rvu_npc_mcam_rule { 577 struct flow_msg packet; 578 struct flow_msg mask; 579 u8 intf; 580 union { 581 struct nix_tx_action tx_action; 582 struct nix_rx_action rx_action; 583 }; 584 u64 vtag_action; 585 struct list_head list; 586 u64 features; 587 u16 owner; 588 u16 entry; 589 u16 cntr; 590 bool has_cntr; 591 u8 default_rule; 592 bool enable; 593 bool vfvlan_cfg; 594 }; 595 596 #endif /* NPC_H */ 597