xref: /linux/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Marvell CN10K RPM driver
3  *
4  * Copyright (C) 2020 Marvell.
5  *
6  */
7 
8 #ifndef LMAC_COMMON_H
9 #define LMAC_COMMON_H
10 
11 #include "rvu.h"
12 #include "cgx.h"
13 /**
14  * struct lmac - per lmac locks and properties
15  * @wq_cmd_cmplt:	waitq to keep the process blocked until cmd completion
16  * @cmd_lock:		Lock to serialize the command interface
17  * @resp:		command response
18  * @link_info:		link related information
19  * @mac_to_index_bmap:	Mac address to CGX table index mapping
20  * @event_cb:		callback for linkchange events
21  * @event_cb_lock:	lock for serializing callback with unregister
22  * @cgx:		parent cgx port
23  * @mcast_filters_count:  Number of multicast filters installed
24  * @lmac_id:		lmac port id
25  * @cmd_pend:		flag set before new command is started
26  *			flag cleared after command response is received
27  * @name:		lmac port name
28  */
29 struct lmac {
30 	wait_queue_head_t wq_cmd_cmplt;
31 	/* Lock to serialize the command interface */
32 	struct mutex cmd_lock;
33 	u64 resp;
34 	struct cgx_link_user_info link_info;
35 	struct rsrc_bmap mac_to_index_bmap;
36 	struct cgx_event_cb event_cb;
37 	/* lock for serializing callback with unregister */
38 	spinlock_t event_cb_lock;
39 	struct cgx *cgx;
40 	u8 mcast_filters_count;
41 	u8 lmac_id;
42 	bool cmd_pend;
43 	char *name;
44 };
45 
46 /* CGX & RPM has different feature set
47  * update the structure fields with different one
48  */
49 struct mac_ops {
50 	char		       *name;
51 	/* Features like RXSTAT, TXSTAT, DMAC FILTER csrs differs by fixed
52 	 * bar offset for example
53 	 * CGX DMAC_CTL0  0x1f8
54 	 * RPM DMAC_CTL0  0x4ff8
55 	 */
56 	u64			csr_offset;
57 	/* For ATF to send events to kernel, there is no dedicated interrupt
58 	 * defined hence CGX uses OVERFLOW bit in CMR_INT. RPM block supports
59 	 * SW_INT so that ATF triggers this interrupt after processing of
60 	 * requested command
61 	 */
62 	u64			int_register;
63 	u64			int_set_reg;
64 	/* lmac offset is different is RPM */
65 	u8			lmac_offset;
66 	u8			irq_offset;
67 	u8			int_ena_bit;
68 	u8			lmac_fwi;
69 	u32			fifo_len;
70 	bool			non_contiguous_serdes_lane;
71 	/* RPM & CGX differs in number of Receive/transmit stats */
72 	u8			rx_stats_cnt;
73 	u8			tx_stats_cnt;
74 	/* Incase of RPM get number of lmacs from RPMX_CMR_RX_LMACS[LMAC_EXIST]
75 	 * number of setbits in lmac_exist tells number of lmacs
76 	 */
77 	int			(*get_nr_lmacs)(void *cgx);
78 	u8                      (*get_lmac_type)(void *cgx, int lmac_id);
79 	int                     (*mac_lmac_intl_lbk)(void *cgx, int lmac_id,
80 						     bool enable);
81 	/* Register Stats related functions */
82 	int			(*mac_get_rx_stats)(void *cgx, int lmac_id,
83 						    int idx, u64 *rx_stat);
84 	int			(*mac_get_tx_stats)(void *cgx, int lmac_id,
85 						    int idx, u64 *tx_stat);
86 
87 	/* Enable LMAC Pause Frame Configuration */
88 	void			(*mac_enadis_rx_pause_fwding)(void *cgxd,
89 							      int lmac_id,
90 							      bool enable);
91 
92 	int			(*mac_get_pause_frm_status)(void *cgxd,
93 							    int lmac_id,
94 							    u8 *tx_pause,
95 							    u8 *rx_pause);
96 
97 	int			(*mac_enadis_pause_frm)(void *cgxd,
98 							int lmac_id,
99 							u8 tx_pause,
100 							u8 rx_pause);
101 
102 	void			(*mac_pause_frm_config)(void  *cgxd,
103 							int lmac_id,
104 							bool enable);
105 
106 	/* Enable/Disable Inbound PTP */
107 	void			(*mac_enadis_ptp_config)(void  *cgxd,
108 							 int lmac_id,
109 							 bool enable);
110 
111 	int			(*mac_rx_tx_enable)(void *cgxd, int lmac_id, bool enable);
112 	int			(*mac_tx_enable)(void *cgxd, int lmac_id, bool enable);
113 };
114 
115 struct cgx {
116 	void __iomem		*reg_base;
117 	struct pci_dev		*pdev;
118 	u8			cgx_id;
119 	u8			lmac_count;
120 	struct lmac		*lmac_idmap[MAX_LMAC_PER_CGX];
121 	struct			work_struct cgx_cmd_work;
122 	struct			workqueue_struct *cgx_cmd_workq;
123 	struct list_head	cgx_list;
124 	u64			hw_features;
125 	struct mac_ops		*mac_ops;
126 	unsigned long		lmac_bmap; /* bitmap of enabled lmacs */
127 	/* Lock to serialize read/write of global csrs like
128 	 * RPMX_MTI_STAT_DATA_HI_CDC etc
129 	 */
130 	struct mutex		lock;
131 };
132 
133 typedef struct cgx rpm_t;
134 
135 /* Function Declarations */
136 void cgx_write(struct cgx *cgx, u64 lmac, u64 offset, u64 val);
137 u64 cgx_read(struct cgx *cgx, u64 lmac, u64 offset);
138 struct lmac *lmac_pdata(u8 lmac_id, struct cgx *cgx);
139 int cgx_fwi_cmd_send(u64 req, u64 *resp, struct lmac *lmac);
140 int cgx_fwi_cmd_generic(u64 req, u64 *resp, struct cgx *cgx, int lmac_id);
141 bool is_lmac_valid(struct cgx *cgx, int lmac_id);
142 struct mac_ops *rpm_get_mac_ops(void);
143 
144 #endif /* LMAC_COMMON_H */
145