1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 1999 - 2024 Intel Corporation. */ 3 4 #ifndef __IXGBE_VF_H__ 5 #define __IXGBE_VF_H__ 6 7 #include <linux/pci.h> 8 #include <linux/delay.h> 9 #include <linux/interrupt.h> 10 #include <linux/if_ether.h> 11 #include <linux/netdevice.h> 12 13 #include "defines.h" 14 #include "regs.h" 15 #include "mbx.h" 16 17 struct ixgbe_hw; 18 19 struct ixgbe_mac_operations { 20 s32 (*init_hw)(struct ixgbe_hw *); 21 s32 (*reset_hw)(struct ixgbe_hw *); 22 s32 (*start_hw)(struct ixgbe_hw *); 23 s32 (*clear_hw_cntrs)(struct ixgbe_hw *); 24 enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *); 25 s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *); 26 s32 (*stop_adapter)(struct ixgbe_hw *); 27 s32 (*get_bus_info)(struct ixgbe_hw *); 28 s32 (*negotiate_api_version)(struct ixgbe_hw *hw, int api); 29 30 /* Link */ 31 s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool, bool); 32 s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool); 33 s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *, 34 bool *); 35 36 /* RAR, Multicast, VLAN */ 37 s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32); 38 s32 (*set_uc_addr)(struct ixgbe_hw *, u32, u8 *); 39 s32 (*init_rx_addrs)(struct ixgbe_hw *); 40 s32 (*update_mc_addr_list)(struct ixgbe_hw *, struct net_device *); 41 s32 (*update_xcast_mode)(struct ixgbe_hw *, int); 42 s32 (*get_link_state)(struct ixgbe_hw *hw, bool *link_state); 43 s32 (*enable_mc)(struct ixgbe_hw *); 44 s32 (*disable_mc)(struct ixgbe_hw *); 45 s32 (*clear_vfta)(struct ixgbe_hw *); 46 s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool); 47 s32 (*set_rlpml)(struct ixgbe_hw *, u16); 48 }; 49 50 enum ixgbe_mac_type { 51 ixgbe_mac_unknown = 0, 52 ixgbe_mac_82599_vf, 53 ixgbe_mac_X540_vf, 54 ixgbe_mac_X550_vf, 55 ixgbe_mac_X550EM_x_vf, 56 ixgbe_mac_x550em_a_vf, 57 ixgbe_mac_e610, 58 ixgbe_mac_e610_vf, 59 ixgbe_num_macs 60 }; 61 62 struct ixgbe_mac_info { 63 struct ixgbe_mac_operations ops; 64 u8 addr[6]; 65 u8 perm_addr[6]; 66 67 enum ixgbe_mac_type type; 68 69 s32 mc_filter_type; 70 71 bool get_link_status; 72 u32 max_tx_queues; 73 u32 max_rx_queues; 74 u32 max_msix_vectors; 75 }; 76 77 struct ixgbe_mbx_operations { 78 s32 (*init_params)(struct ixgbe_hw *hw); 79 void (*release)(struct ixgbe_hw *hw); 80 s32 (*read)(struct ixgbe_hw *, u32 *, u16); 81 s32 (*write)(struct ixgbe_hw *, u32 *, u16); 82 s32 (*check_for_msg)(struct ixgbe_hw *); 83 s32 (*check_for_ack)(struct ixgbe_hw *); 84 s32 (*check_for_rst)(struct ixgbe_hw *); 85 }; 86 87 struct ixgbe_mbx_stats { 88 u32 msgs_tx; 89 u32 msgs_rx; 90 91 u32 acks; 92 u32 reqs; 93 u32 rsts; 94 }; 95 96 struct ixgbe_mbx_info { 97 struct ixgbe_mbx_operations ops; 98 struct ixgbe_mbx_stats stats; 99 u32 timeout; 100 u32 udelay; 101 u32 vf_mailbox; 102 u16 size; 103 }; 104 105 struct ixgbe_hw { 106 void *back; 107 108 u8 __iomem *hw_addr; 109 110 struct ixgbe_mac_info mac; 111 struct ixgbe_mbx_info mbx; 112 113 u16 device_id; 114 u16 subsystem_vendor_id; 115 u16 subsystem_device_id; 116 u16 vendor_id; 117 118 u8 revision_id; 119 bool adapter_stopped; 120 121 int api_version; 122 }; 123 124 struct ixgbevf_hw_stats { 125 u64 base_vfgprc; 126 u64 base_vfgptc; 127 u64 base_vfgorc; 128 u64 base_vfgotc; 129 u64 base_vfmprc; 130 131 u64 last_vfgprc; 132 u64 last_vfgptc; 133 u64 last_vfgorc; 134 u64 last_vfgotc; 135 u64 last_vfmprc; 136 137 u64 vfgprc; 138 u64 vfgptc; 139 u64 vfgorc; 140 u64 vfgotc; 141 u64 vfmprc; 142 143 u64 saved_reset_vfgprc; 144 u64 saved_reset_vfgptc; 145 u64 saved_reset_vfgorc; 146 u64 saved_reset_vfgotc; 147 u64 saved_reset_vfmprc; 148 }; 149 150 struct ixgbevf_info { 151 enum ixgbe_mac_type mac; 152 const struct ixgbe_mac_operations *mac_ops; 153 }; 154 155 #define IXGBE_FAILED_READ_REG 0xffffffffU 156 157 #define IXGBE_REMOVED(a) unlikely(!(a)) 158 159 static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value) 160 { 161 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); 162 163 if (IXGBE_REMOVED(reg_addr)) 164 return; 165 writel(value, reg_addr + reg); 166 } 167 168 #define IXGBE_WRITE_REG(h, r, v) ixgbe_write_reg(h, r, v) 169 170 u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg); 171 #define IXGBE_READ_REG(h, r) ixgbevf_read_reg(h, r) 172 173 static inline void ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, 174 u32 offset, u32 value) 175 { 176 ixgbe_write_reg(hw, reg + (offset << 2), value); 177 } 178 179 #define IXGBE_WRITE_REG_ARRAY(h, r, o, v) ixgbe_write_reg_array(h, r, o, v) 180 181 static inline u32 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, 182 u32 offset) 183 { 184 return ixgbevf_read_reg(hw, reg + (offset << 2)); 185 } 186 187 #define IXGBE_READ_REG_ARRAY(h, r, o) ixgbe_read_reg_array(h, r, o) 188 189 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 190 unsigned int *default_tc); 191 int ixgbevf_get_reta_locked(struct ixgbe_hw *hw, u32 *reta, int num_rx_queues); 192 int ixgbevf_get_rss_key_locked(struct ixgbe_hw *hw, u8 *rss_key); 193 #endif /* __IXGBE_VF_H__ */ 194