1 /******************************************************************************* 2 3 Intel 82599 Virtual Function driver 4 Copyright(c) 1999 - 2015 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, see <http://www.gnu.org/licenses/>. 17 18 The full GNU General Public License is included in this distribution in 19 the file called "COPYING". 20 21 Contact Information: 22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 25 *******************************************************************************/ 26 27 #ifndef _IXGBEVF_H_ 28 #define _IXGBEVF_H_ 29 30 #include <linux/types.h> 31 #include <linux/bitops.h> 32 #include <linux/timer.h> 33 #include <linux/io.h> 34 #include <linux/netdevice.h> 35 #include <linux/if_vlan.h> 36 #include <linux/u64_stats_sync.h> 37 38 #include "vf.h" 39 40 #define IXGBE_MAX_TXD_PWR 14 41 #define IXGBE_MAX_DATA_PER_TXD BIT(IXGBE_MAX_TXD_PWR) 42 43 /* Tx Descriptors needed, worst case */ 44 #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD) 45 #define DESC_NEEDED (MAX_SKB_FRAGS + 4) 46 47 /* wrapper around a pointer to a socket buffer, 48 * so a DMA handle can be stored along with the buffer 49 */ 50 struct ixgbevf_tx_buffer { 51 union ixgbe_adv_tx_desc *next_to_watch; 52 unsigned long time_stamp; 53 struct sk_buff *skb; 54 unsigned int bytecount; 55 unsigned short gso_segs; 56 __be16 protocol; 57 DEFINE_DMA_UNMAP_ADDR(dma); 58 DEFINE_DMA_UNMAP_LEN(len); 59 u32 tx_flags; 60 }; 61 62 struct ixgbevf_rx_buffer { 63 dma_addr_t dma; 64 struct page *page; 65 #if (BITS_PER_LONG > 32) || (PAGE_SIZE >= 65536) 66 __u32 page_offset; 67 #else 68 __u16 page_offset; 69 #endif 70 __u16 pagecnt_bias; 71 }; 72 73 struct ixgbevf_stats { 74 u64 packets; 75 u64 bytes; 76 }; 77 78 struct ixgbevf_tx_queue_stats { 79 u64 restart_queue; 80 u64 tx_busy; 81 u64 tx_done_old; 82 }; 83 84 struct ixgbevf_rx_queue_stats { 85 u64 alloc_rx_page_failed; 86 u64 alloc_rx_buff_failed; 87 u64 alloc_rx_page; 88 u64 csum_err; 89 }; 90 91 enum ixgbevf_ring_state_t { 92 __IXGBEVF_RX_3K_BUFFER, 93 __IXGBEVF_RX_BUILD_SKB_ENABLED, 94 __IXGBEVF_TX_DETECT_HANG, 95 __IXGBEVF_HANG_CHECK_ARMED, 96 }; 97 98 struct ixgbevf_ring { 99 struct ixgbevf_ring *next; 100 struct ixgbevf_q_vector *q_vector; /* backpointer to q_vector */ 101 struct net_device *netdev; 102 struct device *dev; 103 void *desc; /* descriptor ring memory */ 104 dma_addr_t dma; /* phys. address of descriptor ring */ 105 unsigned int size; /* length in bytes */ 106 u16 count; /* amount of descriptors */ 107 u16 next_to_use; 108 u16 next_to_clean; 109 u16 next_to_alloc; 110 111 union { 112 struct ixgbevf_tx_buffer *tx_buffer_info; 113 struct ixgbevf_rx_buffer *rx_buffer_info; 114 }; 115 unsigned long state; 116 struct ixgbevf_stats stats; 117 struct u64_stats_sync syncp; 118 union { 119 struct ixgbevf_tx_queue_stats tx_stats; 120 struct ixgbevf_rx_queue_stats rx_stats; 121 }; 122 123 u64 hw_csum_rx_error; 124 u8 __iomem *tail; 125 struct sk_buff *skb; 126 127 /* holds the special value that gets the hardware register offset 128 * associated with this ring, which is different for DCB and RSS modes 129 */ 130 u16 reg_idx; 131 int queue_index; /* needed for multiqueue queue management */ 132 } ____cacheline_internodealigned_in_smp; 133 134 /* How many Rx Buffers do we bundle into one write to the hardware ? */ 135 #define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 136 137 #define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES 138 #define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES 139 #define IXGBEVF_MAX_RSS_QUEUES 2 140 #define IXGBEVF_82599_RETA_SIZE 128 /* 128 entries */ 141 #define IXGBEVF_X550_VFRETA_SIZE 64 /* 64 entries */ 142 #define IXGBEVF_RSS_HASH_KEY_SIZE 40 143 #define IXGBEVF_VFRSSRK_REGS 10 /* 10 registers for RSS key */ 144 145 #define IXGBEVF_DEFAULT_TXD 1024 146 #define IXGBEVF_DEFAULT_RXD 512 147 #define IXGBEVF_MAX_TXD 4096 148 #define IXGBEVF_MIN_TXD 64 149 #define IXGBEVF_MAX_RXD 4096 150 #define IXGBEVF_MIN_RXD 64 151 152 /* Supported Rx Buffer Sizes */ 153 #define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */ 154 #define IXGBEVF_RXBUFFER_2048 2048 155 #define IXGBEVF_RXBUFFER_3072 3072 156 157 #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256 158 159 #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) 160 161 #define IXGBEVF_SKB_PAD (NET_SKB_PAD + NET_IP_ALIGN) 162 #if (PAGE_SIZE < 8192) 163 #define IXGBEVF_MAX_FRAME_BUILD_SKB \ 164 (SKB_WITH_OVERHEAD(IXGBEVF_RXBUFFER_2048) - IXGBEVF_SKB_PAD) 165 #else 166 #define IXGBEVF_MAX_FRAME_BUILD_SKB IXGBEVF_RXBUFFER_2048 167 #endif 168 169 #define IXGBE_TX_FLAGS_CSUM BIT(0) 170 #define IXGBE_TX_FLAGS_VLAN BIT(1) 171 #define IXGBE_TX_FLAGS_TSO BIT(2) 172 #define IXGBE_TX_FLAGS_IPV4 BIT(3) 173 #define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000 174 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000 175 #define IXGBE_TX_FLAGS_VLAN_SHIFT 16 176 177 #define ring_uses_large_buffer(ring) \ 178 test_bit(__IXGBEVF_RX_3K_BUFFER, &(ring)->state) 179 #define set_ring_uses_large_buffer(ring) \ 180 set_bit(__IXGBEVF_RX_3K_BUFFER, &(ring)->state) 181 #define clear_ring_uses_large_buffer(ring) \ 182 clear_bit(__IXGBEVF_RX_3K_BUFFER, &(ring)->state) 183 184 #define ring_uses_build_skb(ring) \ 185 test_bit(__IXGBEVF_RX_BUILD_SKB_ENABLED, &(ring)->state) 186 #define set_ring_build_skb_enabled(ring) \ 187 set_bit(__IXGBEVF_RX_BUILD_SKB_ENABLED, &(ring)->state) 188 #define clear_ring_build_skb_enabled(ring) \ 189 clear_bit(__IXGBEVF_RX_BUILD_SKB_ENABLED, &(ring)->state) 190 191 static inline unsigned int ixgbevf_rx_bufsz(struct ixgbevf_ring *ring) 192 { 193 #if (PAGE_SIZE < 8192) 194 if (ring_uses_large_buffer(ring)) 195 return IXGBEVF_RXBUFFER_3072; 196 197 if (ring_uses_build_skb(ring)) 198 return IXGBEVF_MAX_FRAME_BUILD_SKB; 199 #endif 200 return IXGBEVF_RXBUFFER_2048; 201 } 202 203 static inline unsigned int ixgbevf_rx_pg_order(struct ixgbevf_ring *ring) 204 { 205 #if (PAGE_SIZE < 8192) 206 if (ring_uses_large_buffer(ring)) 207 return 1; 208 #endif 209 return 0; 210 } 211 212 #define ixgbevf_rx_pg_size(_ring) (PAGE_SIZE << ixgbevf_rx_pg_order(_ring)) 213 214 #define check_for_tx_hang(ring) \ 215 test_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 216 #define set_check_for_tx_hang(ring) \ 217 set_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 218 #define clear_check_for_tx_hang(ring) \ 219 clear_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 220 221 struct ixgbevf_ring_container { 222 struct ixgbevf_ring *ring; /* pointer to linked list of rings */ 223 unsigned int total_bytes; /* total bytes processed this int */ 224 unsigned int total_packets; /* total packets processed this int */ 225 u8 count; /* total number of rings in vector */ 226 u8 itr; /* current ITR setting for ring */ 227 }; 228 229 /* iterator for handling rings in ring container */ 230 #define ixgbevf_for_each_ring(pos, head) \ 231 for (pos = (head).ring; pos != NULL; pos = pos->next) 232 233 /* MAX_MSIX_Q_VECTORS of these are allocated, 234 * but we only use one per queue-specific vector. 235 */ 236 struct ixgbevf_q_vector { 237 struct ixgbevf_adapter *adapter; 238 /* index of q_vector within array, also used for finding the bit in 239 * EICR and friends that represents the vector for this ring 240 */ 241 u16 v_idx; 242 u16 itr; /* Interrupt throttle rate written to EITR */ 243 struct napi_struct napi; 244 struct ixgbevf_ring_container rx, tx; 245 struct rcu_head rcu; /* to avoid race with update stats on free */ 246 char name[IFNAMSIZ + 9]; 247 248 /* for dynamic allocation of rings associated with this q_vector */ 249 struct ixgbevf_ring ring[0] ____cacheline_internodealigned_in_smp; 250 #ifdef CONFIG_NET_RX_BUSY_POLL 251 unsigned int state; 252 #define IXGBEVF_QV_STATE_IDLE 0 253 #define IXGBEVF_QV_STATE_NAPI 1 /* NAPI owns this QV */ 254 #define IXGBEVF_QV_STATE_POLL 2 /* poll owns this QV */ 255 #define IXGBEVF_QV_STATE_DISABLED 4 /* QV is disabled */ 256 #define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL) 257 #define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED) 258 #define IXGBEVF_QV_STATE_NAPI_YIELD 8 /* NAPI yielded this QV */ 259 #define IXGBEVF_QV_STATE_POLL_YIELD 16 /* poll yielded this QV */ 260 #define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | \ 261 IXGBEVF_QV_STATE_POLL_YIELD) 262 #define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | \ 263 IXGBEVF_QV_STATE_POLL_YIELD) 264 spinlock_t lock; 265 #endif /* CONFIG_NET_RX_BUSY_POLL */ 266 }; 267 268 /* microsecond values for various ITR rates shifted by 2 to fit itr register 269 * with the first 3 bits reserved 0 270 */ 271 #define IXGBE_MIN_RSC_ITR 24 272 #define IXGBE_100K_ITR 40 273 #define IXGBE_20K_ITR 200 274 #define IXGBE_12K_ITR 336 275 276 /* Helper macros to switch between ints/sec and what the register uses. 277 * And yes, it's the same math going both ways. The lowest value 278 * supported by all of the ixgbe hardware is 8. 279 */ 280 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \ 281 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8) 282 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG 283 284 /* ixgbevf_test_staterr - tests bits in Rx descriptor status and error fields */ 285 static inline __le32 ixgbevf_test_staterr(union ixgbe_adv_rx_desc *rx_desc, 286 const u32 stat_err_bits) 287 { 288 return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits); 289 } 290 291 static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring) 292 { 293 u16 ntc = ring->next_to_clean; 294 u16 ntu = ring->next_to_use; 295 296 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1; 297 } 298 299 static inline void ixgbevf_write_tail(struct ixgbevf_ring *ring, u32 value) 300 { 301 writel(value, ring->tail); 302 } 303 304 #define IXGBEVF_RX_DESC(R, i) \ 305 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i])) 306 #define IXGBEVF_TX_DESC(R, i) \ 307 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i])) 308 #define IXGBEVF_TX_CTXTDESC(R, i) \ 309 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i])) 310 311 #define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */ 312 313 #define OTHER_VECTOR 1 314 #define NON_Q_VECTORS (OTHER_VECTOR) 315 316 #define MAX_MSIX_Q_VECTORS 2 317 318 #define MIN_MSIX_Q_VECTORS 1 319 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS) 320 321 #define IXGBEVF_RX_DMA_ATTR \ 322 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING) 323 324 /* board specific private data structure */ 325 struct ixgbevf_adapter { 326 /* this field must be first, see ixgbevf_process_skb_fields */ 327 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 328 329 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS]; 330 331 /* Interrupt Throttle Rate */ 332 u16 rx_itr_setting; 333 u16 tx_itr_setting; 334 335 /* interrupt masks */ 336 u32 eims_enable_mask; 337 u32 eims_other; 338 339 /* TX */ 340 int num_tx_queues; 341 struct ixgbevf_ring *tx_ring[MAX_TX_QUEUES]; /* One per active queue */ 342 u64 restart_queue; 343 u32 tx_timeout_count; 344 345 /* RX */ 346 int num_rx_queues; 347 struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */ 348 u64 hw_csum_rx_error; 349 u64 hw_rx_no_dma_resources; 350 int num_msix_vectors; 351 u64 alloc_rx_page_failed; 352 u64 alloc_rx_buff_failed; 353 u64 alloc_rx_page; 354 355 struct msix_entry *msix_entries; 356 357 /* OS defined structs */ 358 struct net_device *netdev; 359 struct pci_dev *pdev; 360 361 /* structs defined in ixgbe_vf.h */ 362 struct ixgbe_hw hw; 363 u16 msg_enable; 364 /* Interrupt Throttle Rate */ 365 u32 eitr_param; 366 367 struct ixgbevf_hw_stats stats; 368 369 unsigned long state; 370 u64 tx_busy; 371 unsigned int tx_ring_count; 372 unsigned int rx_ring_count; 373 374 u8 __iomem *io_addr; /* Mainly for iounmap use */ 375 u32 link_speed; 376 bool link_up; 377 378 struct timer_list service_timer; 379 struct work_struct service_task; 380 381 spinlock_t mbx_lock; 382 unsigned long last_reset; 383 384 u32 *rss_key; 385 u8 rss_indir_tbl[IXGBEVF_X550_VFRETA_SIZE]; 386 u32 flags; 387 #define IXGBEVF_FLAGS_LEGACY_RX BIT(1) 388 }; 389 390 enum ixbgevf_state_t { 391 __IXGBEVF_TESTING, 392 __IXGBEVF_RESETTING, 393 __IXGBEVF_DOWN, 394 __IXGBEVF_DISABLED, 395 __IXGBEVF_REMOVING, 396 __IXGBEVF_SERVICE_SCHED, 397 __IXGBEVF_SERVICE_INITED, 398 __IXGBEVF_RESET_REQUESTED, 399 __IXGBEVF_QUEUE_RESET_REQUESTED, 400 }; 401 402 enum ixgbevf_boards { 403 board_82599_vf, 404 board_82599_vf_hv, 405 board_X540_vf, 406 board_X540_vf_hv, 407 board_X550_vf, 408 board_X550_vf_hv, 409 board_X550EM_x_vf, 410 board_X550EM_x_vf_hv, 411 board_x550em_a_vf, 412 }; 413 414 enum ixgbevf_xcast_modes { 415 IXGBEVF_XCAST_MODE_NONE = 0, 416 IXGBEVF_XCAST_MODE_MULTI, 417 IXGBEVF_XCAST_MODE_ALLMULTI, 418 IXGBEVF_XCAST_MODE_PROMISC, 419 }; 420 421 extern const struct ixgbevf_info ixgbevf_82599_vf_info; 422 extern const struct ixgbevf_info ixgbevf_X540_vf_info; 423 extern const struct ixgbevf_info ixgbevf_X550_vf_info; 424 extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_info; 425 extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops; 426 extern const struct ixgbevf_info ixgbevf_x550em_a_vf_info; 427 428 extern const struct ixgbevf_info ixgbevf_82599_vf_hv_info; 429 extern const struct ixgbevf_info ixgbevf_X540_vf_hv_info; 430 extern const struct ixgbevf_info ixgbevf_X550_vf_hv_info; 431 extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_hv_info; 432 extern const struct ixgbe_mbx_operations ixgbevf_hv_mbx_ops; 433 434 /* needed by ethtool.c */ 435 extern const char ixgbevf_driver_name[]; 436 extern const char ixgbevf_driver_version[]; 437 438 int ixgbevf_open(struct net_device *netdev); 439 int ixgbevf_close(struct net_device *netdev); 440 void ixgbevf_up(struct ixgbevf_adapter *adapter); 441 void ixgbevf_down(struct ixgbevf_adapter *adapter); 442 void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter); 443 void ixgbevf_reset(struct ixgbevf_adapter *adapter); 444 void ixgbevf_set_ethtool_ops(struct net_device *netdev); 445 int ixgbevf_setup_rx_resources(struct ixgbevf_ring *); 446 int ixgbevf_setup_tx_resources(struct ixgbevf_ring *); 447 void ixgbevf_free_rx_resources(struct ixgbevf_ring *); 448 void ixgbevf_free_tx_resources(struct ixgbevf_ring *); 449 void ixgbevf_update_stats(struct ixgbevf_adapter *adapter); 450 int ethtool_ioctl(struct ifreq *ifr); 451 452 extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector); 453 454 void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter); 455 void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter); 456 457 #define ixgbevf_hw_to_netdev(hw) \ 458 (((struct ixgbevf_adapter *)(hw)->back)->netdev) 459 460 #define hw_dbg(hw, format, arg...) \ 461 netdev_dbg(ixgbevf_hw_to_netdev(hw), format, ## arg) 462 #endif /* _IXGBEVF_H_ */ 463