1 /******************************************************************************* 2 3 Intel 82599 Virtual Function driver 4 Copyright(c) 1999 - 2015 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, see <http://www.gnu.org/licenses/>. 17 18 The full GNU General Public License is included in this distribution in 19 the file called "COPYING". 20 21 Contact Information: 22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 25 *******************************************************************************/ 26 27 #ifndef _IXGBEVF_H_ 28 #define _IXGBEVF_H_ 29 30 #include <linux/types.h> 31 #include <linux/bitops.h> 32 #include <linux/timer.h> 33 #include <linux/io.h> 34 #include <linux/netdevice.h> 35 #include <linux/if_vlan.h> 36 #include <linux/u64_stats_sync.h> 37 38 #include "vf.h" 39 40 #ifdef CONFIG_NET_RX_BUSY_POLL 41 #include <net/busy_poll.h> 42 #define BP_EXTENDED_STATS 43 #endif 44 45 #define IXGBE_MAX_TXD_PWR 14 46 #define IXGBE_MAX_DATA_PER_TXD BIT(IXGBE_MAX_TXD_PWR) 47 48 /* Tx Descriptors needed, worst case */ 49 #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD) 50 #define DESC_NEEDED (MAX_SKB_FRAGS + 4) 51 52 /* wrapper around a pointer to a socket buffer, 53 * so a DMA handle can be stored along with the buffer 54 */ 55 struct ixgbevf_tx_buffer { 56 union ixgbe_adv_tx_desc *next_to_watch; 57 unsigned long time_stamp; 58 struct sk_buff *skb; 59 unsigned int bytecount; 60 unsigned short gso_segs; 61 __be16 protocol; 62 DEFINE_DMA_UNMAP_ADDR(dma); 63 DEFINE_DMA_UNMAP_LEN(len); 64 u32 tx_flags; 65 }; 66 67 struct ixgbevf_rx_buffer { 68 dma_addr_t dma; 69 struct page *page; 70 unsigned int page_offset; 71 }; 72 73 struct ixgbevf_stats { 74 u64 packets; 75 u64 bytes; 76 #ifdef BP_EXTENDED_STATS 77 u64 yields; 78 u64 misses; 79 u64 cleaned; 80 #endif 81 }; 82 83 struct ixgbevf_tx_queue_stats { 84 u64 restart_queue; 85 u64 tx_busy; 86 u64 tx_done_old; 87 }; 88 89 struct ixgbevf_rx_queue_stats { 90 u64 alloc_rx_page_failed; 91 u64 alloc_rx_buff_failed; 92 u64 csum_err; 93 }; 94 95 enum ixgbevf_ring_state_t { 96 __IXGBEVF_TX_DETECT_HANG, 97 __IXGBEVF_HANG_CHECK_ARMED, 98 }; 99 100 #define check_for_tx_hang(ring) \ 101 test_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 102 #define set_check_for_tx_hang(ring) \ 103 set_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 104 #define clear_check_for_tx_hang(ring) \ 105 clear_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 106 107 struct ixgbevf_ring { 108 struct ixgbevf_ring *next; 109 struct net_device *netdev; 110 struct device *dev; 111 void *desc; /* descriptor ring memory */ 112 dma_addr_t dma; /* phys. address of descriptor ring */ 113 unsigned int size; /* length in bytes */ 114 u16 count; /* amount of descriptors */ 115 u16 next_to_use; 116 u16 next_to_clean; 117 u16 next_to_alloc; 118 119 union { 120 struct ixgbevf_tx_buffer *tx_buffer_info; 121 struct ixgbevf_rx_buffer *rx_buffer_info; 122 }; 123 unsigned long state; 124 struct ixgbevf_stats stats; 125 struct u64_stats_sync syncp; 126 union { 127 struct ixgbevf_tx_queue_stats tx_stats; 128 struct ixgbevf_rx_queue_stats rx_stats; 129 }; 130 131 u64 hw_csum_rx_error; 132 u8 __iomem *tail; 133 struct sk_buff *skb; 134 135 /* holds the special value that gets the hardware register offset 136 * associated with this ring, which is different for DCB and RSS modes 137 */ 138 u16 reg_idx; 139 int queue_index; /* needed for multiqueue queue management */ 140 }; 141 142 /* How many Rx Buffers do we bundle into one write to the hardware ? */ 143 #define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 144 145 #define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES 146 #define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES 147 #define IXGBEVF_MAX_RSS_QUEUES 2 148 #define IXGBEVF_82599_RETA_SIZE 128 /* 128 entries */ 149 #define IXGBEVF_X550_VFRETA_SIZE 64 /* 64 entries */ 150 #define IXGBEVF_RSS_HASH_KEY_SIZE 40 151 #define IXGBEVF_VFRSSRK_REGS 10 /* 10 registers for RSS key */ 152 153 #define IXGBEVF_DEFAULT_TXD 1024 154 #define IXGBEVF_DEFAULT_RXD 512 155 #define IXGBEVF_MAX_TXD 4096 156 #define IXGBEVF_MIN_TXD 64 157 #define IXGBEVF_MAX_RXD 4096 158 #define IXGBEVF_MIN_RXD 64 159 160 /* Supported Rx Buffer Sizes */ 161 #define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */ 162 #define IXGBEVF_RXBUFFER_2048 2048 163 164 #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256 165 #define IXGBEVF_RX_BUFSZ IXGBEVF_RXBUFFER_2048 166 167 #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) 168 169 #define IXGBE_TX_FLAGS_CSUM (u32)(1) 170 #define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1) 171 #define IXGBE_TX_FLAGS_TSO (u32)(1 << 2) 172 #define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3) 173 #define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000 174 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000 175 #define IXGBE_TX_FLAGS_VLAN_SHIFT 16 176 177 struct ixgbevf_ring_container { 178 struct ixgbevf_ring *ring; /* pointer to linked list of rings */ 179 unsigned int total_bytes; /* total bytes processed this int */ 180 unsigned int total_packets; /* total packets processed this int */ 181 u8 count; /* total number of rings in vector */ 182 u8 itr; /* current ITR setting for ring */ 183 }; 184 185 /* iterator for handling rings in ring container */ 186 #define ixgbevf_for_each_ring(pos, head) \ 187 for (pos = (head).ring; pos != NULL; pos = pos->next) 188 189 /* MAX_MSIX_Q_VECTORS of these are allocated, 190 * but we only use one per queue-specific vector. 191 */ 192 struct ixgbevf_q_vector { 193 struct ixgbevf_adapter *adapter; 194 /* index of q_vector within array, also used for finding the bit in 195 * EICR and friends that represents the vector for this ring 196 */ 197 u16 v_idx; 198 u16 itr; /* Interrupt throttle rate written to EITR */ 199 struct napi_struct napi; 200 struct ixgbevf_ring_container rx, tx; 201 char name[IFNAMSIZ + 9]; 202 #ifdef CONFIG_NET_RX_BUSY_POLL 203 unsigned int state; 204 #define IXGBEVF_QV_STATE_IDLE 0 205 #define IXGBEVF_QV_STATE_NAPI 1 /* NAPI owns this QV */ 206 #define IXGBEVF_QV_STATE_POLL 2 /* poll owns this QV */ 207 #define IXGBEVF_QV_STATE_DISABLED 4 /* QV is disabled */ 208 #define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL) 209 #define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED) 210 #define IXGBEVF_QV_STATE_NAPI_YIELD 8 /* NAPI yielded this QV */ 211 #define IXGBEVF_QV_STATE_POLL_YIELD 16 /* poll yielded this QV */ 212 #define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | \ 213 IXGBEVF_QV_STATE_POLL_YIELD) 214 #define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | \ 215 IXGBEVF_QV_STATE_POLL_YIELD) 216 spinlock_t lock; 217 #endif /* CONFIG_NET_RX_BUSY_POLL */ 218 }; 219 220 #ifdef CONFIG_NET_RX_BUSY_POLL 221 static inline void ixgbevf_qv_init_lock(struct ixgbevf_q_vector *q_vector) 222 { 223 spin_lock_init(&q_vector->lock); 224 q_vector->state = IXGBEVF_QV_STATE_IDLE; 225 } 226 227 /* called from the device poll routine to get ownership of a q_vector */ 228 static inline bool ixgbevf_qv_lock_napi(struct ixgbevf_q_vector *q_vector) 229 { 230 int rc = true; 231 232 spin_lock_bh(&q_vector->lock); 233 if (q_vector->state & IXGBEVF_QV_LOCKED) { 234 WARN_ON(q_vector->state & IXGBEVF_QV_STATE_NAPI); 235 q_vector->state |= IXGBEVF_QV_STATE_NAPI_YIELD; 236 rc = false; 237 #ifdef BP_EXTENDED_STATS 238 q_vector->tx.ring->stats.yields++; 239 #endif 240 } else { 241 /* we don't care if someone yielded */ 242 q_vector->state = IXGBEVF_QV_STATE_NAPI; 243 } 244 spin_unlock_bh(&q_vector->lock); 245 return rc; 246 } 247 248 /* returns true is someone tried to get the qv while napi had it */ 249 static inline bool ixgbevf_qv_unlock_napi(struct ixgbevf_q_vector *q_vector) 250 { 251 int rc = false; 252 253 spin_lock_bh(&q_vector->lock); 254 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_POLL | 255 IXGBEVF_QV_STATE_NAPI_YIELD)); 256 257 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD) 258 rc = true; 259 /* reset state to idle, unless QV is disabled */ 260 q_vector->state &= IXGBEVF_QV_STATE_DISABLED; 261 spin_unlock_bh(&q_vector->lock); 262 return rc; 263 } 264 265 /* called from ixgbevf_low_latency_poll() */ 266 static inline bool ixgbevf_qv_lock_poll(struct ixgbevf_q_vector *q_vector) 267 { 268 int rc = true; 269 270 spin_lock_bh(&q_vector->lock); 271 if ((q_vector->state & IXGBEVF_QV_LOCKED)) { 272 q_vector->state |= IXGBEVF_QV_STATE_POLL_YIELD; 273 rc = false; 274 #ifdef BP_EXTENDED_STATS 275 q_vector->rx.ring->stats.yields++; 276 #endif 277 } else { 278 /* preserve yield marks */ 279 q_vector->state |= IXGBEVF_QV_STATE_POLL; 280 } 281 spin_unlock_bh(&q_vector->lock); 282 return rc; 283 } 284 285 /* returns true if someone tried to get the qv while it was locked */ 286 static inline bool ixgbevf_qv_unlock_poll(struct ixgbevf_q_vector *q_vector) 287 { 288 int rc = false; 289 290 spin_lock_bh(&q_vector->lock); 291 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_NAPI)); 292 293 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD) 294 rc = true; 295 /* reset state to idle, unless QV is disabled */ 296 q_vector->state &= IXGBEVF_QV_STATE_DISABLED; 297 spin_unlock_bh(&q_vector->lock); 298 return rc; 299 } 300 301 /* true if a socket is polling, even if it did not get the lock */ 302 static inline bool ixgbevf_qv_busy_polling(struct ixgbevf_q_vector *q_vector) 303 { 304 WARN_ON(!(q_vector->state & IXGBEVF_QV_OWNED)); 305 return q_vector->state & IXGBEVF_QV_USER_PEND; 306 } 307 308 /* false if QV is currently owned */ 309 static inline bool ixgbevf_qv_disable(struct ixgbevf_q_vector *q_vector) 310 { 311 int rc = true; 312 313 spin_lock_bh(&q_vector->lock); 314 if (q_vector->state & IXGBEVF_QV_OWNED) 315 rc = false; 316 q_vector->state |= IXGBEVF_QV_STATE_DISABLED; 317 spin_unlock_bh(&q_vector->lock); 318 return rc; 319 } 320 321 #endif /* CONFIG_NET_RX_BUSY_POLL */ 322 323 /* microsecond values for various ITR rates shifted by 2 to fit itr register 324 * with the first 3 bits reserved 0 325 */ 326 #define IXGBE_MIN_RSC_ITR 24 327 #define IXGBE_100K_ITR 40 328 #define IXGBE_20K_ITR 200 329 #define IXGBE_10K_ITR 400 330 #define IXGBE_8K_ITR 500 331 332 /* Helper macros to switch between ints/sec and what the register uses. 333 * And yes, it's the same math going both ways. The lowest value 334 * supported by all of the ixgbe hardware is 8. 335 */ 336 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \ 337 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8) 338 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG 339 340 /* ixgbevf_test_staterr - tests bits in Rx descriptor status and error fields */ 341 static inline __le32 ixgbevf_test_staterr(union ixgbe_adv_rx_desc *rx_desc, 342 const u32 stat_err_bits) 343 { 344 return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits); 345 } 346 347 static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring) 348 { 349 u16 ntc = ring->next_to_clean; 350 u16 ntu = ring->next_to_use; 351 352 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1; 353 } 354 355 static inline void ixgbevf_write_tail(struct ixgbevf_ring *ring, u32 value) 356 { 357 writel(value, ring->tail); 358 } 359 360 #define IXGBEVF_RX_DESC(R, i) \ 361 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i])) 362 #define IXGBEVF_TX_DESC(R, i) \ 363 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i])) 364 #define IXGBEVF_TX_CTXTDESC(R, i) \ 365 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i])) 366 367 #define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */ 368 369 #define OTHER_VECTOR 1 370 #define NON_Q_VECTORS (OTHER_VECTOR) 371 372 #define MAX_MSIX_Q_VECTORS 2 373 374 #define MIN_MSIX_Q_VECTORS 1 375 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS) 376 377 /* board specific private data structure */ 378 struct ixgbevf_adapter { 379 /* this field must be first, see ixgbevf_process_skb_fields */ 380 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 381 382 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS]; 383 384 /* Interrupt Throttle Rate */ 385 u16 rx_itr_setting; 386 u16 tx_itr_setting; 387 388 /* interrupt masks */ 389 u32 eims_enable_mask; 390 u32 eims_other; 391 392 /* TX */ 393 int num_tx_queues; 394 struct ixgbevf_ring *tx_ring[MAX_TX_QUEUES]; /* One per active queue */ 395 u64 restart_queue; 396 u32 tx_timeout_count; 397 398 /* RX */ 399 int num_rx_queues; 400 struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */ 401 u64 hw_csum_rx_error; 402 u64 hw_rx_no_dma_resources; 403 int num_msix_vectors; 404 u32 alloc_rx_page_failed; 405 u32 alloc_rx_buff_failed; 406 407 /* Some features need tri-state capability, 408 * thus the additional *_CAPABLE flags. 409 */ 410 u32 flags; 411 #define IXGBEVF_FLAG_RESET_REQUESTED (u32)(1) 412 #define IXGBEVF_FLAG_QUEUE_RESET_REQUESTED (u32)(1 << 2) 413 414 struct msix_entry *msix_entries; 415 416 /* OS defined structs */ 417 struct net_device *netdev; 418 struct pci_dev *pdev; 419 420 /* structs defined in ixgbe_vf.h */ 421 struct ixgbe_hw hw; 422 u16 msg_enable; 423 /* Interrupt Throttle Rate */ 424 u32 eitr_param; 425 426 struct ixgbevf_hw_stats stats; 427 428 unsigned long state; 429 u64 tx_busy; 430 unsigned int tx_ring_count; 431 unsigned int rx_ring_count; 432 433 #ifdef BP_EXTENDED_STATS 434 u64 bp_rx_yields; 435 u64 bp_rx_cleaned; 436 u64 bp_rx_missed; 437 438 u64 bp_tx_yields; 439 u64 bp_tx_cleaned; 440 u64 bp_tx_missed; 441 #endif 442 443 u8 __iomem *io_addr; /* Mainly for iounmap use */ 444 u32 link_speed; 445 bool link_up; 446 447 struct timer_list service_timer; 448 struct work_struct service_task; 449 450 spinlock_t mbx_lock; 451 unsigned long last_reset; 452 453 u32 rss_key[IXGBEVF_VFRSSRK_REGS]; 454 u8 rss_indir_tbl[IXGBEVF_X550_VFRETA_SIZE]; 455 }; 456 457 enum ixbgevf_state_t { 458 __IXGBEVF_TESTING, 459 __IXGBEVF_RESETTING, 460 __IXGBEVF_DOWN, 461 __IXGBEVF_DISABLED, 462 __IXGBEVF_REMOVING, 463 __IXGBEVF_SERVICE_SCHED, 464 __IXGBEVF_SERVICE_INITED, 465 }; 466 467 enum ixgbevf_boards { 468 board_82599_vf, 469 board_X540_vf, 470 board_X550_vf, 471 board_X550EM_x_vf, 472 }; 473 474 extern const struct ixgbevf_info ixgbevf_82599_vf_info; 475 extern const struct ixgbevf_info ixgbevf_X540_vf_info; 476 extern const struct ixgbevf_info ixgbevf_X550_vf_info; 477 extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_info; 478 extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops; 479 480 /* needed by ethtool.c */ 481 extern const char ixgbevf_driver_name[]; 482 extern const char ixgbevf_driver_version[]; 483 484 void ixgbevf_up(struct ixgbevf_adapter *adapter); 485 void ixgbevf_down(struct ixgbevf_adapter *adapter); 486 void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter); 487 void ixgbevf_reset(struct ixgbevf_adapter *adapter); 488 void ixgbevf_set_ethtool_ops(struct net_device *netdev); 489 int ixgbevf_setup_rx_resources(struct ixgbevf_ring *); 490 int ixgbevf_setup_tx_resources(struct ixgbevf_ring *); 491 void ixgbevf_free_rx_resources(struct ixgbevf_ring *); 492 void ixgbevf_free_tx_resources(struct ixgbevf_ring *); 493 void ixgbevf_update_stats(struct ixgbevf_adapter *adapter); 494 int ethtool_ioctl(struct ifreq *ifr); 495 496 extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector); 497 498 void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter); 499 void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter); 500 501 #ifdef DEBUG 502 char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw); 503 #define hw_dbg(hw, format, arg...) \ 504 printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg) 505 #else 506 #define hw_dbg(hw, format, arg...) do {} while (0) 507 #endif 508 509 #endif /* _IXGBEVF_H_ */ 510