1 /******************************************************************************* 2 3 Intel 82599 Virtual Function driver 4 Copyright(c) 1999 - 2012 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 26 *******************************************************************************/ 27 28 #ifndef _IXGBEVF_H_ 29 #define _IXGBEVF_H_ 30 31 #include <linux/types.h> 32 #include <linux/bitops.h> 33 #include <linux/timer.h> 34 #include <linux/io.h> 35 #include <linux/netdevice.h> 36 #include <linux/if_vlan.h> 37 #include <linux/u64_stats_sync.h> 38 39 #include "vf.h" 40 41 #ifdef CONFIG_NET_RX_BUSY_POLL 42 #include <net/busy_poll.h> 43 #define BP_EXTENDED_STATS 44 #endif 45 46 /* wrapper around a pointer to a socket buffer, 47 * so a DMA handle can be stored along with the buffer */ 48 struct ixgbevf_tx_buffer { 49 struct sk_buff *skb; 50 dma_addr_t dma; 51 unsigned long time_stamp; 52 union ixgbe_adv_tx_desc *next_to_watch; 53 u16 length; 54 u16 mapped_as_page; 55 }; 56 57 struct ixgbevf_rx_buffer { 58 struct sk_buff *skb; 59 dma_addr_t dma; 60 }; 61 62 struct ixgbevf_ring { 63 struct ixgbevf_ring *next; 64 struct net_device *netdev; 65 struct device *dev; 66 void *desc; /* descriptor ring memory */ 67 dma_addr_t dma; /* phys. address of descriptor ring */ 68 unsigned int size; /* length in bytes */ 69 unsigned int count; /* amount of descriptors */ 70 unsigned int next_to_use; 71 unsigned int next_to_clean; 72 73 int queue_index; /* needed for multiqueue queue management */ 74 union { 75 struct ixgbevf_tx_buffer *tx_buffer_info; 76 struct ixgbevf_rx_buffer *rx_buffer_info; 77 }; 78 79 u64 total_bytes; 80 u64 total_packets; 81 struct u64_stats_sync syncp; 82 u64 hw_csum_rx_error; 83 u64 hw_csum_rx_good; 84 #ifdef BP_EXTENDED_STATS 85 u64 bp_yields; 86 u64 bp_misses; 87 u64 bp_cleaned; 88 #endif 89 90 u16 head; 91 u16 tail; 92 93 u16 reg_idx; /* holds the special value that gets the hardware register 94 * offset associated with this ring, which is different 95 * for DCB and RSS modes */ 96 97 u16 rx_buf_len; 98 }; 99 100 /* How many Rx Buffers do we bundle into one write to the hardware ? */ 101 #define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 102 103 #define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES 104 #define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES 105 106 #define IXGBEVF_DEFAULT_TXD 1024 107 #define IXGBEVF_DEFAULT_RXD 512 108 #define IXGBEVF_MAX_TXD 4096 109 #define IXGBEVF_MIN_TXD 64 110 #define IXGBEVF_MAX_RXD 4096 111 #define IXGBEVF_MIN_RXD 64 112 113 /* Supported Rx Buffer Sizes */ 114 #define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */ 115 #define IXGBEVF_RXBUFFER_2K 2048 116 #define IXGBEVF_RXBUFFER_4K 4096 117 #define IXGBEVF_RXBUFFER_8K 8192 118 #define IXGBEVF_RXBUFFER_10K 10240 119 120 #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256 121 122 #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) 123 124 #define IXGBE_TX_FLAGS_CSUM (u32)(1) 125 #define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1) 126 #define IXGBE_TX_FLAGS_TSO (u32)(1 << 2) 127 #define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3) 128 #define IXGBE_TX_FLAGS_FCOE (u32)(1 << 4) 129 #define IXGBE_TX_FLAGS_FSO (u32)(1 << 5) 130 #define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000 131 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000 132 #define IXGBE_TX_FLAGS_VLAN_SHIFT 16 133 134 struct ixgbevf_ring_container { 135 struct ixgbevf_ring *ring; /* pointer to linked list of rings */ 136 unsigned int total_bytes; /* total bytes processed this int */ 137 unsigned int total_packets; /* total packets processed this int */ 138 u8 count; /* total number of rings in vector */ 139 u8 itr; /* current ITR setting for ring */ 140 }; 141 142 /* iterator for handling rings in ring container */ 143 #define ixgbevf_for_each_ring(pos, head) \ 144 for (pos = (head).ring; pos != NULL; pos = pos->next) 145 146 /* MAX_MSIX_Q_VECTORS of these are allocated, 147 * but we only use one per queue-specific vector. 148 */ 149 struct ixgbevf_q_vector { 150 struct ixgbevf_adapter *adapter; 151 u16 v_idx; /* index of q_vector within array, also used for 152 * finding the bit in EICR and friends that 153 * represents the vector for this ring */ 154 u16 itr; /* Interrupt throttle rate written to EITR */ 155 struct napi_struct napi; 156 struct ixgbevf_ring_container rx, tx; 157 char name[IFNAMSIZ + 9]; 158 #ifdef CONFIG_NET_RX_BUSY_POLL 159 unsigned int state; 160 #define IXGBEVF_QV_STATE_IDLE 0 161 #define IXGBEVF_QV_STATE_NAPI 1 /* NAPI owns this QV */ 162 #define IXGBEVF_QV_STATE_POLL 2 /* poll owns this QV */ 163 #define IXGBEVF_QV_STATE_DISABLED 4 /* QV is disabled */ 164 #define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL) 165 #define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED) 166 #define IXGBEVF_QV_STATE_NAPI_YIELD 8 /* NAPI yielded this QV */ 167 #define IXGBEVF_QV_STATE_POLL_YIELD 16 /* poll yielded this QV */ 168 #define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | IXGBEVF_QV_STATE_POLL_YIELD) 169 #define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | IXGBEVF_QV_STATE_POLL_YIELD) 170 spinlock_t lock; 171 #endif /* CONFIG_NET_RX_BUSY_POLL */ 172 }; 173 #ifdef CONFIG_NET_RX_BUSY_POLL 174 static inline void ixgbevf_qv_init_lock(struct ixgbevf_q_vector *q_vector) 175 { 176 177 spin_lock_init(&q_vector->lock); 178 q_vector->state = IXGBEVF_QV_STATE_IDLE; 179 } 180 181 /* called from the device poll routine to get ownership of a q_vector */ 182 static inline bool ixgbevf_qv_lock_napi(struct ixgbevf_q_vector *q_vector) 183 { 184 int rc = true; 185 spin_lock_bh(&q_vector->lock); 186 if (q_vector->state & IXGBEVF_QV_LOCKED) { 187 WARN_ON(q_vector->state & IXGBEVF_QV_STATE_NAPI); 188 q_vector->state |= IXGBEVF_QV_STATE_NAPI_YIELD; 189 rc = false; 190 #ifdef BP_EXTENDED_STATS 191 q_vector->tx.ring->bp_yields++; 192 #endif 193 } else { 194 /* we don't care if someone yielded */ 195 q_vector->state = IXGBEVF_QV_STATE_NAPI; 196 } 197 spin_unlock_bh(&q_vector->lock); 198 return rc; 199 } 200 201 /* returns true is someone tried to get the qv while napi had it */ 202 static inline bool ixgbevf_qv_unlock_napi(struct ixgbevf_q_vector *q_vector) 203 { 204 int rc = false; 205 spin_lock_bh(&q_vector->lock); 206 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_POLL | 207 IXGBEVF_QV_STATE_NAPI_YIELD)); 208 209 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD) 210 rc = true; 211 /* reset state to idle, unless QV is disabled */ 212 q_vector->state &= IXGBEVF_QV_STATE_DISABLED; 213 spin_unlock_bh(&q_vector->lock); 214 return rc; 215 } 216 217 /* called from ixgbevf_low_latency_poll() */ 218 static inline bool ixgbevf_qv_lock_poll(struct ixgbevf_q_vector *q_vector) 219 { 220 int rc = true; 221 spin_lock_bh(&q_vector->lock); 222 if ((q_vector->state & IXGBEVF_QV_LOCKED)) { 223 q_vector->state |= IXGBEVF_QV_STATE_POLL_YIELD; 224 rc = false; 225 #ifdef BP_EXTENDED_STATS 226 q_vector->rx.ring->bp_yields++; 227 #endif 228 } else { 229 /* preserve yield marks */ 230 q_vector->state |= IXGBEVF_QV_STATE_POLL; 231 } 232 spin_unlock_bh(&q_vector->lock); 233 return rc; 234 } 235 236 /* returns true if someone tried to get the qv while it was locked */ 237 static inline bool ixgbevf_qv_unlock_poll(struct ixgbevf_q_vector *q_vector) 238 { 239 int rc = false; 240 spin_lock_bh(&q_vector->lock); 241 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_NAPI)); 242 243 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD) 244 rc = true; 245 /* reset state to idle, unless QV is disabled */ 246 q_vector->state &= IXGBEVF_QV_STATE_DISABLED; 247 spin_unlock_bh(&q_vector->lock); 248 return rc; 249 } 250 251 /* true if a socket is polling, even if it did not get the lock */ 252 static inline bool ixgbevf_qv_busy_polling(struct ixgbevf_q_vector *q_vector) 253 { 254 WARN_ON(!(q_vector->state & IXGBEVF_QV_OWNED)); 255 return q_vector->state & IXGBEVF_QV_USER_PEND; 256 } 257 258 /* false if QV is currently owned */ 259 static inline bool ixgbevf_qv_disable(struct ixgbevf_q_vector *q_vector) 260 { 261 int rc = true; 262 spin_lock_bh(&q_vector->lock); 263 if (q_vector->state & IXGBEVF_QV_OWNED) 264 rc = false; 265 spin_unlock_bh(&q_vector->lock); 266 return rc; 267 } 268 269 #endif /* CONFIG_NET_RX_BUSY_POLL */ 270 271 /* 272 * microsecond values for various ITR rates shifted by 2 to fit itr register 273 * with the first 3 bits reserved 0 274 */ 275 #define IXGBE_MIN_RSC_ITR 24 276 #define IXGBE_100K_ITR 40 277 #define IXGBE_20K_ITR 200 278 #define IXGBE_10K_ITR 400 279 #define IXGBE_8K_ITR 500 280 281 /* Helper macros to switch between ints/sec and what the register uses. 282 * And yes, it's the same math going both ways. The lowest value 283 * supported by all of the ixgbe hardware is 8. 284 */ 285 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \ 286 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8) 287 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG 288 289 static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring) 290 { 291 u16 ntc = ring->next_to_clean; 292 u16 ntu = ring->next_to_use; 293 294 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1; 295 } 296 297 #define IXGBEVF_RX_DESC(R, i) \ 298 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i])) 299 #define IXGBEVF_TX_DESC(R, i) \ 300 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i])) 301 #define IXGBEVF_TX_CTXTDESC(R, i) \ 302 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i])) 303 304 #define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */ 305 306 #define OTHER_VECTOR 1 307 #define NON_Q_VECTORS (OTHER_VECTOR) 308 309 #define MAX_MSIX_Q_VECTORS 2 310 311 #define MIN_MSIX_Q_VECTORS 1 312 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS) 313 314 /* board specific private data structure */ 315 struct ixgbevf_adapter { 316 struct timer_list watchdog_timer; 317 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 318 u16 bd_number; 319 struct work_struct reset_task; 320 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS]; 321 322 /* Interrupt Throttle Rate */ 323 u16 rx_itr_setting; 324 u16 tx_itr_setting; 325 326 /* interrupt masks */ 327 u32 eims_enable_mask; 328 u32 eims_other; 329 330 /* TX */ 331 struct ixgbevf_ring *tx_ring; /* One per active queue */ 332 int num_tx_queues; 333 u64 restart_queue; 334 u64 hw_csum_tx_good; 335 u64 lsc_int; 336 u64 hw_tso_ctxt; 337 u64 hw_tso6_ctxt; 338 u32 tx_timeout_count; 339 340 /* RX */ 341 struct ixgbevf_ring *rx_ring; /* One per active queue */ 342 int num_rx_queues; 343 u64 hw_csum_rx_error; 344 u64 hw_rx_no_dma_resources; 345 u64 hw_csum_rx_good; 346 u64 non_eop_descs; 347 int num_msix_vectors; 348 struct msix_entry *msix_entries; 349 350 u32 alloc_rx_page_failed; 351 u32 alloc_rx_buff_failed; 352 353 /* Some features need tri-state capability, 354 * thus the additional *_CAPABLE flags. 355 */ 356 u32 flags; 357 #define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1) 358 #define IXGBE_FLAG_IN_NETPOLL (u32)(1 << 1) 359 360 /* OS defined structs */ 361 struct net_device *netdev; 362 struct pci_dev *pdev; 363 364 /* structs defined in ixgbe_vf.h */ 365 struct ixgbe_hw hw; 366 u16 msg_enable; 367 struct ixgbevf_hw_stats stats; 368 /* Interrupt Throttle Rate */ 369 u32 eitr_param; 370 371 unsigned long state; 372 u64 tx_busy; 373 unsigned int tx_ring_count; 374 unsigned int rx_ring_count; 375 376 #ifdef BP_EXTENDED_STATS 377 u64 bp_rx_yields; 378 u64 bp_rx_cleaned; 379 u64 bp_rx_missed; 380 381 u64 bp_tx_yields; 382 u64 bp_tx_cleaned; 383 u64 bp_tx_missed; 384 #endif 385 386 u32 link_speed; 387 bool link_up; 388 389 struct work_struct watchdog_task; 390 391 spinlock_t mbx_lock; 392 }; 393 394 enum ixbgevf_state_t { 395 __IXGBEVF_TESTING, 396 __IXGBEVF_RESETTING, 397 __IXGBEVF_DOWN 398 }; 399 400 struct ixgbevf_cb { 401 struct sk_buff *prev; 402 }; 403 #define IXGBE_CB(skb) ((struct ixgbevf_cb *)(skb)->cb) 404 405 enum ixgbevf_boards { 406 board_82599_vf, 407 board_X540_vf, 408 }; 409 410 extern const struct ixgbevf_info ixgbevf_82599_vf_info; 411 extern const struct ixgbevf_info ixgbevf_X540_vf_info; 412 extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops; 413 414 /* needed by ethtool.c */ 415 extern const char ixgbevf_driver_name[]; 416 extern const char ixgbevf_driver_version[]; 417 418 void ixgbevf_up(struct ixgbevf_adapter *adapter); 419 void ixgbevf_down(struct ixgbevf_adapter *adapter); 420 void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter); 421 void ixgbevf_reset(struct ixgbevf_adapter *adapter); 422 void ixgbevf_set_ethtool_ops(struct net_device *netdev); 423 int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *); 424 int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *); 425 void ixgbevf_free_rx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *); 426 void ixgbevf_free_tx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *); 427 void ixgbevf_update_stats(struct ixgbevf_adapter *adapter); 428 int ethtool_ioctl(struct ifreq *ifr); 429 430 extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector); 431 432 void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter); 433 void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter); 434 435 #ifdef DEBUG 436 char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw); 437 #define hw_dbg(hw, format, arg...) \ 438 printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg) 439 #else 440 #define hw_dbg(hw, format, arg...) do {} while (0) 441 #endif 442 443 #endif /* _IXGBEVF_H_ */ 444