1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2024 Intel Corporation. */ 3 4 #include <linux/types.h> 5 #include <linux/module.h> 6 #include <linux/pci.h> 7 #include <linux/netdevice.h> 8 #include <linux/vmalloc.h> 9 #include <linux/string.h> 10 #include <linux/in.h> 11 #include <linux/interrupt.h> 12 #include <linux/iopoll.h> 13 #include <linux/ip.h> 14 #include <linux/tcp.h> 15 #include <linux/sctp.h> 16 #include <linux/pkt_sched.h> 17 #include <linux/ipv6.h> 18 #include <linux/slab.h> 19 #include <net/checksum.h> 20 #include <net/ip6_checksum.h> 21 #include <linux/etherdevice.h> 22 #include <linux/ethtool.h> 23 #include <linux/if.h> 24 #include <linux/if_vlan.h> 25 #include <linux/if_macvlan.h> 26 #include <linux/if_bridge.h> 27 #include <linux/prefetch.h> 28 #include <linux/bpf.h> 29 #include <linux/bpf_trace.h> 30 #include <linux/atomic.h> 31 #include <linux/numa.h> 32 #include <generated/utsrelease.h> 33 #include <scsi/fc/fc_fcoe.h> 34 #include <net/udp_tunnel.h> 35 #include <net/pkt_cls.h> 36 #include <net/tc_act/tc_gact.h> 37 #include <net/tc_act/tc_mirred.h> 38 #include <net/vxlan.h> 39 #include <net/mpls.h> 40 #include <net/netdev_queues.h> 41 #include <net/xdp_sock_drv.h> 42 #include <net/xfrm.h> 43 44 #include "ixgbe.h" 45 #include "ixgbe_common.h" 46 #include "ixgbe_e610.h" 47 #include "ixgbe_dcb_82599.h" 48 #include "ixgbe_mbx.h" 49 #include "ixgbe_phy.h" 50 #include "ixgbe_sriov.h" 51 #include "ixgbe_model.h" 52 #include "ixgbe_txrx_common.h" 53 #include "devlink/devlink.h" 54 55 char ixgbe_driver_name[] = "ixgbe"; 56 static const char ixgbe_driver_string[] = 57 "Intel(R) 10 Gigabit PCI Express Network Driver"; 58 #ifdef IXGBE_FCOE 59 char ixgbe_default_device_descr[] = 60 "Intel(R) 10 Gigabit Network Connection"; 61 #else 62 static char ixgbe_default_device_descr[] = 63 "Intel(R) 10 Gigabit Network Connection"; 64 #endif 65 static const char ixgbe_copyright[] = 66 "Copyright (c) 1999-2016 Intel Corporation."; 67 68 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter"; 69 70 static const struct ixgbe_info *ixgbe_info_tbl[] = { 71 [board_82598] = &ixgbe_82598_info, 72 [board_82599] = &ixgbe_82599_info, 73 [board_X540] = &ixgbe_X540_info, 74 [board_X550] = &ixgbe_X550_info, 75 [board_X550EM_x] = &ixgbe_X550EM_x_info, 76 [board_x550em_x_fw] = &ixgbe_x550em_x_fw_info, 77 [board_x550em_a] = &ixgbe_x550em_a_info, 78 [board_x550em_a_fw] = &ixgbe_x550em_a_fw_info, 79 [board_e610] = &ixgbe_e610_info, 80 }; 81 82 /* ixgbe_pci_tbl - PCI Device ID Table 83 * 84 * Wildcard entries (PCI_ANY_ID) should come last 85 * Last entry must be all 0s 86 * 87 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 88 * Class, Class Mask, private data (not used) } 89 */ 90 static const struct pci_device_id ixgbe_pci_tbl[] = { 91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 }, 92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 }, 93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 }, 94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 }, 95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 }, 96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 }, 97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 }, 98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 }, 99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 }, 100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 }, 101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 }, 102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 }, 103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 }, 104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 }, 105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 }, 106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 }, 107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 }, 108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 }, 109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 }, 110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 }, 111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 }, 112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 }, 113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 }, 114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 }, 115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 }, 116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 }, 117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 }, 118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 }, 119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 }, 120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 }, 121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550}, 122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550}, 123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x}, 124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x}, 125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x}, 126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x}, 127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x}, 128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw}, 129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a }, 130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a }, 131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a }, 132 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a }, 133 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a }, 134 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a}, 135 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a }, 136 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw }, 137 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw }, 138 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_BACKPLANE), board_e610}, 139 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_SFP), board_e610}, 140 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_10G_T), board_e610}, 141 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_2_5G_T), board_e610}, 142 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_SGMII), board_e610}, 143 /* required last entry */ 144 {0, } 145 }; 146 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl); 147 148 #ifdef CONFIG_IXGBE_DCA 149 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event, 150 void *p); 151 static struct notifier_block dca_notifier = { 152 .notifier_call = ixgbe_notify_dca, 153 .next = NULL, 154 .priority = 0 155 }; 156 #endif 157 158 #ifdef CONFIG_PCI_IOV 159 static unsigned int max_vfs; 160 module_param(max_vfs, uint, 0); 161 MODULE_PARM_DESC(max_vfs, 162 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)"); 163 #endif /* CONFIG_PCI_IOV */ 164 165 static bool allow_unsupported_sfp; 166 module_param(allow_unsupported_sfp, bool, 0444); 167 MODULE_PARM_DESC(allow_unsupported_sfp, 168 "Allow unsupported and untested SFP+ modules on 82599-based adapters"); 169 170 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) 171 static int debug = -1; 172 module_param(debug, int, 0); 173 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 174 175 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver"); 176 MODULE_LICENSE("GPL v2"); 177 178 DEFINE_STATIC_KEY_FALSE(ixgbe_xdp_locking_key); 179 EXPORT_SYMBOL(ixgbe_xdp_locking_key); 180 181 static struct workqueue_struct *ixgbe_wq; 182 183 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev); 184 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *); 185 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *); 186 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *); 187 188 static const struct net_device_ops ixgbe_netdev_ops; 189 190 static bool netif_is_ixgbe(struct net_device *dev) 191 { 192 return dev && (dev->netdev_ops == &ixgbe_netdev_ops); 193 } 194 195 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter, 196 u32 reg, u16 *value) 197 { 198 struct pci_dev *parent_dev; 199 struct pci_bus *parent_bus; 200 201 parent_bus = adapter->pdev->bus->parent; 202 if (!parent_bus) 203 return -1; 204 205 parent_dev = parent_bus->self; 206 if (!parent_dev) 207 return -1; 208 209 if (!pci_is_pcie(parent_dev)) 210 return -1; 211 212 pcie_capability_read_word(parent_dev, reg, value); 213 if (*value == IXGBE_FAILED_READ_CFG_WORD && 214 ixgbe_check_cfg_remove(&adapter->hw, parent_dev)) 215 return -1; 216 return 0; 217 } 218 219 static int ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter) 220 { 221 struct ixgbe_hw *hw = &adapter->hw; 222 u16 link_status = 0; 223 int err; 224 225 hw->bus.type = ixgbe_bus_type_pci_express; 226 227 /* Get the negotiated link width and speed from PCI config space of the 228 * parent, as this device is behind a switch 229 */ 230 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status); 231 232 /* assume caller will handle error case */ 233 if (err) 234 return err; 235 236 hw->bus.width = ixgbe_convert_bus_width(link_status); 237 hw->bus.speed = ixgbe_convert_bus_speed(link_status); 238 239 return 0; 240 } 241 242 /** 243 * ixgbe_pcie_from_parent - Determine whether PCIe info should come from parent 244 * @hw: hw specific details 245 * 246 * This function is used by probe to determine whether a device's PCI-Express 247 * bandwidth details should be gathered from the parent bus instead of from the 248 * device. Used to ensure that various locations all have the correct device ID 249 * checks. 250 * 251 * Return: true if information should be collected from the parent bus, false 252 * otherwise 253 */ 254 static bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw) 255 { 256 switch (hw->device_id) { 257 case IXGBE_DEV_ID_82599_SFP_SF_QP: 258 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 259 return true; 260 default: 261 return false; 262 } 263 } 264 265 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter, 266 int expected_gts) 267 { 268 struct ixgbe_hw *hw = &adapter->hw; 269 struct pci_dev *pdev; 270 271 /* Some devices are not connected over PCIe and thus do not negotiate 272 * speed. These devices do not have valid bus info, and thus any report 273 * we generate may not be correct. 274 */ 275 if (hw->bus.type == ixgbe_bus_type_internal) 276 return; 277 278 /* determine whether to use the parent device */ 279 if (ixgbe_pcie_from_parent(&adapter->hw)) 280 pdev = adapter->pdev->bus->parent->self; 281 else 282 pdev = adapter->pdev; 283 284 pcie_print_link_status(pdev); 285 } 286 287 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter) 288 { 289 if (!test_bit(__IXGBE_DOWN, &adapter->state) && 290 !test_bit(__IXGBE_REMOVING, &adapter->state) && 291 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state)) 292 queue_work(ixgbe_wq, &adapter->service_task); 293 } 294 295 static void ixgbe_remove_adapter(struct ixgbe_hw *hw) 296 { 297 struct ixgbe_adapter *adapter = hw->back; 298 299 if (!hw->hw_addr) 300 return; 301 hw->hw_addr = NULL; 302 e_dev_err("Adapter removed\n"); 303 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state)) 304 ixgbe_service_event_schedule(adapter); 305 } 306 307 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg) 308 { 309 u8 __iomem *reg_addr; 310 u32 value; 311 int i; 312 313 reg_addr = READ_ONCE(hw->hw_addr); 314 if (ixgbe_removed(reg_addr)) 315 return IXGBE_FAILED_READ_REG; 316 317 /* Register read of 0xFFFFFFF can indicate the adapter has been removed, 318 * so perform several status register reads to determine if the adapter 319 * has been removed. 320 */ 321 for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) { 322 value = readl(reg_addr + IXGBE_STATUS); 323 if (value != IXGBE_FAILED_READ_REG) 324 break; 325 mdelay(3); 326 } 327 328 if (value == IXGBE_FAILED_READ_REG) 329 ixgbe_remove_adapter(hw); 330 else 331 value = readl(reg_addr + reg); 332 return value; 333 } 334 335 /** 336 * ixgbe_read_reg - Read from device register 337 * @hw: hw specific details 338 * @reg: offset of register to read 339 * 340 * Returns : value read or IXGBE_FAILED_READ_REG if removed 341 * 342 * This function is used to read device registers. It checks for device 343 * removal by confirming any read that returns all ones by checking the 344 * status register value for all ones. This function avoids reading from 345 * the hardware if a removal was previously detected in which case it 346 * returns IXGBE_FAILED_READ_REG (all ones). 347 */ 348 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg) 349 { 350 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); 351 u32 value; 352 353 if (ixgbe_removed(reg_addr)) 354 return IXGBE_FAILED_READ_REG; 355 if (unlikely(hw->phy.nw_mng_if_sel & 356 IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) { 357 struct ixgbe_adapter *adapter; 358 int i; 359 360 for (i = 0; i < 200; ++i) { 361 value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY); 362 if (likely(!value)) 363 goto writes_completed; 364 if (value == IXGBE_FAILED_READ_REG) { 365 ixgbe_remove_adapter(hw); 366 return IXGBE_FAILED_READ_REG; 367 } 368 udelay(5); 369 } 370 371 adapter = hw->back; 372 e_warn(hw, "register writes incomplete %08x\n", value); 373 } 374 375 writes_completed: 376 value = readl(reg_addr + reg); 377 if (unlikely(value == IXGBE_FAILED_READ_REG)) 378 value = ixgbe_check_remove(hw, reg); 379 return value; 380 } 381 382 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev) 383 { 384 u16 value; 385 386 pci_read_config_word(pdev, PCI_VENDOR_ID, &value); 387 if (value == IXGBE_FAILED_READ_CFG_WORD) { 388 ixgbe_remove_adapter(hw); 389 return true; 390 } 391 return false; 392 } 393 394 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg) 395 { 396 struct ixgbe_adapter *adapter = hw->back; 397 u16 value; 398 399 if (ixgbe_removed(hw->hw_addr)) 400 return IXGBE_FAILED_READ_CFG_WORD; 401 pci_read_config_word(adapter->pdev, reg, &value); 402 if (value == IXGBE_FAILED_READ_CFG_WORD && 403 ixgbe_check_cfg_remove(hw, adapter->pdev)) 404 return IXGBE_FAILED_READ_CFG_WORD; 405 return value; 406 } 407 408 #ifdef CONFIG_PCI_IOV 409 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg) 410 { 411 struct ixgbe_adapter *adapter = hw->back; 412 u32 value; 413 414 if (ixgbe_removed(hw->hw_addr)) 415 return IXGBE_FAILED_READ_CFG_DWORD; 416 pci_read_config_dword(adapter->pdev, reg, &value); 417 if (value == IXGBE_FAILED_READ_CFG_DWORD && 418 ixgbe_check_cfg_remove(hw, adapter->pdev)) 419 return IXGBE_FAILED_READ_CFG_DWORD; 420 return value; 421 } 422 #endif /* CONFIG_PCI_IOV */ 423 424 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value) 425 { 426 struct ixgbe_adapter *adapter = hw->back; 427 428 if (ixgbe_removed(hw->hw_addr)) 429 return; 430 pci_write_config_word(adapter->pdev, reg, value); 431 } 432 433 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter) 434 { 435 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state)); 436 437 /* flush memory to make sure state is correct before next watchdog */ 438 smp_mb__before_atomic(); 439 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state); 440 } 441 442 struct ixgbe_reg_info { 443 u32 ofs; 444 char *name; 445 }; 446 447 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = { 448 449 /* General Registers */ 450 {IXGBE_CTRL, "CTRL"}, 451 {IXGBE_STATUS, "STATUS"}, 452 {IXGBE_CTRL_EXT, "CTRL_EXT"}, 453 454 /* Interrupt Registers */ 455 {IXGBE_EICR, "EICR"}, 456 457 /* RX Registers */ 458 {IXGBE_SRRCTL(0), "SRRCTL"}, 459 {IXGBE_DCA_RXCTRL(0), "DRXCTL"}, 460 {IXGBE_RDLEN(0), "RDLEN"}, 461 {IXGBE_RDH(0), "RDH"}, 462 {IXGBE_RDT(0), "RDT"}, 463 {IXGBE_RXDCTL(0), "RXDCTL"}, 464 {IXGBE_RDBAL(0), "RDBAL"}, 465 {IXGBE_RDBAH(0), "RDBAH"}, 466 467 /* TX Registers */ 468 {IXGBE_TDBAL(0), "TDBAL"}, 469 {IXGBE_TDBAH(0), "TDBAH"}, 470 {IXGBE_TDLEN(0), "TDLEN"}, 471 {IXGBE_TDH(0), "TDH"}, 472 {IXGBE_TDT(0), "TDT"}, 473 {IXGBE_TXDCTL(0), "TXDCTL"}, 474 475 /* List Terminator */ 476 { .name = NULL } 477 }; 478 479 480 /* 481 * ixgbe_regdump - register printout routine 482 */ 483 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo) 484 { 485 int i; 486 char rname[16]; 487 u32 regs[64]; 488 489 switch (reginfo->ofs) { 490 case IXGBE_SRRCTL(0): 491 for (i = 0; i < 64; i++) 492 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); 493 break; 494 case IXGBE_DCA_RXCTRL(0): 495 for (i = 0; i < 64; i++) 496 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); 497 break; 498 case IXGBE_RDLEN(0): 499 for (i = 0; i < 64; i++) 500 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i)); 501 break; 502 case IXGBE_RDH(0): 503 for (i = 0; i < 64; i++) 504 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i)); 505 break; 506 case IXGBE_RDT(0): 507 for (i = 0; i < 64; i++) 508 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i)); 509 break; 510 case IXGBE_RXDCTL(0): 511 for (i = 0; i < 64; i++) 512 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); 513 break; 514 case IXGBE_RDBAL(0): 515 for (i = 0; i < 64; i++) 516 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i)); 517 break; 518 case IXGBE_RDBAH(0): 519 for (i = 0; i < 64; i++) 520 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i)); 521 break; 522 case IXGBE_TDBAL(0): 523 for (i = 0; i < 64; i++) 524 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i)); 525 break; 526 case IXGBE_TDBAH(0): 527 for (i = 0; i < 64; i++) 528 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i)); 529 break; 530 case IXGBE_TDLEN(0): 531 for (i = 0; i < 64; i++) 532 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i)); 533 break; 534 case IXGBE_TDH(0): 535 for (i = 0; i < 64; i++) 536 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i)); 537 break; 538 case IXGBE_TDT(0): 539 for (i = 0; i < 64; i++) 540 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i)); 541 break; 542 case IXGBE_TXDCTL(0): 543 for (i = 0; i < 64; i++) 544 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i)); 545 break; 546 default: 547 pr_info("%-15s %08x\n", 548 reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs)); 549 return; 550 } 551 552 i = 0; 553 while (i < 64) { 554 int j; 555 char buf[9 * 8 + 1]; 556 char *p = buf; 557 558 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7); 559 for (j = 0; j < 8; j++) 560 p += sprintf(p, " %08x", regs[i++]); 561 pr_err("%-15s%s\n", rname, buf); 562 } 563 564 } 565 566 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n) 567 { 568 struct ixgbe_tx_buffer *tx_buffer; 569 570 tx_buffer = &ring->tx_buffer_info[ring->next_to_clean]; 571 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n", 572 n, ring->next_to_use, ring->next_to_clean, 573 (u64)dma_unmap_addr(tx_buffer, dma), 574 dma_unmap_len(tx_buffer, len), 575 tx_buffer->next_to_watch, 576 (u64)tx_buffer->time_stamp); 577 } 578 579 /* 580 * ixgbe_dump - Print registers, tx-rings and rx-rings 581 */ 582 static void ixgbe_dump(struct ixgbe_adapter *adapter) 583 { 584 struct net_device *netdev = adapter->netdev; 585 struct ixgbe_hw *hw = &adapter->hw; 586 struct ixgbe_reg_info *reginfo; 587 int n = 0; 588 struct ixgbe_ring *ring; 589 struct ixgbe_tx_buffer *tx_buffer; 590 union ixgbe_adv_tx_desc *tx_desc; 591 struct my_u0 { u64 a; u64 b; } *u0; 592 struct ixgbe_ring *rx_ring; 593 union ixgbe_adv_rx_desc *rx_desc; 594 struct ixgbe_rx_buffer *rx_buffer_info; 595 int i = 0; 596 597 if (!netif_msg_hw(adapter)) 598 return; 599 600 /* Print netdevice Info */ 601 if (netdev) { 602 dev_info(&adapter->pdev->dev, "Net device Info\n"); 603 pr_info("Device Name state " 604 "trans_start\n"); 605 pr_info("%-15s %016lX %016lX\n", 606 netdev->name, 607 netdev->state, 608 dev_trans_start(netdev)); 609 } 610 611 /* Print Registers */ 612 dev_info(&adapter->pdev->dev, "Register Dump\n"); 613 pr_info(" Register Name Value\n"); 614 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl; 615 reginfo->name; reginfo++) { 616 ixgbe_regdump(hw, reginfo); 617 } 618 619 /* Print TX Ring Summary */ 620 if (!netdev || !netif_running(netdev)) 621 return; 622 623 dev_info(&adapter->pdev->dev, "TX Rings Summary\n"); 624 pr_info(" %s %s %s %s\n", 625 "Queue [NTU] [NTC] [bi(ntc)->dma ]", 626 "leng", "ntw", "timestamp"); 627 for (n = 0; n < adapter->num_tx_queues; n++) { 628 ring = adapter->tx_ring[n]; 629 ixgbe_print_buffer(ring, n); 630 } 631 632 for (n = 0; n < adapter->num_xdp_queues; n++) { 633 ring = adapter->xdp_ring[n]; 634 ixgbe_print_buffer(ring, n); 635 } 636 637 /* Print TX Rings */ 638 if (!netif_msg_tx_done(adapter)) 639 goto rx_ring_summary; 640 641 dev_info(&adapter->pdev->dev, "TX Rings Dump\n"); 642 643 /* Transmit Descriptor Formats 644 * 645 * 82598 Advanced Transmit Descriptor 646 * +--------------------------------------------------------------+ 647 * 0 | Buffer Address [63:0] | 648 * +--------------------------------------------------------------+ 649 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN | 650 * +--------------------------------------------------------------+ 651 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0 652 * 653 * 82598 Advanced Transmit Descriptor (Write-Back Format) 654 * +--------------------------------------------------------------+ 655 * 0 | RSV [63:0] | 656 * +--------------------------------------------------------------+ 657 * 8 | RSV | STA | NXTSEQ | 658 * +--------------------------------------------------------------+ 659 * 63 36 35 32 31 0 660 * 661 * 82599+ Advanced Transmit Descriptor 662 * +--------------------------------------------------------------+ 663 * 0 | Buffer Address [63:0] | 664 * +--------------------------------------------------------------+ 665 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN | 666 * +--------------------------------------------------------------+ 667 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0 668 * 669 * 82599+ Advanced Transmit Descriptor (Write-Back Format) 670 * +--------------------------------------------------------------+ 671 * 0 | RSV [63:0] | 672 * +--------------------------------------------------------------+ 673 * 8 | RSV | STA | RSV | 674 * +--------------------------------------------------------------+ 675 * 63 36 35 32 31 0 676 */ 677 678 for (n = 0; n < adapter->num_tx_queues; n++) { 679 ring = adapter->tx_ring[n]; 680 pr_info("------------------------------------\n"); 681 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index); 682 pr_info("------------------------------------\n"); 683 pr_info("%s%s %s %s %s %s\n", 684 "T [desc] [address 63:0 ] ", 685 "[PlPOIdStDDt Ln] [bi->dma ] ", 686 "leng", "ntw", "timestamp", "bi->skb"); 687 688 for (i = 0; ring->desc && (i < ring->count); i++) { 689 tx_desc = IXGBE_TX_DESC(ring, i); 690 tx_buffer = &ring->tx_buffer_info[i]; 691 u0 = (struct my_u0 *)tx_desc; 692 if (dma_unmap_len(tx_buffer, len) > 0) { 693 const char *ring_desc; 694 695 if (i == ring->next_to_use && 696 i == ring->next_to_clean) 697 ring_desc = " NTC/U"; 698 else if (i == ring->next_to_use) 699 ring_desc = " NTU"; 700 else if (i == ring->next_to_clean) 701 ring_desc = " NTC"; 702 else 703 ring_desc = ""; 704 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p%s", 705 i, 706 le64_to_cpu((__force __le64)u0->a), 707 le64_to_cpu((__force __le64)u0->b), 708 (u64)dma_unmap_addr(tx_buffer, dma), 709 dma_unmap_len(tx_buffer, len), 710 tx_buffer->next_to_watch, 711 (u64)tx_buffer->time_stamp, 712 tx_buffer->skb, 713 ring_desc); 714 715 if (netif_msg_pktdata(adapter) && 716 tx_buffer->skb) 717 print_hex_dump(KERN_INFO, "", 718 DUMP_PREFIX_ADDRESS, 16, 1, 719 tx_buffer->skb->data, 720 dma_unmap_len(tx_buffer, len), 721 true); 722 } 723 } 724 } 725 726 /* Print RX Rings Summary */ 727 rx_ring_summary: 728 dev_info(&adapter->pdev->dev, "RX Rings Summary\n"); 729 pr_info("Queue [NTU] [NTC]\n"); 730 for (n = 0; n < adapter->num_rx_queues; n++) { 731 rx_ring = adapter->rx_ring[n]; 732 pr_info("%5d %5X %5X\n", 733 n, rx_ring->next_to_use, rx_ring->next_to_clean); 734 } 735 736 /* Print RX Rings */ 737 if (!netif_msg_rx_status(adapter)) 738 return; 739 740 dev_info(&adapter->pdev->dev, "RX Rings Dump\n"); 741 742 /* Receive Descriptor Formats 743 * 744 * 82598 Advanced Receive Descriptor (Read) Format 745 * 63 1 0 746 * +-----------------------------------------------------+ 747 * 0 | Packet Buffer Address [63:1] |A0/NSE| 748 * +----------------------------------------------+------+ 749 * 8 | Header Buffer Address [63:1] | DD | 750 * +-----------------------------------------------------+ 751 * 752 * 753 * 82598 Advanced Receive Descriptor (Write-Back) Format 754 * 755 * 63 48 47 32 31 30 21 20 16 15 4 3 0 756 * +------------------------------------------------------+ 757 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS | 758 * | Packet | IP | | | | Type | Type | 759 * | Checksum | Ident | | | | | | 760 * +------------------------------------------------------+ 761 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 762 * +------------------------------------------------------+ 763 * 63 48 47 32 31 20 19 0 764 * 765 * 82599+ Advanced Receive Descriptor (Read) Format 766 * 63 1 0 767 * +-----------------------------------------------------+ 768 * 0 | Packet Buffer Address [63:1] |A0/NSE| 769 * +----------------------------------------------+------+ 770 * 8 | Header Buffer Address [63:1] | DD | 771 * +-----------------------------------------------------+ 772 * 773 * 774 * 82599+ Advanced Receive Descriptor (Write-Back) Format 775 * 776 * 63 48 47 32 31 30 21 20 17 16 4 3 0 777 * +------------------------------------------------------+ 778 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS | 779 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type | 780 * |/ Flow Dir Flt ID | | | | | | 781 * +------------------------------------------------------+ 782 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP | 783 * +------------------------------------------------------+ 784 * 63 48 47 32 31 20 19 0 785 */ 786 787 for (n = 0; n < adapter->num_rx_queues; n++) { 788 rx_ring = adapter->rx_ring[n]; 789 pr_info("------------------------------------\n"); 790 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index); 791 pr_info("------------------------------------\n"); 792 pr_info("%s%s%s\n", 793 "R [desc] [ PktBuf A0] ", 794 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ", 795 "<-- Adv Rx Read format"); 796 pr_info("%s%s%s\n", 797 "RWB[desc] [PcsmIpSHl PtRs] ", 798 "[vl er S cks ln] ---------------- [bi->skb ] ", 799 "<-- Adv Rx Write-Back format"); 800 801 for (i = 0; i < rx_ring->count; i++) { 802 const char *ring_desc; 803 804 if (i == rx_ring->next_to_use) 805 ring_desc = " NTU"; 806 else if (i == rx_ring->next_to_clean) 807 ring_desc = " NTC"; 808 else 809 ring_desc = ""; 810 811 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 812 rx_desc = IXGBE_RX_DESC(rx_ring, i); 813 u0 = (struct my_u0 *)rx_desc; 814 if (rx_desc->wb.upper.length) { 815 /* Descriptor Done */ 816 pr_info("RWB[0x%03X] %016llX %016llX ---------------- %p%s\n", 817 i, 818 le64_to_cpu((__force __le64)u0->a), 819 le64_to_cpu((__force __le64)u0->b), 820 rx_buffer_info->skb, 821 ring_desc); 822 } else { 823 pr_info("R [0x%03X] %016llX %016llX %016llX %p%s\n", 824 i, 825 le64_to_cpu((__force __le64)u0->a), 826 le64_to_cpu((__force __le64)u0->b), 827 (u64)rx_buffer_info->dma, 828 rx_buffer_info->skb, 829 ring_desc); 830 831 if (netif_msg_pktdata(adapter) && 832 rx_buffer_info->dma) { 833 print_hex_dump(KERN_INFO, "", 834 DUMP_PREFIX_ADDRESS, 16, 1, 835 page_address(rx_buffer_info->page) + 836 rx_buffer_info->page_offset, 837 ixgbe_rx_bufsz(rx_ring), true); 838 } 839 } 840 } 841 } 842 } 843 844 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter) 845 { 846 u32 ctrl_ext; 847 848 /* Let firmware take over control of h/w */ 849 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); 850 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, 851 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD); 852 } 853 854 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter) 855 { 856 u32 ctrl_ext; 857 858 /* Let firmware know the driver has taken over */ 859 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); 860 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, 861 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD); 862 } 863 864 /** 865 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors 866 * @adapter: pointer to adapter struct 867 * @direction: 0 for Rx, 1 for Tx, -1 for other causes 868 * @queue: queue to map the corresponding interrupt to 869 * @msix_vector: the vector to map to the corresponding queue 870 * 871 */ 872 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction, 873 u8 queue, u8 msix_vector) 874 { 875 u32 ivar, index; 876 struct ixgbe_hw *hw = &adapter->hw; 877 switch (hw->mac.type) { 878 case ixgbe_mac_82598EB: 879 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 880 if (direction == -1) 881 direction = 0; 882 index = (((direction * 64) + queue) >> 2) & 0x1F; 883 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 884 ivar &= ~(0xFF << (8 * (queue & 0x3))); 885 ivar |= (msix_vector << (8 * (queue & 0x3))); 886 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar); 887 break; 888 case ixgbe_mac_82599EB: 889 case ixgbe_mac_X540: 890 case ixgbe_mac_X550: 891 case ixgbe_mac_X550EM_x: 892 case ixgbe_mac_x550em_a: 893 case ixgbe_mac_e610: 894 if (direction == -1) { 895 /* other causes */ 896 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 897 index = ((queue & 1) * 8); 898 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC); 899 ivar &= ~(0xFF << index); 900 ivar |= (msix_vector << index); 901 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar); 902 break; 903 } else { 904 /* tx or rx causes */ 905 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 906 index = ((16 * (queue & 1)) + (8 * direction)); 907 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1)); 908 ivar &= ~(0xFF << index); 909 ivar |= (msix_vector << index); 910 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar); 911 break; 912 } 913 default: 914 break; 915 } 916 } 917 918 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter, 919 u64 qmask) 920 { 921 u32 mask; 922 923 switch (adapter->hw.mac.type) { 924 case ixgbe_mac_82598EB: 925 mask = (IXGBE_EIMS_RTX_QUEUE & qmask); 926 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 927 break; 928 case ixgbe_mac_82599EB: 929 case ixgbe_mac_X540: 930 case ixgbe_mac_X550: 931 case ixgbe_mac_X550EM_x: 932 case ixgbe_mac_x550em_a: 933 case ixgbe_mac_e610: 934 mask = (qmask & 0xFFFFFFFF); 935 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); 936 mask = (qmask >> 32); 937 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask); 938 break; 939 default: 940 break; 941 } 942 } 943 944 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter) 945 { 946 struct ixgbe_hw *hw = &adapter->hw; 947 struct ixgbe_hw_stats *hwstats = &adapter->stats; 948 int i; 949 u32 data; 950 951 if ((hw->fc.current_mode != ixgbe_fc_full) && 952 (hw->fc.current_mode != ixgbe_fc_rx_pause)) 953 return; 954 955 switch (hw->mac.type) { 956 case ixgbe_mac_82598EB: 957 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 958 break; 959 default: 960 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 961 } 962 hwstats->lxoffrxc += data; 963 964 /* refill credits (no tx hang) if we received xoff */ 965 if (!data) 966 return; 967 968 for (i = 0; i < adapter->num_tx_queues; i++) 969 clear_bit(__IXGBE_HANG_CHECK_ARMED, 970 &adapter->tx_ring[i]->state); 971 } 972 973 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter) 974 { 975 struct ixgbe_hw *hw = &adapter->hw; 976 struct ixgbe_hw_stats *hwstats = &adapter->stats; 977 u32 xoff[8] = {0}; 978 u8 tc; 979 int i; 980 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable; 981 982 if (adapter->ixgbe_ieee_pfc) 983 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en); 984 985 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) { 986 ixgbe_update_xoff_rx_lfc(adapter); 987 return; 988 } 989 990 /* update stats for each tc, only valid with PFC enabled */ 991 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) { 992 u32 pxoffrxc; 993 994 switch (hw->mac.type) { 995 case ixgbe_mac_82598EB: 996 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i)); 997 break; 998 default: 999 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i)); 1000 } 1001 hwstats->pxoffrxc[i] += pxoffrxc; 1002 /* Get the TC for given UP */ 1003 tc = netdev_get_prio_tc_map(adapter->netdev, i); 1004 xoff[tc] += pxoffrxc; 1005 } 1006 1007 /* disarm tx queues that have received xoff frames */ 1008 for (i = 0; i < adapter->num_tx_queues; i++) { 1009 struct ixgbe_ring *tx_ring = adapter->tx_ring[i]; 1010 1011 tc = tx_ring->dcb_tc; 1012 if (xoff[tc]) 1013 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state); 1014 } 1015 1016 for (i = 0; i < adapter->num_xdp_queues; i++) { 1017 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i]; 1018 1019 tc = xdp_ring->dcb_tc; 1020 if (xoff[tc]) 1021 clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state); 1022 } 1023 } 1024 1025 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring) 1026 { 1027 return ring->stats.packets; 1028 } 1029 1030 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring) 1031 { 1032 unsigned int head, tail; 1033 1034 head = ring->next_to_clean; 1035 tail = ring->next_to_use; 1036 1037 return ((head <= tail) ? tail : tail + ring->count) - head; 1038 } 1039 1040 /** 1041 * ixgbe_get_vf_idx - provide VF index number based on queue index 1042 * @adapter: pointer to the adapter struct 1043 * @queue: Tx queue identifier 1044 * @vf: output VF index 1045 * 1046 * Provide VF index number associated to the input queue. 1047 * 1048 * Returns: 0 if VF provided or error number. 1049 */ 1050 static int ixgbe_get_vf_idx(struct ixgbe_adapter *adapter, u16 queue, u16 *vf) 1051 { 1052 struct ixgbe_hw *hw = &adapter->hw; 1053 u8 queue_count; 1054 u32 reg; 1055 1056 if (queue >= adapter->num_tx_queues) 1057 return -EINVAL; 1058 1059 /* Determine number of queues by checking 1060 * number of virtual functions 1061 */ 1062 reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); 1063 switch (reg & IXGBE_GCR_EXT_VT_MODE_MASK) { 1064 case IXGBE_GCR_EXT_VT_MODE_64: 1065 queue_count = IXGBE_64VFS_QUEUES; 1066 break; 1067 case IXGBE_GCR_EXT_VT_MODE_32: 1068 queue_count = IXGBE_32VFS_QUEUES; 1069 break; 1070 case IXGBE_GCR_EXT_VT_MODE_16: 1071 queue_count = IXGBE_16VFS_QUEUES; 1072 break; 1073 default: 1074 return -EINVAL; 1075 } 1076 1077 *vf = queue / queue_count; 1078 1079 return 0; 1080 } 1081 1082 static bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring) 1083 { 1084 u32 tx_done = ixgbe_get_tx_completed(tx_ring); 1085 u32 tx_done_old = tx_ring->tx_stats.tx_done_old; 1086 u32 tx_pending = ixgbe_get_tx_pending(tx_ring); 1087 1088 clear_check_for_tx_hang(tx_ring); 1089 1090 /* 1091 * Check for a hung queue, but be thorough. This verifies 1092 * that a transmit has been completed since the previous 1093 * check AND there is at least one packet pending. The 1094 * ARMED bit is set to indicate a potential hang. The 1095 * bit is cleared if a pause frame is received to remove 1096 * false hang detection due to PFC or 802.3x frames. By 1097 * requiring this to fail twice we avoid races with 1098 * pfc clearing the ARMED bit and conditions where we 1099 * run the check_tx_hang logic with a transmit completion 1100 * pending but without time to complete it yet. 1101 */ 1102 if (tx_done_old == tx_done && tx_pending) 1103 /* make sure it is true for two checks in a row */ 1104 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED, 1105 &tx_ring->state); 1106 /* update completed stats and continue */ 1107 tx_ring->tx_stats.tx_done_old = tx_done; 1108 /* reset the countdown */ 1109 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state); 1110 1111 return false; 1112 } 1113 1114 /** 1115 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout 1116 * @adapter: driver private struct 1117 **/ 1118 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter) 1119 { 1120 1121 /* Do the reset outside of interrupt context */ 1122 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 1123 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state); 1124 e_warn(drv, "initiating reset due to tx timeout\n"); 1125 ixgbe_service_event_schedule(adapter); 1126 } 1127 } 1128 1129 /** 1130 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate 1131 * @netdev: network interface device structure 1132 * @queue_index: Tx queue to set 1133 * @maxrate: desired maximum transmit bitrate 1134 **/ 1135 static int ixgbe_tx_maxrate(struct net_device *netdev, 1136 int queue_index, u32 maxrate) 1137 { 1138 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1139 struct ixgbe_hw *hw = &adapter->hw; 1140 u32 bcnrc_val = ixgbe_link_mbps(adapter); 1141 1142 if (!maxrate) 1143 return 0; 1144 1145 /* Calculate the rate factor values to set */ 1146 bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT; 1147 bcnrc_val /= maxrate; 1148 1149 /* clear everything but the rate factor */ 1150 bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK | 1151 IXGBE_RTTBCNRC_RF_DEC_MASK; 1152 1153 /* enable the rate scheduler */ 1154 bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA; 1155 1156 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index); 1157 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val); 1158 1159 return 0; 1160 } 1161 1162 /** 1163 * ixgbe_update_tx_ring_stats - Update Tx ring specific counters 1164 * @tx_ring: ring to update 1165 * @q_vector: queue vector ring belongs to 1166 * @pkts: number of processed packets 1167 * @bytes: number of processed bytes 1168 */ 1169 void ixgbe_update_tx_ring_stats(struct ixgbe_ring *tx_ring, 1170 struct ixgbe_q_vector *q_vector, u64 pkts, 1171 u64 bytes) 1172 { 1173 u64_stats_update_begin(&tx_ring->syncp); 1174 tx_ring->stats.bytes += bytes; 1175 tx_ring->stats.packets += pkts; 1176 u64_stats_update_end(&tx_ring->syncp); 1177 q_vector->tx.total_bytes += bytes; 1178 q_vector->tx.total_packets += pkts; 1179 } 1180 1181 /** 1182 * ixgbe_update_rx_ring_stats - Update Rx ring specific counters 1183 * @rx_ring: ring to update 1184 * @q_vector: queue vector ring belongs to 1185 * @pkts: number of processed packets 1186 * @bytes: number of processed bytes 1187 */ 1188 void ixgbe_update_rx_ring_stats(struct ixgbe_ring *rx_ring, 1189 struct ixgbe_q_vector *q_vector, u64 pkts, 1190 u64 bytes) 1191 { 1192 u64_stats_update_begin(&rx_ring->syncp); 1193 rx_ring->stats.bytes += bytes; 1194 rx_ring->stats.packets += pkts; 1195 u64_stats_update_end(&rx_ring->syncp); 1196 q_vector->rx.total_bytes += bytes; 1197 q_vector->rx.total_packets += pkts; 1198 } 1199 1200 /** 1201 * ixgbe_pf_handle_tx_hang - handle Tx hang on PF 1202 * @tx_ring: tx ring number 1203 * @next: next ring 1204 * 1205 * Prints a message containing details about the tx hang. 1206 */ 1207 static void ixgbe_pf_handle_tx_hang(struct ixgbe_ring *tx_ring, 1208 unsigned int next) 1209 { 1210 struct ixgbe_adapter *adapter = netdev_priv(tx_ring->netdev); 1211 struct ixgbe_hw *hw = &adapter->hw; 1212 1213 e_err(drv, "Detected Tx Unit Hang\n" 1214 " Tx Queue <%d>\n" 1215 " TDH, TDT <%x>, <%x>\n" 1216 " next_to_use <%x>\n" 1217 " next_to_clean <%x>\n" 1218 "tx_buffer_info[next_to_clean]\n" 1219 " time_stamp <%lx>\n" 1220 " jiffies <%lx>\n", 1221 tx_ring->queue_index, 1222 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)), 1223 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)), 1224 tx_ring->next_to_use, next, 1225 tx_ring->tx_buffer_info[next].time_stamp, jiffies); 1226 1227 netif_stop_subqueue(tx_ring->netdev, 1228 tx_ring->queue_index); 1229 } 1230 1231 /** 1232 * ixgbe_vf_handle_tx_hang - handle Tx hang on VF 1233 * @adapter: structure containing ring specific data 1234 * @vf: VF index 1235 * 1236 * Print a message containing details about malicious driver detection. 1237 * Set malicious VF link down if the detection happened several times. 1238 */ 1239 static void ixgbe_vf_handle_tx_hang(struct ixgbe_adapter *adapter, u16 vf) 1240 { 1241 struct ixgbe_hw *hw = &adapter->hw; 1242 1243 if (adapter->hw.mac.type != ixgbe_mac_e610) 1244 return; 1245 1246 e_warn(drv, 1247 "Malicious Driver Detection tx hang detected on PF %d VF %d MAC: %pM", 1248 hw->bus.func, vf, adapter->vfinfo[vf].vf_mac_addresses); 1249 1250 adapter->tx_hang_count[vf]++; 1251 if (adapter->tx_hang_count[vf] == IXGBE_MAX_TX_VF_HANGS) { 1252 ixgbe_set_vf_link_state(adapter, vf, 1253 IFLA_VF_LINK_STATE_DISABLE); 1254 adapter->tx_hang_count[vf] = 0; 1255 } 1256 } 1257 1258 static u32 ixgbe_poll_tx_icache(struct ixgbe_hw *hw, u16 queue, u16 idx) 1259 { 1260 IXGBE_WRITE_REG(hw, IXGBE_TXDESCIC, queue * idx); 1261 return IXGBE_READ_REG(hw, IXGBE_TXDESCIC); 1262 } 1263 1264 /** 1265 * ixgbe_check_illegal_queue - search for queue with illegal packet 1266 * @adapter: structure containing ring specific data 1267 * @queue: queue index 1268 * 1269 * Check if tx descriptor connected with input queue 1270 * contains illegal packet. 1271 * 1272 * Returns: true if queue contain illegal packet. 1273 */ 1274 static bool ixgbe_check_illegal_queue(struct ixgbe_adapter *adapter, 1275 u16 queue) 1276 { 1277 u32 hdr_len_reg, mss_len_reg, type_reg; 1278 struct ixgbe_hw *hw = &adapter->hw; 1279 u32 mss_len, header_len, reg; 1280 1281 for (u16 i = 0; i < IXGBE_MAX_TX_DESCRIPTORS; i++) { 1282 /* HW will clear bit IXGBE_TXDESCIC_READY when address 1283 * is written to address field. HW will set this bit 1284 * when iCache read is done, and data is ready at TIC_DWx. 1285 * Set descriptor address. 1286 */ 1287 read_poll_timeout(ixgbe_poll_tx_icache, reg, 1288 !(reg & IXGBE_TXDESCIC_READY), 0, 0, false, 1289 hw, queue, i); 1290 1291 /* read tx descriptor access registers */ 1292 hdr_len_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_VLAN_MACIP_LENS_REG)); 1293 type_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_TYPE_TUCMD_MLHL)); 1294 mss_len_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_MSS_L4LEN_IDX)); 1295 1296 /* check if Advanced Context Descriptor */ 1297 if (FIELD_GET(IXGBE_ADVTXD_DTYP_MASK, type_reg) != 1298 IXGBE_ADVTXD_DTYP_CTXT) 1299 continue; 1300 1301 /* check for illegal MSS and Header length */ 1302 mss_len = FIELD_GET(IXGBE_ADVTXD_MSS_MASK, mss_len_reg); 1303 header_len = FIELD_GET(IXGBE_ADVTXD_HEADER_LEN_MASK, 1304 hdr_len_reg); 1305 if ((mss_len + header_len) > SZ_16K) { 1306 e_warn(probe, "mss len + header len too long\n"); 1307 return true; 1308 } 1309 } 1310 1311 return false; 1312 } 1313 1314 /** 1315 * ixgbe_handle_mdd_event - handle mdd event 1316 * @adapter: structure containing ring specific data 1317 * @tx_ring: tx descriptor ring to handle 1318 * 1319 * Reset VF driver if malicious vf detected or 1320 * illegal packet in an any queue detected. 1321 */ 1322 static void ixgbe_handle_mdd_event(struct ixgbe_adapter *adapter, 1323 struct ixgbe_ring *tx_ring) 1324 { 1325 u16 vf, q; 1326 1327 if (adapter->vfinfo && ixgbe_check_mdd_event(adapter)) { 1328 /* vf mdd info and malicious vf detected */ 1329 if (!ixgbe_get_vf_idx(adapter, tx_ring->queue_index, &vf)) 1330 ixgbe_vf_handle_tx_hang(adapter, vf); 1331 } else { 1332 /* malicious vf not detected */ 1333 for (q = 0; q < IXGBE_MAX_TX_QUEUES; q++) { 1334 if (ixgbe_check_illegal_queue(adapter, q) && 1335 !ixgbe_get_vf_idx(adapter, q, &vf)) 1336 /* illegal queue detected */ 1337 ixgbe_vf_handle_tx_hang(adapter, vf); 1338 } 1339 } 1340 } 1341 1342 /** 1343 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes 1344 * @q_vector: structure containing interrupt and ring information 1345 * @tx_ring: tx ring to clean 1346 * @napi_budget: Used to determine if we are in netpoll 1347 **/ 1348 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector, 1349 struct ixgbe_ring *tx_ring, int napi_budget) 1350 { 1351 struct ixgbe_adapter *adapter = q_vector->adapter; 1352 struct ixgbe_tx_buffer *tx_buffer; 1353 union ixgbe_adv_tx_desc *tx_desc; 1354 unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0; 1355 unsigned int budget = q_vector->tx.work_limit; 1356 unsigned int i = tx_ring->next_to_clean; 1357 struct netdev_queue *txq; 1358 1359 if (test_bit(__IXGBE_DOWN, &adapter->state)) 1360 return true; 1361 1362 tx_buffer = &tx_ring->tx_buffer_info[i]; 1363 tx_desc = IXGBE_TX_DESC(tx_ring, i); 1364 i -= tx_ring->count; 1365 1366 do { 1367 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch; 1368 1369 /* if next_to_watch is not set then there is no work pending */ 1370 if (!eop_desc) 1371 break; 1372 1373 /* prevent any other reads prior to eop_desc */ 1374 smp_rmb(); 1375 1376 /* if DD is not set pending work has not been completed */ 1377 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 1378 break; 1379 1380 /* clear next_to_watch to prevent false hangs */ 1381 tx_buffer->next_to_watch = NULL; 1382 1383 /* update the statistics for this packet */ 1384 total_bytes += tx_buffer->bytecount; 1385 total_packets += tx_buffer->gso_segs; 1386 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC) 1387 total_ipsec++; 1388 1389 /* free the skb */ 1390 if (ring_is_xdp(tx_ring)) 1391 xdp_return_frame(tx_buffer->xdpf); 1392 else 1393 napi_consume_skb(tx_buffer->skb, napi_budget); 1394 1395 /* unmap skb header data */ 1396 dma_unmap_single(tx_ring->dev, 1397 dma_unmap_addr(tx_buffer, dma), 1398 dma_unmap_len(tx_buffer, len), 1399 DMA_TO_DEVICE); 1400 1401 /* clear tx_buffer data */ 1402 dma_unmap_len_set(tx_buffer, len, 0); 1403 1404 /* unmap remaining buffers */ 1405 while (tx_desc != eop_desc) { 1406 tx_buffer++; 1407 tx_desc++; 1408 i++; 1409 if (unlikely(!i)) { 1410 i -= tx_ring->count; 1411 tx_buffer = tx_ring->tx_buffer_info; 1412 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 1413 } 1414 1415 /* unmap any remaining paged data */ 1416 if (dma_unmap_len(tx_buffer, len)) { 1417 dma_unmap_page(tx_ring->dev, 1418 dma_unmap_addr(tx_buffer, dma), 1419 dma_unmap_len(tx_buffer, len), 1420 DMA_TO_DEVICE); 1421 dma_unmap_len_set(tx_buffer, len, 0); 1422 } 1423 } 1424 1425 /* move us one more past the eop_desc for start of next pkt */ 1426 tx_buffer++; 1427 tx_desc++; 1428 i++; 1429 if (unlikely(!i)) { 1430 i -= tx_ring->count; 1431 tx_buffer = tx_ring->tx_buffer_info; 1432 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 1433 } 1434 1435 /* issue prefetch for next Tx descriptor */ 1436 prefetch(tx_desc); 1437 1438 /* update budget accounting */ 1439 budget--; 1440 } while (likely(budget)); 1441 1442 i += tx_ring->count; 1443 tx_ring->next_to_clean = i; 1444 ixgbe_update_tx_ring_stats(tx_ring, q_vector, total_packets, 1445 total_bytes); 1446 adapter->tx_ipsec += total_ipsec; 1447 1448 if (ring_is_xdp(tx_ring)) 1449 return !!budget; 1450 1451 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) { 1452 if (adapter->hw.mac.type == ixgbe_mac_e610) 1453 ixgbe_handle_mdd_event(adapter, tx_ring); 1454 1455 ixgbe_pf_handle_tx_hang(tx_ring, i); 1456 1457 e_info(probe, 1458 "tx hang %d detected on queue %d, resetting adapter\n", 1459 adapter->tx_timeout_count + 1, tx_ring->queue_index); 1460 1461 /* schedule immediate reset if we believe we hung */ 1462 ixgbe_tx_timeout_reset(adapter); 1463 1464 /* the adapter is about to reset, no point in enabling stuff */ 1465 return true; 1466 } 1467 1468 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) 1469 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->queue_index); 1470 if (!__netif_txq_completed_wake(txq, total_packets, total_bytes, 1471 ixgbe_desc_unused(tx_ring), 1472 TX_WAKE_THRESHOLD, 1473 !netif_carrier_ok(tx_ring->netdev) || 1474 test_bit(__IXGBE_DOWN, &adapter->state))) 1475 ++tx_ring->tx_stats.restart_queue; 1476 1477 return !!budget; 1478 } 1479 1480 #ifdef CONFIG_IXGBE_DCA 1481 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, 1482 struct ixgbe_ring *tx_ring, 1483 int cpu) 1484 { 1485 struct ixgbe_hw *hw = &adapter->hw; 1486 u32 txctrl = 0; 1487 u16 reg_offset; 1488 1489 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 1490 txctrl = dca3_get_tag(tx_ring->dev, cpu); 1491 1492 switch (hw->mac.type) { 1493 case ixgbe_mac_82598EB: 1494 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx); 1495 break; 1496 case ixgbe_mac_82599EB: 1497 case ixgbe_mac_X540: 1498 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx); 1499 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599; 1500 break; 1501 default: 1502 /* for unknown hardware do not write register */ 1503 return; 1504 } 1505 1506 /* 1507 * We can enable relaxed ordering for reads, but not writes when 1508 * DCA is enabled. This is due to a known issue in some chipsets 1509 * which will cause the DCA tag to be cleared. 1510 */ 1511 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN | 1512 IXGBE_DCA_TXCTRL_DATA_RRO_EN | 1513 IXGBE_DCA_TXCTRL_DESC_DCA_EN; 1514 1515 IXGBE_WRITE_REG(hw, reg_offset, txctrl); 1516 } 1517 1518 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter, 1519 struct ixgbe_ring *rx_ring, 1520 int cpu) 1521 { 1522 struct ixgbe_hw *hw = &adapter->hw; 1523 u32 rxctrl = 0; 1524 u8 reg_idx = rx_ring->reg_idx; 1525 1526 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 1527 rxctrl = dca3_get_tag(rx_ring->dev, cpu); 1528 1529 switch (hw->mac.type) { 1530 case ixgbe_mac_82599EB: 1531 case ixgbe_mac_X540: 1532 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599; 1533 break; 1534 default: 1535 break; 1536 } 1537 1538 /* 1539 * We can enable relaxed ordering for reads, but not writes when 1540 * DCA is enabled. This is due to a known issue in some chipsets 1541 * which will cause the DCA tag to be cleared. 1542 */ 1543 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN | 1544 IXGBE_DCA_RXCTRL_DATA_DCA_EN | 1545 IXGBE_DCA_RXCTRL_DESC_DCA_EN; 1546 1547 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl); 1548 } 1549 1550 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector) 1551 { 1552 struct ixgbe_adapter *adapter = q_vector->adapter; 1553 struct ixgbe_ring *ring; 1554 int cpu = get_cpu(); 1555 1556 if (q_vector->cpu == cpu) 1557 goto out_no_update; 1558 1559 ixgbe_for_each_ring(ring, q_vector->tx) 1560 ixgbe_update_tx_dca(adapter, ring, cpu); 1561 1562 ixgbe_for_each_ring(ring, q_vector->rx) 1563 ixgbe_update_rx_dca(adapter, ring, cpu); 1564 1565 q_vector->cpu = cpu; 1566 out_no_update: 1567 put_cpu(); 1568 } 1569 1570 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter) 1571 { 1572 int i; 1573 1574 /* always use CB2 mode, difference is masked in the CB driver */ 1575 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 1576 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1577 IXGBE_DCA_CTRL_DCA_MODE_CB2); 1578 else 1579 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1580 IXGBE_DCA_CTRL_DCA_DISABLE); 1581 1582 for (i = 0; i < adapter->num_q_vectors; i++) { 1583 adapter->q_vector[i]->cpu = -1; 1584 ixgbe_update_dca(adapter->q_vector[i]); 1585 } 1586 } 1587 1588 static int __ixgbe_notify_dca(struct device *dev, void *data) 1589 { 1590 struct ixgbe_adapter *adapter = dev_get_drvdata(dev); 1591 unsigned long event = *(unsigned long *)data; 1592 1593 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE)) 1594 return 0; 1595 1596 switch (event) { 1597 case DCA_PROVIDER_ADD: 1598 /* if we're already enabled, don't do it again */ 1599 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 1600 break; 1601 if (dca_add_requester(dev) == 0) { 1602 adapter->flags |= IXGBE_FLAG_DCA_ENABLED; 1603 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1604 IXGBE_DCA_CTRL_DCA_MODE_CB2); 1605 break; 1606 } 1607 fallthrough; /* DCA is disabled. */ 1608 case DCA_PROVIDER_REMOVE: 1609 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { 1610 dca_remove_requester(dev); 1611 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED; 1612 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1613 IXGBE_DCA_CTRL_DCA_DISABLE); 1614 } 1615 break; 1616 } 1617 1618 return 0; 1619 } 1620 1621 #endif /* CONFIG_IXGBE_DCA */ 1622 1623 #define IXGBE_RSS_L4_TYPES_MASK \ 1624 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \ 1625 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \ 1626 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \ 1627 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP)) 1628 1629 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring, 1630 union ixgbe_adv_rx_desc *rx_desc, 1631 struct sk_buff *skb) 1632 { 1633 u16 rss_type; 1634 1635 if (!(ring->netdev->features & NETIF_F_RXHASH)) 1636 return; 1637 1638 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) & 1639 IXGBE_RXDADV_RSSTYPE_MASK; 1640 1641 if (!rss_type) 1642 return; 1643 1644 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss), 1645 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ? 1646 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3); 1647 } 1648 1649 #ifdef IXGBE_FCOE 1650 /** 1651 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type 1652 * @ring: structure containing ring specific data 1653 * @rx_desc: advanced rx descriptor 1654 * 1655 * Returns : true if it is FCoE pkt 1656 */ 1657 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring, 1658 union ixgbe_adv_rx_desc *rx_desc) 1659 { 1660 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info; 1661 1662 return test_bit(__IXGBE_RX_FCOE, &ring->state) && 1663 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) == 1664 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE << 1665 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT))); 1666 } 1667 1668 #endif /* IXGBE_FCOE */ 1669 /** 1670 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum 1671 * @ring: structure containing ring specific data 1672 * @rx_desc: current Rx descriptor being processed 1673 * @skb: skb currently being received and modified 1674 **/ 1675 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring, 1676 union ixgbe_adv_rx_desc *rx_desc, 1677 struct sk_buff *skb) 1678 { 1679 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info; 1680 bool encap_pkt = false; 1681 1682 skb_checksum_none_assert(skb); 1683 1684 /* Rx csum disabled */ 1685 if (!(ring->netdev->features & NETIF_F_RXCSUM)) 1686 return; 1687 1688 /* check for VXLAN and Geneve packets */ 1689 if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) { 1690 encap_pkt = true; 1691 skb->encapsulation = 1; 1692 } 1693 1694 /* if IP and error */ 1695 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) && 1696 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) { 1697 ring->rx_stats.csum_err++; 1698 return; 1699 } 1700 1701 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS)) 1702 return; 1703 1704 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) { 1705 /* 1706 * 82599 errata, UDP frames with a 0 checksum can be marked as 1707 * checksum errors. 1708 */ 1709 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) && 1710 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state)) 1711 return; 1712 1713 ring->rx_stats.csum_err++; 1714 return; 1715 } 1716 1717 /* It must be a TCP or UDP packet with a valid checksum */ 1718 skb->ip_summed = CHECKSUM_UNNECESSARY; 1719 if (encap_pkt) { 1720 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS)) 1721 return; 1722 1723 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) { 1724 skb->ip_summed = CHECKSUM_NONE; 1725 return; 1726 } 1727 /* If we checked the outer header let the stack know */ 1728 skb->csum_level = 1; 1729 } 1730 } 1731 1732 static unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring) 1733 { 1734 return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0; 1735 } 1736 1737 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring, 1738 struct ixgbe_rx_buffer *bi) 1739 { 1740 struct page *page = bi->page; 1741 dma_addr_t dma; 1742 1743 /* since we are recycling buffers we should seldom need to alloc */ 1744 if (likely(page)) 1745 return true; 1746 1747 /* alloc new page for storage */ 1748 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring)); 1749 if (unlikely(!page)) { 1750 rx_ring->rx_stats.alloc_rx_page_failed++; 1751 return false; 1752 } 1753 1754 /* map page for use */ 1755 dma = dma_map_page_attrs(rx_ring->dev, page, 0, 1756 ixgbe_rx_pg_size(rx_ring), 1757 DMA_FROM_DEVICE, 1758 IXGBE_RX_DMA_ATTR); 1759 1760 /* 1761 * if mapping failed free memory back to system since 1762 * there isn't much point in holding memory we can't use 1763 */ 1764 if (dma_mapping_error(rx_ring->dev, dma)) { 1765 __free_pages(page, ixgbe_rx_pg_order(rx_ring)); 1766 1767 rx_ring->rx_stats.alloc_rx_page_failed++; 1768 return false; 1769 } 1770 1771 bi->dma = dma; 1772 bi->page = page; 1773 bi->page_offset = rx_ring->rx_offset; 1774 page_ref_add(page, USHRT_MAX - 1); 1775 bi->pagecnt_bias = USHRT_MAX; 1776 rx_ring->rx_stats.alloc_rx_page++; 1777 1778 return true; 1779 } 1780 1781 /** 1782 * ixgbe_alloc_rx_buffers - Replace used receive buffers 1783 * @rx_ring: ring to place buffers on 1784 * @cleaned_count: number of buffers to replace 1785 **/ 1786 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count) 1787 { 1788 union ixgbe_adv_rx_desc *rx_desc; 1789 struct ixgbe_rx_buffer *bi; 1790 u16 i = rx_ring->next_to_use; 1791 u16 bufsz; 1792 1793 /* nothing to do */ 1794 if (!cleaned_count) 1795 return; 1796 1797 rx_desc = IXGBE_RX_DESC(rx_ring, i); 1798 bi = &rx_ring->rx_buffer_info[i]; 1799 i -= rx_ring->count; 1800 1801 bufsz = ixgbe_rx_bufsz(rx_ring); 1802 1803 do { 1804 if (!ixgbe_alloc_mapped_page(rx_ring, bi)) 1805 break; 1806 1807 /* sync the buffer for use by the device */ 1808 dma_sync_single_range_for_device(rx_ring->dev, bi->dma, 1809 bi->page_offset, bufsz, 1810 DMA_FROM_DEVICE); 1811 1812 /* 1813 * Refresh the desc even if buffer_addrs didn't change 1814 * because each write-back erases this info. 1815 */ 1816 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset); 1817 1818 rx_desc++; 1819 bi++; 1820 i++; 1821 if (unlikely(!i)) { 1822 rx_desc = IXGBE_RX_DESC(rx_ring, 0); 1823 bi = rx_ring->rx_buffer_info; 1824 i -= rx_ring->count; 1825 } 1826 1827 /* clear the length for the next_to_use descriptor */ 1828 rx_desc->wb.upper.length = 0; 1829 1830 cleaned_count--; 1831 } while (cleaned_count); 1832 1833 i += rx_ring->count; 1834 1835 if (rx_ring->next_to_use != i) { 1836 rx_ring->next_to_use = i; 1837 1838 /* update next to alloc since we have filled the ring */ 1839 rx_ring->next_to_alloc = i; 1840 1841 /* Force memory writes to complete before letting h/w 1842 * know there are new descriptors to fetch. (Only 1843 * applicable for weak-ordered memory model archs, 1844 * such as IA-64). 1845 */ 1846 wmb(); 1847 writel(i, rx_ring->tail); 1848 } 1849 } 1850 1851 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring, 1852 struct sk_buff *skb) 1853 { 1854 u16 hdr_len = skb_headlen(skb); 1855 1856 /* set gso_size to avoid messing up TCP MSS */ 1857 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len), 1858 IXGBE_CB(skb)->append_cnt); 1859 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; 1860 } 1861 1862 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring, 1863 struct sk_buff *skb) 1864 { 1865 /* if append_cnt is 0 then frame is not RSC */ 1866 if (!IXGBE_CB(skb)->append_cnt) 1867 return; 1868 1869 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt; 1870 rx_ring->rx_stats.rsc_flush++; 1871 1872 ixgbe_set_rsc_gso_size(rx_ring, skb); 1873 1874 /* gso_size is computed using append_cnt so always clear it last */ 1875 IXGBE_CB(skb)->append_cnt = 0; 1876 } 1877 1878 /** 1879 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor 1880 * @rx_ring: rx descriptor ring packet is being transacted on 1881 * @rx_desc: pointer to the EOP Rx descriptor 1882 * @skb: pointer to current skb being populated 1883 * 1884 * This function checks the ring, descriptor, and packet information in 1885 * order to populate the hash, checksum, VLAN, timestamp, protocol, and 1886 * other fields within the skb. 1887 **/ 1888 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring, 1889 union ixgbe_adv_rx_desc *rx_desc, 1890 struct sk_buff *skb) 1891 { 1892 struct net_device *dev = rx_ring->netdev; 1893 u32 flags = rx_ring->q_vector->adapter->flags; 1894 1895 ixgbe_update_rsc_stats(rx_ring, skb); 1896 1897 ixgbe_rx_hash(rx_ring, rx_desc, skb); 1898 1899 ixgbe_rx_checksum(rx_ring, rx_desc, skb); 1900 1901 if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED)) 1902 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb); 1903 1904 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) && 1905 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) { 1906 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan); 1907 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid); 1908 } 1909 1910 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP)) 1911 ixgbe_ipsec_rx(rx_ring, rx_desc, skb); 1912 1913 /* record Rx queue, or update MACVLAN statistics */ 1914 if (netif_is_ixgbe(dev)) 1915 skb_record_rx_queue(skb, rx_ring->queue_index); 1916 else 1917 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true, 1918 false); 1919 1920 skb->protocol = eth_type_trans(skb, dev); 1921 } 1922 1923 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector, 1924 struct sk_buff *skb) 1925 { 1926 napi_gro_receive(&q_vector->napi, skb); 1927 } 1928 1929 /** 1930 * ixgbe_is_non_eop - process handling of non-EOP buffers 1931 * @rx_ring: Rx ring being processed 1932 * @rx_desc: Rx descriptor for current buffer 1933 * @skb: Current socket buffer containing buffer in progress 1934 * 1935 * This function updates next to clean. If the buffer is an EOP buffer 1936 * this function exits returning false, otherwise it will place the 1937 * sk_buff in the next buffer to be chained and return true indicating 1938 * that this is in fact a non-EOP buffer. 1939 **/ 1940 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring, 1941 union ixgbe_adv_rx_desc *rx_desc, 1942 struct sk_buff *skb) 1943 { 1944 u32 ntc = rx_ring->next_to_clean + 1; 1945 1946 /* fetch, update, and store next to clean */ 1947 ntc = (ntc < rx_ring->count) ? ntc : 0; 1948 rx_ring->next_to_clean = ntc; 1949 1950 prefetch(IXGBE_RX_DESC(rx_ring, ntc)); 1951 1952 /* update RSC append count if present */ 1953 if (ring_is_rsc_enabled(rx_ring)) { 1954 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data & 1955 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK); 1956 1957 if (unlikely(rsc_enabled)) { 1958 u32 rsc_cnt = le32_to_cpu(rsc_enabled); 1959 1960 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT; 1961 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1; 1962 1963 /* update ntc based on RSC value */ 1964 ntc = le32_to_cpu(rx_desc->wb.upper.status_error); 1965 ntc &= IXGBE_RXDADV_NEXTP_MASK; 1966 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT; 1967 } 1968 } 1969 1970 /* if we are the last buffer then there is nothing else to do */ 1971 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))) 1972 return false; 1973 1974 /* place skb in next buffer to be received */ 1975 rx_ring->rx_buffer_info[ntc].skb = skb; 1976 rx_ring->rx_stats.non_eop_descs++; 1977 1978 return true; 1979 } 1980 1981 /** 1982 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail 1983 * @rx_ring: rx descriptor ring packet is being transacted on 1984 * @skb: pointer to current skb being adjusted 1985 * 1986 * This function is an ixgbe specific version of __pskb_pull_tail. The 1987 * main difference between this version and the original function is that 1988 * this function can make several assumptions about the state of things 1989 * that allow for significant optimizations versus the standard function. 1990 * As a result we can do things like drop a frag and maintain an accurate 1991 * truesize for the skb. 1992 */ 1993 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring, 1994 struct sk_buff *skb) 1995 { 1996 skb_frag_t *frag = &skb_shinfo(skb)->frags[0]; 1997 unsigned char *va; 1998 unsigned int pull_len; 1999 2000 /* 2001 * it is valid to use page_address instead of kmap since we are 2002 * working with pages allocated out of the lomem pool per 2003 * alloc_page(GFP_ATOMIC) 2004 */ 2005 va = skb_frag_address(frag); 2006 2007 /* 2008 * we need the header to contain the greater of either ETH_HLEN or 2009 * 60 bytes if the skb->len is less than 60 for skb_pad. 2010 */ 2011 pull_len = eth_get_headlen(skb->dev, va, IXGBE_RX_HDR_SIZE); 2012 2013 /* align pull length to size of long to optimize memcpy performance */ 2014 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long))); 2015 2016 /* update all of the pointers */ 2017 skb_frag_size_sub(frag, pull_len); 2018 skb_frag_off_add(frag, pull_len); 2019 skb->data_len -= pull_len; 2020 skb->tail += pull_len; 2021 } 2022 2023 /** 2024 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB 2025 * @rx_ring: rx descriptor ring packet is being transacted on 2026 * @skb: pointer to current skb being updated 2027 * 2028 * This function provides a basic DMA sync up for the first fragment of an 2029 * skb. The reason for doing this is that the first fragment cannot be 2030 * unmapped until we have reached the end of packet descriptor for a buffer 2031 * chain. 2032 */ 2033 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring, 2034 struct sk_buff *skb) 2035 { 2036 if (ring_uses_build_skb(rx_ring)) { 2037 unsigned long mask = (unsigned long)ixgbe_rx_pg_size(rx_ring) - 1; 2038 unsigned long offset = (unsigned long)(skb->data) & mask; 2039 2040 dma_sync_single_range_for_cpu(rx_ring->dev, 2041 IXGBE_CB(skb)->dma, 2042 offset, 2043 skb_headlen(skb), 2044 DMA_FROM_DEVICE); 2045 } else { 2046 skb_frag_t *frag = &skb_shinfo(skb)->frags[0]; 2047 2048 dma_sync_single_range_for_cpu(rx_ring->dev, 2049 IXGBE_CB(skb)->dma, 2050 skb_frag_off(frag), 2051 skb_frag_size(frag), 2052 DMA_FROM_DEVICE); 2053 } 2054 2055 /* If the page was released, just unmap it. */ 2056 if (unlikely(IXGBE_CB(skb)->page_released)) { 2057 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma, 2058 ixgbe_rx_pg_size(rx_ring), 2059 DMA_FROM_DEVICE, 2060 IXGBE_RX_DMA_ATTR); 2061 } 2062 } 2063 2064 /** 2065 * ixgbe_cleanup_headers - Correct corrupted or empty headers 2066 * @rx_ring: rx descriptor ring packet is being transacted on 2067 * @rx_desc: pointer to the EOP Rx descriptor 2068 * @skb: pointer to current skb being fixed 2069 * 2070 * Check if the skb is valid in the XDP case it will be an error pointer. 2071 * Return true in this case to abort processing and advance to next 2072 * descriptor. 2073 * 2074 * Check for corrupted packet headers caused by senders on the local L2 2075 * embedded NIC switch not setting up their Tx Descriptors right. These 2076 * should be very rare. 2077 * 2078 * Also address the case where we are pulling data in on pages only 2079 * and as such no data is present in the skb header. 2080 * 2081 * In addition if skb is not at least 60 bytes we need to pad it so that 2082 * it is large enough to qualify as a valid Ethernet frame. 2083 * 2084 * Returns true if an error was encountered and skb was freed. 2085 **/ 2086 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring, 2087 union ixgbe_adv_rx_desc *rx_desc, 2088 struct sk_buff *skb) 2089 { 2090 struct net_device *netdev = rx_ring->netdev; 2091 2092 /* Verify netdev is present, and that packet does not have any 2093 * errors that would be unacceptable to the netdev. 2094 */ 2095 if (!netdev || 2096 (unlikely(ixgbe_test_staterr(rx_desc, 2097 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) && 2098 !(netdev->features & NETIF_F_RXALL)))) { 2099 dev_kfree_skb_any(skb); 2100 return true; 2101 } 2102 2103 /* place header in linear portion of buffer */ 2104 if (!skb_headlen(skb)) 2105 ixgbe_pull_tail(rx_ring, skb); 2106 2107 #ifdef IXGBE_FCOE 2108 /* do not attempt to pad FCoE Frames as this will disrupt DDP */ 2109 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) 2110 return false; 2111 2112 #endif 2113 /* if eth_skb_pad returns an error the skb was freed */ 2114 if (eth_skb_pad(skb)) 2115 return true; 2116 2117 return false; 2118 } 2119 2120 /** 2121 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring 2122 * @rx_ring: rx descriptor ring to store buffers on 2123 * @old_buff: donor buffer to have page reused 2124 * 2125 * Synchronizes page for reuse by the adapter 2126 **/ 2127 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring, 2128 struct ixgbe_rx_buffer *old_buff) 2129 { 2130 struct ixgbe_rx_buffer *new_buff; 2131 u16 nta = rx_ring->next_to_alloc; 2132 2133 new_buff = &rx_ring->rx_buffer_info[nta]; 2134 2135 /* update, and store next to alloc */ 2136 nta++; 2137 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0; 2138 2139 /* Transfer page from old buffer to new buffer. 2140 * Move each member individually to avoid possible store 2141 * forwarding stalls and unnecessary copy of skb. 2142 */ 2143 new_buff->dma = old_buff->dma; 2144 new_buff->page = old_buff->page; 2145 new_buff->page_offset = old_buff->page_offset; 2146 new_buff->pagecnt_bias = old_buff->pagecnt_bias; 2147 } 2148 2149 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer, 2150 int rx_buffer_pgcnt) 2151 { 2152 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias; 2153 struct page *page = rx_buffer->page; 2154 2155 /* avoid re-using remote and pfmemalloc pages */ 2156 if (!dev_page_is_reusable(page)) 2157 return false; 2158 2159 #if (PAGE_SIZE < 8192) 2160 /* if we are only owner of page we can reuse it */ 2161 if (unlikely((rx_buffer_pgcnt - pagecnt_bias) > 1)) 2162 return false; 2163 #else 2164 /* The last offset is a bit aggressive in that we assume the 2165 * worst case of FCoE being enabled and using a 3K buffer. 2166 * However this should have minimal impact as the 1K extra is 2167 * still less than one buffer in size. 2168 */ 2169 #define IXGBE_LAST_OFFSET \ 2170 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K) 2171 if (rx_buffer->page_offset > IXGBE_LAST_OFFSET) 2172 return false; 2173 #endif 2174 2175 /* If we have drained the page fragment pool we need to update 2176 * the pagecnt_bias and page count so that we fully restock the 2177 * number of references the driver holds. 2178 */ 2179 if (unlikely(pagecnt_bias == 1)) { 2180 page_ref_add(page, USHRT_MAX - 1); 2181 rx_buffer->pagecnt_bias = USHRT_MAX; 2182 } 2183 2184 return true; 2185 } 2186 2187 /** 2188 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff 2189 * @rx_ring: rx descriptor ring to transact packets on 2190 * @rx_buffer: buffer containing page to add 2191 * @skb: sk_buff to place the data into 2192 * @size: size of data in rx_buffer 2193 * 2194 * This function will add the data contained in rx_buffer->page to the skb. 2195 * This is done either through a direct copy if the data in the buffer is 2196 * less than the skb header size, otherwise it will just attach the page as 2197 * a frag to the skb. 2198 * 2199 * The function will then update the page offset if necessary and return 2200 * true if the buffer can be reused by the adapter. 2201 **/ 2202 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring, 2203 struct ixgbe_rx_buffer *rx_buffer, 2204 struct sk_buff *skb, 2205 unsigned int size) 2206 { 2207 #if (PAGE_SIZE < 8192) 2208 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2; 2209 #else 2210 unsigned int truesize = rx_ring->rx_offset ? 2211 SKB_DATA_ALIGN(rx_ring->rx_offset + size) : 2212 SKB_DATA_ALIGN(size); 2213 #endif 2214 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page, 2215 rx_buffer->page_offset, size, truesize); 2216 #if (PAGE_SIZE < 8192) 2217 rx_buffer->page_offset ^= truesize; 2218 #else 2219 rx_buffer->page_offset += truesize; 2220 #endif 2221 } 2222 2223 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring, 2224 union ixgbe_adv_rx_desc *rx_desc, 2225 struct sk_buff **skb, 2226 const unsigned int size, 2227 int *rx_buffer_pgcnt) 2228 { 2229 struct ixgbe_rx_buffer *rx_buffer; 2230 2231 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; 2232 *rx_buffer_pgcnt = 2233 #if (PAGE_SIZE < 8192) 2234 page_count(rx_buffer->page); 2235 #else 2236 0; 2237 #endif 2238 prefetchw(rx_buffer->page); 2239 *skb = rx_buffer->skb; 2240 2241 /* Delay unmapping of the first packet. It carries the header 2242 * information, HW may still access the header after the writeback. 2243 * Only unmap it when EOP is reached 2244 */ 2245 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) { 2246 if (!*skb) 2247 goto skip_sync; 2248 } else { 2249 if (*skb) 2250 ixgbe_dma_sync_frag(rx_ring, *skb); 2251 } 2252 2253 /* we are reusing so sync this buffer for CPU use */ 2254 dma_sync_single_range_for_cpu(rx_ring->dev, 2255 rx_buffer->dma, 2256 rx_buffer->page_offset, 2257 size, 2258 DMA_FROM_DEVICE); 2259 skip_sync: 2260 rx_buffer->pagecnt_bias--; 2261 2262 return rx_buffer; 2263 } 2264 2265 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring, 2266 struct ixgbe_rx_buffer *rx_buffer, 2267 struct sk_buff *skb, 2268 int rx_buffer_pgcnt) 2269 { 2270 if (ixgbe_can_reuse_rx_page(rx_buffer, rx_buffer_pgcnt)) { 2271 /* hand second half of page back to the ring */ 2272 ixgbe_reuse_rx_page(rx_ring, rx_buffer); 2273 } else { 2274 if (skb && IXGBE_CB(skb)->dma == rx_buffer->dma) { 2275 /* the page has been released from the ring */ 2276 IXGBE_CB(skb)->page_released = true; 2277 } else { 2278 /* we are not reusing the buffer so unmap it */ 2279 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma, 2280 ixgbe_rx_pg_size(rx_ring), 2281 DMA_FROM_DEVICE, 2282 IXGBE_RX_DMA_ATTR); 2283 } 2284 __page_frag_cache_drain(rx_buffer->page, 2285 rx_buffer->pagecnt_bias); 2286 } 2287 2288 /* clear contents of rx_buffer */ 2289 rx_buffer->page = NULL; 2290 rx_buffer->skb = NULL; 2291 } 2292 2293 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring, 2294 struct ixgbe_rx_buffer *rx_buffer, 2295 struct xdp_buff *xdp, 2296 union ixgbe_adv_rx_desc *rx_desc) 2297 { 2298 unsigned int size = xdp->data_end - xdp->data; 2299 #if (PAGE_SIZE < 8192) 2300 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2; 2301 #else 2302 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end - 2303 xdp->data_hard_start); 2304 #endif 2305 struct sk_buff *skb; 2306 2307 /* prefetch first cache line of first page */ 2308 net_prefetch(xdp->data); 2309 2310 /* Note, we get here by enabling legacy-rx via: 2311 * 2312 * ethtool --set-priv-flags <dev> legacy-rx on 2313 * 2314 * In this mode, we currently get 0 extra XDP headroom as 2315 * opposed to having legacy-rx off, where we process XDP 2316 * packets going to stack via ixgbe_build_skb(). The latter 2317 * provides us currently with 192 bytes of headroom. 2318 * 2319 * For ixgbe_construct_skb() mode it means that the 2320 * xdp->data_meta will always point to xdp->data, since 2321 * the helper cannot expand the head. Should this ever 2322 * change in future for legacy-rx mode on, then lets also 2323 * add xdp->data_meta handling here. 2324 */ 2325 2326 /* allocate a skb to store the frags */ 2327 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE); 2328 if (unlikely(!skb)) 2329 return NULL; 2330 2331 if (size > IXGBE_RX_HDR_SIZE) { 2332 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) 2333 IXGBE_CB(skb)->dma = rx_buffer->dma; 2334 2335 skb_add_rx_frag(skb, 0, rx_buffer->page, 2336 xdp->data - page_address(rx_buffer->page), 2337 size, truesize); 2338 #if (PAGE_SIZE < 8192) 2339 rx_buffer->page_offset ^= truesize; 2340 #else 2341 rx_buffer->page_offset += truesize; 2342 #endif 2343 } else { 2344 memcpy(__skb_put(skb, size), 2345 xdp->data, ALIGN(size, sizeof(long))); 2346 rx_buffer->pagecnt_bias++; 2347 } 2348 2349 return skb; 2350 } 2351 2352 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring, 2353 struct ixgbe_rx_buffer *rx_buffer, 2354 struct xdp_buff *xdp, 2355 union ixgbe_adv_rx_desc *rx_desc) 2356 { 2357 unsigned int metasize = xdp->data - xdp->data_meta; 2358 #if (PAGE_SIZE < 8192) 2359 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2; 2360 #else 2361 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + 2362 SKB_DATA_ALIGN(xdp->data_end - 2363 xdp->data_hard_start); 2364 #endif 2365 struct sk_buff *skb; 2366 2367 /* Prefetch first cache line of first page. If xdp->data_meta 2368 * is unused, this points exactly as xdp->data, otherwise we 2369 * likely have a consumer accessing first few bytes of meta 2370 * data, and then actual data. 2371 */ 2372 net_prefetch(xdp->data_meta); 2373 2374 /* build an skb to around the page buffer */ 2375 skb = napi_build_skb(xdp->data_hard_start, truesize); 2376 if (unlikely(!skb)) 2377 return NULL; 2378 2379 /* update pointers within the skb to store the data */ 2380 skb_reserve(skb, xdp->data - xdp->data_hard_start); 2381 __skb_put(skb, xdp->data_end - xdp->data); 2382 if (metasize) 2383 skb_metadata_set(skb, metasize); 2384 2385 /* record DMA address if this is the start of a chain of buffers */ 2386 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) 2387 IXGBE_CB(skb)->dma = rx_buffer->dma; 2388 2389 /* update buffer offset */ 2390 #if (PAGE_SIZE < 8192) 2391 rx_buffer->page_offset ^= truesize; 2392 #else 2393 rx_buffer->page_offset += truesize; 2394 #endif 2395 2396 return skb; 2397 } 2398 2399 static int ixgbe_run_xdp(struct ixgbe_adapter *adapter, 2400 struct ixgbe_ring *rx_ring, 2401 struct xdp_buff *xdp) 2402 { 2403 int err, result = IXGBE_XDP_PASS; 2404 struct bpf_prog *xdp_prog; 2405 struct ixgbe_ring *ring; 2406 struct xdp_frame *xdpf; 2407 u32 act; 2408 2409 xdp_prog = READ_ONCE(rx_ring->xdp_prog); 2410 2411 if (!xdp_prog) 2412 goto xdp_out; 2413 2414 prefetchw(xdp->data_hard_start); /* xdp_frame write */ 2415 2416 act = bpf_prog_run_xdp(xdp_prog, xdp); 2417 switch (act) { 2418 case XDP_PASS: 2419 break; 2420 case XDP_TX: 2421 xdpf = xdp_convert_buff_to_frame(xdp); 2422 if (unlikely(!xdpf)) 2423 goto out_failure; 2424 ring = ixgbe_determine_xdp_ring(adapter); 2425 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 2426 spin_lock(&ring->tx_lock); 2427 result = ixgbe_xmit_xdp_ring(ring, xdpf); 2428 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 2429 spin_unlock(&ring->tx_lock); 2430 if (result == IXGBE_XDP_CONSUMED) 2431 goto out_failure; 2432 break; 2433 case XDP_REDIRECT: 2434 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog); 2435 if (err) 2436 goto out_failure; 2437 result = IXGBE_XDP_REDIR; 2438 break; 2439 default: 2440 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act); 2441 fallthrough; 2442 case XDP_ABORTED: 2443 out_failure: 2444 trace_xdp_exception(rx_ring->netdev, xdp_prog, act); 2445 fallthrough; /* handle aborts by dropping packet */ 2446 case XDP_DROP: 2447 result = IXGBE_XDP_CONSUMED; 2448 break; 2449 } 2450 xdp_out: 2451 return result; 2452 } 2453 2454 static unsigned int ixgbe_rx_frame_truesize(struct ixgbe_ring *rx_ring, 2455 unsigned int size) 2456 { 2457 unsigned int truesize; 2458 2459 #if (PAGE_SIZE < 8192) 2460 truesize = ixgbe_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */ 2461 #else 2462 truesize = rx_ring->rx_offset ? 2463 SKB_DATA_ALIGN(rx_ring->rx_offset + size) + 2464 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) : 2465 SKB_DATA_ALIGN(size); 2466 #endif 2467 return truesize; 2468 } 2469 2470 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring, 2471 struct ixgbe_rx_buffer *rx_buffer, 2472 unsigned int size) 2473 { 2474 unsigned int truesize = ixgbe_rx_frame_truesize(rx_ring, size); 2475 #if (PAGE_SIZE < 8192) 2476 rx_buffer->page_offset ^= truesize; 2477 #else 2478 rx_buffer->page_offset += truesize; 2479 #endif 2480 } 2481 2482 /** 2483 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf 2484 * @q_vector: structure containing interrupt and ring information 2485 * @rx_ring: rx descriptor ring to transact packets on 2486 * @budget: Total limit on number of packets to process 2487 * 2488 * This function provides a "bounce buffer" approach to Rx interrupt 2489 * processing. The advantage to this is that on systems that have 2490 * expensive overhead for IOMMU access this provides a means of avoiding 2491 * it by maintaining the mapping of the page to the system. 2492 * 2493 * Returns amount of work completed 2494 **/ 2495 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector, 2496 struct ixgbe_ring *rx_ring, 2497 const int budget) 2498 { 2499 unsigned int total_rx_bytes = 0, total_rx_packets = 0, frame_sz = 0; 2500 struct ixgbe_adapter *adapter = q_vector->adapter; 2501 #ifdef IXGBE_FCOE 2502 int ddp_bytes; 2503 unsigned int mss = 0; 2504 #endif /* IXGBE_FCOE */ 2505 u16 cleaned_count = ixgbe_desc_unused(rx_ring); 2506 unsigned int offset = rx_ring->rx_offset; 2507 unsigned int xdp_xmit = 0; 2508 struct xdp_buff xdp; 2509 int xdp_res = 0; 2510 2511 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */ 2512 #if (PAGE_SIZE < 8192) 2513 frame_sz = ixgbe_rx_frame_truesize(rx_ring, 0); 2514 #endif 2515 xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq); 2516 2517 while (likely(total_rx_packets < budget)) { 2518 union ixgbe_adv_rx_desc *rx_desc; 2519 struct ixgbe_rx_buffer *rx_buffer; 2520 struct sk_buff *skb; 2521 int rx_buffer_pgcnt; 2522 unsigned int size; 2523 2524 /* return some buffers to hardware, one at a time is too slow */ 2525 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) { 2526 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count); 2527 cleaned_count = 0; 2528 } 2529 2530 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean); 2531 size = le16_to_cpu(rx_desc->wb.upper.length); 2532 if (!size) 2533 break; 2534 2535 /* This memory barrier is needed to keep us from reading 2536 * any other fields out of the rx_desc until we know the 2537 * descriptor has been written back 2538 */ 2539 dma_rmb(); 2540 2541 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size, &rx_buffer_pgcnt); 2542 2543 /* retrieve a buffer from the ring */ 2544 if (!skb) { 2545 unsigned char *hard_start; 2546 2547 hard_start = page_address(rx_buffer->page) + 2548 rx_buffer->page_offset - offset; 2549 xdp_prepare_buff(&xdp, hard_start, offset, size, true); 2550 xdp_buff_clear_frags_flag(&xdp); 2551 #if (PAGE_SIZE > 4096) 2552 /* At larger PAGE_SIZE, frame_sz depend on len size */ 2553 xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, size); 2554 #endif 2555 xdp_res = ixgbe_run_xdp(adapter, rx_ring, &xdp); 2556 } 2557 2558 if (xdp_res) { 2559 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) { 2560 xdp_xmit |= xdp_res; 2561 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size); 2562 } else { 2563 rx_buffer->pagecnt_bias++; 2564 } 2565 total_rx_packets++; 2566 total_rx_bytes += size; 2567 } else if (skb) { 2568 ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size); 2569 } else if (ring_uses_build_skb(rx_ring)) { 2570 skb = ixgbe_build_skb(rx_ring, rx_buffer, 2571 &xdp, rx_desc); 2572 } else { 2573 skb = ixgbe_construct_skb(rx_ring, rx_buffer, 2574 &xdp, rx_desc); 2575 } 2576 2577 /* exit if we failed to retrieve a buffer */ 2578 if (!xdp_res && !skb) { 2579 rx_ring->rx_stats.alloc_rx_buff_failed++; 2580 rx_buffer->pagecnt_bias++; 2581 break; 2582 } 2583 2584 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb, rx_buffer_pgcnt); 2585 cleaned_count++; 2586 2587 /* place incomplete frames back on ring for completion */ 2588 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb)) 2589 continue; 2590 2591 /* verify the packet layout is correct */ 2592 if (xdp_res || ixgbe_cleanup_headers(rx_ring, rx_desc, skb)) 2593 continue; 2594 2595 /* probably a little skewed due to removing CRC */ 2596 total_rx_bytes += skb->len; 2597 2598 /* populate checksum, timestamp, VLAN, and protocol */ 2599 ixgbe_process_skb_fields(rx_ring, rx_desc, skb); 2600 2601 #ifdef IXGBE_FCOE 2602 /* if ddp, not passing to ULD unless for FCP_RSP or error */ 2603 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) { 2604 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb); 2605 /* include DDPed FCoE data */ 2606 if (ddp_bytes > 0) { 2607 if (!mss) { 2608 mss = rx_ring->netdev->mtu - 2609 sizeof(struct fcoe_hdr) - 2610 sizeof(struct fc_frame_header) - 2611 sizeof(struct fcoe_crc_eof); 2612 if (mss > 512) 2613 mss &= ~511; 2614 } 2615 total_rx_bytes += ddp_bytes; 2616 total_rx_packets += DIV_ROUND_UP(ddp_bytes, 2617 mss); 2618 } 2619 if (!ddp_bytes) { 2620 dev_kfree_skb_any(skb); 2621 continue; 2622 } 2623 } 2624 2625 #endif /* IXGBE_FCOE */ 2626 ixgbe_rx_skb(q_vector, skb); 2627 2628 /* update budget accounting */ 2629 total_rx_packets++; 2630 } 2631 2632 if (xdp_xmit & IXGBE_XDP_REDIR) 2633 xdp_do_flush(); 2634 2635 if (xdp_xmit & IXGBE_XDP_TX) { 2636 struct ixgbe_ring *ring = ixgbe_determine_xdp_ring(adapter); 2637 2638 ixgbe_xdp_ring_update_tail_locked(ring); 2639 } 2640 2641 ixgbe_update_rx_ring_stats(rx_ring, q_vector, total_rx_packets, 2642 total_rx_bytes); 2643 2644 return total_rx_packets; 2645 } 2646 2647 /** 2648 * ixgbe_configure_msix - Configure MSI-X hardware 2649 * @adapter: board private structure 2650 * 2651 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X 2652 * interrupts. 2653 **/ 2654 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter) 2655 { 2656 struct ixgbe_q_vector *q_vector; 2657 int v_idx; 2658 u32 mask; 2659 2660 /* Populate MSIX to EITR Select */ 2661 if (adapter->num_vfs > 32) { 2662 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1; 2663 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel); 2664 } 2665 2666 /* 2667 * Populate the IVAR table and set the ITR values to the 2668 * corresponding register. 2669 */ 2670 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) { 2671 struct ixgbe_ring *ring; 2672 q_vector = adapter->q_vector[v_idx]; 2673 2674 ixgbe_for_each_ring(ring, q_vector->rx) 2675 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx); 2676 2677 ixgbe_for_each_ring(ring, q_vector->tx) 2678 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx); 2679 2680 ixgbe_write_eitr(q_vector); 2681 } 2682 2683 switch (adapter->hw.mac.type) { 2684 case ixgbe_mac_82598EB: 2685 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX, 2686 v_idx); 2687 break; 2688 case ixgbe_mac_82599EB: 2689 case ixgbe_mac_X540: 2690 case ixgbe_mac_X550: 2691 case ixgbe_mac_X550EM_x: 2692 case ixgbe_mac_x550em_a: 2693 case ixgbe_mac_e610: 2694 ixgbe_set_ivar(adapter, -1, 1, v_idx); 2695 break; 2696 default: 2697 break; 2698 } 2699 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950); 2700 2701 /* set up to autoclear timer, and the vectors */ 2702 mask = IXGBE_EIMS_ENABLE_MASK; 2703 mask &= ~(IXGBE_EIMS_OTHER | 2704 IXGBE_EIMS_MAILBOX | 2705 IXGBE_EIMS_LSC); 2706 2707 if (adapter->hw.mac.type == ixgbe_mac_e610) 2708 mask &= ~IXGBE_EIMS_FW_EVENT; 2709 2710 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask); 2711 } 2712 2713 /** 2714 * ixgbe_update_itr - update the dynamic ITR value based on statistics 2715 * @q_vector: structure containing interrupt and ring information 2716 * @ring_container: structure containing ring performance data 2717 * 2718 * Stores a new ITR value based on packets and byte 2719 * counts during the last interrupt. The advantage of per interrupt 2720 * computation is faster updates and more accurate ITR for the current 2721 * traffic pattern. Constants in this function were computed 2722 * based on theoretical maximum wire speed and thresholds were set based 2723 * on testing data as well as attempting to minimize response time 2724 * while increasing bulk throughput. 2725 **/ 2726 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector, 2727 struct ixgbe_ring_container *ring_container) 2728 { 2729 unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS | 2730 IXGBE_ITR_ADAPTIVE_LATENCY; 2731 unsigned int avg_wire_size, packets, bytes; 2732 unsigned long next_update = jiffies; 2733 2734 /* If we don't have any rings just leave ourselves set for maximum 2735 * possible latency so we take ourselves out of the equation. 2736 */ 2737 if (!ring_container->ring) 2738 return; 2739 2740 /* If we didn't update within up to 1 - 2 jiffies we can assume 2741 * that either packets are coming in so slow there hasn't been 2742 * any work, or that there is so much work that NAPI is dealing 2743 * with interrupt moderation and we don't need to do anything. 2744 */ 2745 if (time_after(next_update, ring_container->next_update)) 2746 goto clear_counts; 2747 2748 packets = ring_container->total_packets; 2749 2750 /* We have no packets to actually measure against. This means 2751 * either one of the other queues on this vector is active or 2752 * we are a Tx queue doing TSO with too high of an interrupt rate. 2753 * 2754 * When this occurs just tick up our delay by the minimum value 2755 * and hope that this extra delay will prevent us from being called 2756 * without any work on our queue. 2757 */ 2758 if (!packets) { 2759 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC; 2760 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS) 2761 itr = IXGBE_ITR_ADAPTIVE_MAX_USECS; 2762 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY; 2763 goto clear_counts; 2764 } 2765 2766 bytes = ring_container->total_bytes; 2767 2768 /* If packets are less than 4 or bytes are less than 9000 assume 2769 * insufficient data to use bulk rate limiting approach. We are 2770 * likely latency driven. 2771 */ 2772 if (packets < 4 && bytes < 9000) { 2773 itr = IXGBE_ITR_ADAPTIVE_LATENCY; 2774 goto adjust_by_size; 2775 } 2776 2777 /* Between 4 and 48 we can assume that our current interrupt delay 2778 * is only slightly too low. As such we should increase it by a small 2779 * fixed amount. 2780 */ 2781 if (packets < 48) { 2782 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC; 2783 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS) 2784 itr = IXGBE_ITR_ADAPTIVE_MAX_USECS; 2785 goto clear_counts; 2786 } 2787 2788 /* Between 48 and 96 is our "goldilocks" zone where we are working 2789 * out "just right". Just report that our current ITR is good for us. 2790 */ 2791 if (packets < 96) { 2792 itr = q_vector->itr >> 2; 2793 goto clear_counts; 2794 } 2795 2796 /* If packet count is 96 or greater we are likely looking at a slight 2797 * overrun of the delay we want. Try halving our delay to see if that 2798 * will cut the number of packets in half per interrupt. 2799 */ 2800 if (packets < 256) { 2801 itr = q_vector->itr >> 3; 2802 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS) 2803 itr = IXGBE_ITR_ADAPTIVE_MIN_USECS; 2804 goto clear_counts; 2805 } 2806 2807 /* The paths below assume we are dealing with a bulk ITR since number 2808 * of packets is 256 or greater. We are just going to have to compute 2809 * a value and try to bring the count under control, though for smaller 2810 * packet sizes there isn't much we can do as NAPI polling will likely 2811 * be kicking in sooner rather than later. 2812 */ 2813 itr = IXGBE_ITR_ADAPTIVE_BULK; 2814 2815 adjust_by_size: 2816 /* If packet counts are 256 or greater we can assume we have a gross 2817 * overestimation of what the rate should be. Instead of trying to fine 2818 * tune it just use the formula below to try and dial in an exact value 2819 * give the current packet size of the frame. 2820 */ 2821 avg_wire_size = bytes / packets; 2822 2823 /* The following is a crude approximation of: 2824 * wmem_default / (size + overhead) = desired_pkts_per_int 2825 * rate / bits_per_byte / (size + ethernet overhead) = pkt_rate 2826 * (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value 2827 * 2828 * Assuming wmem_default is 212992 and overhead is 640 bytes per 2829 * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the 2830 * formula down to 2831 * 2832 * (170 * (size + 24)) / (size + 640) = ITR 2833 * 2834 * We first do some math on the packet size and then finally bitshift 2835 * by 8 after rounding up. We also have to account for PCIe link speed 2836 * difference as ITR scales based on this. 2837 */ 2838 if (avg_wire_size <= 60) { 2839 /* Start at 50k ints/sec */ 2840 avg_wire_size = 5120; 2841 } else if (avg_wire_size <= 316) { 2842 /* 50K ints/sec to 16K ints/sec */ 2843 avg_wire_size *= 40; 2844 avg_wire_size += 2720; 2845 } else if (avg_wire_size <= 1084) { 2846 /* 16K ints/sec to 9.2K ints/sec */ 2847 avg_wire_size *= 15; 2848 avg_wire_size += 11452; 2849 } else if (avg_wire_size < 1968) { 2850 /* 9.2K ints/sec to 8K ints/sec */ 2851 avg_wire_size *= 5; 2852 avg_wire_size += 22420; 2853 } else { 2854 /* plateau at a limit of 8K ints/sec */ 2855 avg_wire_size = 32256; 2856 } 2857 2858 /* If we are in low latency mode half our delay which doubles the rate 2859 * to somewhere between 100K to 16K ints/sec 2860 */ 2861 if (itr & IXGBE_ITR_ADAPTIVE_LATENCY) 2862 avg_wire_size >>= 1; 2863 2864 /* Resultant value is 256 times larger than it needs to be. This 2865 * gives us room to adjust the value as needed to either increase 2866 * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc. 2867 * 2868 * Use addition as we have already recorded the new latency flag 2869 * for the ITR value. 2870 */ 2871 switch (q_vector->adapter->link_speed) { 2872 case IXGBE_LINK_SPEED_10GB_FULL: 2873 case IXGBE_LINK_SPEED_100_FULL: 2874 default: 2875 itr += DIV_ROUND_UP(avg_wire_size, 2876 IXGBE_ITR_ADAPTIVE_MIN_INC * 256) * 2877 IXGBE_ITR_ADAPTIVE_MIN_INC; 2878 break; 2879 case IXGBE_LINK_SPEED_2_5GB_FULL: 2880 case IXGBE_LINK_SPEED_1GB_FULL: 2881 case IXGBE_LINK_SPEED_10_FULL: 2882 if (avg_wire_size > 8064) 2883 avg_wire_size = 8064; 2884 itr += DIV_ROUND_UP(avg_wire_size, 2885 IXGBE_ITR_ADAPTIVE_MIN_INC * 64) * 2886 IXGBE_ITR_ADAPTIVE_MIN_INC; 2887 break; 2888 } 2889 2890 clear_counts: 2891 /* write back value */ 2892 ring_container->itr = itr; 2893 2894 /* next update should occur within next jiffy */ 2895 ring_container->next_update = next_update + 1; 2896 2897 ring_container->total_bytes = 0; 2898 ring_container->total_packets = 0; 2899 } 2900 2901 /** 2902 * ixgbe_write_eitr - write EITR register in hardware specific way 2903 * @q_vector: structure containing interrupt and ring information 2904 * 2905 * This function is made to be called by ethtool and by the driver 2906 * when it needs to update EITR registers at runtime. Hardware 2907 * specific quirks/differences are taken care of here. 2908 */ 2909 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector) 2910 { 2911 struct ixgbe_adapter *adapter = q_vector->adapter; 2912 struct ixgbe_hw *hw = &adapter->hw; 2913 int v_idx = q_vector->v_idx; 2914 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR; 2915 2916 switch (adapter->hw.mac.type) { 2917 case ixgbe_mac_82598EB: 2918 /* must write high and low 16 bits to reset counter */ 2919 itr_reg |= (itr_reg << 16); 2920 break; 2921 case ixgbe_mac_82599EB: 2922 case ixgbe_mac_X540: 2923 case ixgbe_mac_X550: 2924 case ixgbe_mac_X550EM_x: 2925 case ixgbe_mac_x550em_a: 2926 case ixgbe_mac_e610: 2927 /* 2928 * set the WDIS bit to not clear the timer bits and cause an 2929 * immediate assertion of the interrupt 2930 */ 2931 itr_reg |= IXGBE_EITR_CNT_WDIS; 2932 break; 2933 default: 2934 break; 2935 } 2936 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg); 2937 } 2938 2939 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector) 2940 { 2941 u32 new_itr; 2942 2943 ixgbe_update_itr(q_vector, &q_vector->tx); 2944 ixgbe_update_itr(q_vector, &q_vector->rx); 2945 2946 /* use the smallest value of new ITR delay calculations */ 2947 new_itr = min(q_vector->rx.itr, q_vector->tx.itr); 2948 2949 /* Clear latency flag if set, shift into correct position */ 2950 new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY; 2951 new_itr <<= 2; 2952 2953 if (new_itr != q_vector->itr) { 2954 /* save the algorithm value here */ 2955 q_vector->itr = new_itr; 2956 2957 ixgbe_write_eitr(q_vector); 2958 } 2959 } 2960 2961 /** 2962 * ixgbe_check_overtemp_subtask - check for over temperature 2963 * @adapter: pointer to adapter 2964 **/ 2965 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter) 2966 { 2967 struct ixgbe_hw *hw = &adapter->hw; 2968 u32 eicr = adapter->interrupt_event; 2969 2970 if (test_bit(__IXGBE_DOWN, &adapter->state)) 2971 return; 2972 2973 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT)) 2974 return; 2975 2976 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT; 2977 2978 switch (hw->device_id) { 2979 case IXGBE_DEV_ID_82599_T3_LOM: 2980 /* 2981 * Since the warning interrupt is for both ports 2982 * we don't have to check if: 2983 * - This interrupt wasn't for our port. 2984 * - We may have missed the interrupt so always have to 2985 * check if we got a LSC 2986 */ 2987 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) && 2988 !(eicr & IXGBE_EICR_LSC)) 2989 return; 2990 2991 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) { 2992 u32 speed; 2993 bool link_up = false; 2994 2995 hw->mac.ops.check_link(hw, &speed, &link_up, false); 2996 2997 if (link_up) 2998 return; 2999 } 3000 3001 /* Check if this is not due to overtemp */ 3002 if (!hw->phy.ops.check_overtemp(hw)) 3003 return; 3004 3005 break; 3006 case IXGBE_DEV_ID_X550EM_A_1G_T: 3007 case IXGBE_DEV_ID_X550EM_A_1G_T_L: 3008 if (!hw->phy.ops.check_overtemp(hw)) 3009 return; 3010 break; 3011 default: 3012 if (adapter->hw.mac.type >= ixgbe_mac_X540) 3013 return; 3014 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw))) 3015 return; 3016 break; 3017 } 3018 e_crit(drv, "%s\n", ixgbe_overheat_msg); 3019 3020 adapter->interrupt_event = 0; 3021 } 3022 3023 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr) 3024 { 3025 struct ixgbe_hw *hw = &adapter->hw; 3026 3027 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) && 3028 (eicr & IXGBE_EICR_GPI_SDP1(hw))) { 3029 e_crit(probe, "Fan has stopped, replace the adapter\n"); 3030 /* write to clear the interrupt */ 3031 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw)); 3032 } 3033 } 3034 3035 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr) 3036 { 3037 struct ixgbe_hw *hw = &adapter->hw; 3038 3039 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)) 3040 return; 3041 3042 switch (adapter->hw.mac.type) { 3043 case ixgbe_mac_82599EB: 3044 /* 3045 * Need to check link state so complete overtemp check 3046 * on service task 3047 */ 3048 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) || 3049 (eicr & IXGBE_EICR_LSC)) && 3050 (!test_bit(__IXGBE_DOWN, &adapter->state))) { 3051 adapter->interrupt_event = eicr; 3052 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT; 3053 ixgbe_service_event_schedule(adapter); 3054 return; 3055 } 3056 return; 3057 case ixgbe_mac_x550em_a: 3058 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) { 3059 adapter->interrupt_event = eicr; 3060 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT; 3061 ixgbe_service_event_schedule(adapter); 3062 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 3063 IXGBE_EICR_GPI_SDP0_X550EM_a); 3064 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR, 3065 IXGBE_EICR_GPI_SDP0_X550EM_a); 3066 } 3067 return; 3068 case ixgbe_mac_X550: 3069 case ixgbe_mac_X540: 3070 if (!(eicr & IXGBE_EICR_TS)) 3071 return; 3072 break; 3073 default: 3074 return; 3075 } 3076 3077 e_crit(drv, "%s\n", ixgbe_overheat_msg); 3078 } 3079 3080 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw) 3081 { 3082 switch (hw->mac.type) { 3083 case ixgbe_mac_82598EB: 3084 if (hw->phy.type == ixgbe_phy_nl) 3085 return true; 3086 return false; 3087 case ixgbe_mac_82599EB: 3088 case ixgbe_mac_X550EM_x: 3089 case ixgbe_mac_x550em_a: 3090 switch (hw->mac.ops.get_media_type(hw)) { 3091 case ixgbe_media_type_fiber: 3092 case ixgbe_media_type_fiber_qsfp: 3093 return true; 3094 default: 3095 return false; 3096 } 3097 default: 3098 return false; 3099 } 3100 } 3101 3102 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr) 3103 { 3104 struct ixgbe_hw *hw = &adapter->hw; 3105 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw); 3106 3107 if (!ixgbe_is_sfp(hw)) 3108 return; 3109 3110 /* Later MAC's use different SDP */ 3111 if (hw->mac.type >= ixgbe_mac_X540) 3112 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3113 3114 if (eicr & eicr_mask) { 3115 /* Clear the interrupt */ 3116 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 3117 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 3118 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET; 3119 adapter->sfp_poll_time = 0; 3120 ixgbe_service_event_schedule(adapter); 3121 } 3122 } 3123 3124 if (adapter->hw.mac.type == ixgbe_mac_82599EB && 3125 (eicr & IXGBE_EICR_GPI_SDP1(hw))) { 3126 /* Clear the interrupt */ 3127 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw)); 3128 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 3129 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG; 3130 ixgbe_service_event_schedule(adapter); 3131 } 3132 } 3133 } 3134 3135 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter) 3136 { 3137 struct ixgbe_hw *hw = &adapter->hw; 3138 3139 adapter->lsc_int++; 3140 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; 3141 adapter->link_check_timeout = jiffies; 3142 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 3143 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 3144 IXGBE_WRITE_FLUSH(hw); 3145 ixgbe_service_event_schedule(adapter); 3146 } 3147 } 3148 3149 /** 3150 * ixgbe_check_phy_fw_load - check if PHY FW load failed 3151 * @adapter: pointer to adapter structure 3152 * @link_cfg_err: bitmap from the link info structure 3153 * 3154 * Check if external PHY FW load failed and print an error message if it did. 3155 */ 3156 static void ixgbe_check_phy_fw_load(struct ixgbe_adapter *adapter, 3157 u8 link_cfg_err) 3158 { 3159 if (!(link_cfg_err & IXGBE_ACI_LINK_EXTERNAL_PHY_LOAD_FAILURE)) { 3160 adapter->flags2 &= ~IXGBE_FLAG2_PHY_FW_LOAD_FAILED; 3161 return; 3162 } 3163 3164 if (adapter->flags2 & IXGBE_FLAG2_PHY_FW_LOAD_FAILED) 3165 return; 3166 3167 if (link_cfg_err & IXGBE_ACI_LINK_EXTERNAL_PHY_LOAD_FAILURE) { 3168 netdev_err(adapter->netdev, "Device failed to load the FW for the external PHY. Please download and install the latest NVM for your device and try again\n"); 3169 adapter->flags2 |= IXGBE_FLAG2_PHY_FW_LOAD_FAILED; 3170 } 3171 } 3172 3173 /** 3174 * ixgbe_check_module_power - check module power level 3175 * @adapter: pointer to adapter structure 3176 * @link_cfg_err: bitmap from the link info structure 3177 * 3178 * Check module power level returned by a previous call to aci_get_link_info 3179 * and print error messages if module power level is not supported. 3180 */ 3181 static void ixgbe_check_module_power(struct ixgbe_adapter *adapter, 3182 u8 link_cfg_err) 3183 { 3184 /* If module power level is supported, clear the flag. */ 3185 if (!(link_cfg_err & (IXGBE_ACI_LINK_INVAL_MAX_POWER_LIMIT | 3186 IXGBE_ACI_LINK_MODULE_POWER_UNSUPPORTED))) { 3187 adapter->flags2 &= ~IXGBE_FLAG2_MOD_POWER_UNSUPPORTED; 3188 return; 3189 } 3190 3191 /* If IXGBE_FLAG2_MOD_POWER_UNSUPPORTED was previously set and the 3192 * above block didn't clear this bit, there's nothing to do. 3193 */ 3194 if (adapter->flags2 & IXGBE_FLAG2_MOD_POWER_UNSUPPORTED) 3195 return; 3196 3197 if (link_cfg_err & IXGBE_ACI_LINK_INVAL_MAX_POWER_LIMIT) { 3198 netdev_err(adapter->netdev, "The installed module is incompatible with the device's NVM image. Cannot start link.\n"); 3199 adapter->flags2 |= IXGBE_FLAG2_MOD_POWER_UNSUPPORTED; 3200 } else if (link_cfg_err & IXGBE_ACI_LINK_MODULE_POWER_UNSUPPORTED) { 3201 netdev_err(adapter->netdev, "The module's power requirements exceed the device's power supply. Cannot start link.\n"); 3202 adapter->flags2 |= IXGBE_FLAG2_MOD_POWER_UNSUPPORTED; 3203 } 3204 } 3205 3206 /** 3207 * ixgbe_check_link_cfg_err - check if link configuration failed 3208 * @adapter: pointer to adapter structure 3209 * @link_cfg_err: bitmap from the link info structure 3210 * 3211 * Print if any link configuration failure happens due to the value in the 3212 * link_cfg_err parameter in the link info structure. 3213 */ 3214 static void ixgbe_check_link_cfg_err(struct ixgbe_adapter *adapter, 3215 u8 link_cfg_err) 3216 { 3217 ixgbe_check_module_power(adapter, link_cfg_err); 3218 ixgbe_check_phy_fw_load(adapter, link_cfg_err); 3219 } 3220 3221 /** 3222 * ixgbe_process_link_status_event - process the link event 3223 * @adapter: pointer to adapter structure 3224 * @link_up: true if the physical link is up and false if it is down 3225 * @link_speed: current link speed received from the link event 3226 * 3227 * Return: 0 on success or negative value on failure. 3228 */ 3229 static int 3230 ixgbe_process_link_status_event(struct ixgbe_adapter *adapter, bool link_up, 3231 u16 link_speed) 3232 { 3233 struct ixgbe_hw *hw = &adapter->hw; 3234 int status; 3235 3236 /* Update the link info structures and re-enable link events, 3237 * don't bail on failure due to other book keeping needed. 3238 */ 3239 status = ixgbe_update_link_info(hw); 3240 if (status) 3241 e_dev_err("Failed to update link status, err %d aq_err %d\n", 3242 status, hw->aci.last_status); 3243 3244 ixgbe_check_link_cfg_err(adapter, hw->link.link_info.link_cfg_err); 3245 3246 /* Check if the link state is up after updating link info, and treat 3247 * this event as an UP event since the link is actually UP now. 3248 */ 3249 if (hw->link.link_info.link_info & IXGBE_ACI_LINK_UP) 3250 link_up = true; 3251 3252 /* Turn off PHY if media was removed. */ 3253 if (!(adapter->flags2 & IXGBE_FLAG2_NO_MEDIA) && 3254 !(hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE)) 3255 adapter->flags2 |= IXGBE_FLAG2_NO_MEDIA; 3256 3257 if (link_up == adapter->link_up && 3258 link_up == netif_carrier_ok(adapter->netdev) && 3259 link_speed == adapter->link_speed) 3260 return 0; 3261 3262 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; 3263 adapter->link_check_timeout = jiffies; 3264 ixgbe_watchdog_update_link(adapter); 3265 3266 if (link_up) 3267 ixgbe_watchdog_link_is_up(adapter); 3268 else 3269 ixgbe_watchdog_link_is_down(adapter); 3270 3271 return 0; 3272 } 3273 3274 /** 3275 * ixgbe_handle_link_status_event - handle link status event via ACI 3276 * @adapter: pointer to adapter structure 3277 * @e: event structure containing link status info 3278 */ 3279 static void 3280 ixgbe_handle_link_status_event(struct ixgbe_adapter *adapter, 3281 struct ixgbe_aci_event *e) 3282 { 3283 struct ixgbe_aci_cmd_get_link_status_data *link_data; 3284 u16 link_speed; 3285 bool link_up; 3286 3287 link_data = (struct ixgbe_aci_cmd_get_link_status_data *)e->msg_buf; 3288 3289 link_up = !!(link_data->link_info & IXGBE_ACI_LINK_UP); 3290 link_speed = le16_to_cpu(link_data->link_speed); 3291 3292 if (ixgbe_process_link_status_event(adapter, link_up, link_speed)) 3293 e_dev_warn("Could not process link status event"); 3294 } 3295 3296 /** 3297 * ixgbe_schedule_fw_event - schedule Firmware event 3298 * @adapter: pointer to the adapter structure 3299 * 3300 * If the adapter is not in down, removing or resetting state, 3301 * an event is scheduled. 3302 */ 3303 static void ixgbe_schedule_fw_event(struct ixgbe_adapter *adapter) 3304 { 3305 if (!test_bit(__IXGBE_DOWN, &adapter->state) && 3306 !test_bit(__IXGBE_REMOVING, &adapter->state) && 3307 !test_bit(__IXGBE_RESETTING, &adapter->state)) { 3308 adapter->flags2 |= IXGBE_FLAG2_FW_ASYNC_EVENT; 3309 ixgbe_service_event_schedule(adapter); 3310 } 3311 } 3312 3313 /** 3314 * ixgbe_aci_event_cleanup - release msg_buf memory 3315 * @event: pointer to the event holding msg_buf to be released 3316 * 3317 * Clean memory allocated for event's msg_buf. Implements auto memory cleanup. 3318 */ 3319 static void ixgbe_aci_event_cleanup(struct ixgbe_aci_event *event) 3320 { 3321 kfree(event->msg_buf); 3322 } 3323 3324 /** 3325 * ixgbe_handle_fw_event - handle Firmware event 3326 * @adapter: pointer to the adapter structure 3327 * 3328 * Obtain an event from the ACI and then and then process it according to the 3329 * type of the event and the opcode. 3330 */ 3331 static void ixgbe_handle_fw_event(struct ixgbe_adapter *adapter) 3332 { 3333 struct ixgbe_aci_event event __cleanup(ixgbe_aci_event_cleanup); 3334 struct ixgbe_hw *hw = &adapter->hw; 3335 bool pending = false; 3336 int err; 3337 3338 if (adapter->flags2 & IXGBE_FLAG2_FW_ASYNC_EVENT) 3339 adapter->flags2 &= ~IXGBE_FLAG2_FW_ASYNC_EVENT; 3340 event.buf_len = IXGBE_ACI_MAX_BUFFER_SIZE; 3341 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); 3342 if (!event.msg_buf) 3343 return; 3344 3345 do { 3346 err = ixgbe_aci_get_event(hw, &event, &pending); 3347 if (err) 3348 break; 3349 3350 switch (le16_to_cpu(event.desc.opcode)) { 3351 case ixgbe_aci_opc_get_link_status: 3352 ixgbe_handle_link_status_event(adapter, &event); 3353 break; 3354 case ixgbe_aci_opc_temp_tca_event: 3355 e_crit(drv, "%s\n", ixgbe_overheat_msg); 3356 ixgbe_down(adapter); 3357 break; 3358 default: 3359 e_warn(hw, "unknown FW async event captured\n"); 3360 break; 3361 } 3362 } while (pending); 3363 } 3364 3365 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter, 3366 u64 qmask) 3367 { 3368 struct ixgbe_hw *hw = &adapter->hw; 3369 u32 mask; 3370 3371 switch (hw->mac.type) { 3372 case ixgbe_mac_82598EB: 3373 mask = (IXGBE_EIMS_RTX_QUEUE & qmask); 3374 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 3375 break; 3376 case ixgbe_mac_82599EB: 3377 case ixgbe_mac_X540: 3378 case ixgbe_mac_X550: 3379 case ixgbe_mac_X550EM_x: 3380 case ixgbe_mac_x550em_a: 3381 case ixgbe_mac_e610: 3382 mask = (qmask & 0xFFFFFFFF); 3383 if (mask) 3384 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 3385 mask = (qmask >> 32); 3386 if (mask) 3387 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 3388 break; 3389 default: 3390 break; 3391 } 3392 /* skip the flush */ 3393 } 3394 3395 /** 3396 * ixgbe_irq_enable - Enable default interrupt generation settings 3397 * @adapter: board private structure 3398 * @queues: enable irqs for queues 3399 * @flush: flush register write 3400 **/ 3401 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues, 3402 bool flush) 3403 { 3404 struct ixgbe_hw *hw = &adapter->hw; 3405 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 3406 3407 /* don't reenable LSC while waiting for link */ 3408 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) 3409 mask &= ~IXGBE_EIMS_LSC; 3410 3411 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) 3412 switch (adapter->hw.mac.type) { 3413 case ixgbe_mac_82599EB: 3414 mask |= IXGBE_EIMS_GPI_SDP0(hw); 3415 break; 3416 case ixgbe_mac_X540: 3417 case ixgbe_mac_X550: 3418 case ixgbe_mac_X550EM_x: 3419 case ixgbe_mac_x550em_a: 3420 mask |= IXGBE_EIMS_TS; 3421 break; 3422 default: 3423 break; 3424 } 3425 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) 3426 mask |= IXGBE_EIMS_GPI_SDP1(hw); 3427 switch (adapter->hw.mac.type) { 3428 case ixgbe_mac_82599EB: 3429 mask |= IXGBE_EIMS_GPI_SDP1(hw); 3430 mask |= IXGBE_EIMS_GPI_SDP2(hw); 3431 fallthrough; 3432 case ixgbe_mac_X540: 3433 case ixgbe_mac_X550: 3434 case ixgbe_mac_X550EM_x: 3435 case ixgbe_mac_e610: 3436 mask |= IXGBE_EIMS_FW_EVENT; 3437 fallthrough; 3438 case ixgbe_mac_x550em_a: 3439 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP || 3440 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP || 3441 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) 3442 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw); 3443 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t) 3444 mask |= IXGBE_EICR_GPI_SDP0_X540; 3445 mask |= IXGBE_EIMS_ECC; 3446 mask |= IXGBE_EIMS_MAILBOX; 3447 break; 3448 default: 3449 break; 3450 } 3451 3452 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) && 3453 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT)) 3454 mask |= IXGBE_EIMS_FLOW_DIR; 3455 3456 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); 3457 if (queues) 3458 ixgbe_irq_enable_queues(adapter, ~0); 3459 if (flush) 3460 IXGBE_WRITE_FLUSH(&adapter->hw); 3461 } 3462 3463 static irqreturn_t ixgbe_msix_other(int irq, void *data) 3464 { 3465 struct ixgbe_adapter *adapter = data; 3466 struct ixgbe_hw *hw = &adapter->hw; 3467 u32 eicr; 3468 3469 /* 3470 * Workaround for Silicon errata. Use clear-by-write instead 3471 * of clear-by-read. Reading with EICS will return the 3472 * interrupt causes without clearing, which later be done 3473 * with the write to EICR. 3474 */ 3475 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3476 3477 /* The lower 16bits of the EICR register are for the queue interrupts 3478 * which should be masked here in order to not accidentally clear them if 3479 * the bits are high when ixgbe_msix_other is called. There is a race 3480 * condition otherwise which results in possible performance loss 3481 * especially if the ixgbe_msix_other interrupt is triggering 3482 * consistently (as it would when PPS is turned on for the X540 device) 3483 */ 3484 eicr &= 0xFFFF0000; 3485 3486 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3487 3488 if (eicr & IXGBE_EICR_LSC) 3489 ixgbe_check_lsc(adapter); 3490 3491 if (eicr & IXGBE_EICR_MAILBOX) 3492 ixgbe_msg_task(adapter); 3493 3494 if (eicr & IXGBE_EICR_FW_EVENT) 3495 ixgbe_schedule_fw_event(adapter); 3496 3497 switch (hw->mac.type) { 3498 case ixgbe_mac_82599EB: 3499 case ixgbe_mac_X540: 3500 case ixgbe_mac_X550: 3501 case ixgbe_mac_X550EM_x: 3502 case ixgbe_mac_x550em_a: 3503 case ixgbe_mac_e610: 3504 if (hw->phy.type == ixgbe_phy_x550em_ext_t && 3505 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3506 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT; 3507 ixgbe_service_event_schedule(adapter); 3508 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3509 IXGBE_EICR_GPI_SDP0_X540); 3510 } 3511 if (eicr & IXGBE_EICR_ECC) { 3512 e_info(link, "Received ECC Err, initiating reset\n"); 3513 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state); 3514 ixgbe_service_event_schedule(adapter); 3515 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); 3516 } 3517 /* Handle Flow Director Full threshold interrupt */ 3518 if (eicr & IXGBE_EICR_FLOW_DIR) { 3519 int reinit_count = 0; 3520 int i; 3521 for (i = 0; i < adapter->num_tx_queues; i++) { 3522 struct ixgbe_ring *ring = adapter->tx_ring[i]; 3523 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE, 3524 &ring->state)) 3525 reinit_count++; 3526 } 3527 if (reinit_count) { 3528 /* no more flow director interrupts until after init */ 3529 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR); 3530 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT; 3531 ixgbe_service_event_schedule(adapter); 3532 } 3533 } 3534 ixgbe_check_sfp_event(adapter, eicr); 3535 ixgbe_check_overtemp_event(adapter, eicr); 3536 break; 3537 default: 3538 break; 3539 } 3540 3541 ixgbe_check_fan_failure(adapter, eicr); 3542 3543 if (unlikely(eicr & IXGBE_EICR_TIMESYNC)) 3544 ixgbe_ptp_check_pps_event(adapter); 3545 3546 /* re-enable the original interrupt state, no lsc, no queues */ 3547 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 3548 ixgbe_irq_enable(adapter, false, false); 3549 3550 return IRQ_HANDLED; 3551 } 3552 3553 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data) 3554 { 3555 struct ixgbe_q_vector *q_vector = data; 3556 3557 /* EIAM disabled interrupts (on this vector) for us */ 3558 3559 if (q_vector->rx.ring || q_vector->tx.ring) 3560 napi_schedule_irqoff(&q_vector->napi); 3561 3562 return IRQ_HANDLED; 3563 } 3564 3565 /** 3566 * ixgbe_poll - NAPI Rx polling callback 3567 * @napi: structure for representing this polling device 3568 * @budget: how many packets driver is allowed to clean 3569 * 3570 * This function is used for legacy and MSI, NAPI mode 3571 **/ 3572 int ixgbe_poll(struct napi_struct *napi, int budget) 3573 { 3574 struct ixgbe_q_vector *q_vector = 3575 container_of(napi, struct ixgbe_q_vector, napi); 3576 struct ixgbe_adapter *adapter = q_vector->adapter; 3577 struct ixgbe_ring *ring; 3578 int per_ring_budget, work_done = 0; 3579 bool clean_complete = true; 3580 3581 #ifdef CONFIG_IXGBE_DCA 3582 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 3583 ixgbe_update_dca(q_vector); 3584 #endif 3585 3586 ixgbe_for_each_ring(ring, q_vector->tx) { 3587 bool wd = ring->xsk_pool ? 3588 ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) : 3589 ixgbe_clean_tx_irq(q_vector, ring, budget); 3590 3591 if (!wd) 3592 clean_complete = false; 3593 } 3594 3595 /* Exit if we are called by netpoll */ 3596 if (budget <= 0) 3597 return budget; 3598 3599 /* attempt to distribute budget to each queue fairly, but don't allow 3600 * the budget to go below 1 because we'll exit polling */ 3601 if (q_vector->rx.count > 1) 3602 per_ring_budget = max(budget/q_vector->rx.count, 1); 3603 else 3604 per_ring_budget = budget; 3605 3606 ixgbe_for_each_ring(ring, q_vector->rx) { 3607 int cleaned = ring->xsk_pool ? 3608 ixgbe_clean_rx_irq_zc(q_vector, ring, 3609 per_ring_budget) : 3610 ixgbe_clean_rx_irq(q_vector, ring, 3611 per_ring_budget); 3612 3613 work_done += cleaned; 3614 if (cleaned >= per_ring_budget) 3615 clean_complete = false; 3616 } 3617 3618 /* If all work not completed, return budget and keep polling */ 3619 if (!clean_complete) 3620 return budget; 3621 3622 /* all work done, exit the polling mode */ 3623 if (likely(napi_complete_done(napi, work_done))) { 3624 if (adapter->rx_itr_setting & 1) 3625 ixgbe_set_itr(q_vector); 3626 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 3627 ixgbe_irq_enable_queues(adapter, 3628 BIT_ULL(q_vector->v_idx)); 3629 } 3630 3631 return min(work_done, budget - 1); 3632 } 3633 3634 /** 3635 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts 3636 * @adapter: board private structure 3637 * 3638 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests 3639 * interrupts from the kernel. 3640 **/ 3641 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter) 3642 { 3643 struct net_device *netdev = adapter->netdev; 3644 unsigned int ri = 0, ti = 0; 3645 int vector, err; 3646 3647 for (vector = 0; vector < adapter->num_q_vectors; vector++) { 3648 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector]; 3649 struct msix_entry *entry = &adapter->msix_entries[vector]; 3650 3651 if (q_vector->tx.ring && q_vector->rx.ring) { 3652 snprintf(q_vector->name, sizeof(q_vector->name), 3653 "%s-TxRx-%u", netdev->name, ri++); 3654 ti++; 3655 } else if (q_vector->rx.ring) { 3656 snprintf(q_vector->name, sizeof(q_vector->name), 3657 "%s-rx-%u", netdev->name, ri++); 3658 } else if (q_vector->tx.ring) { 3659 snprintf(q_vector->name, sizeof(q_vector->name), 3660 "%s-tx-%u", netdev->name, ti++); 3661 } else { 3662 /* skip this unused q_vector */ 3663 continue; 3664 } 3665 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0, 3666 q_vector->name, q_vector); 3667 if (err) { 3668 e_err(probe, "request_irq failed for MSIX interrupt " 3669 "Error: %d\n", err); 3670 goto free_queue_irqs; 3671 } 3672 /* If Flow Director is enabled, set interrupt affinity */ 3673 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) { 3674 /* assign the mask for this irq */ 3675 irq_update_affinity_hint(entry->vector, 3676 &q_vector->affinity_mask); 3677 } 3678 } 3679 3680 err = request_irq(adapter->msix_entries[vector].vector, 3681 ixgbe_msix_other, 0, netdev->name, adapter); 3682 if (err) { 3683 e_err(probe, "request_irq for msix_other failed: %d\n", err); 3684 goto free_queue_irqs; 3685 } 3686 3687 return 0; 3688 3689 free_queue_irqs: 3690 while (vector) { 3691 vector--; 3692 irq_update_affinity_hint(adapter->msix_entries[vector].vector, 3693 NULL); 3694 free_irq(adapter->msix_entries[vector].vector, 3695 adapter->q_vector[vector]); 3696 } 3697 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; 3698 pci_disable_msix(adapter->pdev); 3699 kfree(adapter->msix_entries); 3700 adapter->msix_entries = NULL; 3701 return err; 3702 } 3703 3704 /** 3705 * ixgbe_intr - legacy mode Interrupt Handler 3706 * @irq: interrupt number 3707 * @data: pointer to a network interface device structure 3708 **/ 3709 static irqreturn_t ixgbe_intr(int irq, void *data) 3710 { 3711 struct ixgbe_adapter *adapter = data; 3712 struct ixgbe_hw *hw = &adapter->hw; 3713 struct ixgbe_q_vector *q_vector = adapter->q_vector[0]; 3714 u32 eicr; 3715 3716 /* 3717 * Workaround for silicon errata #26 on 82598. Mask the interrupt 3718 * before the read of EICR. 3719 */ 3720 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); 3721 3722 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read 3723 * therefore no explicit interrupt disable is necessary */ 3724 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 3725 if (!eicr) { 3726 /* 3727 * shared interrupt alert! 3728 * make sure interrupts are enabled because the read will 3729 * have disabled interrupts due to EIAM 3730 * finish the workaround of silicon errata on 82598. Unmask 3731 * the interrupt that we masked before the EICR read. 3732 */ 3733 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 3734 ixgbe_irq_enable(adapter, true, true); 3735 return IRQ_NONE; /* Not our interrupt */ 3736 } 3737 3738 if (eicr & IXGBE_EICR_LSC) 3739 ixgbe_check_lsc(adapter); 3740 3741 if (eicr & IXGBE_EICR_FW_EVENT) 3742 ixgbe_schedule_fw_event(adapter); 3743 3744 switch (hw->mac.type) { 3745 case ixgbe_mac_82599EB: 3746 ixgbe_check_sfp_event(adapter, eicr); 3747 fallthrough; 3748 case ixgbe_mac_X540: 3749 case ixgbe_mac_X550: 3750 case ixgbe_mac_X550EM_x: 3751 case ixgbe_mac_x550em_a: 3752 case ixgbe_mac_e610: 3753 if (eicr & IXGBE_EICR_ECC) { 3754 e_info(link, "Received ECC Err, initiating reset\n"); 3755 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state); 3756 ixgbe_service_event_schedule(adapter); 3757 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); 3758 } 3759 ixgbe_check_overtemp_event(adapter, eicr); 3760 break; 3761 default: 3762 break; 3763 } 3764 3765 ixgbe_check_fan_failure(adapter, eicr); 3766 if (unlikely(eicr & IXGBE_EICR_TIMESYNC)) 3767 ixgbe_ptp_check_pps_event(adapter); 3768 3769 /* would disable interrupts here but EIAM disabled it */ 3770 napi_schedule_irqoff(&q_vector->napi); 3771 3772 /* 3773 * re-enable link(maybe) and non-queue interrupts, no flush. 3774 * ixgbe_poll will re-enable the queue interrupts 3775 */ 3776 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 3777 ixgbe_irq_enable(adapter, false, false); 3778 3779 return IRQ_HANDLED; 3780 } 3781 3782 /** 3783 * ixgbe_request_irq - initialize interrupts 3784 * @adapter: board private structure 3785 * 3786 * Attempts to configure interrupts using the best available 3787 * capabilities of the hardware and kernel. 3788 **/ 3789 static int ixgbe_request_irq(struct ixgbe_adapter *adapter) 3790 { 3791 struct net_device *netdev = adapter->netdev; 3792 int err; 3793 3794 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) 3795 err = ixgbe_request_msix_irqs(adapter); 3796 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) 3797 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0, 3798 netdev->name, adapter); 3799 else 3800 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED, 3801 netdev->name, adapter); 3802 3803 if (err) 3804 e_err(probe, "request_irq failed, Error %d\n", err); 3805 3806 return err; 3807 } 3808 3809 static void ixgbe_free_irq(struct ixgbe_adapter *adapter) 3810 { 3811 int vector; 3812 3813 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { 3814 free_irq(adapter->pdev->irq, adapter); 3815 return; 3816 } 3817 3818 if (!adapter->msix_entries) 3819 return; 3820 3821 for (vector = 0; vector < adapter->num_q_vectors; vector++) { 3822 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector]; 3823 struct msix_entry *entry = &adapter->msix_entries[vector]; 3824 3825 /* free only the irqs that were actually requested */ 3826 if (!q_vector->rx.ring && !q_vector->tx.ring) 3827 continue; 3828 3829 /* clear the affinity_mask in the IRQ descriptor */ 3830 irq_update_affinity_hint(entry->vector, NULL); 3831 3832 free_irq(entry->vector, q_vector); 3833 } 3834 3835 free_irq(adapter->msix_entries[vector].vector, adapter); 3836 } 3837 3838 /** 3839 * ixgbe_irq_disable - Mask off interrupt generation on the NIC 3840 * @adapter: board private structure 3841 **/ 3842 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter) 3843 { 3844 switch (adapter->hw.mac.type) { 3845 case ixgbe_mac_82598EB: 3846 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); 3847 break; 3848 case ixgbe_mac_82599EB: 3849 case ixgbe_mac_X540: 3850 case ixgbe_mac_X550: 3851 case ixgbe_mac_X550EM_x: 3852 case ixgbe_mac_x550em_a: 3853 case ixgbe_mac_e610: 3854 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); 3855 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); 3856 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); 3857 break; 3858 default: 3859 break; 3860 } 3861 IXGBE_WRITE_FLUSH(&adapter->hw); 3862 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 3863 int vector; 3864 3865 for (vector = 0; vector < adapter->num_q_vectors; vector++) 3866 synchronize_irq(adapter->msix_entries[vector].vector); 3867 3868 synchronize_irq(adapter->msix_entries[vector++].vector); 3869 } else { 3870 synchronize_irq(adapter->pdev->irq); 3871 } 3872 } 3873 3874 /** 3875 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts 3876 * @adapter: board private structure 3877 * 3878 **/ 3879 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter) 3880 { 3881 struct ixgbe_q_vector *q_vector = adapter->q_vector[0]; 3882 3883 ixgbe_write_eitr(q_vector); 3884 3885 ixgbe_set_ivar(adapter, 0, 0, 0); 3886 ixgbe_set_ivar(adapter, 1, 0, 0); 3887 3888 e_info(hw, "Legacy interrupt IVAR setup done\n"); 3889 } 3890 3891 /** 3892 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset 3893 * @adapter: board private structure 3894 * @ring: structure containing ring specific data 3895 * 3896 * Configure the Tx descriptor ring after a reset. 3897 **/ 3898 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter, 3899 struct ixgbe_ring *ring) 3900 { 3901 struct ixgbe_hw *hw = &adapter->hw; 3902 u64 tdba = ring->dma; 3903 int wait_loop = 10; 3904 u32 txdctl = IXGBE_TXDCTL_ENABLE; 3905 u8 reg_idx = ring->reg_idx; 3906 3907 ring->xsk_pool = NULL; 3908 if (ring_is_xdp(ring)) 3909 ring->xsk_pool = ixgbe_xsk_pool(adapter, ring); 3910 3911 /* disable queue to avoid issues while updating state */ 3912 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0); 3913 IXGBE_WRITE_FLUSH(hw); 3914 3915 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx), 3916 (tdba & DMA_BIT_MASK(32))); 3917 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32)); 3918 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx), 3919 ring->count * sizeof(union ixgbe_adv_tx_desc)); 3920 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0); 3921 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0); 3922 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx); 3923 3924 /* 3925 * set WTHRESH to encourage burst writeback, it should not be set 3926 * higher than 1 when: 3927 * - ITR is 0 as it could cause false TX hangs 3928 * - ITR is set to > 100k int/sec and BQL is enabled 3929 * 3930 * In order to avoid issues WTHRESH + PTHRESH should always be equal 3931 * to or less than the number of on chip descriptors, which is 3932 * currently 40. 3933 */ 3934 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR)) 3935 txdctl |= 1u << 16; /* WTHRESH = 1 */ 3936 else 3937 txdctl |= 8u << 16; /* WTHRESH = 8 */ 3938 3939 /* 3940 * Setting PTHRESH to 32 both improves performance 3941 * and avoids a TX hang with DFP enabled 3942 */ 3943 txdctl |= (1u << 8) | /* HTHRESH = 1 */ 3944 32; /* PTHRESH = 32 */ 3945 3946 /* reinitialize flowdirector state */ 3947 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) { 3948 ring->atr_sample_rate = adapter->atr_sample_rate; 3949 ring->atr_count = 0; 3950 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state); 3951 } else { 3952 ring->atr_sample_rate = 0; 3953 } 3954 3955 /* initialize XPS */ 3956 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) { 3957 struct ixgbe_q_vector *q_vector = ring->q_vector; 3958 3959 if (q_vector) 3960 netif_set_xps_queue(ring->netdev, 3961 &q_vector->affinity_mask, 3962 ring->queue_index); 3963 } 3964 3965 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state); 3966 3967 /* reinitialize tx_buffer_info */ 3968 memset(ring->tx_buffer_info, 0, 3969 sizeof(struct ixgbe_tx_buffer) * ring->count); 3970 3971 /* enable queue */ 3972 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl); 3973 3974 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */ 3975 if (hw->mac.type == ixgbe_mac_82598EB && 3976 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) 3977 return; 3978 3979 /* poll to verify queue is enabled */ 3980 do { 3981 usleep_range(1000, 2000); 3982 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); 3983 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); 3984 if (!wait_loop) 3985 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx); 3986 } 3987 3988 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter) 3989 { 3990 struct ixgbe_hw *hw = &adapter->hw; 3991 u32 rttdcs, mtqc; 3992 u8 tcs = adapter->hw_tcs; 3993 3994 if (hw->mac.type == ixgbe_mac_82598EB) 3995 return; 3996 3997 /* disable the arbiter while setting MTQC */ 3998 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 3999 rttdcs |= IXGBE_RTTDCS_ARBDIS; 4000 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 4001 4002 /* set transmit pool layout */ 4003 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 4004 mtqc = IXGBE_MTQC_VT_ENA; 4005 if (tcs > 4) 4006 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ; 4007 else if (tcs > 1) 4008 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ; 4009 else if (adapter->ring_feature[RING_F_VMDQ].mask == 4010 IXGBE_82599_VMDQ_4Q_MASK) 4011 mtqc |= IXGBE_MTQC_32VF; 4012 else 4013 mtqc |= IXGBE_MTQC_64VF; 4014 } else { 4015 if (tcs > 4) { 4016 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ; 4017 } else if (tcs > 1) { 4018 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ; 4019 } else { 4020 u8 max_txq = adapter->num_tx_queues + 4021 adapter->num_xdp_queues; 4022 if (max_txq > 63) 4023 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ; 4024 else 4025 mtqc = IXGBE_MTQC_64Q_1PB; 4026 } 4027 } 4028 4029 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc); 4030 4031 /* Enable Security TX Buffer IFG for multiple pb */ 4032 if (tcs) { 4033 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); 4034 sectx |= IXGBE_SECTX_DCB; 4035 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx); 4036 } 4037 4038 /* re-enable the arbiter */ 4039 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 4040 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 4041 } 4042 4043 /** 4044 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset 4045 * @adapter: board private structure 4046 * 4047 * Configure the Tx unit of the MAC after a reset. 4048 **/ 4049 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter) 4050 { 4051 struct ixgbe_hw *hw = &adapter->hw; 4052 u32 dmatxctl; 4053 u32 i; 4054 4055 ixgbe_setup_mtqc(adapter); 4056 4057 if (hw->mac.type != ixgbe_mac_82598EB) { 4058 /* DMATXCTL.EN must be before Tx queues are enabled */ 4059 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 4060 dmatxctl |= IXGBE_DMATXCTL_TE; 4061 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 4062 } 4063 4064 /* Setup the HW Tx Head and Tail descriptor pointers */ 4065 for (i = 0; i < adapter->num_tx_queues; i++) 4066 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]); 4067 for (i = 0; i < adapter->num_xdp_queues; i++) 4068 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]); 4069 } 4070 4071 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter, 4072 struct ixgbe_ring *ring) 4073 { 4074 struct ixgbe_hw *hw = &adapter->hw; 4075 u8 reg_idx = ring->reg_idx; 4076 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx)); 4077 4078 srrctl |= IXGBE_SRRCTL_DROP_EN; 4079 4080 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl); 4081 } 4082 4083 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter, 4084 struct ixgbe_ring *ring) 4085 { 4086 struct ixgbe_hw *hw = &adapter->hw; 4087 u8 reg_idx = ring->reg_idx; 4088 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx)); 4089 4090 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 4091 4092 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl); 4093 } 4094 4095 #ifdef CONFIG_IXGBE_DCB 4096 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter) 4097 #else 4098 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter) 4099 #endif 4100 { 4101 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable; 4102 struct ixgbe_hw *hw = &adapter->hw; 4103 int i; 4104 4105 if (hw->mac.ops.disable_mdd) 4106 hw->mac.ops.disable_mdd(hw); 4107 4108 if (adapter->ixgbe_ieee_pfc) 4109 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en); 4110 4111 /* 4112 * We should set the drop enable bit if: 4113 * SR-IOV is enabled 4114 * or 4115 * Number of Rx queues > 1 and flow control is disabled 4116 * 4117 * This allows us to avoid head of line blocking for security 4118 * and performance reasons. 4119 */ 4120 if (adapter->num_vfs || (adapter->num_rx_queues > 1 && 4121 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) { 4122 for (i = 0; i < adapter->num_rx_queues; i++) 4123 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]); 4124 } else { 4125 for (i = 0; i < adapter->num_rx_queues; i++) 4126 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]); 4127 } 4128 4129 if (hw->mac.ops.enable_mdd) 4130 hw->mac.ops.enable_mdd(hw); 4131 } 4132 4133 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 4134 4135 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, 4136 struct ixgbe_ring *rx_ring) 4137 { 4138 struct ixgbe_hw *hw = &adapter->hw; 4139 u32 srrctl; 4140 u8 reg_idx = rx_ring->reg_idx; 4141 4142 if (hw->mac.type == ixgbe_mac_82598EB) { 4143 u16 mask = adapter->ring_feature[RING_F_RSS].mask; 4144 4145 /* 4146 * if VMDq is not active we must program one srrctl register 4147 * per RSS queue since we have enabled RDRXCTL.MVMEN 4148 */ 4149 reg_idx &= mask; 4150 } 4151 4152 /* configure header buffer length, needed for RSC */ 4153 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 4154 4155 /* configure the packet buffer length */ 4156 if (rx_ring->xsk_pool) { 4157 u32 xsk_buf_len = xsk_pool_get_rx_frame_size(rx_ring->xsk_pool); 4158 4159 /* If the MAC support setting RXDCTL.RLPML, the 4160 * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and 4161 * RXDCTL.RLPML is set to the actual UMEM buffer 4162 * size. If not, then we are stuck with a 1k buffer 4163 * size resolution. In this case frames larger than 4164 * the UMEM buffer size viewed in a 1k resolution will 4165 * be dropped. 4166 */ 4167 if (hw->mac.type != ixgbe_mac_82599EB) 4168 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4169 else 4170 srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4171 } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) { 4172 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4173 } else { 4174 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4175 } 4176 4177 /* configure descriptor type */ 4178 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 4179 4180 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl); 4181 } 4182 4183 /** 4184 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries 4185 * @adapter: device handle 4186 * 4187 * - 82598/82599/X540: 128 4188 * - X550(non-SRIOV mode): 512 4189 * - X550(SRIOV mode): 64 4190 */ 4191 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter) 4192 { 4193 if (adapter->hw.mac.type < ixgbe_mac_X550) 4194 return 128; 4195 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 4196 return 64; 4197 else 4198 return 512; 4199 } 4200 4201 /** 4202 * ixgbe_store_key - Write the RSS key to HW 4203 * @adapter: device handle 4204 * 4205 * Write the RSS key stored in adapter.rss_key to HW. 4206 */ 4207 void ixgbe_store_key(struct ixgbe_adapter *adapter) 4208 { 4209 struct ixgbe_hw *hw = &adapter->hw; 4210 int i; 4211 4212 for (i = 0; i < 10; i++) 4213 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]); 4214 } 4215 4216 /** 4217 * ixgbe_init_rss_key - Initialize adapter RSS key 4218 * @adapter: device handle 4219 * 4220 * Allocates and initializes the RSS key if it is not allocated. 4221 **/ 4222 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter) 4223 { 4224 u32 *rss_key; 4225 4226 if (!adapter->rss_key) { 4227 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL); 4228 if (unlikely(!rss_key)) 4229 return -ENOMEM; 4230 4231 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE); 4232 adapter->rss_key = rss_key; 4233 } 4234 4235 return 0; 4236 } 4237 4238 /** 4239 * ixgbe_store_reta - Write the RETA table to HW 4240 * @adapter: device handle 4241 * 4242 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW. 4243 */ 4244 void ixgbe_store_reta(struct ixgbe_adapter *adapter) 4245 { 4246 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 4247 struct ixgbe_hw *hw = &adapter->hw; 4248 u32 reta = 0; 4249 u32 indices_multi; 4250 u8 *indir_tbl = adapter->rss_indir_tbl; 4251 4252 /* Fill out the redirection table as follows: 4253 * - 82598: 8 bit wide entries containing pair of 4 bit RSS 4254 * indices. 4255 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index 4256 * - X550: 8 bit wide entries containing 6 bit RSS index 4257 */ 4258 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 4259 indices_multi = 0x11; 4260 else 4261 indices_multi = 0x1; 4262 4263 /* Write redirection table to HW */ 4264 for (i = 0; i < reta_entries; i++) { 4265 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8; 4266 if ((i & 3) == 3) { 4267 if (i < 128) 4268 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 4269 else 4270 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), 4271 reta); 4272 reta = 0; 4273 } 4274 } 4275 } 4276 4277 /** 4278 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode) 4279 * @adapter: device handle 4280 * 4281 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW. 4282 */ 4283 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter) 4284 { 4285 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 4286 struct ixgbe_hw *hw = &adapter->hw; 4287 u32 vfreta = 0; 4288 4289 /* Write redirection table to HW */ 4290 for (i = 0; i < reta_entries; i++) { 4291 u16 pool = adapter->num_rx_pools; 4292 4293 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8; 4294 if ((i & 3) != 3) 4295 continue; 4296 4297 while (pool--) 4298 IXGBE_WRITE_REG(hw, 4299 IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)), 4300 vfreta); 4301 vfreta = 0; 4302 } 4303 } 4304 4305 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter) 4306 { 4307 u32 i, j; 4308 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 4309 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices; 4310 4311 /* Program table for at least 4 queues w/ SR-IOV so that VFs can 4312 * make full use of any rings they may have. We will use the 4313 * PSRTYPE register to control how many rings we use within the PF. 4314 */ 4315 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4)) 4316 rss_i = 4; 4317 4318 /* Fill out hash function seeds */ 4319 ixgbe_store_key(adapter); 4320 4321 /* Fill out redirection table */ 4322 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl)); 4323 4324 for (i = 0, j = 0; i < reta_entries; i++, j++) { 4325 if (j == rss_i) 4326 j = 0; 4327 4328 adapter->rss_indir_tbl[i] = j; 4329 } 4330 4331 ixgbe_store_reta(adapter); 4332 } 4333 4334 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter) 4335 { 4336 struct ixgbe_hw *hw = &adapter->hw; 4337 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices; 4338 int i, j; 4339 4340 /* Fill out hash function seeds */ 4341 for (i = 0; i < 10; i++) { 4342 u16 pool = adapter->num_rx_pools; 4343 4344 while (pool--) 4345 IXGBE_WRITE_REG(hw, 4346 IXGBE_PFVFRSSRK(i, VMDQ_P(pool)), 4347 *(adapter->rss_key + i)); 4348 } 4349 4350 /* Fill out the redirection table */ 4351 for (i = 0, j = 0; i < 64; i++, j++) { 4352 if (j == rss_i) 4353 j = 0; 4354 4355 adapter->rss_indir_tbl[i] = j; 4356 } 4357 4358 ixgbe_store_vfreta(adapter); 4359 } 4360 4361 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter) 4362 { 4363 struct ixgbe_hw *hw = &adapter->hw; 4364 u32 mrqc = 0, rss_field = 0, vfmrqc = 0; 4365 u32 rxcsum; 4366 4367 /* Disable indicating checksum in descriptor, enables RSS hash */ 4368 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 4369 rxcsum |= IXGBE_RXCSUM_PCSD; 4370 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 4371 4372 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 4373 if (adapter->ring_feature[RING_F_RSS].mask) 4374 mrqc = IXGBE_MRQC_RSSEN; 4375 } else { 4376 u8 tcs = adapter->hw_tcs; 4377 4378 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 4379 if (tcs > 4) 4380 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */ 4381 else if (tcs > 1) 4382 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */ 4383 else if (adapter->ring_feature[RING_F_VMDQ].mask == 4384 IXGBE_82599_VMDQ_4Q_MASK) 4385 mrqc = IXGBE_MRQC_VMDQRSS32EN; 4386 else 4387 mrqc = IXGBE_MRQC_VMDQRSS64EN; 4388 4389 /* Enable L3/L4 for Tx Switched packets only for X550, 4390 * older devices do not support this feature 4391 */ 4392 if (hw->mac.type >= ixgbe_mac_X550) 4393 mrqc |= IXGBE_MRQC_L3L4TXSWEN; 4394 } else { 4395 if (tcs > 4) 4396 mrqc = IXGBE_MRQC_RTRSS8TCEN; 4397 else if (tcs > 1) 4398 mrqc = IXGBE_MRQC_RTRSS4TCEN; 4399 else 4400 mrqc = IXGBE_MRQC_RSSEN; 4401 } 4402 } 4403 4404 /* Perform hash on these packet types */ 4405 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 | 4406 IXGBE_MRQC_RSS_FIELD_IPV4_TCP | 4407 IXGBE_MRQC_RSS_FIELD_IPV6 | 4408 IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 4409 4410 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 4411 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 4412 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 4413 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 4414 4415 if ((hw->mac.type >= ixgbe_mac_X550) && 4416 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) { 4417 u16 pool = adapter->num_rx_pools; 4418 4419 /* Enable VF RSS mode */ 4420 mrqc |= IXGBE_MRQC_MULTIPLE_RSS; 4421 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 4422 4423 /* Setup RSS through the VF registers */ 4424 ixgbe_setup_vfreta(adapter); 4425 vfmrqc = IXGBE_MRQC_RSSEN; 4426 vfmrqc |= rss_field; 4427 4428 while (pool--) 4429 IXGBE_WRITE_REG(hw, 4430 IXGBE_PFVFMRQC(VMDQ_P(pool)), 4431 vfmrqc); 4432 } else { 4433 ixgbe_setup_reta(adapter); 4434 mrqc |= rss_field; 4435 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 4436 } 4437 } 4438 4439 /** 4440 * ixgbe_configure_rscctl - enable RSC for the indicated ring 4441 * @adapter: address of board private structure 4442 * @ring: structure containing ring specific data 4443 **/ 4444 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, 4445 struct ixgbe_ring *ring) 4446 { 4447 struct ixgbe_hw *hw = &adapter->hw; 4448 u32 rscctrl; 4449 u8 reg_idx = ring->reg_idx; 4450 4451 if (!ring_is_rsc_enabled(ring)) 4452 return; 4453 4454 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx)); 4455 rscctrl |= IXGBE_RSCCTL_RSCEN; 4456 /* 4457 * we must limit the number of descriptors so that the 4458 * total size of max desc * buf_len is not greater 4459 * than 65536 4460 */ 4461 rscctrl |= IXGBE_RSCCTL_MAXDESC_16; 4462 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl); 4463 } 4464 4465 #define IXGBE_MAX_RX_DESC_POLL 10 4466 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter, 4467 struct ixgbe_ring *ring) 4468 { 4469 struct ixgbe_hw *hw = &adapter->hw; 4470 int wait_loop = IXGBE_MAX_RX_DESC_POLL; 4471 u32 rxdctl; 4472 u8 reg_idx = ring->reg_idx; 4473 4474 if (ixgbe_removed(hw->hw_addr)) 4475 return; 4476 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */ 4477 if (hw->mac.type == ixgbe_mac_82598EB && 4478 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) 4479 return; 4480 4481 do { 4482 usleep_range(1000, 2000); 4483 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 4484 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE)); 4485 4486 if (!wait_loop) { 4487 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within " 4488 "the polling period\n", reg_idx); 4489 } 4490 } 4491 4492 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter, 4493 struct ixgbe_ring *ring) 4494 { 4495 struct ixgbe_hw *hw = &adapter->hw; 4496 union ixgbe_adv_rx_desc *rx_desc; 4497 u64 rdba = ring->dma; 4498 u32 rxdctl; 4499 u8 reg_idx = ring->reg_idx; 4500 4501 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq); 4502 ring->xsk_pool = ixgbe_xsk_pool(adapter, ring); 4503 if (ring->xsk_pool) { 4504 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq, 4505 MEM_TYPE_XSK_BUFF_POOL, 4506 NULL)); 4507 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq); 4508 } else { 4509 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq, 4510 MEM_TYPE_PAGE_SHARED, NULL)); 4511 } 4512 4513 /* disable queue to avoid use of these values while updating state */ 4514 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 4515 rxdctl &= ~IXGBE_RXDCTL_ENABLE; 4516 4517 /* write value back with RXDCTL.ENABLE bit cleared */ 4518 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); 4519 IXGBE_WRITE_FLUSH(hw); 4520 4521 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32))); 4522 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32)); 4523 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx), 4524 ring->count * sizeof(union ixgbe_adv_rx_desc)); 4525 /* Force flushing of IXGBE_RDLEN to prevent MDD */ 4526 IXGBE_WRITE_FLUSH(hw); 4527 4528 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0); 4529 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0); 4530 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx); 4531 4532 ixgbe_configure_srrctl(adapter, ring); 4533 ixgbe_configure_rscctl(adapter, ring); 4534 4535 if (hw->mac.type == ixgbe_mac_82598EB) { 4536 /* 4537 * enable cache line friendly hardware writes: 4538 * PTHRESH=32 descriptors (half the internal cache), 4539 * this also removes ugly rx_no_buffer_count increment 4540 * HTHRESH=4 descriptors (to minimize latency on fetch) 4541 * WTHRESH=8 burst writeback up to two cache lines 4542 */ 4543 rxdctl &= ~0x3FFFFF; 4544 rxdctl |= 0x080420; 4545 #if (PAGE_SIZE < 8192) 4546 /* RXDCTL.RLPML does not work on 82599 */ 4547 } else if (hw->mac.type != ixgbe_mac_82599EB) { 4548 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK | 4549 IXGBE_RXDCTL_RLPML_EN); 4550 4551 /* Limit the maximum frame size so we don't overrun the skb. 4552 * This can happen in SRIOV mode when the MTU of the VF is 4553 * higher than the MTU of the PF. 4554 */ 4555 if (ring_uses_build_skb(ring) && 4556 !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state)) 4557 rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB | 4558 IXGBE_RXDCTL_RLPML_EN; 4559 #endif 4560 } 4561 4562 ring->rx_offset = ixgbe_rx_offset(ring); 4563 4564 if (ring->xsk_pool && hw->mac.type != ixgbe_mac_82599EB) { 4565 u32 xsk_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool); 4566 4567 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK | 4568 IXGBE_RXDCTL_RLPML_EN); 4569 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN; 4570 4571 ring->rx_buf_len = xsk_buf_len; 4572 } 4573 4574 /* initialize rx_buffer_info */ 4575 memset(ring->rx_buffer_info, 0, 4576 sizeof(struct ixgbe_rx_buffer) * ring->count); 4577 4578 /* initialize Rx descriptor 0 */ 4579 rx_desc = IXGBE_RX_DESC(ring, 0); 4580 rx_desc->wb.upper.length = 0; 4581 4582 /* enable receive descriptor ring */ 4583 rxdctl |= IXGBE_RXDCTL_ENABLE; 4584 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); 4585 4586 ixgbe_rx_desc_queue_enable(adapter, ring); 4587 if (ring->xsk_pool) 4588 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring)); 4589 else 4590 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring)); 4591 } 4592 4593 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter) 4594 { 4595 struct ixgbe_hw *hw = &adapter->hw; 4596 int rss_i = adapter->ring_feature[RING_F_RSS].indices; 4597 u16 pool = adapter->num_rx_pools; 4598 4599 /* PSRTYPE must be initialized in non 82598 adapters */ 4600 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 4601 IXGBE_PSRTYPE_UDPHDR | 4602 IXGBE_PSRTYPE_IPV4HDR | 4603 IXGBE_PSRTYPE_L2HDR | 4604 IXGBE_PSRTYPE_IPV6HDR; 4605 4606 if (hw->mac.type == ixgbe_mac_82598EB) 4607 return; 4608 4609 if (rss_i > 3) 4610 psrtype |= 2u << 29; 4611 else if (rss_i > 1) 4612 psrtype |= 1u << 29; 4613 4614 while (pool--) 4615 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype); 4616 } 4617 4618 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter) 4619 { 4620 struct ixgbe_hw *hw = &adapter->hw; 4621 u16 pool = adapter->num_rx_pools; 4622 u32 reg_offset, vf_shift, vmolr; 4623 u32 gcr_ext, vmdctl; 4624 int i; 4625 4626 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 4627 return; 4628 4629 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL); 4630 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN; 4631 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK; 4632 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT; 4633 vmdctl |= IXGBE_VT_CTL_REPLEN; 4634 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl); 4635 4636 /* accept untagged packets until a vlan tag is 4637 * specifically set for the VMDQ queue/pool 4638 */ 4639 vmolr = IXGBE_VMOLR_AUPE; 4640 while (pool--) 4641 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr); 4642 4643 vf_shift = VMDQ_P(0) % 32; 4644 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0; 4645 4646 /* Enable only the PF's pool for Tx/Rx */ 4647 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift)); 4648 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1); 4649 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift)); 4650 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1); 4651 if (adapter->bridge_mode == BRIDGE_MODE_VEB) 4652 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); 4653 4654 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */ 4655 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0)); 4656 4657 /* clear VLAN promisc flag so VFTA will be updated if necessary */ 4658 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC; 4659 4660 /* 4661 * Set up VF register offsets for selected VT Mode, 4662 * i.e. 32 or 64 VFs for SR-IOV 4663 */ 4664 switch (adapter->ring_feature[RING_F_VMDQ].mask) { 4665 case IXGBE_82599_VMDQ_8Q_MASK: 4666 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16; 4667 break; 4668 case IXGBE_82599_VMDQ_4Q_MASK: 4669 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32; 4670 break; 4671 default: 4672 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64; 4673 break; 4674 } 4675 4676 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); 4677 4678 for (i = 0; i < adapter->num_vfs; i++) { 4679 /* configure spoof checking */ 4680 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, 4681 adapter->vfinfo[i].spoofchk_enabled); 4682 4683 /* Enable/Disable RSS query feature */ 4684 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i, 4685 adapter->vfinfo[i].rss_query_enabled); 4686 } 4687 } 4688 4689 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter) 4690 { 4691 struct ixgbe_hw *hw = &adapter->hw; 4692 struct net_device *netdev = adapter->netdev; 4693 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 4694 struct ixgbe_ring *rx_ring; 4695 int i; 4696 u32 mhadd, hlreg0; 4697 4698 #ifdef IXGBE_FCOE 4699 /* adjust max frame to be able to do baby jumbo for FCoE */ 4700 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) && 4701 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE)) 4702 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE; 4703 4704 #endif /* IXGBE_FCOE */ 4705 4706 /* adjust max frame to be at least the size of a standard frame */ 4707 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN)) 4708 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN); 4709 4710 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 4711 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) { 4712 mhadd &= ~IXGBE_MHADD_MFS_MASK; 4713 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT; 4714 4715 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 4716 } 4717 4718 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); 4719 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */ 4720 hlreg0 |= IXGBE_HLREG0_JUMBOEN; 4721 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); 4722 4723 /* 4724 * Setup the HW Rx Head and Tail Descriptor Pointers and 4725 * the Base and Length of the Rx Descriptor Ring 4726 */ 4727 for (i = 0; i < adapter->num_rx_queues; i++) { 4728 rx_ring = adapter->rx_ring[i]; 4729 4730 clear_ring_rsc_enabled(rx_ring); 4731 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4732 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state); 4733 4734 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) 4735 set_ring_rsc_enabled(rx_ring); 4736 4737 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state)) 4738 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4739 4740 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) 4741 continue; 4742 4743 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state); 4744 4745 #if (PAGE_SIZE < 8192) 4746 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) 4747 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4748 4749 if (IXGBE_2K_TOO_SMALL_WITH_PADDING || 4750 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN))) 4751 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4752 #endif 4753 } 4754 } 4755 4756 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter) 4757 { 4758 struct ixgbe_hw *hw = &adapter->hw; 4759 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 4760 4761 switch (hw->mac.type) { 4762 case ixgbe_mac_82598EB: 4763 /* 4764 * For VMDq support of different descriptor types or 4765 * buffer sizes through the use of multiple SRRCTL 4766 * registers, RDRXCTL.MVMEN must be set to 1 4767 * 4768 * also, the manual doesn't mention it clearly but DCA hints 4769 * will only use queue 0's tags unless this bit is set. Side 4770 * effects of setting this bit are only that SRRCTL must be 4771 * fully programmed [0..15] 4772 */ 4773 rdrxctl |= IXGBE_RDRXCTL_MVMEN; 4774 break; 4775 case ixgbe_mac_X550: 4776 case ixgbe_mac_X550EM_x: 4777 case ixgbe_mac_x550em_a: 4778 case ixgbe_mac_e610: 4779 if (adapter->num_vfs) 4780 rdrxctl |= IXGBE_RDRXCTL_PSP; 4781 fallthrough; 4782 case ixgbe_mac_82599EB: 4783 case ixgbe_mac_X540: 4784 /* Disable RSC for ACK packets */ 4785 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU, 4786 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU))); 4787 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE; 4788 /* hardware requires some bits to be set by default */ 4789 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX); 4790 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP; 4791 break; 4792 default: 4793 /* We should do nothing since we don't know this hardware */ 4794 return; 4795 } 4796 4797 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl); 4798 } 4799 4800 /** 4801 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset 4802 * @adapter: board private structure 4803 * 4804 * Configure the Rx unit of the MAC after a reset. 4805 **/ 4806 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) 4807 { 4808 struct ixgbe_hw *hw = &adapter->hw; 4809 int i; 4810 u32 rxctrl, rfctl; 4811 4812 /* disable receives while setting up the descriptors */ 4813 hw->mac.ops.disable_rx(hw); 4814 4815 ixgbe_setup_psrtype(adapter); 4816 ixgbe_setup_rdrxctl(adapter); 4817 4818 /* RSC Setup */ 4819 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL); 4820 rfctl &= ~IXGBE_RFCTL_RSC_DIS; 4821 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) 4822 rfctl |= IXGBE_RFCTL_RSC_DIS; 4823 4824 /* disable NFS filtering */ 4825 rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS); 4826 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl); 4827 4828 /* Program registers for the distribution of queues */ 4829 ixgbe_setup_mrqc(adapter); 4830 4831 /* set_rx_buffer_len must be called before ring initialization */ 4832 ixgbe_set_rx_buffer_len(adapter); 4833 4834 /* 4835 * Setup the HW Rx Head and Tail Descriptor Pointers and 4836 * the Base and Length of the Rx Descriptor Ring 4837 */ 4838 for (i = 0; i < adapter->num_rx_queues; i++) 4839 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]); 4840 4841 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 4842 /* disable drop enable for 82598 parts */ 4843 if (hw->mac.type == ixgbe_mac_82598EB) 4844 rxctrl |= IXGBE_RXCTRL_DMBYPS; 4845 4846 /* enable all receives */ 4847 rxctrl |= IXGBE_RXCTRL_RXEN; 4848 hw->mac.ops.enable_rx_dma(hw, rxctrl); 4849 } 4850 4851 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, 4852 __be16 proto, u16 vid) 4853 { 4854 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 4855 struct ixgbe_hw *hw = &adapter->hw; 4856 4857 /* add VID to filter table */ 4858 if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) 4859 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid); 4860 4861 set_bit(vid, adapter->active_vlans); 4862 4863 return 0; 4864 } 4865 4866 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan) 4867 { 4868 u32 vlvf; 4869 int idx; 4870 4871 /* short cut the special case */ 4872 if (vlan == 0) 4873 return 0; 4874 4875 /* Search for the vlan id in the VLVF entries */ 4876 for (idx = IXGBE_VLVF_ENTRIES; --idx;) { 4877 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx)); 4878 if ((vlvf & VLAN_VID_MASK) == vlan) 4879 break; 4880 } 4881 4882 return idx; 4883 } 4884 4885 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid) 4886 { 4887 struct ixgbe_hw *hw = &adapter->hw; 4888 u32 bits, word; 4889 int idx; 4890 4891 idx = ixgbe_find_vlvf_entry(hw, vid); 4892 if (!idx) 4893 return; 4894 4895 /* See if any other pools are set for this VLAN filter 4896 * entry other than the PF. 4897 */ 4898 word = idx * 2 + (VMDQ_P(0) / 32); 4899 bits = ~BIT(VMDQ_P(0) % 32); 4900 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word)); 4901 4902 /* Disable the filter so this falls into the default pool. */ 4903 if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) { 4904 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) 4905 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0); 4906 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0); 4907 } 4908 } 4909 4910 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, 4911 __be16 proto, u16 vid) 4912 { 4913 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 4914 struct ixgbe_hw *hw = &adapter->hw; 4915 4916 /* remove VID from filter table */ 4917 if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) 4918 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true); 4919 4920 clear_bit(vid, adapter->active_vlans); 4921 4922 return 0; 4923 } 4924 4925 /** 4926 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping 4927 * @adapter: driver data 4928 */ 4929 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter) 4930 { 4931 struct ixgbe_hw *hw = &adapter->hw; 4932 u32 vlnctrl; 4933 int i, j; 4934 4935 switch (hw->mac.type) { 4936 case ixgbe_mac_82598EB: 4937 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 4938 vlnctrl &= ~IXGBE_VLNCTRL_VME; 4939 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 4940 break; 4941 case ixgbe_mac_82599EB: 4942 case ixgbe_mac_X540: 4943 case ixgbe_mac_X550: 4944 case ixgbe_mac_X550EM_x: 4945 case ixgbe_mac_x550em_a: 4946 case ixgbe_mac_e610: 4947 for (i = 0; i < adapter->num_rx_queues; i++) { 4948 struct ixgbe_ring *ring = adapter->rx_ring[i]; 4949 4950 if (!netif_is_ixgbe(ring->netdev)) 4951 continue; 4952 4953 j = ring->reg_idx; 4954 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); 4955 vlnctrl &= ~IXGBE_RXDCTL_VME; 4956 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl); 4957 } 4958 break; 4959 default: 4960 break; 4961 } 4962 } 4963 4964 /** 4965 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping 4966 * @adapter: driver data 4967 */ 4968 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter) 4969 { 4970 struct ixgbe_hw *hw = &adapter->hw; 4971 u32 vlnctrl; 4972 int i, j; 4973 4974 switch (hw->mac.type) { 4975 case ixgbe_mac_82598EB: 4976 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 4977 vlnctrl |= IXGBE_VLNCTRL_VME; 4978 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 4979 break; 4980 case ixgbe_mac_82599EB: 4981 case ixgbe_mac_X540: 4982 case ixgbe_mac_X550: 4983 case ixgbe_mac_X550EM_x: 4984 case ixgbe_mac_x550em_a: 4985 case ixgbe_mac_e610: 4986 for (i = 0; i < adapter->num_rx_queues; i++) { 4987 struct ixgbe_ring *ring = adapter->rx_ring[i]; 4988 4989 if (!netif_is_ixgbe(ring->netdev)) 4990 continue; 4991 4992 j = ring->reg_idx; 4993 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); 4994 vlnctrl |= IXGBE_RXDCTL_VME; 4995 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl); 4996 } 4997 break; 4998 default: 4999 break; 5000 } 5001 } 5002 5003 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter) 5004 { 5005 struct ixgbe_hw *hw = &adapter->hw; 5006 u32 vlnctrl, i; 5007 5008 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 5009 5010 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) { 5011 /* For VMDq and SR-IOV we must leave VLAN filtering enabled */ 5012 vlnctrl |= IXGBE_VLNCTRL_VFE; 5013 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 5014 } else { 5015 vlnctrl &= ~IXGBE_VLNCTRL_VFE; 5016 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 5017 return; 5018 } 5019 5020 /* Nothing to do for 82598 */ 5021 if (hw->mac.type == ixgbe_mac_82598EB) 5022 return; 5023 5024 /* We are already in VLAN promisc, nothing to do */ 5025 if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC) 5026 return; 5027 5028 /* Set flag so we don't redo unnecessary work */ 5029 adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC; 5030 5031 /* Add PF to all active pools */ 5032 for (i = IXGBE_VLVF_ENTRIES; --i;) { 5033 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32); 5034 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset); 5035 5036 vlvfb |= BIT(VMDQ_P(0) % 32); 5037 IXGBE_WRITE_REG(hw, reg_offset, vlvfb); 5038 } 5039 5040 /* Set all bits in the VLAN filter table array */ 5041 for (i = hw->mac.vft_size; i--;) 5042 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U); 5043 } 5044 5045 #define VFTA_BLOCK_SIZE 8 5046 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset) 5047 { 5048 struct ixgbe_hw *hw = &adapter->hw; 5049 u32 vfta[VFTA_BLOCK_SIZE] = { 0 }; 5050 u32 vid_start = vfta_offset * 32; 5051 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32); 5052 u32 i, vid, word, bits; 5053 5054 for (i = IXGBE_VLVF_ENTRIES; --i;) { 5055 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i)); 5056 5057 /* pull VLAN ID from VLVF */ 5058 vid = vlvf & VLAN_VID_MASK; 5059 5060 /* only concern ourselves with a certain range */ 5061 if (vid < vid_start || vid >= vid_end) 5062 continue; 5063 5064 if (vlvf) { 5065 /* record VLAN ID in VFTA */ 5066 vfta[(vid - vid_start) / 32] |= BIT(vid % 32); 5067 5068 /* if PF is part of this then continue */ 5069 if (test_bit(vid, adapter->active_vlans)) 5070 continue; 5071 } 5072 5073 /* remove PF from the pool */ 5074 word = i * 2 + VMDQ_P(0) / 32; 5075 bits = ~BIT(VMDQ_P(0) % 32); 5076 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word)); 5077 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits); 5078 } 5079 5080 /* extract values from active_vlans and write back to VFTA */ 5081 for (i = VFTA_BLOCK_SIZE; i--;) { 5082 vid = (vfta_offset + i) * 32; 5083 word = vid / BITS_PER_LONG; 5084 bits = vid % BITS_PER_LONG; 5085 5086 vfta[i] |= adapter->active_vlans[word] >> bits; 5087 5088 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]); 5089 } 5090 } 5091 5092 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter) 5093 { 5094 struct ixgbe_hw *hw = &adapter->hw; 5095 u32 vlnctrl, i; 5096 5097 /* Set VLAN filtering to enabled */ 5098 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 5099 vlnctrl |= IXGBE_VLNCTRL_VFE; 5100 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 5101 5102 if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) || 5103 hw->mac.type == ixgbe_mac_82598EB) 5104 return; 5105 5106 /* We are not in VLAN promisc, nothing to do */ 5107 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) 5108 return; 5109 5110 /* Set flag so we don't redo unnecessary work */ 5111 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC; 5112 5113 for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE) 5114 ixgbe_scrub_vfta(adapter, i); 5115 } 5116 5117 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter) 5118 { 5119 u16 vid = 1; 5120 5121 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0); 5122 5123 for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID) 5124 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid); 5125 } 5126 5127 /** 5128 * ixgbe_write_mc_addr_list - write multicast addresses to MTA 5129 * @netdev: network interface device structure 5130 * 5131 * Writes multicast address list to the MTA hash table. 5132 * Returns: -ENOMEM on failure 5133 * 0 on no addresses written 5134 * X on writing X addresses to MTA 5135 **/ 5136 static int ixgbe_write_mc_addr_list(struct net_device *netdev) 5137 { 5138 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 5139 struct ixgbe_hw *hw = &adapter->hw; 5140 5141 if (!netif_running(netdev)) 5142 return 0; 5143 5144 if (hw->mac.ops.update_mc_addr_list) 5145 hw->mac.ops.update_mc_addr_list(hw, netdev); 5146 else 5147 return -ENOMEM; 5148 5149 #ifdef CONFIG_PCI_IOV 5150 ixgbe_restore_vf_multicasts(adapter); 5151 #endif 5152 5153 return netdev_mc_count(netdev); 5154 } 5155 5156 #ifdef CONFIG_PCI_IOV 5157 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter) 5158 { 5159 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5160 struct ixgbe_hw *hw = &adapter->hw; 5161 int i; 5162 5163 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5164 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED; 5165 5166 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) 5167 hw->mac.ops.set_rar(hw, i, 5168 mac_table->addr, 5169 mac_table->pool, 5170 IXGBE_RAH_AV); 5171 else 5172 hw->mac.ops.clear_rar(hw, i); 5173 } 5174 } 5175 5176 #endif 5177 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter) 5178 { 5179 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5180 struct ixgbe_hw *hw = &adapter->hw; 5181 int i; 5182 5183 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5184 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED)) 5185 continue; 5186 5187 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED; 5188 5189 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) 5190 hw->mac.ops.set_rar(hw, i, 5191 mac_table->addr, 5192 mac_table->pool, 5193 IXGBE_RAH_AV); 5194 else 5195 hw->mac.ops.clear_rar(hw, i); 5196 } 5197 } 5198 5199 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter) 5200 { 5201 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5202 struct ixgbe_hw *hw = &adapter->hw; 5203 int i; 5204 5205 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5206 mac_table->state |= IXGBE_MAC_STATE_MODIFIED; 5207 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE; 5208 } 5209 5210 ixgbe_sync_mac_table(adapter); 5211 } 5212 5213 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool) 5214 { 5215 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5216 struct ixgbe_hw *hw = &adapter->hw; 5217 int i, count = 0; 5218 5219 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5220 /* do not count default RAR as available */ 5221 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT) 5222 continue; 5223 5224 /* only count unused and addresses that belong to us */ 5225 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) { 5226 if (mac_table->pool != pool) 5227 continue; 5228 } 5229 5230 count++; 5231 } 5232 5233 return count; 5234 } 5235 5236 /* this function destroys the first RAR entry */ 5237 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter) 5238 { 5239 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5240 struct ixgbe_hw *hw = &adapter->hw; 5241 5242 memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN); 5243 mac_table->pool = VMDQ_P(0); 5244 5245 mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE; 5246 5247 hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool, 5248 IXGBE_RAH_AV); 5249 } 5250 5251 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, 5252 const u8 *addr, u16 pool) 5253 { 5254 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5255 struct ixgbe_hw *hw = &adapter->hw; 5256 int i; 5257 5258 if (is_zero_ether_addr(addr)) 5259 return -EINVAL; 5260 5261 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5262 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) 5263 continue; 5264 5265 ether_addr_copy(mac_table->addr, addr); 5266 mac_table->pool = pool; 5267 5268 mac_table->state |= IXGBE_MAC_STATE_MODIFIED | 5269 IXGBE_MAC_STATE_IN_USE; 5270 5271 ixgbe_sync_mac_table(adapter); 5272 5273 return i; 5274 } 5275 5276 return -ENOMEM; 5277 } 5278 5279 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, 5280 const u8 *addr, u16 pool) 5281 { 5282 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5283 struct ixgbe_hw *hw = &adapter->hw; 5284 int i; 5285 5286 if (is_zero_ether_addr(addr)) 5287 return -EINVAL; 5288 5289 /* search table for addr, if found clear IN_USE flag and sync */ 5290 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5291 /* we can only delete an entry if it is in use */ 5292 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE)) 5293 continue; 5294 /* we only care about entries that belong to the given pool */ 5295 if (mac_table->pool != pool) 5296 continue; 5297 /* we only care about a specific MAC address */ 5298 if (!ether_addr_equal(addr, mac_table->addr)) 5299 continue; 5300 5301 mac_table->state |= IXGBE_MAC_STATE_MODIFIED; 5302 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE; 5303 5304 ixgbe_sync_mac_table(adapter); 5305 5306 return 0; 5307 } 5308 5309 return -ENOMEM; 5310 } 5311 5312 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr) 5313 { 5314 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 5315 int ret; 5316 5317 ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0)); 5318 5319 return min_t(int, ret, 0); 5320 } 5321 5322 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr) 5323 { 5324 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 5325 5326 ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0)); 5327 5328 return 0; 5329 } 5330 5331 /** 5332 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set 5333 * @netdev: network interface device structure 5334 * 5335 * The set_rx_method entry point is called whenever the unicast/multicast 5336 * address list or the network interface flags are updated. This routine is 5337 * responsible for configuring the hardware for proper unicast, multicast and 5338 * promiscuous mode. 5339 **/ 5340 void ixgbe_set_rx_mode(struct net_device *netdev) 5341 { 5342 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 5343 struct ixgbe_hw *hw = &adapter->hw; 5344 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE; 5345 netdev_features_t features = netdev->features; 5346 int count; 5347 5348 /* Check for Promiscuous and All Multicast modes */ 5349 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 5350 5351 /* set all bits that we expect to always be set */ 5352 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */ 5353 fctrl |= IXGBE_FCTRL_BAM; 5354 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */ 5355 fctrl |= IXGBE_FCTRL_PMCF; 5356 5357 /* clear the bits we are changing the status of */ 5358 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 5359 if (netdev->flags & IFF_PROMISC) { 5360 hw->addr_ctrl.user_set_promisc = true; 5361 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 5362 vmolr |= IXGBE_VMOLR_MPE; 5363 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER; 5364 } else { 5365 if (netdev->flags & IFF_ALLMULTI) { 5366 fctrl |= IXGBE_FCTRL_MPE; 5367 vmolr |= IXGBE_VMOLR_MPE; 5368 } 5369 hw->addr_ctrl.user_set_promisc = false; 5370 } 5371 5372 /* 5373 * Write addresses to available RAR registers, if there is not 5374 * sufficient space to store all the addresses then enable 5375 * unicast promiscuous mode 5376 */ 5377 if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) { 5378 fctrl |= IXGBE_FCTRL_UPE; 5379 vmolr |= IXGBE_VMOLR_ROPE; 5380 } 5381 5382 /* Write addresses to the MTA, if the attempt fails 5383 * then we should just turn on promiscuous mode so 5384 * that we can at least receive multicast traffic 5385 */ 5386 count = ixgbe_write_mc_addr_list(netdev); 5387 if (count < 0) { 5388 fctrl |= IXGBE_FCTRL_MPE; 5389 vmolr |= IXGBE_VMOLR_MPE; 5390 } else if (count) { 5391 vmolr |= IXGBE_VMOLR_ROMPE; 5392 } 5393 5394 if (hw->mac.type != ixgbe_mac_82598EB) { 5395 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) & 5396 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE | 5397 IXGBE_VMOLR_ROPE); 5398 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr); 5399 } 5400 5401 /* This is useful for sniffing bad packets. */ 5402 if (features & NETIF_F_RXALL) { 5403 /* UPE and MPE will be handled by normal PROMISC logic 5404 * in e1000e_set_rx_mode */ 5405 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */ 5406 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */ 5407 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */ 5408 5409 fctrl &= ~(IXGBE_FCTRL_DPF); 5410 /* NOTE: VLAN filtering is disabled by setting PROMISC */ 5411 } 5412 5413 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 5414 5415 if (features & NETIF_F_HW_VLAN_CTAG_RX) 5416 ixgbe_vlan_strip_enable(adapter); 5417 else 5418 ixgbe_vlan_strip_disable(adapter); 5419 5420 if (features & NETIF_F_HW_VLAN_CTAG_FILTER) 5421 ixgbe_vlan_promisc_disable(adapter); 5422 else 5423 ixgbe_vlan_promisc_enable(adapter); 5424 } 5425 5426 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter) 5427 { 5428 int q_idx; 5429 5430 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) 5431 napi_enable(&adapter->q_vector[q_idx]->napi); 5432 } 5433 5434 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter) 5435 { 5436 int q_idx; 5437 5438 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) 5439 napi_disable(&adapter->q_vector[q_idx]->napi); 5440 } 5441 5442 static int ixgbe_udp_tunnel_sync(struct net_device *dev, unsigned int table) 5443 { 5444 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 5445 struct ixgbe_hw *hw = &adapter->hw; 5446 struct udp_tunnel_info ti; 5447 5448 udp_tunnel_nic_get_port(dev, table, 0, &ti); 5449 if (ti.type == UDP_TUNNEL_TYPE_VXLAN) 5450 adapter->vxlan_port = ti.port; 5451 else 5452 adapter->geneve_port = ti.port; 5453 5454 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, 5455 ntohs(adapter->vxlan_port) | 5456 ntohs(adapter->geneve_port) << 5457 IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT); 5458 return 0; 5459 } 5460 5461 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550 = { 5462 .sync_table = ixgbe_udp_tunnel_sync, 5463 .flags = UDP_TUNNEL_NIC_INFO_IPV4_ONLY, 5464 .tables = { 5465 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 5466 }, 5467 }; 5468 5469 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550em_a = { 5470 .sync_table = ixgbe_udp_tunnel_sync, 5471 .flags = UDP_TUNNEL_NIC_INFO_IPV4_ONLY, 5472 .tables = { 5473 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 5474 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, }, 5475 }, 5476 }; 5477 5478 #ifdef CONFIG_IXGBE_DCB 5479 /** 5480 * ixgbe_configure_dcb - Configure DCB hardware 5481 * @adapter: ixgbe adapter struct 5482 * 5483 * This is called by the driver on open to configure the DCB hardware. 5484 * This is also called by the gennetlink interface when reconfiguring 5485 * the DCB state. 5486 */ 5487 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter) 5488 { 5489 struct ixgbe_hw *hw = &adapter->hw; 5490 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 5491 5492 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) { 5493 if (hw->mac.type == ixgbe_mac_82598EB) 5494 netif_set_tso_max_size(adapter->netdev, 65536); 5495 return; 5496 } 5497 5498 if (hw->mac.type == ixgbe_mac_82598EB) 5499 netif_set_tso_max_size(adapter->netdev, 32768); 5500 5501 #ifdef IXGBE_FCOE 5502 if (adapter->netdev->fcoe_mtu) 5503 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE); 5504 #endif 5505 5506 /* reconfigure the hardware */ 5507 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) { 5508 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame, 5509 DCB_TX_CONFIG); 5510 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame, 5511 DCB_RX_CONFIG); 5512 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg); 5513 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) { 5514 ixgbe_dcb_hw_ets(&adapter->hw, 5515 adapter->ixgbe_ieee_ets, 5516 max_frame); 5517 ixgbe_dcb_hw_pfc_config(&adapter->hw, 5518 adapter->ixgbe_ieee_pfc->pfc_en, 5519 adapter->ixgbe_ieee_ets->prio_tc); 5520 } 5521 5522 /* Enable RSS Hash per TC */ 5523 if (hw->mac.type != ixgbe_mac_82598EB) { 5524 u32 msb = 0; 5525 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1; 5526 5527 while (rss_i) { 5528 msb++; 5529 rss_i >>= 1; 5530 } 5531 5532 /* write msb to all 8 TCs in one write */ 5533 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111); 5534 } 5535 } 5536 #endif 5537 5538 /* Additional bittime to account for IXGBE framing */ 5539 #define IXGBE_ETH_FRAMING 20 5540 5541 /** 5542 * ixgbe_hpbthresh - calculate high water mark for flow control 5543 * 5544 * @adapter: board private structure to calculate for 5545 * @pb: packet buffer to calculate 5546 */ 5547 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb) 5548 { 5549 struct ixgbe_hw *hw = &adapter->hw; 5550 struct net_device *dev = adapter->netdev; 5551 int link, tc, kb, marker; 5552 u32 dv_id, rx_pba; 5553 5554 /* Calculate max LAN frame size */ 5555 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING; 5556 5557 #ifdef IXGBE_FCOE 5558 /* FCoE traffic class uses FCOE jumbo frames */ 5559 if (dev->fcoe_mtu && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE && 5560 (pb == ixgbe_fcoe_get_tc(adapter))) 5561 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE; 5562 #endif 5563 5564 /* Calculate delay value for device */ 5565 switch (hw->mac.type) { 5566 case ixgbe_mac_X540: 5567 case ixgbe_mac_X550: 5568 case ixgbe_mac_X550EM_x: 5569 case ixgbe_mac_x550em_a: 5570 case ixgbe_mac_e610: 5571 dv_id = IXGBE_DV_X540(link, tc); 5572 break; 5573 default: 5574 dv_id = IXGBE_DV(link, tc); 5575 break; 5576 } 5577 5578 /* Loopback switch introduces additional latency */ 5579 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 5580 dv_id += IXGBE_B2BT(tc); 5581 5582 /* Delay value is calculated in bit times convert to KB */ 5583 kb = IXGBE_BT2KB(dv_id); 5584 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10; 5585 5586 marker = rx_pba - kb; 5587 5588 /* It is possible that the packet buffer is not large enough 5589 * to provide required headroom. In this case throw an error 5590 * to user and a do the best we can. 5591 */ 5592 if (marker < 0) { 5593 e_warn(drv, "Packet Buffer(%i) can not provide enough" 5594 "headroom to support flow control." 5595 "Decrease MTU or number of traffic classes\n", pb); 5596 marker = tc + 1; 5597 } 5598 5599 return marker; 5600 } 5601 5602 /** 5603 * ixgbe_lpbthresh - calculate low water mark for flow control 5604 * 5605 * @adapter: board private structure to calculate for 5606 * @pb: packet buffer to calculate 5607 */ 5608 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb) 5609 { 5610 struct ixgbe_hw *hw = &adapter->hw; 5611 struct net_device *dev = adapter->netdev; 5612 int tc; 5613 u32 dv_id; 5614 5615 /* Calculate max LAN frame size */ 5616 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN; 5617 5618 #ifdef IXGBE_FCOE 5619 /* FCoE traffic class uses FCOE jumbo frames */ 5620 if (dev->fcoe_mtu && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE && 5621 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up))) 5622 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE; 5623 #endif 5624 5625 /* Calculate delay value for device */ 5626 switch (hw->mac.type) { 5627 case ixgbe_mac_X540: 5628 case ixgbe_mac_X550: 5629 case ixgbe_mac_X550EM_x: 5630 case ixgbe_mac_x550em_a: 5631 case ixgbe_mac_e610: 5632 dv_id = IXGBE_LOW_DV_X540(tc); 5633 break; 5634 default: 5635 dv_id = IXGBE_LOW_DV(tc); 5636 break; 5637 } 5638 5639 /* Delay value is calculated in bit times convert to KB */ 5640 return IXGBE_BT2KB(dv_id); 5641 } 5642 5643 /* 5644 * ixgbe_pbthresh_setup - calculate and setup high low water marks 5645 */ 5646 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter) 5647 { 5648 struct ixgbe_hw *hw = &adapter->hw; 5649 int num_tc = adapter->hw_tcs; 5650 int i; 5651 5652 if (!num_tc) 5653 num_tc = 1; 5654 5655 for (i = 0; i < num_tc; i++) { 5656 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i); 5657 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i); 5658 5659 /* Low water marks must not be larger than high water marks */ 5660 if (hw->fc.low_water[i] > hw->fc.high_water[i]) 5661 hw->fc.low_water[i] = 0; 5662 } 5663 5664 for (; i < MAX_TRAFFIC_CLASS; i++) 5665 hw->fc.high_water[i] = 0; 5666 } 5667 5668 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter) 5669 { 5670 struct ixgbe_hw *hw = &adapter->hw; 5671 int hdrm; 5672 u8 tc = adapter->hw_tcs; 5673 5674 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE || 5675 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) 5676 hdrm = 32 << adapter->fdir_pballoc; 5677 else 5678 hdrm = 0; 5679 5680 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL); 5681 ixgbe_pbthresh_setup(adapter); 5682 } 5683 5684 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter) 5685 { 5686 struct ixgbe_hw *hw = &adapter->hw; 5687 struct hlist_node *node2; 5688 struct ixgbe_fdir_filter *filter; 5689 u8 queue; 5690 5691 spin_lock(&adapter->fdir_perfect_lock); 5692 5693 if (!hlist_empty(&adapter->fdir_filter_list)) 5694 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask); 5695 5696 hlist_for_each_entry_safe(filter, node2, 5697 &adapter->fdir_filter_list, fdir_node) { 5698 if (filter->action == IXGBE_FDIR_DROP_QUEUE) { 5699 queue = IXGBE_FDIR_DROP_QUEUE; 5700 } else { 5701 u32 ring = ethtool_get_flow_spec_ring(filter->action); 5702 u8 vf = ethtool_get_flow_spec_ring_vf(filter->action); 5703 5704 if (!vf && (ring >= adapter->num_rx_queues)) { 5705 e_err(drv, "FDIR restore failed without VF, ring: %u\n", 5706 ring); 5707 continue; 5708 } else if (vf && 5709 ((vf > adapter->num_vfs) || 5710 ring >= adapter->num_rx_queues_per_pool)) { 5711 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n", 5712 vf, ring); 5713 continue; 5714 } 5715 5716 /* Map the ring onto the absolute queue index */ 5717 if (!vf) 5718 queue = adapter->rx_ring[ring]->reg_idx; 5719 else 5720 queue = ((vf - 1) * 5721 adapter->num_rx_queues_per_pool) + ring; 5722 } 5723 5724 ixgbe_fdir_write_perfect_filter_82599(hw, 5725 &filter->filter, filter->sw_idx, queue); 5726 } 5727 5728 spin_unlock(&adapter->fdir_perfect_lock); 5729 } 5730 5731 /** 5732 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue 5733 * @rx_ring: ring to free buffers from 5734 **/ 5735 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring) 5736 { 5737 u16 i = rx_ring->next_to_clean; 5738 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i]; 5739 5740 if (rx_ring->xsk_pool) { 5741 ixgbe_xsk_clean_rx_ring(rx_ring); 5742 goto skip_free; 5743 } 5744 5745 /* Free all the Rx ring sk_buffs */ 5746 while (i != rx_ring->next_to_alloc) { 5747 if (rx_buffer->skb) { 5748 struct sk_buff *skb = rx_buffer->skb; 5749 if (IXGBE_CB(skb)->page_released) 5750 dma_unmap_page_attrs(rx_ring->dev, 5751 IXGBE_CB(skb)->dma, 5752 ixgbe_rx_pg_size(rx_ring), 5753 DMA_FROM_DEVICE, 5754 IXGBE_RX_DMA_ATTR); 5755 dev_kfree_skb(skb); 5756 } 5757 5758 /* Invalidate cache lines that may have been written to by 5759 * device so that we avoid corrupting memory. 5760 */ 5761 dma_sync_single_range_for_cpu(rx_ring->dev, 5762 rx_buffer->dma, 5763 rx_buffer->page_offset, 5764 ixgbe_rx_bufsz(rx_ring), 5765 DMA_FROM_DEVICE); 5766 5767 /* free resources associated with mapping */ 5768 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma, 5769 ixgbe_rx_pg_size(rx_ring), 5770 DMA_FROM_DEVICE, 5771 IXGBE_RX_DMA_ATTR); 5772 __page_frag_cache_drain(rx_buffer->page, 5773 rx_buffer->pagecnt_bias); 5774 5775 i++; 5776 rx_buffer++; 5777 if (i == rx_ring->count) { 5778 i = 0; 5779 rx_buffer = rx_ring->rx_buffer_info; 5780 } 5781 } 5782 5783 skip_free: 5784 rx_ring->next_to_alloc = 0; 5785 rx_ring->next_to_clean = 0; 5786 rx_ring->next_to_use = 0; 5787 } 5788 5789 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter, 5790 struct ixgbe_fwd_adapter *accel) 5791 { 5792 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices; 5793 int num_tc = netdev_get_num_tc(adapter->netdev); 5794 struct net_device *vdev = accel->netdev; 5795 int i, baseq, err; 5796 5797 baseq = accel->pool * adapter->num_rx_queues_per_pool; 5798 netdev_dbg(vdev, "pool %i:%i queues %i:%i\n", 5799 accel->pool, adapter->num_rx_pools, 5800 baseq, baseq + adapter->num_rx_queues_per_pool); 5801 5802 accel->rx_base_queue = baseq; 5803 accel->tx_base_queue = baseq; 5804 5805 /* record configuration for macvlan interface in vdev */ 5806 for (i = 0; i < num_tc; i++) 5807 netdev_bind_sb_channel_queue(adapter->netdev, vdev, 5808 i, rss_i, baseq + (rss_i * i)); 5809 5810 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) 5811 adapter->rx_ring[baseq + i]->netdev = vdev; 5812 5813 /* Guarantee all rings are updated before we update the 5814 * MAC address filter. 5815 */ 5816 wmb(); 5817 5818 /* ixgbe_add_mac_filter will return an index if it succeeds, so we 5819 * need to only treat it as an error value if it is negative. 5820 */ 5821 err = ixgbe_add_mac_filter(adapter, vdev->dev_addr, 5822 VMDQ_P(accel->pool)); 5823 if (err >= 0) 5824 return 0; 5825 5826 /* if we cannot add the MAC rule then disable the offload */ 5827 macvlan_release_l2fw_offload(vdev); 5828 5829 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) 5830 adapter->rx_ring[baseq + i]->netdev = NULL; 5831 5832 netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n"); 5833 5834 /* unbind the queues and drop the subordinate channel config */ 5835 netdev_unbind_sb_channel(adapter->netdev, vdev); 5836 netdev_set_sb_channel(vdev, 0); 5837 5838 clear_bit(accel->pool, adapter->fwd_bitmask); 5839 kfree(accel); 5840 5841 return err; 5842 } 5843 5844 static int ixgbe_macvlan_up(struct net_device *vdev, 5845 struct netdev_nested_priv *priv) 5846 { 5847 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)priv->data; 5848 struct ixgbe_fwd_adapter *accel; 5849 5850 if (!netif_is_macvlan(vdev)) 5851 return 0; 5852 5853 accel = macvlan_accel_priv(vdev); 5854 if (!accel) 5855 return 0; 5856 5857 ixgbe_fwd_ring_up(adapter, accel); 5858 5859 return 0; 5860 } 5861 5862 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter) 5863 { 5864 struct netdev_nested_priv priv = { 5865 .data = (void *)adapter, 5866 }; 5867 5868 netdev_walk_all_upper_dev_rcu(adapter->netdev, 5869 ixgbe_macvlan_up, &priv); 5870 } 5871 5872 static void ixgbe_configure(struct ixgbe_adapter *adapter) 5873 { 5874 struct ixgbe_hw *hw = &adapter->hw; 5875 5876 ixgbe_configure_pb(adapter); 5877 #ifdef CONFIG_IXGBE_DCB 5878 ixgbe_configure_dcb(adapter); 5879 #endif 5880 /* 5881 * We must restore virtualization before VLANs or else 5882 * the VLVF registers will not be populated 5883 */ 5884 ixgbe_configure_virtualization(adapter); 5885 5886 ixgbe_set_rx_mode(adapter->netdev); 5887 ixgbe_restore_vlan(adapter); 5888 ixgbe_ipsec_restore(adapter); 5889 5890 switch (hw->mac.type) { 5891 case ixgbe_mac_82599EB: 5892 case ixgbe_mac_X540: 5893 hw->mac.ops.disable_rx_buff(hw); 5894 break; 5895 default: 5896 break; 5897 } 5898 5899 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) { 5900 ixgbe_init_fdir_signature_82599(&adapter->hw, 5901 adapter->fdir_pballoc); 5902 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) { 5903 ixgbe_init_fdir_perfect_82599(&adapter->hw, 5904 adapter->fdir_pballoc); 5905 ixgbe_fdir_filter_restore(adapter); 5906 } 5907 5908 switch (hw->mac.type) { 5909 case ixgbe_mac_82599EB: 5910 case ixgbe_mac_X540: 5911 hw->mac.ops.enable_rx_buff(hw); 5912 break; 5913 default: 5914 break; 5915 } 5916 5917 #ifdef CONFIG_IXGBE_DCA 5918 /* configure DCA */ 5919 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE) 5920 ixgbe_setup_dca(adapter); 5921 #endif /* CONFIG_IXGBE_DCA */ 5922 5923 #ifdef IXGBE_FCOE 5924 /* configure FCoE L2 filters, redirection table, and Rx control */ 5925 ixgbe_configure_fcoe(adapter); 5926 5927 #endif /* IXGBE_FCOE */ 5928 ixgbe_configure_tx(adapter); 5929 ixgbe_configure_rx(adapter); 5930 ixgbe_configure_dfwd(adapter); 5931 } 5932 5933 /** 5934 * ixgbe_enable_link_status_events - enable link status events 5935 * @adapter: pointer to the adapter structure 5936 * @mask: event mask to be set 5937 * 5938 * Enables link status events by invoking ixgbe_configure_lse() 5939 * 5940 * Return: the exit code of the operation. 5941 */ 5942 static int ixgbe_enable_link_status_events(struct ixgbe_adapter *adapter, 5943 u16 mask) 5944 { 5945 int err; 5946 5947 err = ixgbe_configure_lse(&adapter->hw, true, mask); 5948 if (err) 5949 return err; 5950 5951 adapter->lse_mask = mask; 5952 return 0; 5953 } 5954 5955 /** 5956 * ixgbe_disable_link_status_events - disable link status events 5957 * @adapter: pointer to the adapter structure 5958 * 5959 * Disables link status events by invoking ixgbe_configure_lse() 5960 * 5961 * Return: the exit code of the operation. 5962 */ 5963 static int ixgbe_disable_link_status_events(struct ixgbe_adapter *adapter) 5964 { 5965 int err; 5966 5967 err = ixgbe_configure_lse(&adapter->hw, false, adapter->lse_mask); 5968 if (err) 5969 return err; 5970 5971 adapter->lse_mask = 0; 5972 return 0; 5973 } 5974 5975 /** 5976 * ixgbe_sfp_link_config - set up SFP+ link 5977 * @adapter: pointer to private adapter struct 5978 **/ 5979 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter) 5980 { 5981 /* 5982 * We are assuming the worst case scenario here, and that 5983 * is that an SFP was inserted/removed after the reset 5984 * but before SFP detection was enabled. As such the best 5985 * solution is to just start searching as soon as we start 5986 */ 5987 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 5988 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP; 5989 5990 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET; 5991 adapter->sfp_poll_time = 0; 5992 } 5993 5994 /** 5995 * ixgbe_non_sfp_link_config - set up non-SFP+ link 5996 * @hw: pointer to private hardware struct 5997 * 5998 * Configure non-SFP link. 5999 * 6000 * Return: 0 on success, negative on failure 6001 **/ 6002 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw) 6003 { 6004 struct ixgbe_adapter *adapter = container_of(hw, struct ixgbe_adapter, 6005 hw); 6006 u16 mask = ~((u16)(IXGBE_ACI_LINK_EVENT_UPDOWN | 6007 IXGBE_ACI_LINK_EVENT_MEDIA_NA | 6008 IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL | 6009 IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL)); 6010 bool autoneg, link_up = false; 6011 int ret = -EIO; 6012 u32 speed; 6013 6014 if (hw->mac.ops.check_link) 6015 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false); 6016 6017 if (ret) 6018 return ret; 6019 6020 speed = hw->phy.autoneg_advertised; 6021 if (!speed && hw->mac.ops.get_link_capabilities) { 6022 ret = hw->mac.ops.get_link_capabilities(hw, &speed, 6023 &autoneg); 6024 /* remove NBASE-T speeds from default autonegotiation 6025 * to accommodate broken network switches in the field 6026 * which cannot cope with advertised NBASE-T speeds 6027 */ 6028 speed &= ~(IXGBE_LINK_SPEED_5GB_FULL | 6029 IXGBE_LINK_SPEED_2_5GB_FULL); 6030 } 6031 6032 if (ret) 6033 return ret; 6034 6035 if (hw->mac.ops.setup_link) { 6036 if (adapter->hw.mac.type == ixgbe_mac_e610) { 6037 ret = ixgbe_enable_link_status_events(adapter, mask); 6038 if (ret) 6039 return ret; 6040 } 6041 ret = hw->mac.ops.setup_link(hw, speed, link_up); 6042 } 6043 6044 return ret; 6045 } 6046 6047 /** 6048 * ixgbe_check_media_subtask - check for media 6049 * @adapter: pointer to adapter structure 6050 * 6051 * If media is available then initialize PHY user configuration. Configure the 6052 * PHY if the interface is up. 6053 */ 6054 static void ixgbe_check_media_subtask(struct ixgbe_adapter *adapter) 6055 { 6056 struct ixgbe_hw *hw = &adapter->hw; 6057 6058 /* No need to check for media if it's already present */ 6059 if (!(adapter->flags2 & IXGBE_FLAG2_NO_MEDIA)) 6060 return; 6061 6062 /* Refresh link info and check if media is present */ 6063 if (ixgbe_update_link_info(hw)) 6064 return; 6065 6066 ixgbe_check_link_cfg_err(adapter, hw->link.link_info.link_cfg_err); 6067 6068 if (hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE) { 6069 /* PHY settings are reset on media insertion, reconfigure 6070 * PHY to preserve settings. 6071 */ 6072 if (!(ixgbe_non_sfp_link_config(&adapter->hw))) 6073 adapter->flags2 &= ~IXGBE_FLAG2_NO_MEDIA; 6074 6075 /* A Link Status Event will be generated; the event handler 6076 * will complete bringing the interface up 6077 */ 6078 } 6079 } 6080 6081 /** 6082 * ixgbe_clear_vf_stats_counters - Clear out VF stats after reset 6083 * @adapter: board private structure 6084 * 6085 * On a reset we need to clear out the VF stats or accounting gets 6086 * messed up because they're not clear on read. 6087 **/ 6088 static void ixgbe_clear_vf_stats_counters(struct ixgbe_adapter *adapter) 6089 { 6090 struct ixgbe_hw *hw = &adapter->hw; 6091 int i; 6092 6093 for (i = 0; i < adapter->num_vfs; i++) { 6094 adapter->vfinfo[i].last_vfstats.gprc = 6095 IXGBE_READ_REG(hw, IXGBE_PVFGPRC(i)); 6096 adapter->vfinfo[i].saved_rst_vfstats.gprc += 6097 adapter->vfinfo[i].vfstats.gprc; 6098 adapter->vfinfo[i].vfstats.gprc = 0; 6099 adapter->vfinfo[i].last_vfstats.gptc = 6100 IXGBE_READ_REG(hw, IXGBE_PVFGPTC(i)); 6101 adapter->vfinfo[i].saved_rst_vfstats.gptc += 6102 adapter->vfinfo[i].vfstats.gptc; 6103 adapter->vfinfo[i].vfstats.gptc = 0; 6104 adapter->vfinfo[i].last_vfstats.gorc = 6105 IXGBE_READ_REG(hw, IXGBE_PVFGORC_LSB(i)); 6106 adapter->vfinfo[i].saved_rst_vfstats.gorc += 6107 adapter->vfinfo[i].vfstats.gorc; 6108 adapter->vfinfo[i].vfstats.gorc = 0; 6109 adapter->vfinfo[i].last_vfstats.gotc = 6110 IXGBE_READ_REG(hw, IXGBE_PVFGOTC_LSB(i)); 6111 adapter->vfinfo[i].saved_rst_vfstats.gotc += 6112 adapter->vfinfo[i].vfstats.gotc; 6113 adapter->vfinfo[i].vfstats.gotc = 0; 6114 adapter->vfinfo[i].last_vfstats.mprc = 6115 IXGBE_READ_REG(hw, IXGBE_PVFMPRC(i)); 6116 adapter->vfinfo[i].saved_rst_vfstats.mprc += 6117 adapter->vfinfo[i].vfstats.mprc; 6118 adapter->vfinfo[i].vfstats.mprc = 0; 6119 } 6120 } 6121 6122 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter) 6123 { 6124 struct ixgbe_hw *hw = &adapter->hw; 6125 u32 gpie = 0; 6126 6127 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 6128 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT | 6129 IXGBE_GPIE_OCD; 6130 gpie |= IXGBE_GPIE_EIAME; 6131 /* 6132 * use EIAM to auto-mask when MSI-X interrupt is asserted 6133 * this saves a register write for every interrupt 6134 */ 6135 switch (hw->mac.type) { 6136 case ixgbe_mac_82598EB: 6137 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 6138 break; 6139 case ixgbe_mac_82599EB: 6140 case ixgbe_mac_X540: 6141 case ixgbe_mac_X550: 6142 case ixgbe_mac_X550EM_x: 6143 case ixgbe_mac_x550em_a: 6144 case ixgbe_mac_e610: 6145 default: 6146 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 6147 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 6148 break; 6149 } 6150 } else { 6151 /* legacy interrupts, use EIAM to auto-mask when reading EICR, 6152 * specifically only auto mask tx and rx interrupts */ 6153 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 6154 } 6155 6156 /* XXX: to interrupt immediately for EICS writes, enable this */ 6157 /* gpie |= IXGBE_GPIE_EIMEN; */ 6158 6159 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 6160 gpie &= ~IXGBE_GPIE_VTMODE_MASK; 6161 6162 switch (adapter->ring_feature[RING_F_VMDQ].mask) { 6163 case IXGBE_82599_VMDQ_8Q_MASK: 6164 gpie |= IXGBE_GPIE_VTMODE_16; 6165 break; 6166 case IXGBE_82599_VMDQ_4Q_MASK: 6167 gpie |= IXGBE_GPIE_VTMODE_32; 6168 break; 6169 default: 6170 gpie |= IXGBE_GPIE_VTMODE_64; 6171 break; 6172 } 6173 } 6174 6175 /* Enable Thermal over heat sensor interrupt */ 6176 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) { 6177 switch (adapter->hw.mac.type) { 6178 case ixgbe_mac_82599EB: 6179 gpie |= IXGBE_SDP0_GPIEN_8259X; 6180 break; 6181 default: 6182 break; 6183 } 6184 } 6185 6186 /* Enable fan failure interrupt */ 6187 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) 6188 gpie |= IXGBE_SDP1_GPIEN(hw); 6189 6190 switch (hw->mac.type) { 6191 case ixgbe_mac_82599EB: 6192 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X; 6193 break; 6194 case ixgbe_mac_X550EM_x: 6195 case ixgbe_mac_x550em_a: 6196 gpie |= IXGBE_SDP0_GPIEN_X540; 6197 break; 6198 default: 6199 break; 6200 } 6201 6202 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 6203 } 6204 6205 static void ixgbe_up_complete(struct ixgbe_adapter *adapter) 6206 { 6207 struct ixgbe_hw *hw = &adapter->hw; 6208 int err; 6209 u32 ctrl_ext; 6210 6211 ixgbe_get_hw_control(adapter); 6212 ixgbe_setup_gpie(adapter); 6213 6214 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) 6215 ixgbe_configure_msix(adapter); 6216 else 6217 ixgbe_configure_msi_and_legacy(adapter); 6218 6219 /* enable the optics for 82599 SFP+ fiber */ 6220 if (hw->mac.ops.enable_tx_laser) 6221 hw->mac.ops.enable_tx_laser(hw); 6222 6223 if (hw->phy.ops.set_phy_power) 6224 hw->phy.ops.set_phy_power(hw, true); 6225 6226 smp_mb__before_atomic(); 6227 clear_bit(__IXGBE_DOWN, &adapter->state); 6228 ixgbe_napi_enable_all(adapter); 6229 6230 if (ixgbe_is_sfp(hw)) { 6231 ixgbe_sfp_link_config(adapter); 6232 } else { 6233 err = ixgbe_non_sfp_link_config(hw); 6234 if (err) 6235 e_err(probe, "link_config FAILED %d\n", err); 6236 } 6237 6238 /* clear any pending interrupts, may auto mask */ 6239 IXGBE_READ_REG(hw, IXGBE_EICR); 6240 ixgbe_irq_enable(adapter, true, true); 6241 6242 /* 6243 * If this adapter has a fan, check to see if we had a failure 6244 * before we enabled the interrupt. 6245 */ 6246 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) { 6247 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 6248 if (esdp & IXGBE_ESDP_SDP1) 6249 e_crit(drv, "Fan has stopped, replace the adapter\n"); 6250 } 6251 6252 /* bring the link up in the watchdog, this could race with our first 6253 * link up interrupt but shouldn't be a problem */ 6254 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; 6255 adapter->link_check_timeout = jiffies; 6256 mod_timer(&adapter->service_timer, jiffies); 6257 6258 ixgbe_clear_vf_stats_counters(adapter); 6259 /* Set PF Reset Done bit so PF/VF Mail Ops can work */ 6260 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 6261 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 6262 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 6263 6264 /* update setting rx tx for all active vfs */ 6265 ixgbe_set_all_vfs(adapter); 6266 } 6267 6268 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter) 6269 { 6270 /* put off any impending NetWatchDogTimeout */ 6271 netif_trans_update(adapter->netdev); 6272 6273 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) 6274 usleep_range(1000, 2000); 6275 if (adapter->hw.phy.type == ixgbe_phy_fw) 6276 ixgbe_watchdog_link_is_down(adapter); 6277 ixgbe_down(adapter); 6278 /* 6279 * If SR-IOV enabled then wait a bit before bringing the adapter 6280 * back up to give the VFs time to respond to the reset. The 6281 * two second wait is based upon the watchdog timer cycle in 6282 * the VF driver. 6283 */ 6284 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 6285 msleep(2000); 6286 ixgbe_up(adapter); 6287 clear_bit(__IXGBE_RESETTING, &adapter->state); 6288 } 6289 6290 void ixgbe_up(struct ixgbe_adapter *adapter) 6291 { 6292 /* hardware has been reset, we need to reload some things */ 6293 ixgbe_configure(adapter); 6294 6295 ixgbe_up_complete(adapter); 6296 } 6297 6298 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter) 6299 { 6300 u16 devctl2; 6301 6302 pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2); 6303 6304 switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) { 6305 case IXGBE_PCIDEVCTRL2_17_34s: 6306 case IXGBE_PCIDEVCTRL2_4_8s: 6307 /* For now we cap the upper limit on delay to 2 seconds 6308 * as we end up going up to 34 seconds of delay in worst 6309 * case timeout value. 6310 */ 6311 case IXGBE_PCIDEVCTRL2_1_2s: 6312 return 2000000ul; /* 2.0 s */ 6313 case IXGBE_PCIDEVCTRL2_260_520ms: 6314 return 520000ul; /* 520 ms */ 6315 case IXGBE_PCIDEVCTRL2_65_130ms: 6316 return 130000ul; /* 130 ms */ 6317 case IXGBE_PCIDEVCTRL2_16_32ms: 6318 return 32000ul; /* 32 ms */ 6319 case IXGBE_PCIDEVCTRL2_1_2ms: 6320 return 2000ul; /* 2 ms */ 6321 case IXGBE_PCIDEVCTRL2_50_100us: 6322 return 100ul; /* 100 us */ 6323 case IXGBE_PCIDEVCTRL2_16_32ms_def: 6324 return 32000ul; /* 32 ms */ 6325 default: 6326 break; 6327 } 6328 6329 /* We shouldn't need to hit this path, but just in case default as 6330 * though completion timeout is not supported and support 32ms. 6331 */ 6332 return 32000ul; 6333 } 6334 6335 void ixgbe_disable_rx(struct ixgbe_adapter *adapter) 6336 { 6337 unsigned long wait_delay, delay_interval; 6338 struct ixgbe_hw *hw = &adapter->hw; 6339 int i, wait_loop; 6340 u32 rxdctl; 6341 6342 /* disable receives */ 6343 hw->mac.ops.disable_rx(hw); 6344 6345 if (ixgbe_removed(hw->hw_addr)) 6346 return; 6347 6348 /* disable all enabled Rx queues */ 6349 for (i = 0; i < adapter->num_rx_queues; i++) { 6350 struct ixgbe_ring *ring = adapter->rx_ring[i]; 6351 u8 reg_idx = ring->reg_idx; 6352 6353 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 6354 rxdctl &= ~IXGBE_RXDCTL_ENABLE; 6355 rxdctl |= IXGBE_RXDCTL_SWFLSH; 6356 6357 /* write value back with RXDCTL.ENABLE bit cleared */ 6358 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); 6359 } 6360 6361 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */ 6362 if (hw->mac.type == ixgbe_mac_82598EB && 6363 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) 6364 return; 6365 6366 /* Determine our minimum delay interval. We will increase this value 6367 * with each subsequent test. This way if the device returns quickly 6368 * we should spend as little time as possible waiting, however as 6369 * the time increases we will wait for larger periods of time. 6370 * 6371 * The trick here is that we increase the interval using the 6372 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result 6373 * of that wait is that it totals up to 100x whatever interval we 6374 * choose. Since our minimum wait is 100us we can just divide the 6375 * total timeout by 100 to get our minimum delay interval. 6376 */ 6377 delay_interval = ixgbe_get_completion_timeout(adapter) / 100; 6378 6379 wait_loop = IXGBE_MAX_RX_DESC_POLL; 6380 wait_delay = delay_interval; 6381 6382 while (wait_loop--) { 6383 usleep_range(wait_delay, wait_delay + 10); 6384 wait_delay += delay_interval * 2; 6385 rxdctl = 0; 6386 6387 /* OR together the reading of all the active RXDCTL registers, 6388 * and then test the result. We need the disable to complete 6389 * before we start freeing the memory and invalidating the 6390 * DMA mappings. 6391 */ 6392 for (i = 0; i < adapter->num_rx_queues; i++) { 6393 struct ixgbe_ring *ring = adapter->rx_ring[i]; 6394 u8 reg_idx = ring->reg_idx; 6395 6396 rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 6397 } 6398 6399 if (!(rxdctl & IXGBE_RXDCTL_ENABLE)) 6400 return; 6401 } 6402 6403 e_err(drv, 6404 "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n"); 6405 } 6406 6407 void ixgbe_disable_tx(struct ixgbe_adapter *adapter) 6408 { 6409 unsigned long wait_delay, delay_interval; 6410 struct ixgbe_hw *hw = &adapter->hw; 6411 int i, wait_loop; 6412 u32 txdctl; 6413 6414 if (ixgbe_removed(hw->hw_addr)) 6415 return; 6416 6417 /* disable all enabled Tx queues */ 6418 for (i = 0; i < adapter->num_tx_queues; i++) { 6419 struct ixgbe_ring *ring = adapter->tx_ring[i]; 6420 u8 reg_idx = ring->reg_idx; 6421 6422 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); 6423 } 6424 6425 /* disable all enabled XDP Tx queues */ 6426 for (i = 0; i < adapter->num_xdp_queues; i++) { 6427 struct ixgbe_ring *ring = adapter->xdp_ring[i]; 6428 u8 reg_idx = ring->reg_idx; 6429 6430 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); 6431 } 6432 6433 /* If the link is not up there shouldn't be much in the way of 6434 * pending transactions. Those that are left will be flushed out 6435 * when the reset logic goes through the flush sequence to clean out 6436 * the pending Tx transactions. 6437 */ 6438 if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) 6439 goto dma_engine_disable; 6440 6441 /* Determine our minimum delay interval. We will increase this value 6442 * with each subsequent test. This way if the device returns quickly 6443 * we should spend as little time as possible waiting, however as 6444 * the time increases we will wait for larger periods of time. 6445 * 6446 * The trick here is that we increase the interval using the 6447 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result 6448 * of that wait is that it totals up to 100x whatever interval we 6449 * choose. Since our minimum wait is 100us we can just divide the 6450 * total timeout by 100 to get our minimum delay interval. 6451 */ 6452 delay_interval = ixgbe_get_completion_timeout(adapter) / 100; 6453 6454 wait_loop = IXGBE_MAX_RX_DESC_POLL; 6455 wait_delay = delay_interval; 6456 6457 while (wait_loop--) { 6458 usleep_range(wait_delay, wait_delay + 10); 6459 wait_delay += delay_interval * 2; 6460 txdctl = 0; 6461 6462 /* OR together the reading of all the active TXDCTL registers, 6463 * and then test the result. We need the disable to complete 6464 * before we start freeing the memory and invalidating the 6465 * DMA mappings. 6466 */ 6467 for (i = 0; i < adapter->num_tx_queues; i++) { 6468 struct ixgbe_ring *ring = adapter->tx_ring[i]; 6469 u8 reg_idx = ring->reg_idx; 6470 6471 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); 6472 } 6473 for (i = 0; i < adapter->num_xdp_queues; i++) { 6474 struct ixgbe_ring *ring = adapter->xdp_ring[i]; 6475 u8 reg_idx = ring->reg_idx; 6476 6477 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); 6478 } 6479 6480 if (!(txdctl & IXGBE_TXDCTL_ENABLE)) 6481 goto dma_engine_disable; 6482 } 6483 6484 e_err(drv, 6485 "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n"); 6486 6487 dma_engine_disable: 6488 /* Disable the Tx DMA engine on 82599 and later MAC */ 6489 switch (hw->mac.type) { 6490 case ixgbe_mac_82599EB: 6491 case ixgbe_mac_X540: 6492 case ixgbe_mac_X550: 6493 case ixgbe_mac_X550EM_x: 6494 case ixgbe_mac_x550em_a: 6495 case ixgbe_mac_e610: 6496 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, 6497 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) & 6498 ~IXGBE_DMATXCTL_TE)); 6499 fallthrough; 6500 default: 6501 break; 6502 } 6503 } 6504 6505 void ixgbe_reset(struct ixgbe_adapter *adapter) 6506 { 6507 struct ixgbe_hw *hw = &adapter->hw; 6508 struct net_device *netdev = adapter->netdev; 6509 int err; 6510 6511 if (ixgbe_removed(hw->hw_addr)) 6512 return; 6513 /* lock SFP init bit to prevent race conditions with the watchdog */ 6514 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 6515 usleep_range(1000, 2000); 6516 6517 /* clear all SFP and link config related flags while holding SFP_INIT */ 6518 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP | 6519 IXGBE_FLAG2_SFP_NEEDS_RESET); 6520 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG; 6521 6522 err = hw->mac.ops.init_hw(hw); 6523 switch (err) { 6524 case 0: 6525 case -ENOENT: 6526 case -EOPNOTSUPP: 6527 break; 6528 case -EALREADY: 6529 e_dev_err("primary disable timed out\n"); 6530 break; 6531 case -EACCES: 6532 /* We are running on a pre-production device, log a warning */ 6533 e_dev_warn("This device is a pre-production adapter/LOM. " 6534 "Please be aware there may be issues associated with " 6535 "your hardware. If you are experiencing problems " 6536 "please contact your Intel or hardware " 6537 "representative who provided you with this " 6538 "hardware.\n"); 6539 break; 6540 default: 6541 e_dev_err("Hardware Error: %d\n", err); 6542 } 6543 6544 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 6545 6546 /* flush entries out of MAC table */ 6547 ixgbe_flush_sw_mac_table(adapter); 6548 __dev_uc_unsync(netdev, NULL); 6549 6550 /* do not flush user set addresses */ 6551 ixgbe_mac_set_default_filter(adapter); 6552 6553 /* update SAN MAC vmdq pool selection */ 6554 if (hw->mac.san_mac_rar_index) 6555 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0)); 6556 6557 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) 6558 ixgbe_ptp_reset(adapter); 6559 6560 if (hw->phy.ops.set_phy_power) { 6561 if (!netif_running(adapter->netdev) && !adapter->wol) 6562 hw->phy.ops.set_phy_power(hw, false); 6563 else 6564 hw->phy.ops.set_phy_power(hw, true); 6565 } 6566 } 6567 6568 /** 6569 * ixgbe_clean_tx_ring - Free Tx Buffers 6570 * @tx_ring: ring to be cleaned 6571 **/ 6572 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring) 6573 { 6574 u16 i = tx_ring->next_to_clean; 6575 struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i]; 6576 6577 if (tx_ring->xsk_pool) { 6578 ixgbe_xsk_clean_tx_ring(tx_ring); 6579 goto out; 6580 } 6581 6582 while (i != tx_ring->next_to_use) { 6583 union ixgbe_adv_tx_desc *eop_desc, *tx_desc; 6584 6585 /* Free all the Tx ring sk_buffs */ 6586 if (ring_is_xdp(tx_ring)) 6587 xdp_return_frame(tx_buffer->xdpf); 6588 else 6589 dev_kfree_skb_any(tx_buffer->skb); 6590 6591 /* unmap skb header data */ 6592 dma_unmap_single(tx_ring->dev, 6593 dma_unmap_addr(tx_buffer, dma), 6594 dma_unmap_len(tx_buffer, len), 6595 DMA_TO_DEVICE); 6596 6597 /* check for eop_desc to determine the end of the packet */ 6598 eop_desc = tx_buffer->next_to_watch; 6599 tx_desc = IXGBE_TX_DESC(tx_ring, i); 6600 6601 /* unmap remaining buffers */ 6602 while (tx_desc != eop_desc) { 6603 tx_buffer++; 6604 tx_desc++; 6605 i++; 6606 if (unlikely(i == tx_ring->count)) { 6607 i = 0; 6608 tx_buffer = tx_ring->tx_buffer_info; 6609 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 6610 } 6611 6612 /* unmap any remaining paged data */ 6613 if (dma_unmap_len(tx_buffer, len)) 6614 dma_unmap_page(tx_ring->dev, 6615 dma_unmap_addr(tx_buffer, dma), 6616 dma_unmap_len(tx_buffer, len), 6617 DMA_TO_DEVICE); 6618 } 6619 6620 /* move us one more past the eop_desc for start of next pkt */ 6621 tx_buffer++; 6622 i++; 6623 if (unlikely(i == tx_ring->count)) { 6624 i = 0; 6625 tx_buffer = tx_ring->tx_buffer_info; 6626 } 6627 } 6628 6629 /* reset BQL for queue */ 6630 if (!ring_is_xdp(tx_ring)) 6631 netdev_tx_reset_queue(txring_txq(tx_ring)); 6632 6633 out: 6634 /* reset next_to_use and next_to_clean */ 6635 tx_ring->next_to_use = 0; 6636 tx_ring->next_to_clean = 0; 6637 } 6638 6639 /** 6640 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues 6641 * @adapter: board private structure 6642 **/ 6643 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter) 6644 { 6645 int i; 6646 6647 for (i = 0; i < adapter->num_rx_queues; i++) 6648 ixgbe_clean_rx_ring(adapter->rx_ring[i]); 6649 } 6650 6651 /** 6652 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues 6653 * @adapter: board private structure 6654 **/ 6655 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter) 6656 { 6657 int i; 6658 6659 for (i = 0; i < adapter->num_tx_queues; i++) 6660 ixgbe_clean_tx_ring(adapter->tx_ring[i]); 6661 for (i = 0; i < adapter->num_xdp_queues; i++) 6662 ixgbe_clean_tx_ring(adapter->xdp_ring[i]); 6663 } 6664 6665 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter) 6666 { 6667 struct hlist_node *node2; 6668 struct ixgbe_fdir_filter *filter; 6669 6670 spin_lock(&adapter->fdir_perfect_lock); 6671 6672 hlist_for_each_entry_safe(filter, node2, 6673 &adapter->fdir_filter_list, fdir_node) { 6674 hlist_del(&filter->fdir_node); 6675 kfree(filter); 6676 } 6677 adapter->fdir_filter_count = 0; 6678 6679 spin_unlock(&adapter->fdir_perfect_lock); 6680 } 6681 6682 void ixgbe_down(struct ixgbe_adapter *adapter) 6683 { 6684 struct net_device *netdev = adapter->netdev; 6685 struct ixgbe_hw *hw = &adapter->hw; 6686 int i; 6687 6688 /* signal that we are down to the interrupt handler */ 6689 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state)) 6690 return; /* do nothing if already down */ 6691 6692 /* Shut off incoming Tx traffic */ 6693 netif_tx_stop_all_queues(netdev); 6694 6695 /* call carrier off first to avoid false dev_watchdog timeouts */ 6696 netif_carrier_off(netdev); 6697 netif_tx_disable(netdev); 6698 6699 /* Disable Rx */ 6700 ixgbe_disable_rx(adapter); 6701 6702 /* synchronize_rcu() needed for pending XDP buffers to drain */ 6703 if (adapter->xdp_ring[0]) 6704 synchronize_rcu(); 6705 6706 ixgbe_irq_disable(adapter); 6707 6708 ixgbe_napi_disable_all(adapter); 6709 6710 clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state); 6711 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT; 6712 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE; 6713 6714 timer_delete_sync(&adapter->service_timer); 6715 6716 if (adapter->num_vfs) { 6717 /* Clear EITR Select mapping */ 6718 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0); 6719 6720 /* Mark all the VFs as inactive */ 6721 for (i = 0 ; i < adapter->num_vfs; i++) 6722 adapter->vfinfo[i].clear_to_send = false; 6723 6724 /* update setting rx tx for all active vfs */ 6725 ixgbe_set_all_vfs(adapter); 6726 } 6727 6728 /* disable transmits in the hardware now that interrupts are off */ 6729 ixgbe_disable_tx(adapter); 6730 6731 if (!pci_channel_offline(adapter->pdev)) 6732 ixgbe_reset(adapter); 6733 6734 /* power down the optics for 82599 SFP+ fiber */ 6735 if (hw->mac.ops.disable_tx_laser) 6736 hw->mac.ops.disable_tx_laser(hw); 6737 6738 ixgbe_clean_all_tx_rings(adapter); 6739 ixgbe_clean_all_rx_rings(adapter); 6740 if (adapter->hw.mac.type == ixgbe_mac_e610) 6741 ixgbe_disable_link_status_events(adapter); 6742 } 6743 6744 /** 6745 * ixgbe_set_eee_capable - helper function to determine EEE support on X550 6746 * @adapter: board private structure 6747 */ 6748 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter) 6749 { 6750 struct ixgbe_hw *hw = &adapter->hw; 6751 6752 switch (hw->device_id) { 6753 case IXGBE_DEV_ID_X550EM_A_1G_T: 6754 case IXGBE_DEV_ID_X550EM_A_1G_T_L: 6755 if (!hw->phy.eee_speeds_supported) 6756 break; 6757 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE; 6758 if (!hw->phy.eee_speeds_advertised) 6759 break; 6760 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED; 6761 break; 6762 default: 6763 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE; 6764 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED; 6765 break; 6766 } 6767 } 6768 6769 /** 6770 * ixgbe_tx_timeout - Respond to a Tx Hang 6771 * @netdev: network interface device structure 6772 * @txqueue: queue number that timed out 6773 **/ 6774 static void ixgbe_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue) 6775 { 6776 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 6777 6778 /* Do the reset outside of interrupt context */ 6779 ixgbe_tx_timeout_reset(adapter); 6780 } 6781 6782 #ifdef CONFIG_IXGBE_DCB 6783 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter) 6784 { 6785 struct ixgbe_hw *hw = &adapter->hw; 6786 struct tc_configuration *tc; 6787 int j; 6788 6789 switch (hw->mac.type) { 6790 case ixgbe_mac_82598EB: 6791 case ixgbe_mac_82599EB: 6792 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS; 6793 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS; 6794 break; 6795 case ixgbe_mac_X540: 6796 case ixgbe_mac_X550: 6797 case ixgbe_mac_e610: 6798 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS; 6799 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS; 6800 break; 6801 case ixgbe_mac_X550EM_x: 6802 case ixgbe_mac_x550em_a: 6803 default: 6804 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS; 6805 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS; 6806 break; 6807 } 6808 6809 /* Configure DCB traffic classes */ 6810 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) { 6811 tc = &adapter->dcb_cfg.tc_config[j]; 6812 tc->path[DCB_TX_CONFIG].bwg_id = 0; 6813 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1); 6814 tc->path[DCB_RX_CONFIG].bwg_id = 0; 6815 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1); 6816 tc->dcb_pfc = pfc_disabled; 6817 } 6818 6819 /* Initialize default user to priority mapping, UPx->TC0 */ 6820 tc = &adapter->dcb_cfg.tc_config[0]; 6821 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF; 6822 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF; 6823 6824 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100; 6825 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100; 6826 adapter->dcb_cfg.pfc_mode_enable = false; 6827 adapter->dcb_set_bitmap = 0x00; 6828 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE) 6829 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE; 6830 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg, 6831 sizeof(adapter->temp_dcb_cfg)); 6832 } 6833 #endif 6834 6835 /** 6836 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter) 6837 * @adapter: board private structure to initialize 6838 * @ii: pointer to ixgbe_info for device 6839 * 6840 * ixgbe_sw_init initializes the Adapter private data structure. 6841 * Fields are initialized based on PCI device information and 6842 * OS network device settings (MTU size). 6843 **/ 6844 static int ixgbe_sw_init(struct ixgbe_adapter *adapter, 6845 const struct ixgbe_info *ii) 6846 { 6847 struct ixgbe_hw *hw = &adapter->hw; 6848 struct pci_dev *pdev = adapter->pdev; 6849 unsigned int rss, fdir; 6850 u32 fwsm; 6851 int i; 6852 6853 /* PCI config space info */ 6854 6855 hw->vendor_id = pdev->vendor; 6856 hw->device_id = pdev->device; 6857 hw->revision_id = pdev->revision; 6858 hw->subsystem_vendor_id = pdev->subsystem_vendor; 6859 hw->subsystem_device_id = pdev->subsystem_device; 6860 6861 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME; 6862 6863 /* get_invariants needs the device IDs */ 6864 ii->get_invariants(hw); 6865 6866 /* Set common capability flags and settings */ 6867 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus()); 6868 adapter->ring_feature[RING_F_RSS].limit = rss; 6869 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE; 6870 adapter->max_q_vectors = MAX_Q_VECTORS_82599; 6871 adapter->atr_sample_rate = 20; 6872 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus()); 6873 adapter->ring_feature[RING_F_FDIR].limit = fdir; 6874 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K; 6875 adapter->ring_feature[RING_F_VMDQ].limit = 1; 6876 #ifdef CONFIG_IXGBE_DCA 6877 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE; 6878 #endif 6879 #ifdef CONFIG_IXGBE_DCB 6880 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE; 6881 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 6882 #endif 6883 #ifdef IXGBE_FCOE 6884 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE; 6885 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; 6886 #ifdef CONFIG_IXGBE_DCB 6887 /* Default traffic class to use for FCoE */ 6888 adapter->fcoe.up = IXGBE_FCOE_DEFTC; 6889 #endif /* CONFIG_IXGBE_DCB */ 6890 #endif /* IXGBE_FCOE */ 6891 6892 /* initialize static ixgbe jump table entries */ 6893 adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]), 6894 GFP_KERNEL); 6895 if (!adapter->jump_tables[0]) 6896 return -ENOMEM; 6897 adapter->jump_tables[0]->mat = ixgbe_ipv4_fields; 6898 6899 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) 6900 adapter->jump_tables[i] = NULL; 6901 6902 adapter->mac_table = kcalloc(hw->mac.num_rar_entries, 6903 sizeof(struct ixgbe_mac_addr), 6904 GFP_KERNEL); 6905 if (!adapter->mac_table) 6906 return -ENOMEM; 6907 6908 if (ixgbe_init_rss_key(adapter)) 6909 return -ENOMEM; 6910 6911 adapter->af_xdp_zc_qps = bitmap_zalloc(IXGBE_MAX_XDP_QS, GFP_KERNEL); 6912 if (!adapter->af_xdp_zc_qps) 6913 return -ENOMEM; 6914 6915 /* Set MAC specific capability flags and exceptions */ 6916 switch (hw->mac.type) { 6917 case ixgbe_mac_82598EB: 6918 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE; 6919 6920 if (hw->device_id == IXGBE_DEV_ID_82598AT) 6921 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE; 6922 6923 adapter->max_q_vectors = MAX_Q_VECTORS_82598; 6924 adapter->ring_feature[RING_F_FDIR].limit = 0; 6925 adapter->atr_sample_rate = 0; 6926 adapter->fdir_pballoc = 0; 6927 #ifdef IXGBE_FCOE 6928 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE; 6929 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; 6930 #ifdef CONFIG_IXGBE_DCB 6931 adapter->fcoe.up = 0; 6932 #endif /* IXGBE_DCB */ 6933 #endif /* IXGBE_FCOE */ 6934 break; 6935 case ixgbe_mac_82599EB: 6936 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM) 6937 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; 6938 break; 6939 case ixgbe_mac_X540: 6940 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw)); 6941 if (fwsm & IXGBE_FWSM_TS_ENABLED) 6942 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; 6943 break; 6944 case ixgbe_mac_x550em_a: 6945 switch (hw->device_id) { 6946 case IXGBE_DEV_ID_X550EM_A_1G_T: 6947 case IXGBE_DEV_ID_X550EM_A_1G_T_L: 6948 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; 6949 break; 6950 default: 6951 break; 6952 } 6953 fallthrough; 6954 case ixgbe_mac_X550EM_x: 6955 #ifdef CONFIG_IXGBE_DCB 6956 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE; 6957 #endif 6958 #ifdef IXGBE_FCOE 6959 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE; 6960 #ifdef CONFIG_IXGBE_DCB 6961 adapter->fcoe.up = 0; 6962 #endif /* IXGBE_DCB */ 6963 #endif /* IXGBE_FCOE */ 6964 fallthrough; 6965 case ixgbe_mac_X550: 6966 if (hw->mac.type == ixgbe_mac_X550) 6967 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; 6968 #ifdef CONFIG_IXGBE_DCA 6969 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE; 6970 #endif 6971 break; 6972 default: 6973 break; 6974 } 6975 6976 /* Make sure the SWFW semaphore is in a valid state */ 6977 if (hw->mac.ops.init_swfw_sync) 6978 hw->mac.ops.init_swfw_sync(hw); 6979 6980 if (hw->mac.type == ixgbe_mac_e610) 6981 mutex_init(&hw->aci.lock); 6982 6983 #ifdef IXGBE_FCOE 6984 /* FCoE support exists, always init the FCoE lock */ 6985 spin_lock_init(&adapter->fcoe.lock); 6986 6987 #endif 6988 /* n-tuple support exists, always init our spinlock */ 6989 spin_lock_init(&adapter->fdir_perfect_lock); 6990 6991 /* init spinlock to avoid concurrency of VF resources */ 6992 spin_lock_init(&adapter->vfs_lock); 6993 6994 #ifdef CONFIG_IXGBE_DCB 6995 ixgbe_init_dcb(adapter); 6996 #endif 6997 ixgbe_init_ipsec_offload(adapter); 6998 6999 /* default flow control settings */ 7000 hw->fc.requested_mode = ixgbe_fc_full; 7001 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */ 7002 ixgbe_pbthresh_setup(adapter); 7003 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE; 7004 hw->fc.send_xon = true; 7005 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw); 7006 7007 #ifdef CONFIG_PCI_IOV 7008 if (max_vfs > 0) 7009 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n"); 7010 7011 /* assign number of SR-IOV VFs */ 7012 if (hw->mac.type != ixgbe_mac_82598EB) { 7013 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) { 7014 max_vfs = 0; 7015 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n"); 7016 } 7017 } 7018 #endif /* CONFIG_PCI_IOV */ 7019 7020 /* enable itr by default in dynamic mode */ 7021 adapter->rx_itr_setting = 1; 7022 adapter->tx_itr_setting = 1; 7023 7024 /* set default ring sizes */ 7025 adapter->tx_ring_count = IXGBE_DEFAULT_TXD; 7026 adapter->rx_ring_count = IXGBE_DEFAULT_RXD; 7027 7028 /* set default work limits */ 7029 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK; 7030 7031 /* initialize eeprom parameters */ 7032 if (hw->eeprom.ops.init_params(hw)) { 7033 e_dev_err("EEPROM initialization failed\n"); 7034 return -EIO; 7035 } 7036 7037 /* PF holds first pool slot */ 7038 set_bit(0, adapter->fwd_bitmask); 7039 set_bit(__IXGBE_DOWN, &adapter->state); 7040 7041 /* enable locking for XDP_TX if we have more CPUs than queues */ 7042 if (nr_cpu_ids > IXGBE_MAX_XDP_QS) 7043 static_branch_enable(&ixgbe_xdp_locking_key); 7044 7045 return 0; 7046 } 7047 7048 /** 7049 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors) 7050 * @tx_ring: tx descriptor ring (for a specific queue) to setup 7051 * 7052 * Return 0 on success, negative on failure 7053 **/ 7054 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring) 7055 { 7056 struct device *dev = tx_ring->dev; 7057 int orig_node = dev_to_node(dev); 7058 int ring_node = NUMA_NO_NODE; 7059 int size; 7060 7061 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count; 7062 7063 if (tx_ring->q_vector) 7064 ring_node = tx_ring->q_vector->numa_node; 7065 7066 tx_ring->tx_buffer_info = vmalloc_node(size, ring_node); 7067 if (!tx_ring->tx_buffer_info) 7068 tx_ring->tx_buffer_info = vmalloc(size); 7069 if (!tx_ring->tx_buffer_info) 7070 goto err; 7071 7072 /* round up to nearest 4K */ 7073 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc); 7074 tx_ring->size = ALIGN(tx_ring->size, 4096); 7075 7076 set_dev_node(dev, ring_node); 7077 tx_ring->desc = dma_alloc_coherent(dev, 7078 tx_ring->size, 7079 &tx_ring->dma, 7080 GFP_KERNEL); 7081 set_dev_node(dev, orig_node); 7082 if (!tx_ring->desc) 7083 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size, 7084 &tx_ring->dma, GFP_KERNEL); 7085 if (!tx_ring->desc) 7086 goto err; 7087 7088 tx_ring->next_to_use = 0; 7089 tx_ring->next_to_clean = 0; 7090 return 0; 7091 7092 err: 7093 vfree(tx_ring->tx_buffer_info); 7094 tx_ring->tx_buffer_info = NULL; 7095 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n"); 7096 return -ENOMEM; 7097 } 7098 7099 /** 7100 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources 7101 * @adapter: board private structure 7102 * 7103 * If this function returns with an error, then it's possible one or 7104 * more of the rings is populated (while the rest are not). It is the 7105 * callers duty to clean those orphaned rings. 7106 * 7107 * Return 0 on success, negative on failure 7108 **/ 7109 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter) 7110 { 7111 int i, j = 0, err = 0; 7112 7113 for (i = 0; i < adapter->num_tx_queues; i++) { 7114 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]); 7115 if (!err) 7116 continue; 7117 7118 e_err(probe, "Allocation for Tx Queue %u failed\n", i); 7119 goto err_setup_tx; 7120 } 7121 for (j = 0; j < adapter->num_xdp_queues; j++) { 7122 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]); 7123 if (!err) 7124 continue; 7125 7126 e_err(probe, "Allocation for Tx Queue %u failed\n", j); 7127 goto err_setup_tx; 7128 } 7129 7130 return 0; 7131 err_setup_tx: 7132 /* rewind the index freeing the rings as we go */ 7133 while (j--) 7134 ixgbe_free_tx_resources(adapter->xdp_ring[j]); 7135 while (i--) 7136 ixgbe_free_tx_resources(adapter->tx_ring[i]); 7137 return err; 7138 } 7139 7140 static int ixgbe_rx_napi_id(struct ixgbe_ring *rx_ring) 7141 { 7142 struct ixgbe_q_vector *q_vector = rx_ring->q_vector; 7143 7144 return q_vector ? q_vector->napi.napi_id : 0; 7145 } 7146 7147 /** 7148 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors) 7149 * @adapter: pointer to ixgbe_adapter 7150 * @rx_ring: rx descriptor ring (for a specific queue) to setup 7151 * 7152 * Returns 0 on success, negative on failure 7153 **/ 7154 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter, 7155 struct ixgbe_ring *rx_ring) 7156 { 7157 struct device *dev = rx_ring->dev; 7158 int orig_node = dev_to_node(dev); 7159 int ring_node = NUMA_NO_NODE; 7160 int size; 7161 7162 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count; 7163 7164 if (rx_ring->q_vector) 7165 ring_node = rx_ring->q_vector->numa_node; 7166 7167 rx_ring->rx_buffer_info = vmalloc_node(size, ring_node); 7168 if (!rx_ring->rx_buffer_info) 7169 rx_ring->rx_buffer_info = vmalloc(size); 7170 if (!rx_ring->rx_buffer_info) 7171 goto err; 7172 7173 /* Round up to nearest 4K */ 7174 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc); 7175 rx_ring->size = ALIGN(rx_ring->size, 4096); 7176 7177 set_dev_node(dev, ring_node); 7178 rx_ring->desc = dma_alloc_coherent(dev, 7179 rx_ring->size, 7180 &rx_ring->dma, 7181 GFP_KERNEL); 7182 set_dev_node(dev, orig_node); 7183 if (!rx_ring->desc) 7184 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size, 7185 &rx_ring->dma, GFP_KERNEL); 7186 if (!rx_ring->desc) 7187 goto err; 7188 7189 rx_ring->next_to_clean = 0; 7190 rx_ring->next_to_use = 0; 7191 7192 /* XDP RX-queue info */ 7193 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev, 7194 rx_ring->queue_index, ixgbe_rx_napi_id(rx_ring)) < 0) 7195 goto err; 7196 7197 WRITE_ONCE(rx_ring->xdp_prog, adapter->xdp_prog); 7198 7199 return 0; 7200 err: 7201 vfree(rx_ring->rx_buffer_info); 7202 rx_ring->rx_buffer_info = NULL; 7203 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n"); 7204 return -ENOMEM; 7205 } 7206 7207 /** 7208 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources 7209 * @adapter: board private structure 7210 * 7211 * If this function returns with an error, then it's possible one or 7212 * more of the rings is populated (while the rest are not). It is the 7213 * callers duty to clean those orphaned rings. 7214 * 7215 * Return 0 on success, negative on failure 7216 **/ 7217 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter) 7218 { 7219 int i, err = 0; 7220 7221 for (i = 0; i < adapter->num_rx_queues; i++) { 7222 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]); 7223 if (!err) 7224 continue; 7225 7226 e_err(probe, "Allocation for Rx Queue %u failed\n", i); 7227 goto err_setup_rx; 7228 } 7229 7230 #ifdef IXGBE_FCOE 7231 err = ixgbe_setup_fcoe_ddp_resources(adapter); 7232 if (!err) 7233 #endif 7234 return 0; 7235 err_setup_rx: 7236 /* rewind the index freeing the rings as we go */ 7237 while (i--) 7238 ixgbe_free_rx_resources(adapter->rx_ring[i]); 7239 return err; 7240 } 7241 7242 /** 7243 * ixgbe_free_tx_resources - Free Tx Resources per Queue 7244 * @tx_ring: Tx descriptor ring for a specific queue 7245 * 7246 * Free all transmit software resources 7247 **/ 7248 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring) 7249 { 7250 ixgbe_clean_tx_ring(tx_ring); 7251 7252 vfree(tx_ring->tx_buffer_info); 7253 tx_ring->tx_buffer_info = NULL; 7254 7255 /* if not set, then don't free */ 7256 if (!tx_ring->desc) 7257 return; 7258 7259 dma_free_coherent(tx_ring->dev, tx_ring->size, 7260 tx_ring->desc, tx_ring->dma); 7261 7262 tx_ring->desc = NULL; 7263 } 7264 7265 /** 7266 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues 7267 * @adapter: board private structure 7268 * 7269 * Free all transmit software resources 7270 **/ 7271 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter) 7272 { 7273 int i; 7274 7275 for (i = 0; i < adapter->num_tx_queues; i++) 7276 if (adapter->tx_ring[i]->desc) 7277 ixgbe_free_tx_resources(adapter->tx_ring[i]); 7278 for (i = 0; i < adapter->num_xdp_queues; i++) 7279 if (adapter->xdp_ring[i]->desc) 7280 ixgbe_free_tx_resources(adapter->xdp_ring[i]); 7281 } 7282 7283 /** 7284 * ixgbe_free_rx_resources - Free Rx Resources 7285 * @rx_ring: ring to clean the resources from 7286 * 7287 * Free all receive software resources 7288 **/ 7289 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring) 7290 { 7291 ixgbe_clean_rx_ring(rx_ring); 7292 7293 rx_ring->xdp_prog = NULL; 7294 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 7295 vfree(rx_ring->rx_buffer_info); 7296 rx_ring->rx_buffer_info = NULL; 7297 7298 /* if not set, then don't free */ 7299 if (!rx_ring->desc) 7300 return; 7301 7302 dma_free_coherent(rx_ring->dev, rx_ring->size, 7303 rx_ring->desc, rx_ring->dma); 7304 7305 rx_ring->desc = NULL; 7306 } 7307 7308 /** 7309 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues 7310 * @adapter: board private structure 7311 * 7312 * Free all receive software resources 7313 **/ 7314 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter) 7315 { 7316 int i; 7317 7318 #ifdef IXGBE_FCOE 7319 ixgbe_free_fcoe_ddp_resources(adapter); 7320 7321 #endif 7322 for (i = 0; i < adapter->num_rx_queues; i++) 7323 if (adapter->rx_ring[i]->desc) 7324 ixgbe_free_rx_resources(adapter->rx_ring[i]); 7325 } 7326 7327 /** 7328 * ixgbe_max_xdp_frame_size - returns the maximum allowed frame size for XDP 7329 * @adapter: device handle, pointer to adapter 7330 */ 7331 static int ixgbe_max_xdp_frame_size(struct ixgbe_adapter *adapter) 7332 { 7333 if (PAGE_SIZE >= 8192 || adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) 7334 return IXGBE_RXBUFFER_2K; 7335 else 7336 return IXGBE_RXBUFFER_3K; 7337 } 7338 7339 /** 7340 * ixgbe_change_mtu - Change the Maximum Transfer Unit 7341 * @netdev: network interface device structure 7342 * @new_mtu: new value for maximum frame size 7343 * 7344 * Returns 0 on success, negative on failure 7345 **/ 7346 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu) 7347 { 7348 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 7349 7350 if (ixgbe_enabled_xdp_adapter(adapter)) { 7351 int new_frame_size = new_mtu + IXGBE_PKT_HDR_PAD; 7352 7353 if (new_frame_size > ixgbe_max_xdp_frame_size(adapter)) { 7354 e_warn(probe, "Requested MTU size is not supported with XDP\n"); 7355 return -EINVAL; 7356 } 7357 } 7358 7359 /* 7360 * For 82599EB we cannot allow legacy VFs to enable their receive 7361 * paths when MTU greater than 1500 is configured. So display a 7362 * warning that legacy VFs will be disabled. 7363 */ 7364 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && 7365 (adapter->hw.mac.type == ixgbe_mac_82599EB) && 7366 (new_mtu > ETH_DATA_LEN)) 7367 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n"); 7368 7369 netdev_dbg(netdev, "changing MTU from %d to %d\n", 7370 netdev->mtu, new_mtu); 7371 7372 /* must set new MTU before calling down or up */ 7373 WRITE_ONCE(netdev->mtu, new_mtu); 7374 7375 if (netif_running(netdev)) 7376 ixgbe_reinit_locked(adapter); 7377 7378 return 0; 7379 } 7380 7381 /** 7382 * ixgbe_open - Called when a network interface is made active 7383 * @netdev: network interface device structure 7384 * 7385 * Returns 0 on success, negative value on failure 7386 * 7387 * The open entry point is called when a network interface is made 7388 * active by the system (IFF_UP). At this point all resources needed 7389 * for transmit and receive operations are allocated, the interrupt 7390 * handler is registered with the OS, the watchdog timer is started, 7391 * and the stack is notified that the interface is ready. 7392 **/ 7393 int ixgbe_open(struct net_device *netdev) 7394 { 7395 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 7396 struct ixgbe_hw *hw = &adapter->hw; 7397 int err, queues; 7398 7399 /* disallow open during test */ 7400 if (test_bit(__IXGBE_TESTING, &adapter->state)) 7401 return -EBUSY; 7402 7403 netif_carrier_off(netdev); 7404 7405 /* allocate transmit descriptors */ 7406 err = ixgbe_setup_all_tx_resources(adapter); 7407 if (err) 7408 goto err_setup_tx; 7409 7410 /* allocate receive descriptors */ 7411 err = ixgbe_setup_all_rx_resources(adapter); 7412 if (err) 7413 goto err_setup_rx; 7414 7415 ixgbe_configure(adapter); 7416 7417 err = ixgbe_request_irq(adapter); 7418 if (err) 7419 goto err_req_irq; 7420 7421 /* Notify the stack of the actual queue counts. */ 7422 queues = adapter->num_tx_queues; 7423 err = netif_set_real_num_tx_queues(netdev, queues); 7424 if (err) 7425 goto err_set_queues; 7426 7427 queues = adapter->num_rx_queues; 7428 err = netif_set_real_num_rx_queues(netdev, queues); 7429 if (err) 7430 goto err_set_queues; 7431 7432 ixgbe_ptp_init(adapter); 7433 7434 ixgbe_up_complete(adapter); 7435 7436 udp_tunnel_nic_reset_ntf(netdev); 7437 if (adapter->hw.mac.type == ixgbe_mac_e610) { 7438 int err = ixgbe_update_link_info(&adapter->hw); 7439 7440 if (err) 7441 e_dev_err("Failed to update link info, err %d.\n", err); 7442 7443 ixgbe_check_link_cfg_err(adapter, 7444 adapter->hw.link.link_info.link_cfg_err); 7445 7446 err = ixgbe_non_sfp_link_config(&adapter->hw); 7447 if (ixgbe_non_sfp_link_config(&adapter->hw)) 7448 e_dev_err("Link setup failed, err %d.\n", err); 7449 } 7450 7451 return 0; 7452 7453 err_set_queues: 7454 ixgbe_free_irq(adapter); 7455 err_req_irq: 7456 ixgbe_free_all_rx_resources(adapter); 7457 if (hw->phy.ops.set_phy_power && !adapter->wol) 7458 hw->phy.ops.set_phy_power(&adapter->hw, false); 7459 err_setup_rx: 7460 ixgbe_free_all_tx_resources(adapter); 7461 err_setup_tx: 7462 ixgbe_reset(adapter); 7463 7464 return err; 7465 } 7466 7467 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter) 7468 { 7469 ixgbe_ptp_suspend(adapter); 7470 7471 if (adapter->hw.phy.ops.enter_lplu) { 7472 adapter->hw.phy.reset_disable = true; 7473 ixgbe_down(adapter); 7474 adapter->hw.phy.ops.enter_lplu(&adapter->hw); 7475 adapter->hw.phy.reset_disable = false; 7476 } else { 7477 ixgbe_down(adapter); 7478 } 7479 7480 ixgbe_free_irq(adapter); 7481 7482 ixgbe_free_all_tx_resources(adapter); 7483 ixgbe_free_all_rx_resources(adapter); 7484 } 7485 7486 /** 7487 * ixgbe_close - Disables a network interface 7488 * @netdev: network interface device structure 7489 * 7490 * Returns 0, this is not allowed to fail 7491 * 7492 * The close entry point is called when an interface is de-activated 7493 * by the OS. The hardware is still under the drivers control, but 7494 * needs to be disabled. A global MAC reset is issued to stop the 7495 * hardware, and all transmit and receive resources are freed. 7496 **/ 7497 int ixgbe_close(struct net_device *netdev) 7498 { 7499 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 7500 7501 ixgbe_ptp_stop(adapter); 7502 7503 if (netif_device_present(netdev)) 7504 ixgbe_close_suspend(adapter); 7505 7506 ixgbe_fdir_filter_exit(adapter); 7507 7508 ixgbe_release_hw_control(adapter); 7509 7510 return 0; 7511 } 7512 7513 static int ixgbe_resume(struct device *dev_d) 7514 { 7515 struct pci_dev *pdev = to_pci_dev(dev_d); 7516 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 7517 struct net_device *netdev = adapter->netdev; 7518 u32 err; 7519 7520 adapter->hw.hw_addr = adapter->io_addr; 7521 7522 err = pci_enable_device_mem(pdev); 7523 if (err) { 7524 e_dev_err("Cannot enable PCI device from suspend\n"); 7525 return err; 7526 } 7527 smp_mb__before_atomic(); 7528 clear_bit(__IXGBE_DISABLED, &adapter->state); 7529 pci_set_master(pdev); 7530 7531 device_wakeup_disable(dev_d); 7532 7533 ixgbe_reset(adapter); 7534 7535 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); 7536 7537 rtnl_lock(); 7538 err = ixgbe_init_interrupt_scheme(adapter); 7539 if (!err && netif_running(netdev)) 7540 err = ixgbe_open(netdev); 7541 7542 7543 if (!err) 7544 netif_device_attach(netdev); 7545 rtnl_unlock(); 7546 7547 return err; 7548 } 7549 7550 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake) 7551 { 7552 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 7553 struct net_device *netdev = adapter->netdev; 7554 struct ixgbe_hw *hw = &adapter->hw; 7555 u32 ctrl; 7556 u32 wufc = adapter->wol; 7557 7558 rtnl_lock(); 7559 netif_device_detach(netdev); 7560 7561 if (netif_running(netdev)) 7562 ixgbe_close_suspend(adapter); 7563 7564 ixgbe_clear_interrupt_scheme(adapter); 7565 rtnl_unlock(); 7566 7567 if (hw->mac.ops.stop_link_on_d3) 7568 hw->mac.ops.stop_link_on_d3(hw); 7569 7570 if (wufc) { 7571 u32 fctrl; 7572 7573 ixgbe_set_rx_mode(netdev); 7574 7575 /* enable the optics for 82599 SFP+ fiber as we can WoL */ 7576 if (hw->mac.ops.enable_tx_laser) 7577 hw->mac.ops.enable_tx_laser(hw); 7578 7579 /* enable the reception of multicast packets */ 7580 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 7581 fctrl |= IXGBE_FCTRL_MPE; 7582 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 7583 7584 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); 7585 ctrl |= IXGBE_CTRL_GIO_DIS; 7586 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); 7587 7588 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc); 7589 } else { 7590 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); 7591 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 7592 } 7593 7594 switch (hw->mac.type) { 7595 case ixgbe_mac_82598EB: 7596 pci_wake_from_d3(pdev, false); 7597 break; 7598 case ixgbe_mac_82599EB: 7599 case ixgbe_mac_X540: 7600 case ixgbe_mac_X550: 7601 case ixgbe_mac_X550EM_x: 7602 case ixgbe_mac_x550em_a: 7603 case ixgbe_mac_e610: 7604 pci_wake_from_d3(pdev, !!wufc); 7605 break; 7606 default: 7607 break; 7608 } 7609 7610 *enable_wake = !!wufc; 7611 if (hw->phy.ops.set_phy_power && !*enable_wake) 7612 hw->phy.ops.set_phy_power(hw, false); 7613 7614 ixgbe_release_hw_control(adapter); 7615 7616 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state)) 7617 pci_disable_device(pdev); 7618 7619 return 0; 7620 } 7621 7622 static int ixgbe_suspend(struct device *dev_d) 7623 { 7624 struct pci_dev *pdev = to_pci_dev(dev_d); 7625 int retval; 7626 bool wake; 7627 7628 retval = __ixgbe_shutdown(pdev, &wake); 7629 7630 device_set_wakeup_enable(dev_d, wake); 7631 7632 return retval; 7633 } 7634 7635 static void ixgbe_shutdown(struct pci_dev *pdev) 7636 { 7637 bool wake; 7638 7639 __ixgbe_shutdown(pdev, &wake); 7640 7641 if (system_state == SYSTEM_POWER_OFF) { 7642 pci_wake_from_d3(pdev, wake); 7643 pci_set_power_state(pdev, PCI_D3hot); 7644 } 7645 } 7646 7647 /** 7648 * ixgbe_update_stats - Update the board statistics counters. 7649 * @adapter: board private structure 7650 **/ 7651 void ixgbe_update_stats(struct ixgbe_adapter *adapter) 7652 { 7653 struct net_device *netdev = adapter->netdev; 7654 struct ixgbe_hw *hw = &adapter->hw; 7655 struct ixgbe_hw_stats *hwstats = &adapter->stats; 7656 u64 total_mpc = 0; 7657 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot; 7658 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0; 7659 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0; 7660 u64 alloc_rx_page = 0; 7661 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0; 7662 7663 if (test_bit(__IXGBE_DOWN, &adapter->state) || 7664 test_bit(__IXGBE_RESETTING, &adapter->state)) 7665 return; 7666 7667 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { 7668 u64 rsc_count = 0; 7669 u64 rsc_flush = 0; 7670 for (i = 0; i < adapter->num_rx_queues; i++) { 7671 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count; 7672 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush; 7673 } 7674 adapter->rsc_total_count = rsc_count; 7675 adapter->rsc_total_flush = rsc_flush; 7676 } 7677 7678 for (i = 0; i < adapter->num_rx_queues; i++) { 7679 struct ixgbe_ring *rx_ring = READ_ONCE(adapter->rx_ring[i]); 7680 7681 if (!rx_ring) 7682 continue; 7683 non_eop_descs += rx_ring->rx_stats.non_eop_descs; 7684 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page; 7685 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed; 7686 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed; 7687 hw_csum_rx_error += rx_ring->rx_stats.csum_err; 7688 bytes += rx_ring->stats.bytes; 7689 packets += rx_ring->stats.packets; 7690 } 7691 adapter->non_eop_descs = non_eop_descs; 7692 adapter->alloc_rx_page = alloc_rx_page; 7693 adapter->alloc_rx_page_failed = alloc_rx_page_failed; 7694 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed; 7695 adapter->hw_csum_rx_error = hw_csum_rx_error; 7696 netdev->stats.rx_bytes = bytes; 7697 netdev->stats.rx_packets = packets; 7698 7699 bytes = 0; 7700 packets = 0; 7701 /* gather some stats to the adapter struct that are per queue */ 7702 for (i = 0; i < adapter->num_tx_queues; i++) { 7703 struct ixgbe_ring *tx_ring = READ_ONCE(adapter->tx_ring[i]); 7704 7705 if (!tx_ring) 7706 continue; 7707 restart_queue += tx_ring->tx_stats.restart_queue; 7708 tx_busy += tx_ring->tx_stats.tx_busy; 7709 bytes += tx_ring->stats.bytes; 7710 packets += tx_ring->stats.packets; 7711 } 7712 for (i = 0; i < adapter->num_xdp_queues; i++) { 7713 struct ixgbe_ring *xdp_ring = READ_ONCE(adapter->xdp_ring[i]); 7714 7715 if (!xdp_ring) 7716 continue; 7717 restart_queue += xdp_ring->tx_stats.restart_queue; 7718 tx_busy += xdp_ring->tx_stats.tx_busy; 7719 bytes += xdp_ring->stats.bytes; 7720 packets += xdp_ring->stats.packets; 7721 } 7722 adapter->restart_queue = restart_queue; 7723 adapter->tx_busy = tx_busy; 7724 netdev->stats.tx_bytes = bytes; 7725 netdev->stats.tx_packets = packets; 7726 7727 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 7728 7729 /* 8 register reads */ 7730 for (i = 0; i < 8; i++) { 7731 /* for packet buffers not used, the register should read 0 */ 7732 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i)); 7733 missed_rx += mpc; 7734 hwstats->mpc[i] += mpc; 7735 total_mpc += hwstats->mpc[i]; 7736 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i)); 7737 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i)); 7738 switch (hw->mac.type) { 7739 case ixgbe_mac_82598EB: 7740 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i)); 7741 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i)); 7742 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i)); 7743 hwstats->pxonrxc[i] += 7744 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i)); 7745 break; 7746 case ixgbe_mac_82599EB: 7747 case ixgbe_mac_X540: 7748 case ixgbe_mac_X550: 7749 case ixgbe_mac_X550EM_x: 7750 case ixgbe_mac_x550em_a: 7751 case ixgbe_mac_e610: 7752 hwstats->pxonrxc[i] += 7753 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i)); 7754 break; 7755 default: 7756 break; 7757 } 7758 } 7759 7760 /*16 register reads */ 7761 for (i = 0; i < 16; i++) { 7762 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 7763 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 7764 if (hw->mac.type == ixgbe_mac_82599EB || 7765 hw->mac.type == ixgbe_mac_X540 || 7766 hw->mac.type == ixgbe_mac_X550 || 7767 hw->mac.type == ixgbe_mac_X550EM_x || 7768 hw->mac.type == ixgbe_mac_x550em_a || 7769 hw->mac.type == ixgbe_mac_e610) { 7770 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)); 7771 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */ 7772 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)); 7773 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */ 7774 } 7775 } 7776 7777 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 7778 /* work around hardware counting issue */ 7779 hwstats->gprc -= missed_rx; 7780 7781 ixgbe_update_xoff_received(adapter); 7782 7783 /* 82598 hardware only has a 32 bit counter in the high register */ 7784 switch (hw->mac.type) { 7785 case ixgbe_mac_82598EB: 7786 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 7787 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 7788 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 7789 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); 7790 break; 7791 case ixgbe_mac_X540: 7792 case ixgbe_mac_X550: 7793 case ixgbe_mac_X550EM_x: 7794 case ixgbe_mac_x550em_a: 7795 case ixgbe_mac_e610: 7796 /* OS2BMC stats are X540 and later */ 7797 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC); 7798 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC); 7799 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC); 7800 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC); 7801 fallthrough; 7802 case ixgbe_mac_82599EB: 7803 for (i = 0; i < 16; i++) 7804 adapter->hw_rx_no_dma_resources += 7805 IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 7806 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL); 7807 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */ 7808 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL); 7809 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */ 7810 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL); 7811 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */ 7812 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 7813 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH); 7814 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS); 7815 #ifdef IXGBE_FCOE 7816 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 7817 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 7818 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 7819 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 7820 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 7821 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 7822 /* Add up per cpu counters for total ddp aloc fail */ 7823 if (adapter->fcoe.ddp_pool) { 7824 struct ixgbe_fcoe *fcoe = &adapter->fcoe; 7825 struct ixgbe_fcoe_ddp_pool *ddp_pool; 7826 unsigned int cpu; 7827 u64 noddp = 0, noddp_ext_buff = 0; 7828 for_each_possible_cpu(cpu) { 7829 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu); 7830 noddp += ddp_pool->noddp; 7831 noddp_ext_buff += ddp_pool->noddp_ext_buff; 7832 } 7833 hwstats->fcoe_noddp = noddp; 7834 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff; 7835 } 7836 #endif /* IXGBE_FCOE */ 7837 break; 7838 default: 7839 break; 7840 } 7841 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 7842 hwstats->bprc += bprc; 7843 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 7844 if (hw->mac.type == ixgbe_mac_82598EB) 7845 hwstats->mprc -= bprc; 7846 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC); 7847 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 7848 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 7849 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 7850 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 7851 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 7852 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 7853 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 7854 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 7855 hwstats->lxontxc += lxon; 7856 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 7857 hwstats->lxofftxc += lxoff; 7858 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 7859 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 7860 /* 7861 * 82598 errata - tx of flow control packets is included in tx counters 7862 */ 7863 xon_off_tot = lxon + lxoff; 7864 hwstats->gptc -= xon_off_tot; 7865 hwstats->mptc -= xon_off_tot; 7866 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN)); 7867 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 7868 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 7869 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 7870 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 7871 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 7872 hwstats->ptc64 -= xon_off_tot; 7873 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 7874 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 7875 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 7876 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 7877 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 7878 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 7879 7880 /* Fill out the OS statistics structure */ 7881 netdev->stats.multicast = hwstats->mprc; 7882 7883 /* Rx Errors */ 7884 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec; 7885 netdev->stats.rx_dropped = 0; 7886 netdev->stats.rx_length_errors = hwstats->rlec; 7887 netdev->stats.rx_crc_errors = hwstats->crcerrs; 7888 netdev->stats.rx_missed_errors = total_mpc; 7889 7890 /* VF Stats Collection - skip while resetting because these 7891 * are not clear on read and otherwise you'll sometimes get 7892 * crazy values. 7893 */ 7894 if (!test_bit(__IXGBE_RESETTING, &adapter->state)) { 7895 for (i = 0; i < adapter->num_vfs; i++) { 7896 UPDATE_VF_COUNTER_32bit(IXGBE_PVFGPRC(i), 7897 adapter->vfinfo[i].last_vfstats.gprc, 7898 adapter->vfinfo[i].vfstats.gprc); 7899 UPDATE_VF_COUNTER_32bit(IXGBE_PVFGPTC(i), 7900 adapter->vfinfo[i].last_vfstats.gptc, 7901 adapter->vfinfo[i].vfstats.gptc); 7902 UPDATE_VF_COUNTER_36bit(IXGBE_PVFGORC_LSB(i), 7903 IXGBE_PVFGORC_MSB(i), 7904 adapter->vfinfo[i].last_vfstats.gorc, 7905 adapter->vfinfo[i].vfstats.gorc); 7906 UPDATE_VF_COUNTER_36bit(IXGBE_PVFGOTC_LSB(i), 7907 IXGBE_PVFGOTC_MSB(i), 7908 adapter->vfinfo[i].last_vfstats.gotc, 7909 adapter->vfinfo[i].vfstats.gotc); 7910 UPDATE_VF_COUNTER_32bit(IXGBE_PVFMPRC(i), 7911 adapter->vfinfo[i].last_vfstats.mprc, 7912 adapter->vfinfo[i].vfstats.mprc); 7913 } 7914 } 7915 } 7916 7917 /** 7918 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table 7919 * @adapter: pointer to the device adapter structure 7920 **/ 7921 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter) 7922 { 7923 struct ixgbe_hw *hw = &adapter->hw; 7924 int i; 7925 7926 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT)) 7927 return; 7928 7929 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT; 7930 7931 /* if interface is down do nothing */ 7932 if (test_bit(__IXGBE_DOWN, &adapter->state)) 7933 return; 7934 7935 /* do nothing if we are not using signature filters */ 7936 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE)) 7937 return; 7938 7939 adapter->fdir_overflow++; 7940 7941 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) { 7942 for (i = 0; i < adapter->num_tx_queues; i++) 7943 set_bit(__IXGBE_TX_FDIR_INIT_DONE, 7944 &(adapter->tx_ring[i]->state)); 7945 for (i = 0; i < adapter->num_xdp_queues; i++) 7946 set_bit(__IXGBE_TX_FDIR_INIT_DONE, 7947 &adapter->xdp_ring[i]->state); 7948 /* re-enable flow director interrupts */ 7949 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); 7950 } else { 7951 e_err(probe, "failed to finish FDIR re-initialization, " 7952 "ignored adding FDIR ATR filters\n"); 7953 } 7954 } 7955 7956 /** 7957 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts 7958 * @adapter: pointer to the device adapter structure 7959 * 7960 * This function serves two purposes. First it strobes the interrupt lines 7961 * in order to make certain interrupts are occurring. Secondly it sets the 7962 * bits needed to check for TX hangs. As a result we should immediately 7963 * determine if a hang has occurred. 7964 */ 7965 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter) 7966 { 7967 struct ixgbe_hw *hw = &adapter->hw; 7968 u64 eics = 0; 7969 int i; 7970 7971 /* If we're down, removing or resetting, just bail */ 7972 if (test_bit(__IXGBE_DOWN, &adapter->state) || 7973 test_bit(__IXGBE_REMOVING, &adapter->state) || 7974 test_bit(__IXGBE_RESETTING, &adapter->state)) 7975 return; 7976 7977 /* Force detection of hung controller */ 7978 if (netif_carrier_ok(adapter->netdev)) 7979 for (i = 0; i < adapter->num_tx_queues; i++) 7980 set_check_for_tx_hang(adapter->tx_ring[i]); 7981 7982 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { 7983 /* 7984 * for legacy and MSI interrupts don't set any bits 7985 * that are enabled for EIAM, because this operation 7986 * would set *both* EIMS and EICS for any bit in EIAM 7987 */ 7988 IXGBE_WRITE_REG(hw, IXGBE_EICS, 7989 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER)); 7990 } else { 7991 /* get one bit for every active tx/rx interrupt vector */ 7992 for (i = 0; i < adapter->num_q_vectors; i++) { 7993 struct ixgbe_q_vector *qv = adapter->q_vector[i]; 7994 if (qv->rx.ring || qv->tx.ring) 7995 eics |= BIT_ULL(i); 7996 } 7997 } 7998 7999 /* Cause software interrupt to ensure rings are cleaned */ 8000 ixgbe_irq_rearm_queues(adapter, eics); 8001 } 8002 8003 /** 8004 * ixgbe_watchdog_update_link - update the link status 8005 * @adapter: pointer to the device adapter structure 8006 **/ 8007 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter) 8008 { 8009 struct ixgbe_hw *hw = &adapter->hw; 8010 u32 link_speed = adapter->link_speed; 8011 bool link_up = adapter->link_up; 8012 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable; 8013 8014 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)) 8015 return; 8016 8017 if (hw->mac.ops.check_link) { 8018 hw->mac.ops.check_link(hw, &link_speed, &link_up, false); 8019 } else { 8020 /* always assume link is up, if no check link function */ 8021 link_speed = IXGBE_LINK_SPEED_10GB_FULL; 8022 link_up = true; 8023 } 8024 8025 if (adapter->ixgbe_ieee_pfc) 8026 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en); 8027 8028 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) { 8029 hw->mac.ops.fc_enable(hw); 8030 ixgbe_set_rx_drop_en(adapter); 8031 } 8032 8033 if (link_up || 8034 time_after(jiffies, (adapter->link_check_timeout + 8035 IXGBE_TRY_LINK_TIMEOUT))) { 8036 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE; 8037 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC); 8038 IXGBE_WRITE_FLUSH(hw); 8039 } 8040 8041 adapter->link_up = link_up; 8042 adapter->link_speed = link_speed; 8043 } 8044 8045 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter) 8046 { 8047 #ifdef CONFIG_IXGBE_DCB 8048 struct net_device *netdev = adapter->netdev; 8049 struct dcb_app app = { 8050 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE, 8051 .protocol = 0, 8052 }; 8053 u8 up = 0; 8054 8055 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) 8056 up = dcb_ieee_getapp_mask(netdev, &app); 8057 8058 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0; 8059 #endif 8060 } 8061 8062 /** 8063 * ixgbe_watchdog_link_is_up - update netif_carrier status and 8064 * print link up message 8065 * @adapter: pointer to the device adapter structure 8066 **/ 8067 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter) 8068 { 8069 struct net_device *netdev = adapter->netdev; 8070 struct ixgbe_hw *hw = &adapter->hw; 8071 u32 link_speed = adapter->link_speed; 8072 const char *speed_str; 8073 bool flow_rx, flow_tx; 8074 8075 /* only continue if link was previously down */ 8076 if (netif_carrier_ok(netdev)) 8077 return; 8078 8079 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP; 8080 8081 switch (hw->mac.type) { 8082 case ixgbe_mac_82598EB: { 8083 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 8084 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS); 8085 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE); 8086 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X); 8087 } 8088 break; 8089 case ixgbe_mac_X540: 8090 case ixgbe_mac_X550: 8091 case ixgbe_mac_X550EM_x: 8092 case ixgbe_mac_x550em_a: 8093 case ixgbe_mac_e610: 8094 case ixgbe_mac_82599EB: { 8095 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN); 8096 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG); 8097 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE); 8098 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X); 8099 } 8100 break; 8101 default: 8102 flow_tx = false; 8103 flow_rx = false; 8104 break; 8105 } 8106 8107 adapter->last_rx_ptp_check = jiffies; 8108 8109 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) 8110 ixgbe_ptp_start_cyclecounter(adapter); 8111 8112 switch (link_speed) { 8113 case IXGBE_LINK_SPEED_10GB_FULL: 8114 speed_str = "10 Gbps"; 8115 break; 8116 case IXGBE_LINK_SPEED_5GB_FULL: 8117 speed_str = "5 Gbps"; 8118 break; 8119 case IXGBE_LINK_SPEED_2_5GB_FULL: 8120 speed_str = "2.5 Gbps"; 8121 break; 8122 case IXGBE_LINK_SPEED_1GB_FULL: 8123 speed_str = "1 Gbps"; 8124 break; 8125 case IXGBE_LINK_SPEED_100_FULL: 8126 speed_str = "100 Mbps"; 8127 break; 8128 case IXGBE_LINK_SPEED_10_FULL: 8129 speed_str = "10 Mbps"; 8130 break; 8131 default: 8132 speed_str = "unknown speed"; 8133 break; 8134 } 8135 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str, 8136 ((flow_rx && flow_tx) ? "RX/TX" : 8137 (flow_rx ? "RX" : 8138 (flow_tx ? "TX" : "None")))); 8139 8140 netif_carrier_on(netdev); 8141 ixgbe_check_vf_rate_limit(adapter); 8142 8143 if (adapter->num_vfs && hw->mac.ops.enable_mdd) 8144 hw->mac.ops.enable_mdd(hw); 8145 8146 /* enable transmits */ 8147 netif_tx_wake_all_queues(adapter->netdev); 8148 8149 /* update the default user priority for VFs */ 8150 ixgbe_update_default_up(adapter); 8151 8152 /* ping all the active vfs to let them know link has changed */ 8153 ixgbe_ping_all_vfs(adapter); 8154 } 8155 8156 /** 8157 * ixgbe_watchdog_link_is_down - update netif_carrier status and 8158 * print link down message 8159 * @adapter: pointer to the adapter structure 8160 **/ 8161 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter) 8162 { 8163 struct net_device *netdev = adapter->netdev; 8164 struct ixgbe_hw *hw = &adapter->hw; 8165 8166 adapter->link_up = false; 8167 adapter->link_speed = 0; 8168 8169 /* only continue if link was up previously */ 8170 if (!netif_carrier_ok(netdev)) 8171 return; 8172 8173 adapter->link_down_events++; 8174 8175 /* poll for SFP+ cable when link is down */ 8176 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB) 8177 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP; 8178 8179 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) 8180 ixgbe_ptp_start_cyclecounter(adapter); 8181 8182 e_info(drv, "NIC Link is Down\n"); 8183 netif_carrier_off(netdev); 8184 8185 /* ping all the active vfs to let them know link has changed */ 8186 ixgbe_ping_all_vfs(adapter); 8187 } 8188 8189 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter) 8190 { 8191 int i; 8192 8193 for (i = 0; i < adapter->num_tx_queues; i++) { 8194 struct ixgbe_ring *tx_ring = adapter->tx_ring[i]; 8195 8196 if (tx_ring->next_to_use != tx_ring->next_to_clean) 8197 return true; 8198 } 8199 8200 return false; 8201 } 8202 8203 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter) 8204 { 8205 struct ixgbe_hw *hw = &adapter->hw; 8206 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; 8207 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask); 8208 8209 int i, j; 8210 8211 if (!adapter->num_vfs) 8212 return false; 8213 8214 /* resetting the PF is only needed for MAC before X550 */ 8215 if (hw->mac.type >= ixgbe_mac_X550) 8216 return false; 8217 8218 for (i = 0; i < adapter->num_vfs; i++) { 8219 for (j = 0; j < q_per_pool; j++) { 8220 u32 h, t; 8221 8222 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j)); 8223 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j)); 8224 8225 if (h != t) 8226 return true; 8227 } 8228 } 8229 8230 return false; 8231 } 8232 8233 /** 8234 * ixgbe_watchdog_flush_tx - flush queues on link down 8235 * @adapter: pointer to the device adapter structure 8236 **/ 8237 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter) 8238 { 8239 if (!netif_carrier_ok(adapter->netdev)) { 8240 if (ixgbe_ring_tx_pending(adapter) || 8241 ixgbe_vf_tx_pending(adapter)) { 8242 /* We've lost link, so the controller stops DMA, 8243 * but we've got queued Tx work that's never going 8244 * to get done, so reset controller to flush Tx. 8245 * (Do the reset outside of interrupt context). 8246 */ 8247 e_warn(drv, "initiating reset to clear Tx work after link loss\n"); 8248 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state); 8249 } 8250 } 8251 } 8252 8253 #ifdef CONFIG_PCI_IOV 8254 static void ixgbe_bad_vf_abort(struct ixgbe_adapter *adapter, u32 vf) 8255 { 8256 struct ixgbe_hw *hw = &adapter->hw; 8257 8258 if (adapter->hw.mac.type == ixgbe_mac_82599EB && 8259 adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF) { 8260 adapter->vfinfo[vf].primary_abort_count++; 8261 if (adapter->vfinfo[vf].primary_abort_count == 8262 IXGBE_PRIMARY_ABORT_LIMIT) { 8263 ixgbe_set_vf_link_state(adapter, vf, 8264 IFLA_VF_LINK_STATE_DISABLE); 8265 adapter->vfinfo[vf].primary_abort_count = 0; 8266 8267 e_info(drv, 8268 "Malicious Driver Detection event detected on PF %d VF %d MAC: %pM mdd-disable-vf=on", 8269 hw->bus.func, vf, 8270 adapter->vfinfo[vf].vf_mac_addresses); 8271 } 8272 } 8273 } 8274 8275 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter) 8276 { 8277 struct ixgbe_hw *hw = &adapter->hw; 8278 struct pci_dev *pdev = adapter->pdev; 8279 unsigned int vf; 8280 u32 gpc; 8281 8282 if (!(netif_carrier_ok(adapter->netdev))) 8283 return; 8284 8285 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC); 8286 if (gpc) /* If incrementing then no need for the check below */ 8287 return; 8288 /* Check to see if a bad DMA write target from an errant or 8289 * malicious VF has caused a PCIe error. If so then we can 8290 * issue a VFLR to the offending VF(s) and then resume without 8291 * requesting a full slot reset. 8292 */ 8293 8294 if (!pdev) 8295 return; 8296 8297 /* check status reg for all VFs owned by this PF */ 8298 for (vf = 0; vf < adapter->num_vfs; ++vf) { 8299 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev; 8300 u16 status_reg; 8301 8302 if (!vfdev) 8303 continue; 8304 pci_read_config_word(vfdev, PCI_STATUS, &status_reg); 8305 if (status_reg != IXGBE_FAILED_READ_CFG_WORD && 8306 status_reg & PCI_STATUS_REC_MASTER_ABORT) { 8307 ixgbe_bad_vf_abort(adapter, vf); 8308 pcie_flr(vfdev); 8309 } 8310 } 8311 } 8312 8313 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter) 8314 { 8315 u32 ssvpc; 8316 8317 /* Do not perform spoof check for 82598 or if not in IOV mode */ 8318 if (adapter->hw.mac.type == ixgbe_mac_82598EB || 8319 adapter->num_vfs == 0) 8320 return; 8321 8322 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC); 8323 8324 /* 8325 * ssvpc register is cleared on read, if zero then no 8326 * spoofed packets in the last interval. 8327 */ 8328 if (!ssvpc) 8329 return; 8330 8331 e_warn(drv, "%u Spoofed packets detected\n", ssvpc); 8332 } 8333 #else 8334 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter) 8335 { 8336 } 8337 8338 static void 8339 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter) 8340 { 8341 } 8342 #endif /* CONFIG_PCI_IOV */ 8343 8344 8345 /** 8346 * ixgbe_watchdog_subtask - check and bring link up 8347 * @adapter: pointer to the device adapter structure 8348 **/ 8349 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter) 8350 { 8351 /* if interface is down, removing or resetting, do nothing */ 8352 if (test_bit(__IXGBE_DOWN, &adapter->state) || 8353 test_bit(__IXGBE_REMOVING, &adapter->state) || 8354 test_bit(__IXGBE_RESETTING, &adapter->state)) 8355 return; 8356 8357 ixgbe_watchdog_update_link(adapter); 8358 8359 if (adapter->link_up) 8360 ixgbe_watchdog_link_is_up(adapter); 8361 else 8362 ixgbe_watchdog_link_is_down(adapter); 8363 8364 ixgbe_check_for_bad_vf(adapter); 8365 ixgbe_spoof_check(adapter); 8366 ixgbe_update_stats(adapter); 8367 8368 ixgbe_watchdog_flush_tx(adapter); 8369 } 8370 8371 /** 8372 * ixgbe_sfp_detection_subtask - poll for SFP+ cable 8373 * @adapter: the ixgbe adapter structure 8374 **/ 8375 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter) 8376 { 8377 struct ixgbe_hw *hw = &adapter->hw; 8378 int err; 8379 8380 /* not searching for SFP so there is nothing to do here */ 8381 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) && 8382 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET)) 8383 return; 8384 8385 if (adapter->sfp_poll_time && 8386 time_after(adapter->sfp_poll_time, jiffies)) 8387 return; /* If not yet time to poll for SFP */ 8388 8389 /* someone else is in init, wait until next service event */ 8390 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 8391 return; 8392 8393 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1; 8394 8395 err = hw->phy.ops.identify_sfp(hw); 8396 if (err == -EOPNOTSUPP) 8397 goto sfp_out; 8398 8399 if (err == -ENOENT) { 8400 /* If no cable is present, then we need to reset 8401 * the next time we find a good cable. */ 8402 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET; 8403 } 8404 8405 /* exit on error */ 8406 if (err) 8407 goto sfp_out; 8408 8409 /* exit if reset not needed */ 8410 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET)) 8411 goto sfp_out; 8412 8413 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET; 8414 8415 /* 8416 * A module may be identified correctly, but the EEPROM may not have 8417 * support for that module. setup_sfp() will fail in that case, so 8418 * we should not allow that module to load. 8419 */ 8420 if (hw->mac.type == ixgbe_mac_82598EB) 8421 err = hw->phy.ops.reset(hw); 8422 else 8423 err = hw->mac.ops.setup_sfp(hw); 8424 8425 if (err == -EOPNOTSUPP) 8426 goto sfp_out; 8427 8428 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG; 8429 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type); 8430 8431 sfp_out: 8432 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 8433 8434 if (err == -EOPNOTSUPP && 8435 adapter->netdev->reg_state == NETREG_REGISTERED) { 8436 e_dev_err("failed to initialize because an unsupported " 8437 "SFP+ module type was detected.\n"); 8438 e_dev_err("Reload the driver after installing a " 8439 "supported module.\n"); 8440 unregister_netdev(adapter->netdev); 8441 } 8442 } 8443 8444 /** 8445 * ixgbe_sfp_link_config_subtask - set up link SFP after module install 8446 * @adapter: the ixgbe adapter structure 8447 **/ 8448 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter) 8449 { 8450 struct ixgbe_hw *hw = &adapter->hw; 8451 u32 cap_speed; 8452 u32 speed; 8453 bool autoneg = false; 8454 8455 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG)) 8456 return; 8457 8458 /* someone else is in init, wait until next service event */ 8459 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 8460 return; 8461 8462 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG; 8463 8464 hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg); 8465 8466 /* advertise highest capable link speed */ 8467 if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL)) 8468 speed = IXGBE_LINK_SPEED_10GB_FULL; 8469 else 8470 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL | 8471 IXGBE_LINK_SPEED_1GB_FULL); 8472 8473 if (hw->mac.ops.setup_link) 8474 hw->mac.ops.setup_link(hw, speed, true); 8475 8476 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; 8477 adapter->link_check_timeout = jiffies; 8478 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 8479 } 8480 8481 /** 8482 * ixgbe_service_timer - Timer Call-back 8483 * @t: pointer to timer_list structure 8484 **/ 8485 static void ixgbe_service_timer(struct timer_list *t) 8486 { 8487 struct ixgbe_adapter *adapter = timer_container_of(adapter, t, 8488 service_timer); 8489 unsigned long next_event_offset; 8490 8491 /* poll faster when waiting for link */ 8492 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) 8493 next_event_offset = HZ / 10; 8494 else 8495 next_event_offset = HZ * 2; 8496 8497 /* Reset the timer */ 8498 mod_timer(&adapter->service_timer, next_event_offset + jiffies); 8499 8500 ixgbe_service_event_schedule(adapter); 8501 } 8502 8503 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter) 8504 { 8505 struct ixgbe_hw *hw = &adapter->hw; 8506 bool overtemp; 8507 8508 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT)) 8509 return; 8510 8511 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT; 8512 8513 if (!hw->phy.ops.handle_lasi) 8514 return; 8515 8516 hw->phy.ops.handle_lasi(&adapter->hw, &overtemp); 8517 if (overtemp) 8518 e_crit(drv, "%s\n", ixgbe_overheat_msg); 8519 } 8520 8521 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter) 8522 { 8523 if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state)) 8524 return; 8525 8526 rtnl_lock(); 8527 /* If we're already down, removing or resetting, just bail */ 8528 if (test_bit(__IXGBE_DOWN, &adapter->state) || 8529 test_bit(__IXGBE_REMOVING, &adapter->state) || 8530 test_bit(__IXGBE_RESETTING, &adapter->state)) { 8531 rtnl_unlock(); 8532 return; 8533 } 8534 8535 ixgbe_dump(adapter); 8536 netdev_err(adapter->netdev, "Reset adapter\n"); 8537 adapter->tx_timeout_count++; 8538 8539 ixgbe_reinit_locked(adapter); 8540 rtnl_unlock(); 8541 } 8542 8543 static int ixgbe_check_fw_api_mismatch(struct ixgbe_adapter *adapter) 8544 { 8545 struct ixgbe_hw *hw = &adapter->hw; 8546 8547 if (hw->mac.type != ixgbe_mac_e610) 8548 return 0; 8549 8550 if (hw->mac.ops.get_fw_ver && hw->mac.ops.get_fw_ver(hw)) 8551 return 0; 8552 8553 if (hw->api_maj_ver > IXGBE_FW_API_VER_MAJOR) { 8554 e_dev_err("The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); 8555 8556 adapter->flags2 |= IXGBE_FLAG2_API_MISMATCH; 8557 return -EOPNOTSUPP; 8558 } else if (hw->api_maj_ver == IXGBE_FW_API_VER_MAJOR && 8559 hw->api_min_ver > IXGBE_FW_API_VER_MINOR + IXGBE_FW_API_VER_DIFF_ALLOWED) { 8560 e_dev_info("The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); 8561 adapter->flags2 |= IXGBE_FLAG2_API_MISMATCH; 8562 } else if (hw->api_maj_ver < IXGBE_FW_API_VER_MAJOR || 8563 hw->api_min_ver < IXGBE_FW_API_VER_MINOR - IXGBE_FW_API_VER_DIFF_ALLOWED) { 8564 e_dev_info("The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); 8565 adapter->flags2 |= IXGBE_FLAG2_API_MISMATCH; 8566 } 8567 8568 return 0; 8569 } 8570 8571 /** 8572 * ixgbe_check_fw_error - Check firmware for errors 8573 * @adapter: the adapter private structure 8574 * 8575 * Check firmware errors in register FWSM 8576 */ 8577 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter) 8578 { 8579 struct ixgbe_hw *hw = &adapter->hw; 8580 u32 fwsm; 8581 int err; 8582 8583 /* read fwsm.ext_err_ind register and log errors */ 8584 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw)); 8585 8586 /* skip if E610's FW is reloading, warning in that case may be misleading */ 8587 if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK || 8588 (!(fwsm & IXGBE_FWSM_FW_VAL_BIT) && !(hw->mac.type == ixgbe_mac_e610))) 8589 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n", 8590 fwsm); 8591 8592 if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) { 8593 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n"); 8594 return true; 8595 } 8596 if (!(adapter->flags2 & IXGBE_FLAG2_API_MISMATCH)) { 8597 err = ixgbe_check_fw_api_mismatch(adapter); 8598 if (err) 8599 return true; 8600 } 8601 8602 /* return here if FW rollback mode has been already detected */ 8603 if (adapter->flags2 & IXGBE_FLAG2_FW_ROLLBACK) 8604 return false; 8605 8606 if (hw->mac.ops.fw_rollback_mode && hw->mac.ops.fw_rollback_mode(hw)) { 8607 struct ixgbe_nvm_info *nvm_info = &adapter->hw.flash.nvm; 8608 char ver_buff[64] = ""; 8609 8610 if (hw->mac.ops.get_fw_ver && hw->mac.ops.get_fw_ver(hw)) 8611 goto no_version; 8612 8613 if (hw->mac.ops.get_nvm_ver && 8614 hw->mac.ops.get_nvm_ver(hw, nvm_info)) 8615 goto no_version; 8616 8617 snprintf(ver_buff, sizeof(ver_buff), 8618 "Current version is NVM:%x.%x.%x, FW:%d.%d. ", 8619 nvm_info->major, nvm_info->minor, nvm_info->eetrack, 8620 hw->fw_maj_ver, hw->fw_maj_ver); 8621 no_version: 8622 e_dev_warn("Firmware rollback mode detected. %sDevice may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode.", 8623 ver_buff); 8624 8625 adapter->flags2 |= IXGBE_FLAG2_FW_ROLLBACK; 8626 } 8627 8628 return false; 8629 } 8630 8631 static void ixgbe_recovery_service_task(struct work_struct *work) 8632 { 8633 struct ixgbe_adapter *adapter = container_of(work, 8634 struct ixgbe_adapter, 8635 service_task); 8636 8637 ixgbe_handle_fw_event(adapter); 8638 ixgbe_service_event_complete(adapter); 8639 8640 mod_timer(&adapter->service_timer, jiffies + msecs_to_jiffies(100)); 8641 } 8642 8643 /** 8644 * ixgbe_service_task - manages and runs subtasks 8645 * @work: pointer to work_struct containing our data 8646 **/ 8647 static void ixgbe_service_task(struct work_struct *work) 8648 { 8649 struct ixgbe_adapter *adapter = container_of(work, 8650 struct ixgbe_adapter, 8651 service_task); 8652 if (ixgbe_removed(adapter->hw.hw_addr)) { 8653 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 8654 rtnl_lock(); 8655 ixgbe_down(adapter); 8656 rtnl_unlock(); 8657 } 8658 ixgbe_service_event_complete(adapter); 8659 return; 8660 } 8661 if (ixgbe_check_fw_error(adapter)) { 8662 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 8663 if (adapter->mii_bus) { 8664 mdiobus_unregister(adapter->mii_bus); 8665 adapter->mii_bus = NULL; 8666 } 8667 unregister_netdev(adapter->netdev); 8668 } 8669 ixgbe_service_event_complete(adapter); 8670 return; 8671 } 8672 if (adapter->hw.mac.type == ixgbe_mac_e610) { 8673 if (adapter->flags2 & IXGBE_FLAG2_FW_ASYNC_EVENT) 8674 ixgbe_handle_fw_event(adapter); 8675 ixgbe_check_media_subtask(adapter); 8676 } 8677 ixgbe_reset_subtask(adapter); 8678 ixgbe_phy_interrupt_subtask(adapter); 8679 ixgbe_sfp_detection_subtask(adapter); 8680 ixgbe_sfp_link_config_subtask(adapter); 8681 ixgbe_check_overtemp_subtask(adapter); 8682 ixgbe_watchdog_subtask(adapter); 8683 ixgbe_fdir_reinit_subtask(adapter); 8684 ixgbe_check_hang_subtask(adapter); 8685 8686 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) { 8687 ixgbe_ptp_overflow_check(adapter); 8688 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER) 8689 ixgbe_ptp_rx_hang(adapter); 8690 ixgbe_ptp_tx_hang(adapter); 8691 } 8692 8693 ixgbe_service_event_complete(adapter); 8694 } 8695 8696 static int ixgbe_tso(struct ixgbe_ring *tx_ring, 8697 struct ixgbe_tx_buffer *first, 8698 u8 *hdr_len, 8699 struct ixgbe_ipsec_tx_data *itd) 8700 { 8701 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx; 8702 struct sk_buff *skb = first->skb; 8703 union { 8704 struct iphdr *v4; 8705 struct ipv6hdr *v6; 8706 unsigned char *hdr; 8707 } ip; 8708 union { 8709 struct tcphdr *tcp; 8710 struct udphdr *udp; 8711 unsigned char *hdr; 8712 } l4; 8713 u32 paylen, l4_offset; 8714 u32 fceof_saidx = 0; 8715 int err; 8716 8717 if (skb->ip_summed != CHECKSUM_PARTIAL) 8718 return 0; 8719 8720 if (!skb_is_gso(skb)) 8721 return 0; 8722 8723 err = skb_cow_head(skb, 0); 8724 if (err < 0) 8725 return err; 8726 8727 if (eth_p_mpls(first->protocol)) 8728 ip.hdr = skb_inner_network_header(skb); 8729 else 8730 ip.hdr = skb_network_header(skb); 8731 l4.hdr = skb_checksum_start(skb); 8732 8733 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ 8734 type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ? 8735 IXGBE_ADVTXD_TUCMD_L4T_UDP : IXGBE_ADVTXD_TUCMD_L4T_TCP; 8736 8737 /* initialize outer IP header fields */ 8738 if (ip.v4->version == 4) { 8739 unsigned char *csum_start = skb_checksum_start(skb); 8740 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4); 8741 int len = csum_start - trans_start; 8742 8743 /* IP header will have to cancel out any data that 8744 * is not a part of the outer IP header, so set to 8745 * a reverse csum if needed, else init check to 0. 8746 */ 8747 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ? 8748 csum_fold(csum_partial(trans_start, 8749 len, 0)) : 0; 8750 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4; 8751 8752 ip.v4->tot_len = 0; 8753 first->tx_flags |= IXGBE_TX_FLAGS_TSO | 8754 IXGBE_TX_FLAGS_CSUM | 8755 IXGBE_TX_FLAGS_IPV4; 8756 } else { 8757 ip.v6->payload_len = 0; 8758 first->tx_flags |= IXGBE_TX_FLAGS_TSO | 8759 IXGBE_TX_FLAGS_CSUM; 8760 } 8761 8762 /* determine offset of inner transport header */ 8763 l4_offset = l4.hdr - skb->data; 8764 8765 /* remove payload length from inner checksum */ 8766 paylen = skb->len - l4_offset; 8767 8768 if (type_tucmd & IXGBE_ADVTXD_TUCMD_L4T_TCP) { 8769 /* compute length of segmentation header */ 8770 *hdr_len = (l4.tcp->doff * 4) + l4_offset; 8771 csum_replace_by_diff(&l4.tcp->check, 8772 (__force __wsum)htonl(paylen)); 8773 } else { 8774 /* compute length of segmentation header */ 8775 *hdr_len = sizeof(*l4.udp) + l4_offset; 8776 csum_replace_by_diff(&l4.udp->check, 8777 (__force __wsum)htonl(paylen)); 8778 } 8779 8780 /* update gso size and bytecount with header size */ 8781 first->gso_segs = skb_shinfo(skb)->gso_segs; 8782 first->bytecount += (first->gso_segs - 1) * *hdr_len; 8783 8784 /* mss_l4len_id: use 0 as index for TSO */ 8785 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT; 8786 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT; 8787 8788 fceof_saidx |= itd->sa_idx; 8789 type_tucmd |= itd->flags | itd->trailer_len; 8790 8791 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */ 8792 vlan_macip_lens = l4.hdr - ip.hdr; 8793 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT; 8794 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; 8795 8796 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 8797 mss_l4len_idx); 8798 8799 return 1; 8800 } 8801 8802 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring, 8803 struct ixgbe_tx_buffer *first, 8804 struct ixgbe_ipsec_tx_data *itd) 8805 { 8806 struct sk_buff *skb = first->skb; 8807 u32 vlan_macip_lens = 0; 8808 u32 fceof_saidx = 0; 8809 u32 type_tucmd = 0; 8810 8811 if (skb->ip_summed != CHECKSUM_PARTIAL) { 8812 csum_failed: 8813 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | 8814 IXGBE_TX_FLAGS_CC))) 8815 return; 8816 goto no_csum; 8817 } 8818 8819 switch (skb->csum_offset) { 8820 case offsetof(struct tcphdr, check): 8821 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP; 8822 fallthrough; 8823 case offsetof(struct udphdr, check): 8824 break; 8825 case offsetof(struct sctphdr, checksum): 8826 /* validate that this is actually an SCTP request */ 8827 if (skb_csum_is_sctp(skb)) { 8828 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP; 8829 break; 8830 } 8831 fallthrough; 8832 default: 8833 skb_checksum_help(skb); 8834 goto csum_failed; 8835 } 8836 8837 /* update TX checksum flag */ 8838 first->tx_flags |= IXGBE_TX_FLAGS_CSUM; 8839 vlan_macip_lens = skb_checksum_start_offset(skb) - 8840 skb_network_offset(skb); 8841 no_csum: 8842 /* vlan_macip_lens: MACLEN, VLAN tag */ 8843 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT; 8844 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; 8845 8846 fceof_saidx |= itd->sa_idx; 8847 type_tucmd |= itd->flags | itd->trailer_len; 8848 8849 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0); 8850 } 8851 8852 #define IXGBE_SET_FLAG(_input, _flag, _result) \ 8853 ((_flag <= _result) ? \ 8854 ((u32)(_input & _flag) * (_result / _flag)) : \ 8855 ((u32)(_input & _flag) / (_flag / _result))) 8856 8857 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags) 8858 { 8859 /* set type for advanced descriptor with frame checksum insertion */ 8860 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA | 8861 IXGBE_ADVTXD_DCMD_DEXT | 8862 IXGBE_ADVTXD_DCMD_IFCS; 8863 8864 /* set HW vlan bit if vlan is present */ 8865 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN, 8866 IXGBE_ADVTXD_DCMD_VLE); 8867 8868 /* set segmentation enable bits for TSO/FSO */ 8869 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO, 8870 IXGBE_ADVTXD_DCMD_TSE); 8871 8872 /* set timestamp bit if present */ 8873 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP, 8874 IXGBE_ADVTXD_MAC_TSTAMP); 8875 8876 /* insert frame checksum */ 8877 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS); 8878 8879 return cmd_type; 8880 } 8881 8882 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc, 8883 u32 tx_flags, unsigned int paylen) 8884 { 8885 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT; 8886 8887 /* enable L4 checksum for TSO and TX checksum offload */ 8888 olinfo_status |= IXGBE_SET_FLAG(tx_flags, 8889 IXGBE_TX_FLAGS_CSUM, 8890 IXGBE_ADVTXD_POPTS_TXSM); 8891 8892 /* enable IPv4 checksum for TSO */ 8893 olinfo_status |= IXGBE_SET_FLAG(tx_flags, 8894 IXGBE_TX_FLAGS_IPV4, 8895 IXGBE_ADVTXD_POPTS_IXSM); 8896 8897 /* enable IPsec */ 8898 olinfo_status |= IXGBE_SET_FLAG(tx_flags, 8899 IXGBE_TX_FLAGS_IPSEC, 8900 IXGBE_ADVTXD_POPTS_IPSEC); 8901 8902 /* 8903 * Check Context must be set if Tx switch is enabled, which it 8904 * always is for case where virtual functions are running 8905 */ 8906 olinfo_status |= IXGBE_SET_FLAG(tx_flags, 8907 IXGBE_TX_FLAGS_CC, 8908 IXGBE_ADVTXD_CC); 8909 8910 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); 8911 } 8912 8913 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size) 8914 { 8915 if (!netif_subqueue_try_stop(tx_ring->netdev, tx_ring->queue_index, 8916 ixgbe_desc_unused(tx_ring), size)) 8917 return -EBUSY; 8918 8919 ++tx_ring->tx_stats.restart_queue; 8920 return 0; 8921 } 8922 8923 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size) 8924 { 8925 if (likely(ixgbe_desc_unused(tx_ring) >= size)) 8926 return 0; 8927 8928 return __ixgbe_maybe_stop_tx(tx_ring, size); 8929 } 8930 8931 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring, 8932 struct ixgbe_tx_buffer *first, 8933 const u8 hdr_len) 8934 { 8935 struct sk_buff *skb = first->skb; 8936 struct ixgbe_tx_buffer *tx_buffer; 8937 union ixgbe_adv_tx_desc *tx_desc; 8938 skb_frag_t *frag; 8939 dma_addr_t dma; 8940 unsigned int data_len, size; 8941 u32 tx_flags = first->tx_flags; 8942 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags); 8943 u16 i = tx_ring->next_to_use; 8944 8945 tx_desc = IXGBE_TX_DESC(tx_ring, i); 8946 8947 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len); 8948 8949 size = skb_headlen(skb); 8950 data_len = skb->data_len; 8951 8952 #ifdef IXGBE_FCOE 8953 if (tx_flags & IXGBE_TX_FLAGS_FCOE) { 8954 if (data_len < sizeof(struct fcoe_crc_eof)) { 8955 size -= sizeof(struct fcoe_crc_eof) - data_len; 8956 data_len = 0; 8957 } else { 8958 data_len -= sizeof(struct fcoe_crc_eof); 8959 } 8960 } 8961 8962 #endif 8963 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE); 8964 8965 tx_buffer = first; 8966 8967 for (frag = &skb_shinfo(skb)->frags[0];; frag++) { 8968 if (dma_mapping_error(tx_ring->dev, dma)) 8969 goto dma_error; 8970 8971 /* record length, and DMA address */ 8972 dma_unmap_len_set(tx_buffer, len, size); 8973 dma_unmap_addr_set(tx_buffer, dma, dma); 8974 8975 tx_desc->read.buffer_addr = cpu_to_le64(dma); 8976 8977 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) { 8978 tx_desc->read.cmd_type_len = 8979 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD); 8980 8981 i++; 8982 tx_desc++; 8983 if (i == tx_ring->count) { 8984 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 8985 i = 0; 8986 } 8987 tx_desc->read.olinfo_status = 0; 8988 8989 dma += IXGBE_MAX_DATA_PER_TXD; 8990 size -= IXGBE_MAX_DATA_PER_TXD; 8991 8992 tx_desc->read.buffer_addr = cpu_to_le64(dma); 8993 } 8994 8995 if (likely(!data_len)) 8996 break; 8997 8998 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size); 8999 9000 i++; 9001 tx_desc++; 9002 if (i == tx_ring->count) { 9003 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 9004 i = 0; 9005 } 9006 tx_desc->read.olinfo_status = 0; 9007 9008 #ifdef IXGBE_FCOE 9009 size = min_t(unsigned int, data_len, skb_frag_size(frag)); 9010 #else 9011 size = skb_frag_size(frag); 9012 #endif 9013 data_len -= size; 9014 9015 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size, 9016 DMA_TO_DEVICE); 9017 9018 tx_buffer = &tx_ring->tx_buffer_info[i]; 9019 } 9020 9021 /* write last descriptor with RS and EOP bits */ 9022 cmd_type |= size | IXGBE_TXD_CMD; 9023 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); 9024 9025 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount); 9026 9027 /* set the timestamp */ 9028 first->time_stamp = jiffies; 9029 9030 skb_tx_timestamp(skb); 9031 9032 /* 9033 * Force memory writes to complete before letting h/w know there 9034 * are new descriptors to fetch. (Only applicable for weak-ordered 9035 * memory model archs, such as IA-64). 9036 * 9037 * We also need this memory barrier to make certain all of the 9038 * status bits have been updated before next_to_watch is written. 9039 */ 9040 wmb(); 9041 9042 /* set next_to_watch value indicating a packet is present */ 9043 first->next_to_watch = tx_desc; 9044 9045 i++; 9046 if (i == tx_ring->count) 9047 i = 0; 9048 9049 tx_ring->next_to_use = i; 9050 9051 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED); 9052 9053 if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) { 9054 writel(i, tx_ring->tail); 9055 } 9056 9057 return 0; 9058 dma_error: 9059 dev_err(tx_ring->dev, "TX DMA map failed\n"); 9060 9061 /* clear dma mappings for failed tx_buffer_info map */ 9062 for (;;) { 9063 tx_buffer = &tx_ring->tx_buffer_info[i]; 9064 if (dma_unmap_len(tx_buffer, len)) 9065 dma_unmap_page(tx_ring->dev, 9066 dma_unmap_addr(tx_buffer, dma), 9067 dma_unmap_len(tx_buffer, len), 9068 DMA_TO_DEVICE); 9069 dma_unmap_len_set(tx_buffer, len, 0); 9070 if (tx_buffer == first) 9071 break; 9072 if (i == 0) 9073 i += tx_ring->count; 9074 i--; 9075 } 9076 9077 dev_kfree_skb_any(first->skb); 9078 first->skb = NULL; 9079 9080 tx_ring->next_to_use = i; 9081 9082 return -1; 9083 } 9084 9085 static void ixgbe_atr(struct ixgbe_ring *ring, 9086 struct ixgbe_tx_buffer *first) 9087 { 9088 struct ixgbe_q_vector *q_vector = ring->q_vector; 9089 union ixgbe_atr_hash_dword input = { .dword = 0 }; 9090 union ixgbe_atr_hash_dword common = { .dword = 0 }; 9091 union { 9092 unsigned char *network; 9093 struct iphdr *ipv4; 9094 struct ipv6hdr *ipv6; 9095 } hdr; 9096 struct tcphdr *th; 9097 unsigned int hlen; 9098 struct sk_buff *skb; 9099 __be16 vlan_id; 9100 int l4_proto; 9101 9102 /* if ring doesn't have a interrupt vector, cannot perform ATR */ 9103 if (!q_vector) 9104 return; 9105 9106 /* do nothing if sampling is disabled */ 9107 if (!ring->atr_sample_rate) 9108 return; 9109 9110 ring->atr_count++; 9111 9112 /* currently only IPv4/IPv6 with TCP is supported */ 9113 if ((first->protocol != htons(ETH_P_IP)) && 9114 (first->protocol != htons(ETH_P_IPV6))) 9115 return; 9116 9117 /* snag network header to get L4 type and address */ 9118 skb = first->skb; 9119 hdr.network = skb_network_header(skb); 9120 if (unlikely(hdr.network <= skb->data)) 9121 return; 9122 if (skb->encapsulation && 9123 first->protocol == htons(ETH_P_IP) && 9124 hdr.ipv4->protocol == IPPROTO_UDP) { 9125 struct ixgbe_adapter *adapter = q_vector->adapter; 9126 9127 if (unlikely(skb_tail_pointer(skb) < hdr.network + 9128 vxlan_headroom(0))) 9129 return; 9130 9131 /* verify the port is recognized as VXLAN */ 9132 if (adapter->vxlan_port && 9133 udp_hdr(skb)->dest == adapter->vxlan_port) 9134 hdr.network = skb_inner_network_header(skb); 9135 9136 if (adapter->geneve_port && 9137 udp_hdr(skb)->dest == adapter->geneve_port) 9138 hdr.network = skb_inner_network_header(skb); 9139 } 9140 9141 /* Make sure we have at least [minimum IPv4 header + TCP] 9142 * or [IPv6 header] bytes 9143 */ 9144 if (unlikely(skb_tail_pointer(skb) < hdr.network + 40)) 9145 return; 9146 9147 /* Currently only IPv4/IPv6 with TCP is supported */ 9148 switch (hdr.ipv4->version) { 9149 case IPVERSION: 9150 /* access ihl as u8 to avoid unaligned access on ia64 */ 9151 hlen = (hdr.network[0] & 0x0F) << 2; 9152 l4_proto = hdr.ipv4->protocol; 9153 break; 9154 case 6: 9155 hlen = hdr.network - skb->data; 9156 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL); 9157 hlen -= hdr.network - skb->data; 9158 break; 9159 default: 9160 return; 9161 } 9162 9163 if (l4_proto != IPPROTO_TCP) 9164 return; 9165 9166 if (unlikely(skb_tail_pointer(skb) < hdr.network + 9167 hlen + sizeof(struct tcphdr))) 9168 return; 9169 9170 th = (struct tcphdr *)(hdr.network + hlen); 9171 9172 /* skip this packet since the socket is closing */ 9173 if (th->fin) 9174 return; 9175 9176 /* sample on all syn packets or once every atr sample count */ 9177 if (!th->syn && (ring->atr_count < ring->atr_sample_rate)) 9178 return; 9179 9180 /* reset sample count */ 9181 ring->atr_count = 0; 9182 9183 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT); 9184 9185 /* 9186 * src and dst are inverted, think how the receiver sees them 9187 * 9188 * The input is broken into two sections, a non-compressed section 9189 * containing vm_pool, vlan_id, and flow_type. The rest of the data 9190 * is XORed together and stored in the compressed dword. 9191 */ 9192 input.formatted.vlan_id = vlan_id; 9193 9194 /* 9195 * since src port and flex bytes occupy the same word XOR them together 9196 * and write the value to source port portion of compressed dword 9197 */ 9198 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN)) 9199 common.port.src ^= th->dest ^ htons(ETH_P_8021Q); 9200 else 9201 common.port.src ^= th->dest ^ first->protocol; 9202 common.port.dst ^= th->source; 9203 9204 switch (hdr.ipv4->version) { 9205 case IPVERSION: 9206 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 9207 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr; 9208 break; 9209 case 6: 9210 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6; 9211 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^ 9212 hdr.ipv6->saddr.s6_addr32[1] ^ 9213 hdr.ipv6->saddr.s6_addr32[2] ^ 9214 hdr.ipv6->saddr.s6_addr32[3] ^ 9215 hdr.ipv6->daddr.s6_addr32[0] ^ 9216 hdr.ipv6->daddr.s6_addr32[1] ^ 9217 hdr.ipv6->daddr.s6_addr32[2] ^ 9218 hdr.ipv6->daddr.s6_addr32[3]; 9219 break; 9220 default: 9221 break; 9222 } 9223 9224 if (hdr.network != skb_network_header(skb)) 9225 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK; 9226 9227 /* This assumes the Rx queue and Tx queue are bound to the same CPU */ 9228 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw, 9229 input, common, ring->queue_index); 9230 } 9231 9232 #ifdef IXGBE_FCOE 9233 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb, 9234 struct net_device *sb_dev) 9235 { 9236 struct ixgbe_adapter *adapter; 9237 struct ixgbe_ring_feature *f; 9238 int txq; 9239 9240 if (sb_dev) { 9241 u8 tc = netdev_get_prio_tc_map(dev, skb->priority); 9242 struct net_device *vdev = sb_dev; 9243 9244 txq = vdev->tc_to_txq[tc].offset; 9245 txq += reciprocal_scale(skb_get_hash(skb), 9246 vdev->tc_to_txq[tc].count); 9247 9248 return txq; 9249 } 9250 9251 /* 9252 * only execute the code below if protocol is FCoE 9253 * or FIP and we have FCoE enabled on the adapter 9254 */ 9255 switch (vlan_get_protocol(skb)) { 9256 case htons(ETH_P_FCOE): 9257 case htons(ETH_P_FIP): 9258 adapter = ixgbe_from_netdev(dev); 9259 9260 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) 9261 break; 9262 fallthrough; 9263 default: 9264 return netdev_pick_tx(dev, skb, sb_dev); 9265 } 9266 9267 f = &adapter->ring_feature[RING_F_FCOE]; 9268 9269 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) : 9270 smp_processor_id(); 9271 9272 while (txq >= f->indices) 9273 txq -= f->indices; 9274 9275 return txq + f->offset; 9276 } 9277 9278 #endif 9279 int ixgbe_xmit_xdp_ring(struct ixgbe_ring *ring, 9280 struct xdp_frame *xdpf) 9281 { 9282 struct skb_shared_info *sinfo = xdp_get_shared_info_from_frame(xdpf); 9283 u8 nr_frags = unlikely(xdp_frame_has_frags(xdpf)) ? sinfo->nr_frags : 0; 9284 u16 i = 0, index = ring->next_to_use; 9285 struct ixgbe_tx_buffer *tx_head = &ring->tx_buffer_info[index]; 9286 struct ixgbe_tx_buffer *tx_buff = tx_head; 9287 union ixgbe_adv_tx_desc *tx_desc = IXGBE_TX_DESC(ring, index); 9288 u32 cmd_type, len = xdpf->len; 9289 void *data = xdpf->data; 9290 9291 if (unlikely(ixgbe_desc_unused(ring) < 1 + nr_frags)) 9292 return IXGBE_XDP_CONSUMED; 9293 9294 tx_head->bytecount = xdp_get_frame_len(xdpf); 9295 tx_head->gso_segs = 1; 9296 tx_head->xdpf = xdpf; 9297 9298 tx_desc->read.olinfo_status = 9299 cpu_to_le32(tx_head->bytecount << IXGBE_ADVTXD_PAYLEN_SHIFT); 9300 9301 for (;;) { 9302 dma_addr_t dma; 9303 9304 dma = dma_map_single(ring->dev, data, len, DMA_TO_DEVICE); 9305 if (dma_mapping_error(ring->dev, dma)) 9306 goto unmap; 9307 9308 dma_unmap_len_set(tx_buff, len, len); 9309 dma_unmap_addr_set(tx_buff, dma, dma); 9310 9311 cmd_type = IXGBE_ADVTXD_DTYP_DATA | IXGBE_ADVTXD_DCMD_DEXT | 9312 IXGBE_ADVTXD_DCMD_IFCS | len; 9313 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); 9314 tx_desc->read.buffer_addr = cpu_to_le64(dma); 9315 tx_buff->protocol = 0; 9316 9317 if (++index == ring->count) 9318 index = 0; 9319 9320 if (i == nr_frags) 9321 break; 9322 9323 tx_buff = &ring->tx_buffer_info[index]; 9324 tx_desc = IXGBE_TX_DESC(ring, index); 9325 tx_desc->read.olinfo_status = 0; 9326 9327 data = skb_frag_address(&sinfo->frags[i]); 9328 len = skb_frag_size(&sinfo->frags[i]); 9329 i++; 9330 } 9331 /* put descriptor type bits */ 9332 tx_desc->read.cmd_type_len |= cpu_to_le32(IXGBE_TXD_CMD); 9333 9334 /* Avoid any potential race with xdp_xmit and cleanup */ 9335 smp_wmb(); 9336 9337 tx_head->next_to_watch = tx_desc; 9338 ring->next_to_use = index; 9339 9340 return IXGBE_XDP_TX; 9341 9342 unmap: 9343 for (;;) { 9344 tx_buff = &ring->tx_buffer_info[index]; 9345 if (dma_unmap_len(tx_buff, len)) 9346 dma_unmap_page(ring->dev, dma_unmap_addr(tx_buff, dma), 9347 dma_unmap_len(tx_buff, len), 9348 DMA_TO_DEVICE); 9349 dma_unmap_len_set(tx_buff, len, 0); 9350 if (tx_buff == tx_head) 9351 break; 9352 9353 if (!index) 9354 index += ring->count; 9355 index--; 9356 } 9357 9358 return IXGBE_XDP_CONSUMED; 9359 } 9360 9361 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, 9362 struct ixgbe_adapter *adapter, 9363 struct ixgbe_ring *tx_ring) 9364 { 9365 struct ixgbe_tx_buffer *first; 9366 int tso; 9367 u32 tx_flags = 0; 9368 unsigned short f; 9369 u16 count = TXD_USE_COUNT(skb_headlen(skb)); 9370 struct ixgbe_ipsec_tx_data ipsec_tx = { 0 }; 9371 __be16 protocol = skb->protocol; 9372 u8 hdr_len = 0; 9373 9374 /* 9375 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD, 9376 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD, 9377 * + 2 desc gap to keep tail from touching head, 9378 * + 1 desc for context descriptor, 9379 * otherwise try next time 9380 */ 9381 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) 9382 count += TXD_USE_COUNT(skb_frag_size( 9383 &skb_shinfo(skb)->frags[f])); 9384 9385 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) { 9386 tx_ring->tx_stats.tx_busy++; 9387 return NETDEV_TX_BUSY; 9388 } 9389 9390 /* record the location of the first descriptor for this packet */ 9391 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use]; 9392 first->skb = skb; 9393 first->bytecount = skb->len; 9394 first->gso_segs = 1; 9395 9396 /* if we have a HW VLAN tag being added default to the HW one */ 9397 if (skb_vlan_tag_present(skb)) { 9398 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT; 9399 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN; 9400 /* else if it is a SW VLAN check the next protocol and store the tag */ 9401 } else if (protocol == htons(ETH_P_8021Q)) { 9402 struct vlan_hdr *vhdr, _vhdr; 9403 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr); 9404 if (!vhdr) 9405 goto out_drop; 9406 9407 tx_flags |= ntohs(vhdr->h_vlan_TCI) << 9408 IXGBE_TX_FLAGS_VLAN_SHIFT; 9409 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN; 9410 } 9411 protocol = vlan_get_protocol(skb); 9412 9413 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 9414 adapter->ptp_clock) { 9415 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON && 9416 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS, 9417 &adapter->state)) { 9418 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 9419 tx_flags |= IXGBE_TX_FLAGS_TSTAMP; 9420 9421 /* schedule check for Tx timestamp */ 9422 adapter->ptp_tx_skb = skb_get(skb); 9423 adapter->ptp_tx_start = jiffies; 9424 schedule_work(&adapter->ptp_tx_work); 9425 } else { 9426 adapter->tx_hwtstamp_skipped++; 9427 } 9428 } 9429 9430 #ifdef CONFIG_PCI_IOV 9431 /* 9432 * Use the l2switch_enable flag - would be false if the DMA 9433 * Tx switch had been disabled. 9434 */ 9435 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 9436 tx_flags |= IXGBE_TX_FLAGS_CC; 9437 9438 #endif 9439 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */ 9440 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && 9441 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) || 9442 (skb->priority != TC_PRIO_CONTROL))) { 9443 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK; 9444 tx_flags |= (skb->priority & 0x7) << 9445 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT; 9446 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) { 9447 struct vlan_ethhdr *vhdr; 9448 9449 if (skb_cow_head(skb, 0)) 9450 goto out_drop; 9451 vhdr = skb_vlan_eth_hdr(skb); 9452 vhdr->h_vlan_TCI = htons(tx_flags >> 9453 IXGBE_TX_FLAGS_VLAN_SHIFT); 9454 } else { 9455 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN; 9456 } 9457 } 9458 9459 /* record initial flags and protocol */ 9460 first->tx_flags = tx_flags; 9461 first->protocol = protocol; 9462 9463 #ifdef IXGBE_FCOE 9464 /* setup tx offload for FCoE */ 9465 if ((protocol == htons(ETH_P_FCOE)) && 9466 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) { 9467 tso = ixgbe_fso(tx_ring, first, &hdr_len); 9468 if (tso < 0) 9469 goto out_drop; 9470 9471 goto xmit_fcoe; 9472 } 9473 9474 #endif /* IXGBE_FCOE */ 9475 9476 #ifdef CONFIG_IXGBE_IPSEC 9477 if (xfrm_offload(skb) && 9478 !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx)) 9479 goto out_drop; 9480 #endif 9481 tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx); 9482 if (tso < 0) 9483 goto out_drop; 9484 else if (!tso) 9485 ixgbe_tx_csum(tx_ring, first, &ipsec_tx); 9486 9487 /* add the ATR filter if ATR is on */ 9488 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state)) 9489 ixgbe_atr(tx_ring, first); 9490 9491 #ifdef IXGBE_FCOE 9492 xmit_fcoe: 9493 #endif /* IXGBE_FCOE */ 9494 if (ixgbe_tx_map(tx_ring, first, hdr_len)) 9495 goto cleanup_tx_timestamp; 9496 9497 return NETDEV_TX_OK; 9498 9499 out_drop: 9500 dev_kfree_skb_any(first->skb); 9501 first->skb = NULL; 9502 cleanup_tx_timestamp: 9503 if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) { 9504 dev_kfree_skb_any(adapter->ptp_tx_skb); 9505 adapter->ptp_tx_skb = NULL; 9506 cancel_work_sync(&adapter->ptp_tx_work); 9507 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state); 9508 } 9509 9510 return NETDEV_TX_OK; 9511 } 9512 9513 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb, 9514 struct net_device *netdev, 9515 struct ixgbe_ring *ring) 9516 { 9517 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9518 struct ixgbe_ring *tx_ring; 9519 9520 /* 9521 * The minimum packet size for olinfo paylen is 17 so pad the skb 9522 * in order to meet this minimum size requirement. 9523 */ 9524 if (skb_put_padto(skb, 17)) 9525 return NETDEV_TX_OK; 9526 9527 tx_ring = ring ? ring : adapter->tx_ring[skb_get_queue_mapping(skb)]; 9528 if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state))) 9529 return NETDEV_TX_BUSY; 9530 9531 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring); 9532 } 9533 9534 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb, 9535 struct net_device *netdev) 9536 { 9537 return __ixgbe_xmit_frame(skb, netdev, NULL); 9538 } 9539 9540 /** 9541 * ixgbe_set_mac - Change the Ethernet Address of the NIC 9542 * @netdev: network interface device structure 9543 * @p: pointer to an address structure 9544 * 9545 * Returns 0 on success, negative on failure 9546 **/ 9547 static int ixgbe_set_mac(struct net_device *netdev, void *p) 9548 { 9549 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9550 struct ixgbe_hw *hw = &adapter->hw; 9551 struct sockaddr *addr = p; 9552 9553 if (!is_valid_ether_addr(addr->sa_data)) 9554 return -EADDRNOTAVAIL; 9555 9556 eth_hw_addr_set(netdev, addr->sa_data); 9557 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len); 9558 9559 ixgbe_mac_set_default_filter(adapter); 9560 9561 return 0; 9562 } 9563 9564 static int 9565 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr) 9566 { 9567 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9568 struct ixgbe_hw *hw = &adapter->hw; 9569 u16 value; 9570 int rc; 9571 9572 if (adapter->mii_bus) { 9573 int regnum = addr; 9574 9575 if (devad != MDIO_DEVAD_NONE) 9576 return mdiobus_c45_read(adapter->mii_bus, prtad, 9577 devad, regnum); 9578 9579 return mdiobus_read(adapter->mii_bus, prtad, regnum); 9580 } 9581 9582 if (prtad != hw->phy.mdio.prtad) 9583 return -EINVAL; 9584 rc = hw->phy.ops.read_reg(hw, addr, devad, &value); 9585 if (!rc) 9586 rc = value; 9587 return rc; 9588 } 9589 9590 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad, 9591 u16 addr, u16 value) 9592 { 9593 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9594 struct ixgbe_hw *hw = &adapter->hw; 9595 9596 if (adapter->mii_bus) { 9597 int regnum = addr; 9598 9599 if (devad != MDIO_DEVAD_NONE) 9600 return mdiobus_c45_write(adapter->mii_bus, prtad, devad, 9601 regnum, value); 9602 9603 return mdiobus_write(adapter->mii_bus, prtad, regnum, value); 9604 } 9605 9606 if (prtad != hw->phy.mdio.prtad) 9607 return -EINVAL; 9608 return hw->phy.ops.write_reg(hw, addr, devad, value); 9609 } 9610 9611 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd) 9612 { 9613 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9614 9615 switch (cmd) { 9616 case SIOCGMIIPHY: 9617 if (!adapter->hw.phy.ops.read_reg) 9618 return -EOPNOTSUPP; 9619 fallthrough; 9620 default: 9621 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd); 9622 } 9623 } 9624 9625 /** 9626 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding 9627 * netdev->dev_addrs 9628 * @dev: network interface device structure 9629 * 9630 * Returns non-zero on failure 9631 **/ 9632 static int ixgbe_add_sanmac_netdev(struct net_device *dev) 9633 { 9634 int err = 0; 9635 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 9636 struct ixgbe_hw *hw = &adapter->hw; 9637 9638 if (is_valid_ether_addr(hw->mac.san_addr)) { 9639 rtnl_lock(); 9640 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN); 9641 rtnl_unlock(); 9642 9643 /* update SAN MAC vmdq pool selection */ 9644 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0)); 9645 } 9646 return err; 9647 } 9648 9649 /** 9650 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding 9651 * netdev->dev_addrs 9652 * @dev: network interface device structure 9653 * 9654 * Returns non-zero on failure 9655 **/ 9656 static int ixgbe_del_sanmac_netdev(struct net_device *dev) 9657 { 9658 int err = 0; 9659 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 9660 struct ixgbe_mac_info *mac = &adapter->hw.mac; 9661 9662 if (is_valid_ether_addr(mac->san_addr)) { 9663 rtnl_lock(); 9664 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN); 9665 rtnl_unlock(); 9666 } 9667 return err; 9668 } 9669 9670 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats, 9671 struct ixgbe_ring *ring) 9672 { 9673 u64 bytes, packets; 9674 unsigned int start; 9675 9676 if (ring) { 9677 do { 9678 start = u64_stats_fetch_begin(&ring->syncp); 9679 packets = ring->stats.packets; 9680 bytes = ring->stats.bytes; 9681 } while (u64_stats_fetch_retry(&ring->syncp, start)); 9682 stats->tx_packets += packets; 9683 stats->tx_bytes += bytes; 9684 } 9685 } 9686 9687 static void ixgbe_get_stats64(struct net_device *netdev, 9688 struct rtnl_link_stats64 *stats) 9689 { 9690 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9691 int i; 9692 9693 rcu_read_lock(); 9694 for (i = 0; i < adapter->num_rx_queues; i++) { 9695 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]); 9696 u64 bytes, packets; 9697 unsigned int start; 9698 9699 if (ring) { 9700 do { 9701 start = u64_stats_fetch_begin(&ring->syncp); 9702 packets = ring->stats.packets; 9703 bytes = ring->stats.bytes; 9704 } while (u64_stats_fetch_retry(&ring->syncp, start)); 9705 stats->rx_packets += packets; 9706 stats->rx_bytes += bytes; 9707 } 9708 } 9709 9710 for (i = 0; i < adapter->num_tx_queues; i++) { 9711 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]); 9712 9713 ixgbe_get_ring_stats64(stats, ring); 9714 } 9715 for (i = 0; i < adapter->num_xdp_queues; i++) { 9716 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]); 9717 9718 ixgbe_get_ring_stats64(stats, ring); 9719 } 9720 rcu_read_unlock(); 9721 9722 /* following stats updated by ixgbe_watchdog_task() */ 9723 stats->multicast = netdev->stats.multicast; 9724 stats->rx_errors = netdev->stats.rx_errors; 9725 stats->rx_length_errors = netdev->stats.rx_length_errors; 9726 stats->rx_crc_errors = netdev->stats.rx_crc_errors; 9727 stats->rx_missed_errors = netdev->stats.rx_missed_errors; 9728 } 9729 9730 static int ixgbe_ndo_get_vf_stats(struct net_device *netdev, int vf, 9731 struct ifla_vf_stats *vf_stats) 9732 { 9733 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9734 9735 if (vf < 0 || vf >= adapter->num_vfs) 9736 return -EINVAL; 9737 9738 vf_stats->rx_packets = adapter->vfinfo[vf].vfstats.gprc; 9739 vf_stats->rx_bytes = adapter->vfinfo[vf].vfstats.gorc; 9740 vf_stats->tx_packets = adapter->vfinfo[vf].vfstats.gptc; 9741 vf_stats->tx_bytes = adapter->vfinfo[vf].vfstats.gotc; 9742 vf_stats->multicast = adapter->vfinfo[vf].vfstats.mprc; 9743 9744 return 0; 9745 } 9746 9747 #ifdef CONFIG_IXGBE_DCB 9748 /** 9749 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid. 9750 * @adapter: pointer to ixgbe_adapter 9751 * @tc: number of traffic classes currently enabled 9752 * 9753 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm 9754 * 802.1Q priority maps to a packet buffer that exists. 9755 */ 9756 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc) 9757 { 9758 struct ixgbe_hw *hw = &adapter->hw; 9759 u32 reg, rsave; 9760 int i; 9761 9762 /* 82598 have a static priority to TC mapping that can not 9763 * be changed so no validation is needed. 9764 */ 9765 if (hw->mac.type == ixgbe_mac_82598EB) 9766 return; 9767 9768 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC); 9769 rsave = reg; 9770 9771 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { 9772 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT); 9773 9774 /* If up2tc is out of bounds default to zero */ 9775 if (up2tc > tc) 9776 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT); 9777 } 9778 9779 if (reg != rsave) 9780 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg); 9781 9782 return; 9783 } 9784 9785 /** 9786 * ixgbe_set_prio_tc_map - Configure netdev prio tc map 9787 * @adapter: Pointer to adapter struct 9788 * 9789 * Populate the netdev user priority to tc map 9790 */ 9791 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter) 9792 { 9793 struct net_device *dev = adapter->netdev; 9794 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg; 9795 struct ieee_ets *ets = adapter->ixgbe_ieee_ets; 9796 u8 prio; 9797 9798 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) { 9799 u8 tc = 0; 9800 9801 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) 9802 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio); 9803 else if (ets) 9804 tc = ets->prio_tc[prio]; 9805 9806 netdev_set_prio_tc_map(dev, prio, tc); 9807 } 9808 } 9809 9810 #endif /* CONFIG_IXGBE_DCB */ 9811 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, 9812 struct netdev_nested_priv *priv) 9813 { 9814 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)priv->data; 9815 struct ixgbe_fwd_adapter *accel; 9816 int pool; 9817 9818 /* we only care about macvlans... */ 9819 if (!netif_is_macvlan(vdev)) 9820 return 0; 9821 9822 /* that have hardware offload enabled... */ 9823 accel = macvlan_accel_priv(vdev); 9824 if (!accel) 9825 return 0; 9826 9827 /* If we can relocate to a different bit do so */ 9828 pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools); 9829 if (pool < adapter->num_rx_pools) { 9830 set_bit(pool, adapter->fwd_bitmask); 9831 accel->pool = pool; 9832 return 0; 9833 } 9834 9835 /* if we cannot find a free pool then disable the offload */ 9836 netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n"); 9837 macvlan_release_l2fw_offload(vdev); 9838 9839 /* unbind the queues and drop the subordinate channel config */ 9840 netdev_unbind_sb_channel(adapter->netdev, vdev); 9841 netdev_set_sb_channel(vdev, 0); 9842 9843 kfree(accel); 9844 9845 return 0; 9846 } 9847 9848 static void ixgbe_defrag_macvlan_pools(struct net_device *dev) 9849 { 9850 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 9851 struct netdev_nested_priv priv = { 9852 .data = (void *)adapter, 9853 }; 9854 9855 /* flush any stale bits out of the fwd bitmask */ 9856 bitmap_clear(adapter->fwd_bitmask, 1, 63); 9857 9858 /* walk through upper devices reassigning pools */ 9859 netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool, 9860 &priv); 9861 } 9862 9863 /** 9864 * ixgbe_setup_tc - configure net_device for multiple traffic classes 9865 * 9866 * @dev: net device to configure 9867 * @tc: number of traffic classes to enable 9868 */ 9869 int ixgbe_setup_tc(struct net_device *dev, u8 tc) 9870 { 9871 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 9872 struct ixgbe_hw *hw = &adapter->hw; 9873 9874 /* Hardware supports up to 8 traffic classes */ 9875 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs) 9876 return -EINVAL; 9877 9878 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS) 9879 return -EINVAL; 9880 9881 /* Hardware has to reinitialize queues and interrupts to 9882 * match packet buffer alignment. Unfortunately, the 9883 * hardware is not flexible enough to do this dynamically. 9884 */ 9885 if (netif_running(dev)) 9886 ixgbe_close(dev); 9887 else 9888 ixgbe_reset(adapter); 9889 9890 ixgbe_clear_interrupt_scheme(adapter); 9891 9892 #ifdef CONFIG_IXGBE_DCB 9893 if (tc) { 9894 if (adapter->xdp_prog) { 9895 e_warn(probe, "DCB is not supported with XDP\n"); 9896 9897 ixgbe_init_interrupt_scheme(adapter); 9898 if (netif_running(dev)) 9899 ixgbe_open(dev); 9900 return -EINVAL; 9901 } 9902 9903 netdev_set_num_tc(dev, tc); 9904 ixgbe_set_prio_tc_map(adapter); 9905 9906 adapter->hw_tcs = tc; 9907 adapter->flags |= IXGBE_FLAG_DCB_ENABLED; 9908 9909 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 9910 adapter->last_lfc_mode = adapter->hw.fc.requested_mode; 9911 adapter->hw.fc.requested_mode = ixgbe_fc_none; 9912 } 9913 } else { 9914 netdev_reset_tc(dev); 9915 9916 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 9917 adapter->hw.fc.requested_mode = adapter->last_lfc_mode; 9918 9919 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 9920 adapter->hw_tcs = tc; 9921 9922 adapter->temp_dcb_cfg.pfc_mode_enable = false; 9923 adapter->dcb_cfg.pfc_mode_enable = false; 9924 } 9925 9926 ixgbe_validate_rtr(adapter, tc); 9927 9928 #endif /* CONFIG_IXGBE_DCB */ 9929 ixgbe_init_interrupt_scheme(adapter); 9930 9931 ixgbe_defrag_macvlan_pools(dev); 9932 9933 if (netif_running(dev)) 9934 return ixgbe_open(dev); 9935 9936 return 0; 9937 } 9938 9939 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter, 9940 struct tc_cls_u32_offload *cls) 9941 { 9942 u32 hdl = cls->knode.handle; 9943 u32 uhtid = TC_U32_USERHTID(cls->knode.handle); 9944 u32 loc = cls->knode.handle & 0xfffff; 9945 int err = 0, i, j; 9946 struct ixgbe_jump_table *jump = NULL; 9947 9948 if (loc > IXGBE_MAX_HW_ENTRIES) 9949 return -EINVAL; 9950 9951 if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE)) 9952 return -EINVAL; 9953 9954 /* Clear this filter in the link data it is associated with */ 9955 if (uhtid != 0x800) { 9956 jump = adapter->jump_tables[uhtid]; 9957 if (!jump) 9958 return -EINVAL; 9959 if (!test_bit(loc - 1, jump->child_loc_map)) 9960 return -EINVAL; 9961 clear_bit(loc - 1, jump->child_loc_map); 9962 } 9963 9964 /* Check if the filter being deleted is a link */ 9965 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) { 9966 jump = adapter->jump_tables[i]; 9967 if (jump && jump->link_hdl == hdl) { 9968 /* Delete filters in the hardware in the child hash 9969 * table associated with this link 9970 */ 9971 for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) { 9972 if (!test_bit(j, jump->child_loc_map)) 9973 continue; 9974 spin_lock(&adapter->fdir_perfect_lock); 9975 err = ixgbe_update_ethtool_fdir_entry(adapter, 9976 NULL, 9977 j + 1); 9978 spin_unlock(&adapter->fdir_perfect_lock); 9979 clear_bit(j, jump->child_loc_map); 9980 } 9981 /* Remove resources for this link */ 9982 kfree(jump->input); 9983 kfree(jump->mask); 9984 kfree(jump); 9985 adapter->jump_tables[i] = NULL; 9986 return err; 9987 } 9988 } 9989 9990 spin_lock(&adapter->fdir_perfect_lock); 9991 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc); 9992 spin_unlock(&adapter->fdir_perfect_lock); 9993 return err; 9994 } 9995 9996 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter, 9997 struct tc_cls_u32_offload *cls) 9998 { 9999 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle); 10000 10001 if (uhtid >= IXGBE_MAX_LINK_HANDLE) 10002 return -EINVAL; 10003 10004 /* This ixgbe devices do not support hash tables at the moment 10005 * so abort when given hash tables. 10006 */ 10007 if (cls->hnode.divisor > 0) 10008 return -EINVAL; 10009 10010 set_bit(uhtid - 1, &adapter->tables); 10011 return 0; 10012 } 10013 10014 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter, 10015 struct tc_cls_u32_offload *cls) 10016 { 10017 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle); 10018 10019 if (uhtid >= IXGBE_MAX_LINK_HANDLE) 10020 return -EINVAL; 10021 10022 clear_bit(uhtid - 1, &adapter->tables); 10023 return 0; 10024 } 10025 10026 #ifdef CONFIG_NET_CLS_ACT 10027 struct upper_walk_data { 10028 struct ixgbe_adapter *adapter; 10029 u64 action; 10030 int ifindex; 10031 u8 queue; 10032 }; 10033 10034 static int get_macvlan_queue(struct net_device *upper, 10035 struct netdev_nested_priv *priv) 10036 { 10037 if (netif_is_macvlan(upper)) { 10038 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper); 10039 struct ixgbe_adapter *adapter; 10040 struct upper_walk_data *data; 10041 int ifindex; 10042 10043 data = (struct upper_walk_data *)priv->data; 10044 ifindex = data->ifindex; 10045 adapter = data->adapter; 10046 if (vadapter && upper->ifindex == ifindex) { 10047 data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx; 10048 data->action = data->queue; 10049 return 1; 10050 } 10051 } 10052 10053 return 0; 10054 } 10055 10056 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex, 10057 u8 *queue, u64 *action) 10058 { 10059 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; 10060 unsigned int num_vfs = adapter->num_vfs, vf; 10061 struct netdev_nested_priv priv; 10062 struct upper_walk_data data; 10063 struct net_device *upper; 10064 10065 /* redirect to a SRIOV VF */ 10066 for (vf = 0; vf < num_vfs; ++vf) { 10067 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev); 10068 if (upper->ifindex == ifindex) { 10069 *queue = vf * __ALIGN_MASK(1, ~vmdq->mask); 10070 *action = vf + 1; 10071 *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 10072 return 0; 10073 } 10074 } 10075 10076 /* redirect to a offloaded macvlan netdev */ 10077 data.adapter = adapter; 10078 data.ifindex = ifindex; 10079 data.action = 0; 10080 data.queue = 0; 10081 priv.data = (void *)&data; 10082 if (netdev_walk_all_upper_dev_rcu(adapter->netdev, 10083 get_macvlan_queue, &priv)) { 10084 *action = data.action; 10085 *queue = data.queue; 10086 10087 return 0; 10088 } 10089 10090 return -EINVAL; 10091 } 10092 10093 static int parse_tc_actions(struct ixgbe_adapter *adapter, 10094 struct tcf_exts *exts, u64 *action, u8 *queue) 10095 { 10096 const struct tc_action *a; 10097 int i; 10098 10099 if (!tcf_exts_has_actions(exts)) 10100 return -EINVAL; 10101 10102 tcf_exts_for_each_action(i, a, exts) { 10103 /* Drop action */ 10104 if (is_tcf_gact_shot(a)) { 10105 *action = IXGBE_FDIR_DROP_QUEUE; 10106 *queue = IXGBE_FDIR_DROP_QUEUE; 10107 return 0; 10108 } 10109 10110 /* Redirect to a VF or a offloaded macvlan */ 10111 if (is_tcf_mirred_egress_redirect(a)) { 10112 struct net_device *dev = tcf_mirred_dev(a); 10113 10114 if (!dev) 10115 return -EINVAL; 10116 return handle_redirect_action(adapter, dev->ifindex, 10117 queue, action); 10118 } 10119 10120 return -EINVAL; 10121 } 10122 10123 return -EINVAL; 10124 } 10125 #else 10126 static int parse_tc_actions(struct ixgbe_adapter *adapter, 10127 struct tcf_exts *exts, u64 *action, u8 *queue) 10128 { 10129 return -EINVAL; 10130 } 10131 #endif /* CONFIG_NET_CLS_ACT */ 10132 10133 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input, 10134 union ixgbe_atr_input *mask, 10135 struct tc_cls_u32_offload *cls, 10136 struct ixgbe_mat_field *field_ptr, 10137 struct ixgbe_nexthdr *nexthdr) 10138 { 10139 int i, j, off; 10140 __be32 val, m; 10141 bool found_entry = false, found_jump_field = false; 10142 10143 for (i = 0; i < cls->knode.sel->nkeys; i++) { 10144 off = cls->knode.sel->keys[i].off; 10145 val = cls->knode.sel->keys[i].val; 10146 m = cls->knode.sel->keys[i].mask; 10147 10148 for (j = 0; field_ptr[j].val; j++) { 10149 if (field_ptr[j].off == off) { 10150 field_ptr[j].val(input, mask, (__force u32)val, 10151 (__force u32)m); 10152 input->filter.formatted.flow_type |= 10153 field_ptr[j].type; 10154 found_entry = true; 10155 break; 10156 } 10157 } 10158 if (nexthdr) { 10159 if (nexthdr->off == cls->knode.sel->keys[i].off && 10160 nexthdr->val == 10161 (__force u32)cls->knode.sel->keys[i].val && 10162 nexthdr->mask == 10163 (__force u32)cls->knode.sel->keys[i].mask) 10164 found_jump_field = true; 10165 else 10166 continue; 10167 } 10168 } 10169 10170 if (nexthdr && !found_jump_field) 10171 return -EINVAL; 10172 10173 if (!found_entry) 10174 return 0; 10175 10176 mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | 10177 IXGBE_ATR_L4TYPE_MASK; 10178 10179 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4) 10180 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK; 10181 10182 return 0; 10183 } 10184 10185 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter, 10186 struct tc_cls_u32_offload *cls) 10187 { 10188 __be16 protocol = cls->common.protocol; 10189 u32 loc = cls->knode.handle & 0xfffff; 10190 struct ixgbe_hw *hw = &adapter->hw; 10191 struct ixgbe_mat_field *field_ptr; 10192 struct ixgbe_fdir_filter *input = NULL; 10193 union ixgbe_atr_input *mask = NULL; 10194 struct ixgbe_jump_table *jump = NULL; 10195 int i, err = -EINVAL; 10196 u8 queue; 10197 u32 uhtid, link_uhtid; 10198 10199 uhtid = TC_U32_USERHTID(cls->knode.handle); 10200 link_uhtid = TC_U32_USERHTID(cls->knode.link_handle); 10201 10202 /* At the moment cls_u32 jumps to network layer and skips past 10203 * L2 headers. The canonical method to match L2 frames is to use 10204 * negative values. However this is error prone at best but really 10205 * just broken because there is no way to "know" what sort of hdr 10206 * is in front of the network layer. Fix cls_u32 to support L2 10207 * headers when needed. 10208 */ 10209 if (protocol != htons(ETH_P_IP)) 10210 return err; 10211 10212 if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) { 10213 e_err(drv, "Location out of range\n"); 10214 return err; 10215 } 10216 10217 /* cls u32 is a graph starting at root node 0x800. The driver tracks 10218 * links and also the fields used to advance the parser across each 10219 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map 10220 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h 10221 * To add support for new nodes update ixgbe_model.h parse structures 10222 * this function _should_ be generic try not to hardcode values here. 10223 */ 10224 if (uhtid == 0x800) { 10225 field_ptr = (adapter->jump_tables[0])->mat; 10226 } else { 10227 if (uhtid >= IXGBE_MAX_LINK_HANDLE) 10228 return err; 10229 if (!adapter->jump_tables[uhtid]) 10230 return err; 10231 field_ptr = (adapter->jump_tables[uhtid])->mat; 10232 } 10233 10234 if (!field_ptr) 10235 return err; 10236 10237 /* At this point we know the field_ptr is valid and need to either 10238 * build cls_u32 link or attach filter. Because adding a link to 10239 * a handle that does not exist is invalid and the same for adding 10240 * rules to handles that don't exist. 10241 */ 10242 10243 if (link_uhtid) { 10244 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps; 10245 10246 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE) 10247 return err; 10248 10249 if (!test_bit(link_uhtid - 1, &adapter->tables)) 10250 return err; 10251 10252 /* Multiple filters as links to the same hash table are not 10253 * supported. To add a new filter with the same next header 10254 * but different match/jump conditions, create a new hash table 10255 * and link to it. 10256 */ 10257 if (adapter->jump_tables[link_uhtid] && 10258 (adapter->jump_tables[link_uhtid])->link_hdl) { 10259 e_err(drv, "Link filter exists for link: %x\n", 10260 link_uhtid); 10261 return err; 10262 } 10263 10264 for (i = 0; nexthdr[i].jump; i++) { 10265 if (nexthdr[i].o != cls->knode.sel->offoff || 10266 nexthdr[i].s != cls->knode.sel->offshift || 10267 nexthdr[i].m != 10268 (__force u32)cls->knode.sel->offmask) 10269 return err; 10270 10271 jump = kzalloc(sizeof(*jump), GFP_KERNEL); 10272 if (!jump) 10273 return -ENOMEM; 10274 input = kzalloc(sizeof(*input), GFP_KERNEL); 10275 if (!input) { 10276 err = -ENOMEM; 10277 goto free_jump; 10278 } 10279 mask = kzalloc(sizeof(*mask), GFP_KERNEL); 10280 if (!mask) { 10281 err = -ENOMEM; 10282 goto free_input; 10283 } 10284 jump->input = input; 10285 jump->mask = mask; 10286 jump->link_hdl = cls->knode.handle; 10287 10288 err = ixgbe_clsu32_build_input(input, mask, cls, 10289 field_ptr, &nexthdr[i]); 10290 if (!err) { 10291 jump->mat = nexthdr[i].jump; 10292 adapter->jump_tables[link_uhtid] = jump; 10293 break; 10294 } else { 10295 kfree(mask); 10296 kfree(input); 10297 kfree(jump); 10298 } 10299 } 10300 return 0; 10301 } 10302 10303 input = kzalloc(sizeof(*input), GFP_KERNEL); 10304 if (!input) 10305 return -ENOMEM; 10306 mask = kzalloc(sizeof(*mask), GFP_KERNEL); 10307 if (!mask) { 10308 err = -ENOMEM; 10309 goto free_input; 10310 } 10311 10312 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) { 10313 if ((adapter->jump_tables[uhtid])->input) 10314 memcpy(input, (adapter->jump_tables[uhtid])->input, 10315 sizeof(*input)); 10316 if ((adapter->jump_tables[uhtid])->mask) 10317 memcpy(mask, (adapter->jump_tables[uhtid])->mask, 10318 sizeof(*mask)); 10319 10320 /* Lookup in all child hash tables if this location is already 10321 * filled with a filter 10322 */ 10323 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) { 10324 struct ixgbe_jump_table *link = adapter->jump_tables[i]; 10325 10326 if (link && (test_bit(loc - 1, link->child_loc_map))) { 10327 e_err(drv, "Filter exists in location: %x\n", 10328 loc); 10329 err = -EINVAL; 10330 goto err_out; 10331 } 10332 } 10333 } 10334 err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL); 10335 if (err) 10336 goto err_out; 10337 10338 err = parse_tc_actions(adapter, cls->knode.exts, &input->action, 10339 &queue); 10340 if (err < 0) 10341 goto err_out; 10342 10343 input->sw_idx = loc; 10344 10345 spin_lock(&adapter->fdir_perfect_lock); 10346 10347 if (hlist_empty(&adapter->fdir_filter_list)) { 10348 memcpy(&adapter->fdir_mask, mask, sizeof(*mask)); 10349 err = ixgbe_fdir_set_input_mask_82599(hw, mask); 10350 if (err) 10351 goto err_out_w_lock; 10352 } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) { 10353 err = -EINVAL; 10354 goto err_out_w_lock; 10355 } 10356 10357 ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask); 10358 err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter, 10359 input->sw_idx, queue); 10360 if (err) 10361 goto err_out_w_lock; 10362 10363 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx); 10364 spin_unlock(&adapter->fdir_perfect_lock); 10365 10366 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) 10367 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map); 10368 10369 kfree(mask); 10370 return err; 10371 err_out_w_lock: 10372 spin_unlock(&adapter->fdir_perfect_lock); 10373 err_out: 10374 kfree(mask); 10375 free_input: 10376 kfree(input); 10377 free_jump: 10378 kfree(jump); 10379 return err; 10380 } 10381 10382 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter, 10383 struct tc_cls_u32_offload *cls_u32) 10384 { 10385 switch (cls_u32->command) { 10386 case TC_CLSU32_NEW_KNODE: 10387 case TC_CLSU32_REPLACE_KNODE: 10388 return ixgbe_configure_clsu32(adapter, cls_u32); 10389 case TC_CLSU32_DELETE_KNODE: 10390 return ixgbe_delete_clsu32(adapter, cls_u32); 10391 case TC_CLSU32_NEW_HNODE: 10392 case TC_CLSU32_REPLACE_HNODE: 10393 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32); 10394 case TC_CLSU32_DELETE_HNODE: 10395 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32); 10396 default: 10397 return -EOPNOTSUPP; 10398 } 10399 } 10400 10401 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 10402 void *cb_priv) 10403 { 10404 struct ixgbe_adapter *adapter = cb_priv; 10405 10406 if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data)) 10407 return -EOPNOTSUPP; 10408 10409 switch (type) { 10410 case TC_SETUP_CLSU32: 10411 return ixgbe_setup_tc_cls_u32(adapter, type_data); 10412 default: 10413 return -EOPNOTSUPP; 10414 } 10415 } 10416 10417 static int ixgbe_setup_tc_mqprio(struct net_device *dev, 10418 struct tc_mqprio_qopt *mqprio) 10419 { 10420 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 10421 return ixgbe_setup_tc(dev, mqprio->num_tc); 10422 } 10423 10424 static LIST_HEAD(ixgbe_block_cb_list); 10425 10426 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type, 10427 void *type_data) 10428 { 10429 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10430 10431 switch (type) { 10432 case TC_SETUP_BLOCK: 10433 return flow_block_cb_setup_simple(type_data, 10434 &ixgbe_block_cb_list, 10435 ixgbe_setup_tc_block_cb, 10436 adapter, adapter, true); 10437 case TC_SETUP_QDISC_MQPRIO: 10438 return ixgbe_setup_tc_mqprio(dev, type_data); 10439 default: 10440 return -EOPNOTSUPP; 10441 } 10442 } 10443 10444 #ifdef CONFIG_PCI_IOV 10445 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter) 10446 { 10447 struct net_device *netdev = adapter->netdev; 10448 10449 rtnl_lock(); 10450 ixgbe_setup_tc(netdev, adapter->hw_tcs); 10451 rtnl_unlock(); 10452 } 10453 10454 #endif 10455 void ixgbe_do_reset(struct net_device *netdev) 10456 { 10457 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 10458 10459 if (netif_running(netdev)) 10460 ixgbe_reinit_locked(adapter); 10461 else 10462 ixgbe_reset(adapter); 10463 } 10464 10465 static netdev_features_t ixgbe_fix_features(struct net_device *netdev, 10466 netdev_features_t features) 10467 { 10468 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 10469 10470 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */ 10471 if (!(features & NETIF_F_RXCSUM)) 10472 features &= ~NETIF_F_LRO; 10473 10474 /* Turn off LRO if not RSC capable */ 10475 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)) 10476 features &= ~NETIF_F_LRO; 10477 10478 if (adapter->xdp_prog && (features & NETIF_F_LRO)) { 10479 e_dev_err("LRO is not supported with XDP\n"); 10480 features &= ~NETIF_F_LRO; 10481 } 10482 10483 return features; 10484 } 10485 10486 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter) 10487 { 10488 int rss = min_t(int, ixgbe_max_rss_indices(adapter), 10489 num_online_cpus()); 10490 10491 /* go back to full RSS if we're not running SR-IOV */ 10492 if (!adapter->ring_feature[RING_F_VMDQ].offset) 10493 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED | 10494 IXGBE_FLAG_SRIOV_ENABLED); 10495 10496 adapter->ring_feature[RING_F_RSS].limit = rss; 10497 adapter->ring_feature[RING_F_VMDQ].limit = 1; 10498 10499 ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs); 10500 } 10501 10502 static int ixgbe_set_features(struct net_device *netdev, 10503 netdev_features_t features) 10504 { 10505 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 10506 netdev_features_t changed = netdev->features ^ features; 10507 bool need_reset = false; 10508 10509 /* Make sure RSC matches LRO, reset if change */ 10510 if (!(features & NETIF_F_LRO)) { 10511 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) 10512 need_reset = true; 10513 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; 10514 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) && 10515 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { 10516 if (adapter->rx_itr_setting == 1 || 10517 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { 10518 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; 10519 need_reset = true; 10520 } else if ((changed ^ features) & NETIF_F_LRO) { 10521 e_info(probe, "rx-usecs set too low, " 10522 "disabling RSC\n"); 10523 } 10524 } 10525 10526 /* 10527 * Check if Flow Director n-tuple support or hw_tc support was 10528 * enabled or disabled. If the state changed, we need to reset. 10529 */ 10530 if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) { 10531 /* turn off ATR, enable perfect filters and reset */ 10532 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) 10533 need_reset = true; 10534 10535 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; 10536 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE; 10537 } else { 10538 /* turn off perfect filters, enable ATR and reset */ 10539 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) 10540 need_reset = true; 10541 10542 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE; 10543 10544 /* We cannot enable ATR if SR-IOV is enabled */ 10545 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED || 10546 /* We cannot enable ATR if we have 2 or more tcs */ 10547 (adapter->hw_tcs > 1) || 10548 /* We cannot enable ATR if RSS is disabled */ 10549 (adapter->ring_feature[RING_F_RSS].limit <= 1) || 10550 /* A sample rate of 0 indicates ATR disabled */ 10551 (!adapter->atr_sample_rate)) 10552 ; /* do nothing not supported */ 10553 else /* otherwise supported and set the flag */ 10554 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; 10555 } 10556 10557 if (changed & NETIF_F_RXALL) 10558 need_reset = true; 10559 10560 netdev->features = features; 10561 10562 if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1) 10563 ixgbe_reset_l2fw_offload(adapter); 10564 else if (need_reset) 10565 ixgbe_do_reset(netdev); 10566 else if (changed & (NETIF_F_HW_VLAN_CTAG_RX | 10567 NETIF_F_HW_VLAN_CTAG_FILTER)) 10568 ixgbe_set_rx_mode(netdev); 10569 10570 return 1; 10571 } 10572 10573 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], 10574 struct net_device *dev, 10575 const unsigned char *addr, u16 vid, 10576 u16 flags, bool *notified, 10577 struct netlink_ext_ack *extack) 10578 { 10579 /* guarantee we can provide a unique filter for the unicast address */ 10580 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) { 10581 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10582 u16 pool = VMDQ_P(0); 10583 10584 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool)) 10585 return -ENOMEM; 10586 } 10587 10588 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags); 10589 } 10590 10591 /** 10592 * ixgbe_configure_bridge_mode - set various bridge modes 10593 * @adapter: the private structure 10594 * @mode: requested bridge mode 10595 * 10596 * Configure some settings require for various bridge modes. 10597 **/ 10598 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter, 10599 __u16 mode) 10600 { 10601 struct ixgbe_hw *hw = &adapter->hw; 10602 unsigned int p, num_pools; 10603 u32 vmdctl; 10604 10605 switch (mode) { 10606 case BRIDGE_MODE_VEPA: 10607 /* disable Tx loopback, rely on switch hairpin mode */ 10608 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0); 10609 10610 /* must enable Rx switching replication to allow multicast 10611 * packet reception on all VFs, and to enable source address 10612 * pruning. 10613 */ 10614 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); 10615 vmdctl |= IXGBE_VT_CTL_REPLEN; 10616 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl); 10617 10618 /* enable Rx source address pruning. Note, this requires 10619 * replication to be enabled or else it does nothing. 10620 */ 10621 num_pools = adapter->num_vfs + adapter->num_rx_pools; 10622 for (p = 0; p < num_pools; p++) { 10623 if (hw->mac.ops.set_source_address_pruning) 10624 hw->mac.ops.set_source_address_pruning(hw, 10625 true, 10626 p); 10627 } 10628 break; 10629 case BRIDGE_MODE_VEB: 10630 /* enable Tx loopback for internal VF/PF communication */ 10631 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 10632 IXGBE_PFDTXGSWC_VT_LBEN); 10633 10634 /* disable Rx switching replication unless we have SR-IOV 10635 * virtual functions 10636 */ 10637 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); 10638 if (!adapter->num_vfs) 10639 vmdctl &= ~IXGBE_VT_CTL_REPLEN; 10640 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl); 10641 10642 /* disable Rx source address pruning, since we don't expect to 10643 * be receiving external loopback of our transmitted frames. 10644 */ 10645 num_pools = adapter->num_vfs + adapter->num_rx_pools; 10646 for (p = 0; p < num_pools; p++) { 10647 if (hw->mac.ops.set_source_address_pruning) 10648 hw->mac.ops.set_source_address_pruning(hw, 10649 false, 10650 p); 10651 } 10652 break; 10653 default: 10654 return -EINVAL; 10655 } 10656 10657 adapter->bridge_mode = mode; 10658 10659 e_info(drv, "enabling bridge mode: %s\n", 10660 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); 10661 10662 return 0; 10663 } 10664 10665 static int ixgbe_ndo_bridge_setlink(struct net_device *dev, 10666 struct nlmsghdr *nlh, u16 flags, 10667 struct netlink_ext_ack *extack) 10668 { 10669 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10670 struct nlattr *attr, *br_spec; 10671 int rem; 10672 10673 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 10674 return -EOPNOTSUPP; 10675 10676 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); 10677 if (!br_spec) 10678 return -EINVAL; 10679 10680 nla_for_each_nested_type(attr, IFLA_BRIDGE_MODE, br_spec, rem) { 10681 __u16 mode = nla_get_u16(attr); 10682 int status = ixgbe_configure_bridge_mode(adapter, mode); 10683 10684 if (status) 10685 return status; 10686 10687 break; 10688 } 10689 10690 return 0; 10691 } 10692 10693 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 10694 struct net_device *dev, 10695 u32 filter_mask, int nlflags) 10696 { 10697 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10698 10699 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 10700 return 0; 10701 10702 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, 10703 adapter->bridge_mode, 0, 0, nlflags, 10704 filter_mask, NULL); 10705 } 10706 10707 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev) 10708 { 10709 struct ixgbe_adapter *adapter = ixgbe_from_netdev(pdev); 10710 struct ixgbe_fwd_adapter *accel; 10711 int tcs = adapter->hw_tcs ? : 1; 10712 int pool, err; 10713 10714 if (adapter->xdp_prog) { 10715 e_warn(probe, "L2FW offload is not supported with XDP\n"); 10716 return ERR_PTR(-EINVAL); 10717 } 10718 10719 /* The hardware supported by ixgbe only filters on the destination MAC 10720 * address. In order to avoid issues we only support offloading modes 10721 * where the hardware can actually provide the functionality. 10722 */ 10723 if (!macvlan_supports_dest_filter(vdev)) 10724 return ERR_PTR(-EMEDIUMTYPE); 10725 10726 /* We need to lock down the macvlan to be a single queue device so that 10727 * we can reuse the tc_to_txq field in the macvlan netdev to represent 10728 * the queue mapping to our netdev. 10729 */ 10730 if (netif_is_multiqueue(vdev)) 10731 return ERR_PTR(-ERANGE); 10732 10733 pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools); 10734 if (pool == adapter->num_rx_pools) { 10735 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools; 10736 u16 reserved_pools; 10737 10738 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && 10739 adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) || 10740 adapter->num_rx_pools > IXGBE_MAX_MACVLANS) 10741 return ERR_PTR(-EBUSY); 10742 10743 /* Hardware has a limited number of available pools. Each VF, 10744 * and the PF require a pool. Check to ensure we don't 10745 * attempt to use more then the available number of pools. 10746 */ 10747 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS) 10748 return ERR_PTR(-EBUSY); 10749 10750 /* Enable VMDq flag so device will be set in VM mode */ 10751 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | 10752 IXGBE_FLAG_SRIOV_ENABLED; 10753 10754 /* Try to reserve as many queues per pool as possible, 10755 * we start with the configurations that support 4 queues 10756 * per pools, followed by 2, and then by just 1 per pool. 10757 */ 10758 if (used_pools < 32 && adapter->num_rx_pools < 16) 10759 reserved_pools = min_t(u16, 10760 32 - used_pools, 10761 16 - adapter->num_rx_pools); 10762 else if (adapter->num_rx_pools < 32) 10763 reserved_pools = min_t(u16, 10764 64 - used_pools, 10765 32 - adapter->num_rx_pools); 10766 else 10767 reserved_pools = 64 - used_pools; 10768 10769 10770 if (!reserved_pools) 10771 return ERR_PTR(-EBUSY); 10772 10773 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools; 10774 10775 /* Force reinit of ring allocation with VMDQ enabled */ 10776 err = ixgbe_setup_tc(pdev, adapter->hw_tcs); 10777 if (err) 10778 return ERR_PTR(err); 10779 10780 if (pool >= adapter->num_rx_pools) 10781 return ERR_PTR(-ENOMEM); 10782 } 10783 10784 accel = kzalloc(sizeof(*accel), GFP_KERNEL); 10785 if (!accel) 10786 return ERR_PTR(-ENOMEM); 10787 10788 set_bit(pool, adapter->fwd_bitmask); 10789 netdev_set_sb_channel(vdev, pool); 10790 accel->pool = pool; 10791 accel->netdev = vdev; 10792 10793 if (!netif_running(pdev)) 10794 return accel; 10795 10796 err = ixgbe_fwd_ring_up(adapter, accel); 10797 if (err) 10798 return ERR_PTR(err); 10799 10800 return accel; 10801 } 10802 10803 static void ixgbe_fwd_del(struct net_device *pdev, void *priv) 10804 { 10805 struct ixgbe_fwd_adapter *accel = priv; 10806 struct ixgbe_adapter *adapter = ixgbe_from_netdev(pdev); 10807 unsigned int rxbase = accel->rx_base_queue; 10808 unsigned int i; 10809 10810 /* delete unicast filter associated with offloaded interface */ 10811 ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr, 10812 VMDQ_P(accel->pool)); 10813 10814 /* Allow remaining Rx packets to get flushed out of the 10815 * Rx FIFO before we drop the netdev for the ring. 10816 */ 10817 usleep_range(10000, 20000); 10818 10819 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) { 10820 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i]; 10821 struct ixgbe_q_vector *qv = ring->q_vector; 10822 10823 /* Make sure we aren't processing any packets and clear 10824 * netdev to shut down the ring. 10825 */ 10826 if (netif_running(adapter->netdev)) 10827 napi_synchronize(&qv->napi); 10828 ring->netdev = NULL; 10829 } 10830 10831 /* unbind the queues and drop the subordinate channel config */ 10832 netdev_unbind_sb_channel(pdev, accel->netdev); 10833 netdev_set_sb_channel(accel->netdev, 0); 10834 10835 clear_bit(accel->pool, adapter->fwd_bitmask); 10836 kfree(accel); 10837 } 10838 10839 #define IXGBE_MAX_MAC_HDR_LEN 127 10840 #define IXGBE_MAX_NETWORK_HDR_LEN 511 10841 10842 static netdev_features_t 10843 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev, 10844 netdev_features_t features) 10845 { 10846 unsigned int network_hdr_len, mac_hdr_len; 10847 10848 /* Make certain the headers can be described by a context descriptor */ 10849 mac_hdr_len = skb_network_offset(skb); 10850 if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN)) 10851 return features & ~(NETIF_F_HW_CSUM | 10852 NETIF_F_SCTP_CRC | 10853 NETIF_F_GSO_UDP_L4 | 10854 NETIF_F_HW_VLAN_CTAG_TX | 10855 NETIF_F_TSO | 10856 NETIF_F_TSO6); 10857 10858 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb); 10859 if (unlikely(network_hdr_len > IXGBE_MAX_NETWORK_HDR_LEN)) 10860 return features & ~(NETIF_F_HW_CSUM | 10861 NETIF_F_SCTP_CRC | 10862 NETIF_F_GSO_UDP_L4 | 10863 NETIF_F_TSO | 10864 NETIF_F_TSO6); 10865 10866 /* We can only support IPV4 TSO in tunnels if we can mangle the 10867 * inner IP ID field, so strip TSO if MANGLEID is not supported. 10868 * IPsec offoad sets skb->encapsulation but still can handle 10869 * the TSO, so it's the exception. 10870 */ 10871 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) { 10872 #ifdef CONFIG_IXGBE_IPSEC 10873 if (!secpath_exists(skb)) 10874 #endif 10875 features &= ~NETIF_F_TSO; 10876 } 10877 10878 return features; 10879 } 10880 10881 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog) 10882 { 10883 int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 10884 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10885 struct bpf_prog *old_prog; 10886 bool need_reset; 10887 int num_queues; 10888 10889 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 10890 return -EINVAL; 10891 10892 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) 10893 return -EINVAL; 10894 10895 /* verify ixgbe ring attributes are sufficient for XDP */ 10896 for (i = 0; i < adapter->num_rx_queues; i++) { 10897 struct ixgbe_ring *ring = adapter->rx_ring[i]; 10898 10899 if (ring_is_rsc_enabled(ring)) 10900 return -EINVAL; 10901 10902 if (frame_size > ixgbe_rx_bufsz(ring)) 10903 return -EINVAL; 10904 } 10905 10906 /* if the number of cpus is much larger than the maximum of queues, 10907 * we should stop it and then return with ENOMEM like before. 10908 */ 10909 if (nr_cpu_ids > IXGBE_MAX_XDP_QS * 2) 10910 return -ENOMEM; 10911 10912 old_prog = xchg(&adapter->xdp_prog, prog); 10913 need_reset = (!!prog != !!old_prog); 10914 10915 /* If transitioning XDP modes reconfigure rings */ 10916 if (need_reset) { 10917 int err; 10918 10919 if (!prog) 10920 /* Wait until ndo_xsk_wakeup completes. */ 10921 synchronize_rcu(); 10922 err = ixgbe_setup_tc(dev, adapter->hw_tcs); 10923 10924 if (err) 10925 return -EINVAL; 10926 if (!prog) 10927 xdp_features_clear_redirect_target(dev); 10928 } else { 10929 for (i = 0; i < adapter->num_rx_queues; i++) { 10930 WRITE_ONCE(adapter->rx_ring[i]->xdp_prog, 10931 adapter->xdp_prog); 10932 } 10933 } 10934 10935 if (old_prog) 10936 bpf_prog_put(old_prog); 10937 10938 /* Kick start the NAPI context if there is an AF_XDP socket open 10939 * on that queue id. This so that receiving will start. 10940 */ 10941 if (need_reset && prog) { 10942 num_queues = min_t(int, adapter->num_rx_queues, 10943 adapter->num_xdp_queues); 10944 for (i = 0; i < num_queues; i++) 10945 if (adapter->xdp_ring[i]->xsk_pool) 10946 (void)ixgbe_xsk_wakeup(adapter->netdev, i, 10947 XDP_WAKEUP_RX); 10948 xdp_features_set_redirect_target(dev, true); 10949 } 10950 10951 return 0; 10952 } 10953 10954 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp) 10955 { 10956 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10957 10958 switch (xdp->command) { 10959 case XDP_SETUP_PROG: 10960 return ixgbe_xdp_setup(dev, xdp->prog); 10961 case XDP_SETUP_XSK_POOL: 10962 return ixgbe_xsk_pool_setup(adapter, xdp->xsk.pool, 10963 xdp->xsk.queue_id); 10964 10965 default: 10966 return -EINVAL; 10967 } 10968 } 10969 10970 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring) 10971 { 10972 /* Force memory writes to complete before letting h/w know there 10973 * are new descriptors to fetch. 10974 */ 10975 wmb(); 10976 writel(ring->next_to_use, ring->tail); 10977 } 10978 10979 void ixgbe_xdp_ring_update_tail_locked(struct ixgbe_ring *ring) 10980 { 10981 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 10982 spin_lock(&ring->tx_lock); 10983 ixgbe_xdp_ring_update_tail(ring); 10984 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 10985 spin_unlock(&ring->tx_lock); 10986 } 10987 10988 static int ixgbe_xdp_xmit(struct net_device *dev, int n, 10989 struct xdp_frame **frames, u32 flags) 10990 { 10991 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10992 struct ixgbe_ring *ring; 10993 int nxmit = 0; 10994 int i; 10995 10996 if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state))) 10997 return -ENETDOWN; 10998 10999 if (!netif_carrier_ok(adapter->netdev) || 11000 !netif_running(adapter->netdev)) 11001 return -ENETDOWN; 11002 11003 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) 11004 return -EINVAL; 11005 11006 /* During program transitions its possible adapter->xdp_prog is assigned 11007 * but ring has not been configured yet. In this case simply abort xmit. 11008 */ 11009 ring = adapter->xdp_prog ? ixgbe_determine_xdp_ring(adapter) : NULL; 11010 if (unlikely(!ring)) 11011 return -ENXIO; 11012 11013 if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state))) 11014 return -ENXIO; 11015 11016 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 11017 spin_lock(&ring->tx_lock); 11018 11019 for (i = 0; i < n; i++) { 11020 struct xdp_frame *xdpf = frames[i]; 11021 int err; 11022 11023 err = ixgbe_xmit_xdp_ring(ring, xdpf); 11024 if (err != IXGBE_XDP_TX) 11025 break; 11026 nxmit++; 11027 } 11028 11029 if (unlikely(flags & XDP_XMIT_FLUSH)) 11030 ixgbe_xdp_ring_update_tail(ring); 11031 11032 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 11033 spin_unlock(&ring->tx_lock); 11034 11035 return nxmit; 11036 } 11037 11038 static const struct net_device_ops ixgbe_netdev_ops = { 11039 .ndo_open = ixgbe_open, 11040 .ndo_stop = ixgbe_close, 11041 .ndo_start_xmit = ixgbe_xmit_frame, 11042 .ndo_set_rx_mode = ixgbe_set_rx_mode, 11043 .ndo_validate_addr = eth_validate_addr, 11044 .ndo_set_mac_address = ixgbe_set_mac, 11045 .ndo_change_mtu = ixgbe_change_mtu, 11046 .ndo_tx_timeout = ixgbe_tx_timeout, 11047 .ndo_set_tx_maxrate = ixgbe_tx_maxrate, 11048 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid, 11049 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid, 11050 .ndo_eth_ioctl = ixgbe_ioctl, 11051 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac, 11052 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan, 11053 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw, 11054 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk, 11055 .ndo_set_vf_link_state = ixgbe_ndo_set_vf_link_state, 11056 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en, 11057 .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust, 11058 .ndo_get_vf_config = ixgbe_ndo_get_vf_config, 11059 .ndo_get_vf_stats = ixgbe_ndo_get_vf_stats, 11060 .ndo_get_stats64 = ixgbe_get_stats64, 11061 .ndo_setup_tc = __ixgbe_setup_tc, 11062 #ifdef IXGBE_FCOE 11063 .ndo_select_queue = ixgbe_select_queue, 11064 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get, 11065 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target, 11066 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put, 11067 .ndo_fcoe_enable = ixgbe_fcoe_enable, 11068 .ndo_fcoe_disable = ixgbe_fcoe_disable, 11069 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn, 11070 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo, 11071 #endif /* IXGBE_FCOE */ 11072 .ndo_set_features = ixgbe_set_features, 11073 .ndo_fix_features = ixgbe_fix_features, 11074 .ndo_fdb_add = ixgbe_ndo_fdb_add, 11075 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink, 11076 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink, 11077 .ndo_dfwd_add_station = ixgbe_fwd_add, 11078 .ndo_dfwd_del_station = ixgbe_fwd_del, 11079 .ndo_features_check = ixgbe_features_check, 11080 .ndo_bpf = ixgbe_xdp, 11081 .ndo_xdp_xmit = ixgbe_xdp_xmit, 11082 .ndo_xsk_wakeup = ixgbe_xsk_wakeup, 11083 .ndo_hwtstamp_get = ixgbe_ptp_hwtstamp_get, 11084 .ndo_hwtstamp_set = ixgbe_ptp_hwtstamp_set, 11085 }; 11086 11087 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter, 11088 struct ixgbe_ring *tx_ring) 11089 { 11090 unsigned long wait_delay, delay_interval; 11091 struct ixgbe_hw *hw = &adapter->hw; 11092 u8 reg_idx = tx_ring->reg_idx; 11093 int wait_loop; 11094 u32 txdctl; 11095 11096 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); 11097 11098 /* delay mechanism from ixgbe_disable_tx */ 11099 delay_interval = ixgbe_get_completion_timeout(adapter) / 100; 11100 11101 wait_loop = IXGBE_MAX_RX_DESC_POLL; 11102 wait_delay = delay_interval; 11103 11104 while (wait_loop--) { 11105 usleep_range(wait_delay, wait_delay + 10); 11106 wait_delay += delay_interval * 2; 11107 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); 11108 11109 if (!(txdctl & IXGBE_TXDCTL_ENABLE)) 11110 return; 11111 } 11112 11113 e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n"); 11114 } 11115 11116 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter, 11117 struct ixgbe_ring *tx_ring) 11118 { 11119 set_bit(__IXGBE_TX_DISABLED, &tx_ring->state); 11120 ixgbe_disable_txr_hw(adapter, tx_ring); 11121 } 11122 11123 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter, 11124 struct ixgbe_ring *rx_ring) 11125 { 11126 unsigned long wait_delay, delay_interval; 11127 struct ixgbe_hw *hw = &adapter->hw; 11128 u8 reg_idx = rx_ring->reg_idx; 11129 int wait_loop; 11130 u32 rxdctl; 11131 11132 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 11133 rxdctl &= ~IXGBE_RXDCTL_ENABLE; 11134 rxdctl |= IXGBE_RXDCTL_SWFLSH; 11135 11136 /* write value back with RXDCTL.ENABLE bit cleared */ 11137 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); 11138 11139 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */ 11140 if (hw->mac.type == ixgbe_mac_82598EB && 11141 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) 11142 return; 11143 11144 /* delay mechanism from ixgbe_disable_rx */ 11145 delay_interval = ixgbe_get_completion_timeout(adapter) / 100; 11146 11147 wait_loop = IXGBE_MAX_RX_DESC_POLL; 11148 wait_delay = delay_interval; 11149 11150 while (wait_loop--) { 11151 usleep_range(wait_delay, wait_delay + 10); 11152 wait_delay += delay_interval * 2; 11153 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 11154 11155 if (!(rxdctl & IXGBE_RXDCTL_ENABLE)) 11156 return; 11157 } 11158 11159 e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n"); 11160 } 11161 11162 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring) 11163 { 11164 memset(&tx_ring->stats, 0, sizeof(tx_ring->stats)); 11165 memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats)); 11166 } 11167 11168 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring) 11169 { 11170 memset(&rx_ring->stats, 0, sizeof(rx_ring->stats)); 11171 memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats)); 11172 } 11173 11174 /** 11175 * ixgbe_irq_disable_single - Disable single IRQ vector 11176 * @adapter: adapter structure 11177 * @ring: ring index 11178 **/ 11179 static void ixgbe_irq_disable_single(struct ixgbe_adapter *adapter, u32 ring) 11180 { 11181 struct ixgbe_hw *hw = &adapter->hw; 11182 u64 qmask = BIT_ULL(ring); 11183 u32 mask; 11184 11185 switch (adapter->hw.mac.type) { 11186 case ixgbe_mac_82598EB: 11187 mask = qmask & IXGBE_EIMC_RTX_QUEUE; 11188 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, mask); 11189 break; 11190 case ixgbe_mac_82599EB: 11191 case ixgbe_mac_X540: 11192 case ixgbe_mac_X550: 11193 case ixgbe_mac_X550EM_x: 11194 case ixgbe_mac_x550em_a: 11195 mask = (qmask & 0xFFFFFFFF); 11196 if (mask) 11197 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 11198 mask = (qmask >> 32); 11199 if (mask) 11200 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 11201 break; 11202 default: 11203 break; 11204 } 11205 IXGBE_WRITE_FLUSH(&adapter->hw); 11206 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) 11207 synchronize_irq(adapter->msix_entries[ring].vector); 11208 else 11209 synchronize_irq(adapter->pdev->irq); 11210 } 11211 11212 /** 11213 * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings 11214 * @adapter: adapter structure 11215 * @ring: ring index 11216 * 11217 * This function disables a certain Rx/Tx/XDP Tx ring. The function 11218 * assumes that the netdev is running. 11219 **/ 11220 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring) 11221 { 11222 struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring; 11223 11224 rx_ring = adapter->rx_ring[ring]; 11225 tx_ring = adapter->tx_ring[ring]; 11226 xdp_ring = adapter->xdp_ring[ring]; 11227 11228 ixgbe_irq_disable_single(adapter, ring); 11229 11230 /* Rx/Tx/XDP Tx share the same napi context. */ 11231 napi_disable(&rx_ring->q_vector->napi); 11232 11233 ixgbe_disable_txr(adapter, tx_ring); 11234 if (xdp_ring) 11235 ixgbe_disable_txr(adapter, xdp_ring); 11236 ixgbe_disable_rxr_hw(adapter, rx_ring); 11237 11238 if (xdp_ring) 11239 synchronize_rcu(); 11240 11241 ixgbe_clean_tx_ring(tx_ring); 11242 if (xdp_ring) 11243 ixgbe_clean_tx_ring(xdp_ring); 11244 ixgbe_clean_rx_ring(rx_ring); 11245 11246 ixgbe_reset_txr_stats(tx_ring); 11247 if (xdp_ring) 11248 ixgbe_reset_txr_stats(xdp_ring); 11249 ixgbe_reset_rxr_stats(rx_ring); 11250 } 11251 11252 /** 11253 * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings 11254 * @adapter: adapter structure 11255 * @ring: ring index 11256 * 11257 * This function enables a certain Rx/Tx/XDP Tx ring. The function 11258 * assumes that the netdev is running. 11259 **/ 11260 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring) 11261 { 11262 struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring; 11263 11264 rx_ring = adapter->rx_ring[ring]; 11265 tx_ring = adapter->tx_ring[ring]; 11266 xdp_ring = adapter->xdp_ring[ring]; 11267 11268 ixgbe_configure_tx_ring(adapter, tx_ring); 11269 if (xdp_ring) 11270 ixgbe_configure_tx_ring(adapter, xdp_ring); 11271 ixgbe_configure_rx_ring(adapter, rx_ring); 11272 11273 clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state); 11274 if (xdp_ring) 11275 clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state); 11276 11277 /* Rx/Tx/XDP Tx share the same napi context. */ 11278 napi_enable(&rx_ring->q_vector->napi); 11279 ixgbe_irq_enable_queues(adapter, BIT_ULL(ring)); 11280 IXGBE_WRITE_FLUSH(&adapter->hw); 11281 } 11282 11283 /** 11284 * ixgbe_enumerate_functions - Get the number of ports this device has 11285 * @adapter: adapter structure 11286 * 11287 * This function enumerates the physical functions co-located on a single slot, 11288 * in order to determine how many ports a device has. This is most useful in 11289 * determining the required GT/s of PCIe bandwidth necessary for optimal 11290 * performance. 11291 **/ 11292 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter) 11293 { 11294 struct pci_dev *entry, *pdev = adapter->pdev; 11295 int physfns = 0; 11296 11297 /* Some cards can not use the generic count PCIe functions method, 11298 * because they are behind a parent switch, so we hardcode these with 11299 * the correct number of functions. 11300 */ 11301 if (ixgbe_pcie_from_parent(&adapter->hw)) 11302 physfns = 4; 11303 11304 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) { 11305 /* don't count virtual functions */ 11306 if (entry->is_virtfn) 11307 continue; 11308 11309 /* When the devices on the bus don't all match our device ID, 11310 * we can't reliably determine the correct number of 11311 * functions. This can occur if a function has been direct 11312 * attached to a virtual machine using VT-d, for example. In 11313 * this case, simply return -1 to indicate this. 11314 */ 11315 if ((entry->vendor != pdev->vendor) || 11316 (entry->device != pdev->device)) 11317 return -1; 11318 11319 physfns++; 11320 } 11321 11322 return physfns; 11323 } 11324 11325 /** 11326 * ixgbe_wol_supported - Check whether device supports WoL 11327 * @adapter: the adapter private structure 11328 * @device_id: the device ID 11329 * @subdevice_id: the subsystem device ID 11330 * 11331 * This function is used by probe and ethtool to determine 11332 * which devices have WoL support 11333 * 11334 **/ 11335 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id, 11336 u16 subdevice_id) 11337 { 11338 struct ixgbe_hw *hw = &adapter->hw; 11339 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK; 11340 11341 /* WOL not supported on 82598 */ 11342 if (hw->mac.type == ixgbe_mac_82598EB) 11343 return false; 11344 11345 /* check eeprom to see if WOL is enabled for X540 and newer */ 11346 if (hw->mac.type >= ixgbe_mac_X540) { 11347 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 11348 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) && 11349 (hw->bus.func == 0))) 11350 return true; 11351 } 11352 11353 /* WOL is determined based on device IDs for 82599 MACs */ 11354 switch (device_id) { 11355 case IXGBE_DEV_ID_82599_SFP: 11356 /* Only these subdevices could supports WOL */ 11357 switch (subdevice_id) { 11358 case IXGBE_SUBDEV_ID_82599_560FLR: 11359 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6: 11360 case IXGBE_SUBDEV_ID_82599_SFP_WOL0: 11361 case IXGBE_SUBDEV_ID_82599_SFP_2OCP: 11362 /* only support first port */ 11363 if (hw->bus.func != 0) 11364 break; 11365 fallthrough; 11366 case IXGBE_SUBDEV_ID_82599_SP_560FLR: 11367 case IXGBE_SUBDEV_ID_82599_SFP: 11368 case IXGBE_SUBDEV_ID_82599_RNDC: 11369 case IXGBE_SUBDEV_ID_82599_ECNA_DP: 11370 case IXGBE_SUBDEV_ID_82599_SFP_1OCP: 11371 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1: 11372 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2: 11373 return true; 11374 } 11375 break; 11376 case IXGBE_DEV_ID_82599EN_SFP: 11377 /* Only these subdevices support WOL */ 11378 switch (subdevice_id) { 11379 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1: 11380 return true; 11381 } 11382 break; 11383 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: 11384 /* All except this subdevice support WOL */ 11385 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) 11386 return true; 11387 break; 11388 case IXGBE_DEV_ID_82599_KX4: 11389 return true; 11390 default: 11391 break; 11392 } 11393 11394 return false; 11395 } 11396 11397 /** 11398 * ixgbe_set_fw_version_e610 - Set FW version specifically on E610 adapters 11399 * @adapter: the adapter private structure 11400 * 11401 * This function is used by probe and ethtool to determine the FW version to 11402 * format to display. The FW version is taken from the EEPROM/NVM. 11403 * 11404 */ 11405 void ixgbe_set_fw_version_e610(struct ixgbe_adapter *adapter) 11406 { 11407 struct ixgbe_orom_info *orom = &adapter->hw.flash.orom; 11408 struct ixgbe_nvm_info *nvm = &adapter->hw.flash.nvm; 11409 11410 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), 11411 "%x.%02x 0x%x %d.%d.%d", nvm->major, nvm->minor, 11412 nvm->eetrack, orom->major, orom->build, orom->patch); 11413 } 11414 11415 /** 11416 * ixgbe_set_fw_version - Set FW version 11417 * @adapter: the adapter private structure 11418 * 11419 * This function is used by probe and ethtool to determine the FW version to 11420 * format to display. The FW version is taken from the EEPROM/NVM. 11421 */ 11422 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter) 11423 { 11424 struct ixgbe_hw *hw = &adapter->hw; 11425 struct ixgbe_nvm_version nvm_ver; 11426 11427 if (adapter->hw.mac.type == ixgbe_mac_e610) { 11428 ixgbe_set_fw_version_e610(adapter); 11429 return; 11430 } 11431 11432 ixgbe_get_oem_prod_version(hw, &nvm_ver); 11433 if (nvm_ver.oem_valid) { 11434 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), 11435 "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor, 11436 nvm_ver.oem_release); 11437 return; 11438 } 11439 11440 ixgbe_get_etk_id(hw, &nvm_ver); 11441 ixgbe_get_orom_version(hw, &nvm_ver); 11442 11443 if (nvm_ver.or_valid) { 11444 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), 11445 "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major, 11446 nvm_ver.or_build, nvm_ver.or_patch); 11447 return; 11448 } 11449 11450 /* Set ETrack ID format */ 11451 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), 11452 "0x%08x", nvm_ver.etk_id); 11453 } 11454 11455 /** 11456 * ixgbe_recovery_probe - Handle FW recovery mode during probe 11457 * @adapter: the adapter private structure 11458 * 11459 * Perform limited driver initialization when FW error is detected. 11460 * 11461 * Return: 0 on successful probe for E610, -EIO if recovery mode is detected 11462 * for non-E610 adapter, error status code on any other case. 11463 */ 11464 static int ixgbe_recovery_probe(struct ixgbe_adapter *adapter) 11465 { 11466 struct net_device *netdev = adapter->netdev; 11467 struct pci_dev *pdev = adapter->pdev; 11468 struct ixgbe_hw *hw = &adapter->hw; 11469 bool disable_dev; 11470 int err = -EIO; 11471 11472 if (hw->mac.type != ixgbe_mac_e610) 11473 goto clean_up_probe; 11474 11475 ixgbe_get_hw_control(adapter); 11476 mutex_init(&hw->aci.lock); 11477 err = ixgbe_get_flash_data(&adapter->hw); 11478 if (err) 11479 goto shutdown_aci; 11480 11481 timer_setup(&adapter->service_timer, ixgbe_service_timer, 0); 11482 INIT_WORK(&adapter->service_task, ixgbe_recovery_service_task); 11483 set_bit(__IXGBE_SERVICE_INITED, &adapter->state); 11484 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state); 11485 11486 if (hw->mac.ops.get_bus_info) 11487 hw->mac.ops.get_bus_info(hw); 11488 11489 pci_set_drvdata(pdev, adapter); 11490 /* We are creating devlink interface so NIC can be managed, 11491 * e.g. new NVM image loaded 11492 */ 11493 devl_lock(adapter->devlink); 11494 ixgbe_devlink_register_port(adapter); 11495 SET_NETDEV_DEVLINK_PORT(adapter->netdev, 11496 &adapter->devlink_port); 11497 ixgbe_devlink_init_regions(adapter); 11498 devl_register(adapter->devlink); 11499 devl_unlock(adapter->devlink); 11500 11501 return 0; 11502 shutdown_aci: 11503 mutex_destroy(&adapter->hw.aci.lock); 11504 ixgbe_release_hw_control(adapter); 11505 devlink_free(adapter->devlink); 11506 clean_up_probe: 11507 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state); 11508 free_netdev(netdev); 11509 pci_release_mem_regions(pdev); 11510 if (disable_dev) 11511 pci_disable_device(pdev); 11512 return err; 11513 } 11514 11515 /** 11516 * ixgbe_probe - Device Initialization Routine 11517 * @pdev: PCI device information struct 11518 * @ent: entry in ixgbe_pci_tbl 11519 * 11520 * Returns 0 on success, negative on failure 11521 * 11522 * ixgbe_probe initializes an adapter identified by a pci_dev structure. 11523 * The OS initialization, configuring of the adapter private structure, 11524 * and a hardware reset occur. 11525 **/ 11526 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 11527 { 11528 struct net_device *netdev; 11529 struct ixgbe_netdevice_priv *netdev_priv_wrapper; 11530 struct ixgbe_adapter *adapter = NULL; 11531 struct ixgbe_hw *hw; 11532 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data]; 11533 unsigned int indices = MAX_TX_QUEUES; 11534 u8 part_str[IXGBE_PBANUM_LENGTH]; 11535 int i, err, expected_gts; 11536 bool disable_dev = false; 11537 #ifdef IXGBE_FCOE 11538 u16 device_caps; 11539 #endif 11540 u32 eec; 11541 11542 /* Catch broken hardware that put the wrong VF device ID in 11543 * the PCIe SR-IOV capability. 11544 */ 11545 if (pdev->is_virtfn) { 11546 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n", 11547 pci_name(pdev), pdev->vendor, pdev->device); 11548 return -EINVAL; 11549 } 11550 11551 err = pci_enable_device_mem(pdev); 11552 if (err) 11553 return err; 11554 11555 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 11556 if (err) { 11557 dev_err(&pdev->dev, 11558 "No usable DMA configuration, aborting\n"); 11559 goto err_dma; 11560 } 11561 11562 err = pci_request_mem_regions(pdev, ixgbe_driver_name); 11563 if (err) { 11564 dev_err(&pdev->dev, 11565 "pci_request_selected_regions failed 0x%x\n", err); 11566 goto err_pci_reg; 11567 } 11568 11569 pci_set_master(pdev); 11570 pci_save_state(pdev); 11571 11572 if (ii->mac == ixgbe_mac_82598EB) { 11573 #ifdef CONFIG_IXGBE_DCB 11574 /* 8 TC w/ 4 queues per TC */ 11575 indices = 4 * MAX_TRAFFIC_CLASS; 11576 #else 11577 indices = IXGBE_MAX_RSS_INDICES; 11578 #endif 11579 } else if (ii->mac == ixgbe_mac_e610) { 11580 indices = IXGBE_MAX_RSS_INDICES_X550; 11581 } 11582 11583 adapter = ixgbe_allocate_devlink(&pdev->dev); 11584 if (IS_ERR(adapter)) { 11585 err = PTR_ERR(adapter); 11586 goto err_devlink; 11587 } 11588 11589 netdev = alloc_etherdev_mq(sizeof(*netdev_priv_wrapper), indices); 11590 if (!netdev) { 11591 err = -ENOMEM; 11592 goto err_alloc_etherdev; 11593 } 11594 11595 SET_NETDEV_DEV(netdev, &pdev->dev); 11596 11597 netdev_priv_wrapper = netdev_priv(netdev); 11598 netdev_priv_wrapper->adapter = adapter; 11599 11600 adapter->netdev = netdev; 11601 adapter->pdev = pdev; 11602 hw = &adapter->hw; 11603 hw->back = adapter; 11604 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 11605 11606 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), 11607 pci_resource_len(pdev, 0)); 11608 adapter->io_addr = hw->hw_addr; 11609 if (!hw->hw_addr) { 11610 err = -EIO; 11611 goto err_ioremap; 11612 } 11613 11614 /* Setup hw api */ 11615 hw->mac.ops = *ii->mac_ops; 11616 hw->mac.type = ii->mac; 11617 hw->mvals = ii->mvals; 11618 if (ii->link_ops) 11619 hw->link.ops = *ii->link_ops; 11620 11621 /* EEPROM */ 11622 hw->eeprom.ops = *ii->eeprom_ops; 11623 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); 11624 if (ixgbe_removed(hw->hw_addr)) { 11625 err = -EIO; 11626 goto err_ioremap; 11627 } 11628 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */ 11629 if (!(eec & BIT(8))) 11630 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic; 11631 11632 /* PHY */ 11633 hw->phy.ops = *ii->phy_ops; 11634 hw->phy.sfp_type = ixgbe_sfp_type_unknown; 11635 /* ixgbe_identify_phy_generic will set prtad and mmds properly */ 11636 hw->phy.mdio.prtad = MDIO_PRTAD_NONE; 11637 hw->phy.mdio.mmds = 0; 11638 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22; 11639 hw->phy.mdio.dev = netdev; 11640 hw->phy.mdio.mdio_read = ixgbe_mdio_read; 11641 hw->phy.mdio.mdio_write = ixgbe_mdio_write; 11642 11643 netdev->netdev_ops = &ixgbe_netdev_ops; 11644 ixgbe_set_ethtool_ops(netdev); 11645 netdev->watchdog_timeo = 5 * HZ; 11646 strscpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); 11647 11648 /* setup the private structure */ 11649 err = ixgbe_sw_init(adapter, ii); 11650 if (err) 11651 goto err_sw_init; 11652 11653 if (ixgbe_check_fw_error(adapter)) 11654 return ixgbe_recovery_probe(adapter); 11655 11656 if (adapter->hw.mac.type == ixgbe_mac_e610) { 11657 err = ixgbe_get_caps(&adapter->hw); 11658 if (err) 11659 dev_err(&pdev->dev, "ixgbe_get_caps failed %d\n", err); 11660 11661 err = ixgbe_get_flash_data(&adapter->hw); 11662 if (err) 11663 goto err_sw_init; 11664 } 11665 11666 if (adapter->hw.mac.type == ixgbe_mac_82599EB) 11667 adapter->flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF; 11668 11669 switch (adapter->hw.mac.type) { 11670 case ixgbe_mac_X550: 11671 case ixgbe_mac_X550EM_x: 11672 case ixgbe_mac_e610: 11673 netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550; 11674 break; 11675 case ixgbe_mac_x550em_a: 11676 netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550em_a; 11677 break; 11678 default: 11679 break; 11680 } 11681 11682 /* Make it possible the adapter to be woken up via WOL */ 11683 switch (adapter->hw.mac.type) { 11684 case ixgbe_mac_82599EB: 11685 case ixgbe_mac_X540: 11686 case ixgbe_mac_X550: 11687 case ixgbe_mac_X550EM_x: 11688 case ixgbe_mac_x550em_a: 11689 case ixgbe_mac_e610: 11690 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); 11691 break; 11692 default: 11693 break; 11694 } 11695 11696 /* 11697 * If there is a fan on this device and it has failed log the 11698 * failure. 11699 */ 11700 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) { 11701 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 11702 if (esdp & IXGBE_ESDP_SDP1) 11703 e_crit(probe, "Fan has stopped, replace the adapter\n"); 11704 } 11705 11706 if (allow_unsupported_sfp) 11707 hw->allow_unsupported_sfp = allow_unsupported_sfp; 11708 11709 /* reset_hw fills in the perm_addr as well */ 11710 hw->phy.reset_if_overtemp = true; 11711 err = hw->mac.ops.reset_hw(hw); 11712 hw->phy.reset_if_overtemp = false; 11713 ixgbe_set_eee_capable(adapter); 11714 if (err == -ENOENT) { 11715 err = 0; 11716 } else if (err == -EOPNOTSUPP) { 11717 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n"); 11718 e_dev_err("Reload the driver after installing a supported module.\n"); 11719 goto err_sw_init; 11720 } else if (err) { 11721 e_dev_err("HW Init failed: %d\n", err); 11722 goto err_sw_init; 11723 } 11724 11725 #ifdef CONFIG_PCI_IOV 11726 /* SR-IOV not supported on the 82598 */ 11727 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 11728 goto skip_sriov; 11729 /* Mailbox */ 11730 ixgbe_init_mbx_params_pf(hw); 11731 hw->mbx.ops = ii->mbx_ops; 11732 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT); 11733 ixgbe_enable_sriov(adapter, max_vfs); 11734 skip_sriov: 11735 11736 #endif 11737 netdev->features = NETIF_F_SG | 11738 NETIF_F_TSO | 11739 NETIF_F_TSO6 | 11740 NETIF_F_RXHASH | 11741 NETIF_F_RXCSUM | 11742 NETIF_F_HW_CSUM; 11743 11744 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \ 11745 NETIF_F_GSO_GRE_CSUM | \ 11746 NETIF_F_GSO_IPXIP4 | \ 11747 NETIF_F_GSO_IPXIP6 | \ 11748 NETIF_F_GSO_UDP_TUNNEL | \ 11749 NETIF_F_GSO_UDP_TUNNEL_CSUM) 11750 11751 netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES; 11752 netdev->features |= NETIF_F_GSO_PARTIAL | 11753 IXGBE_GSO_PARTIAL_FEATURES; 11754 11755 if (hw->mac.type >= ixgbe_mac_82599EB) 11756 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4; 11757 11758 #ifdef CONFIG_IXGBE_IPSEC 11759 #define IXGBE_ESP_FEATURES (NETIF_F_HW_ESP | \ 11760 NETIF_F_HW_ESP_TX_CSUM | \ 11761 NETIF_F_GSO_ESP) 11762 11763 if (adapter->ipsec) 11764 netdev->features |= IXGBE_ESP_FEATURES; 11765 #endif 11766 /* copy netdev features into list of user selectable features */ 11767 netdev->hw_features |= netdev->features | 11768 NETIF_F_HW_VLAN_CTAG_FILTER | 11769 NETIF_F_HW_VLAN_CTAG_RX | 11770 NETIF_F_HW_VLAN_CTAG_TX | 11771 NETIF_F_RXALL | 11772 NETIF_F_HW_L2FW_DOFFLOAD; 11773 11774 if (hw->mac.type >= ixgbe_mac_82599EB) 11775 netdev->hw_features |= NETIF_F_NTUPLE | 11776 NETIF_F_HW_TC; 11777 11778 netdev->features |= NETIF_F_HIGHDMA; 11779 11780 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID; 11781 netdev->hw_enc_features |= netdev->vlan_features; 11782 netdev->mpls_features |= NETIF_F_SG | 11783 NETIF_F_TSO | 11784 NETIF_F_TSO6 | 11785 NETIF_F_HW_CSUM; 11786 netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES; 11787 11788 /* set this bit last since it cannot be part of vlan_features */ 11789 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | 11790 NETIF_F_HW_VLAN_CTAG_RX | 11791 NETIF_F_HW_VLAN_CTAG_TX; 11792 11793 netdev->priv_flags |= IFF_UNICAST_FLT; 11794 netdev->priv_flags |= IFF_SUPP_NOFCS; 11795 11796 netdev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT | 11797 NETDEV_XDP_ACT_XSK_ZEROCOPY; 11798 11799 /* MTU range: 68 - 9710 */ 11800 netdev->min_mtu = ETH_MIN_MTU; 11801 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN); 11802 11803 #ifdef CONFIG_IXGBE_DCB 11804 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE) 11805 netdev->dcbnl_ops = &ixgbe_dcbnl_ops; 11806 #endif 11807 11808 #ifdef IXGBE_FCOE 11809 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) { 11810 unsigned int fcoe_l; 11811 11812 if (hw->mac.ops.get_device_caps) { 11813 hw->mac.ops.get_device_caps(hw, &device_caps); 11814 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS) 11815 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE; 11816 } 11817 11818 11819 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus()); 11820 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l; 11821 11822 netdev->features |= NETIF_F_FSO | 11823 NETIF_F_FCOE_CRC; 11824 11825 netdev->vlan_features |= NETIF_F_FSO | 11826 NETIF_F_FCOE_CRC; 11827 } 11828 #endif /* IXGBE_FCOE */ 11829 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) 11830 netdev->hw_features |= NETIF_F_LRO; 11831 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) 11832 netdev->features |= NETIF_F_LRO; 11833 11834 /* make sure the EEPROM is good */ 11835 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) { 11836 e_dev_err("The EEPROM Checksum Is Not Valid\n"); 11837 err = -EIO; 11838 goto err_sw_init; 11839 } 11840 11841 eth_platform_get_mac_address(&adapter->pdev->dev, 11842 adapter->hw.mac.perm_addr); 11843 11844 eth_hw_addr_set(netdev, hw->mac.perm_addr); 11845 11846 if (!is_valid_ether_addr(netdev->dev_addr)) { 11847 e_dev_err("invalid MAC address\n"); 11848 err = -EIO; 11849 goto err_sw_init; 11850 } 11851 11852 /* Set hw->mac.addr to permanent MAC address */ 11853 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr); 11854 ixgbe_mac_set_default_filter(adapter); 11855 11856 timer_setup(&adapter->service_timer, ixgbe_service_timer, 0); 11857 11858 if (ixgbe_removed(hw->hw_addr)) { 11859 err = -EIO; 11860 goto err_sw_init; 11861 } 11862 INIT_WORK(&adapter->service_task, ixgbe_service_task); 11863 set_bit(__IXGBE_SERVICE_INITED, &adapter->state); 11864 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state); 11865 11866 err = ixgbe_init_interrupt_scheme(adapter); 11867 if (err) 11868 goto err_sw_init; 11869 11870 for (i = 0; i < adapter->num_rx_queues; i++) 11871 u64_stats_init(&adapter->rx_ring[i]->syncp); 11872 for (i = 0; i < adapter->num_tx_queues; i++) 11873 u64_stats_init(&adapter->tx_ring[i]->syncp); 11874 for (i = 0; i < adapter->num_xdp_queues; i++) 11875 u64_stats_init(&adapter->xdp_ring[i]->syncp); 11876 11877 /* WOL not supported for all devices */ 11878 adapter->wol = 0; 11879 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap); 11880 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device, 11881 pdev->subsystem_device); 11882 if (hw->wol_enabled) 11883 adapter->wol = IXGBE_WUFC_MAG; 11884 11885 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 11886 11887 /* save off EEPROM version number */ 11888 ixgbe_set_fw_version(adapter); 11889 11890 /* pick up the PCI bus settings for reporting later */ 11891 if (ixgbe_pcie_from_parent(hw)) 11892 ixgbe_get_parent_bus_info(adapter); 11893 else 11894 hw->mac.ops.get_bus_info(hw); 11895 11896 /* calculate the expected PCIe bandwidth required for optimal 11897 * performance. Note that some older parts will never have enough 11898 * bandwidth due to being older generation PCIe parts. We clamp these 11899 * parts to ensure no warning is displayed if it can't be fixed. 11900 */ 11901 switch (hw->mac.type) { 11902 case ixgbe_mac_82598EB: 11903 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16); 11904 break; 11905 default: 11906 expected_gts = ixgbe_enumerate_functions(adapter) * 10; 11907 break; 11908 } 11909 11910 /* don't check link if we failed to enumerate functions */ 11911 if (expected_gts > 0) 11912 ixgbe_check_minimum_link(adapter, expected_gts); 11913 11914 err = hw->eeprom.ops.read_pba_string(hw, part_str, sizeof(part_str)); 11915 if (err) 11916 strscpy(part_str, "Unknown", sizeof(part_str)); 11917 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present) 11918 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n", 11919 hw->mac.type, hw->phy.type, hw->phy.sfp_type, 11920 part_str); 11921 else 11922 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n", 11923 hw->mac.type, hw->phy.type, part_str); 11924 11925 e_dev_info("%pM\n", netdev->dev_addr); 11926 11927 /* reset the hardware with the new settings */ 11928 err = hw->mac.ops.start_hw(hw); 11929 if (err == -EACCES) { 11930 /* We are running on a pre-production device, log a warning */ 11931 e_dev_warn("This device is a pre-production adapter/LOM. " 11932 "Please be aware there may be issues associated " 11933 "with your hardware. If you are experiencing " 11934 "problems please contact your Intel or hardware " 11935 "representative who provided you with this " 11936 "hardware.\n"); 11937 } 11938 strcpy(netdev->name, "eth%d"); 11939 pci_set_drvdata(pdev, adapter); 11940 11941 devl_lock(adapter->devlink); 11942 ixgbe_devlink_register_port(adapter); 11943 SET_NETDEV_DEVLINK_PORT(adapter->netdev, &adapter->devlink_port); 11944 11945 err = register_netdev(netdev); 11946 if (err) 11947 goto err_register; 11948 11949 11950 /* power down the optics for 82599 SFP+ fiber */ 11951 if (hw->mac.ops.disable_tx_laser) 11952 hw->mac.ops.disable_tx_laser(hw); 11953 11954 /* carrier off reporting is important to ethtool even BEFORE open */ 11955 netif_carrier_off(netdev); 11956 11957 #ifdef CONFIG_IXGBE_DCA 11958 if (dca_add_requester(&pdev->dev) == 0) { 11959 adapter->flags |= IXGBE_FLAG_DCA_ENABLED; 11960 ixgbe_setup_dca(adapter); 11961 } 11962 #endif 11963 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 11964 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs); 11965 for (i = 0; i < adapter->num_vfs; i++) 11966 ixgbe_vf_configuration(pdev, (i | 0x10000000)); 11967 } 11968 11969 /* firmware requires driver version to be 0xFFFFFFFF 11970 * since os does not support feature 11971 */ 11972 if (hw->mac.ops.set_fw_drv_ver) 11973 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF, 11974 sizeof(UTS_RELEASE) - 1, 11975 UTS_RELEASE); 11976 11977 /* add san mac addr to netdev */ 11978 ixgbe_add_sanmac_netdev(netdev); 11979 11980 e_dev_info("%s\n", ixgbe_default_device_descr); 11981 11982 #ifdef CONFIG_IXGBE_HWMON 11983 if (ixgbe_sysfs_init(adapter)) 11984 e_err(probe, "failed to allocate sysfs resources\n"); 11985 #endif /* CONFIG_IXGBE_HWMON */ 11986 11987 ixgbe_dbg_adapter_init(adapter); 11988 11989 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */ 11990 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link) 11991 hw->mac.ops.setup_link(hw, 11992 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL, 11993 true); 11994 11995 err = ixgbe_mii_bus_init(hw); 11996 if (err) 11997 goto err_netdev; 11998 11999 ixgbe_devlink_init_regions(adapter); 12000 devl_register(adapter->devlink); 12001 devl_unlock(adapter->devlink); 12002 return 0; 12003 12004 err_netdev: 12005 unregister_netdev(netdev); 12006 err_register: 12007 devl_port_unregister(&adapter->devlink_port); 12008 devl_unlock(adapter->devlink); 12009 ixgbe_release_hw_control(adapter); 12010 ixgbe_clear_interrupt_scheme(adapter); 12011 err_sw_init: 12012 if (hw->mac.type == ixgbe_mac_e610) 12013 mutex_destroy(&adapter->hw.aci.lock); 12014 ixgbe_disable_sriov(adapter); 12015 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP; 12016 iounmap(adapter->io_addr); 12017 kfree(adapter->jump_tables[0]); 12018 kfree(adapter->mac_table); 12019 kfree(adapter->rss_key); 12020 bitmap_free(adapter->af_xdp_zc_qps); 12021 err_ioremap: 12022 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state); 12023 free_netdev(netdev); 12024 err_alloc_etherdev: 12025 devlink_free(adapter->devlink); 12026 pci_release_mem_regions(pdev); 12027 err_devlink: 12028 err_pci_reg: 12029 err_dma: 12030 if (!adapter || disable_dev) 12031 pci_disable_device(pdev); 12032 return err; 12033 } 12034 12035 /** 12036 * ixgbe_remove - Device Removal Routine 12037 * @pdev: PCI device information struct 12038 * 12039 * ixgbe_remove is called by the PCI subsystem to alert the driver 12040 * that it should release a PCI device. The could be caused by a 12041 * Hot-Plug event, or because the driver is going to be removed from 12042 * memory. 12043 **/ 12044 static void ixgbe_remove(struct pci_dev *pdev) 12045 { 12046 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 12047 struct net_device *netdev; 12048 bool disable_dev; 12049 int i; 12050 12051 /* if !adapter then we already cleaned up in probe */ 12052 if (!adapter) 12053 return; 12054 12055 netdev = adapter->netdev; 12056 devl_lock(adapter->devlink); 12057 devl_unregister(adapter->devlink); 12058 ixgbe_devlink_destroy_regions(adapter); 12059 ixgbe_dbg_adapter_exit(adapter); 12060 12061 set_bit(__IXGBE_REMOVING, &adapter->state); 12062 cancel_work_sync(&adapter->service_task); 12063 12064 if (adapter->hw.mac.type == ixgbe_mac_e610) 12065 ixgbe_disable_link_status_events(adapter); 12066 12067 if (adapter->mii_bus) 12068 mdiobus_unregister(adapter->mii_bus); 12069 12070 #ifdef CONFIG_IXGBE_DCA 12071 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { 12072 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED; 12073 dca_remove_requester(&pdev->dev); 12074 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 12075 IXGBE_DCA_CTRL_DCA_DISABLE); 12076 } 12077 12078 #endif 12079 #ifdef CONFIG_IXGBE_HWMON 12080 ixgbe_sysfs_exit(adapter); 12081 #endif /* CONFIG_IXGBE_HWMON */ 12082 12083 /* remove the added san mac */ 12084 ixgbe_del_sanmac_netdev(netdev); 12085 12086 #ifdef CONFIG_PCI_IOV 12087 ixgbe_disable_sriov(adapter); 12088 #endif 12089 if (netdev->reg_state == NETREG_REGISTERED) 12090 unregister_netdev(netdev); 12091 12092 devl_port_unregister(&adapter->devlink_port); 12093 devl_unlock(adapter->devlink); 12094 devlink_free(adapter->devlink); 12095 12096 ixgbe_stop_ipsec_offload(adapter); 12097 ixgbe_clear_interrupt_scheme(adapter); 12098 12099 ixgbe_release_hw_control(adapter); 12100 12101 #ifdef CONFIG_DCB 12102 kfree(adapter->ixgbe_ieee_pfc); 12103 kfree(adapter->ixgbe_ieee_ets); 12104 12105 #endif 12106 iounmap(adapter->io_addr); 12107 pci_release_mem_regions(pdev); 12108 12109 e_dev_info("complete\n"); 12110 12111 for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) { 12112 if (adapter->jump_tables[i]) { 12113 kfree(adapter->jump_tables[i]->input); 12114 kfree(adapter->jump_tables[i]->mask); 12115 } 12116 kfree(adapter->jump_tables[i]); 12117 } 12118 12119 kfree(adapter->mac_table); 12120 kfree(adapter->rss_key); 12121 bitmap_free(adapter->af_xdp_zc_qps); 12122 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state); 12123 free_netdev(netdev); 12124 12125 if (adapter->hw.mac.type == ixgbe_mac_e610) 12126 mutex_destroy(&adapter->hw.aci.lock); 12127 12128 if (disable_dev) 12129 pci_disable_device(pdev); 12130 } 12131 12132 /** 12133 * ixgbe_io_error_detected - called when PCI error is detected 12134 * @pdev: Pointer to PCI device 12135 * @state: The current pci connection state 12136 * 12137 * This function is called after a PCI bus error affecting 12138 * this device has been detected. 12139 */ 12140 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev, 12141 pci_channel_state_t state) 12142 { 12143 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 12144 struct net_device *netdev = adapter->netdev; 12145 12146 #ifdef CONFIG_PCI_IOV 12147 struct ixgbe_hw *hw = &adapter->hw; 12148 struct pci_dev *bdev, *vfdev; 12149 u32 dw0, dw1, dw2, dw3; 12150 int vf, pos; 12151 u16 req_id, pf_func; 12152 12153 if (adapter->hw.mac.type == ixgbe_mac_82598EB || 12154 adapter->num_vfs == 0) 12155 goto skip_bad_vf_detection; 12156 12157 bdev = pdev->bus->self; 12158 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT)) 12159 bdev = bdev->bus->self; 12160 12161 if (!bdev) 12162 goto skip_bad_vf_detection; 12163 12164 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR); 12165 if (!pos) 12166 goto skip_bad_vf_detection; 12167 12168 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG); 12169 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4); 12170 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8); 12171 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12); 12172 if (ixgbe_removed(hw->hw_addr)) 12173 goto skip_bad_vf_detection; 12174 12175 req_id = dw1 >> 16; 12176 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */ 12177 if (!(req_id & 0x0080)) 12178 goto skip_bad_vf_detection; 12179 12180 pf_func = req_id & 0x01; 12181 if ((pf_func & 1) == (pdev->devfn & 1)) { 12182 unsigned int device_id; 12183 12184 vf = FIELD_GET(0x7F, req_id); 12185 e_dev_err("VF %d has caused a PCIe error\n", vf); 12186 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: " 12187 "%8.8x\tdw3: %8.8x\n", 12188 dw0, dw1, dw2, dw3); 12189 switch (adapter->hw.mac.type) { 12190 case ixgbe_mac_82599EB: 12191 device_id = IXGBE_82599_VF_DEVICE_ID; 12192 break; 12193 case ixgbe_mac_X540: 12194 device_id = IXGBE_X540_VF_DEVICE_ID; 12195 break; 12196 case ixgbe_mac_X550: 12197 device_id = IXGBE_DEV_ID_X550_VF; 12198 break; 12199 case ixgbe_mac_X550EM_x: 12200 device_id = IXGBE_DEV_ID_X550EM_X_VF; 12201 break; 12202 case ixgbe_mac_x550em_a: 12203 device_id = IXGBE_DEV_ID_X550EM_A_VF; 12204 break; 12205 case ixgbe_mac_e610: 12206 device_id = IXGBE_DEV_ID_E610_VF; 12207 break; 12208 default: 12209 device_id = 0; 12210 break; 12211 } 12212 12213 /* Find the pci device of the offending VF */ 12214 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL); 12215 while (vfdev) { 12216 if (vfdev->devfn == (req_id & 0xFF)) 12217 break; 12218 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, 12219 device_id, vfdev); 12220 } 12221 /* 12222 * There's a slim chance the VF could have been hot plugged, 12223 * so if it is no longer present we don't need to issue the 12224 * VFLR. Just clean up the AER in that case. 12225 */ 12226 if (vfdev) { 12227 pcie_flr(vfdev); 12228 /* Free device reference count */ 12229 pci_dev_put(vfdev); 12230 } 12231 } 12232 12233 /* 12234 * Even though the error may have occurred on the other port 12235 * we still need to increment the vf error reference count for 12236 * both ports because the I/O resume function will be called 12237 * for both of them. 12238 */ 12239 adapter->vferr_refcount++; 12240 12241 return PCI_ERS_RESULT_RECOVERED; 12242 12243 skip_bad_vf_detection: 12244 #endif /* CONFIG_PCI_IOV */ 12245 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state)) 12246 return PCI_ERS_RESULT_DISCONNECT; 12247 12248 if (!netif_device_present(netdev)) 12249 return PCI_ERS_RESULT_DISCONNECT; 12250 12251 rtnl_lock(); 12252 netif_device_detach(netdev); 12253 12254 if (netif_running(netdev)) 12255 ixgbe_close_suspend(adapter); 12256 12257 if (state == pci_channel_io_perm_failure) { 12258 rtnl_unlock(); 12259 return PCI_ERS_RESULT_DISCONNECT; 12260 } 12261 12262 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state)) 12263 pci_disable_device(pdev); 12264 rtnl_unlock(); 12265 12266 /* Request a slot reset. */ 12267 return PCI_ERS_RESULT_NEED_RESET; 12268 } 12269 12270 /** 12271 * ixgbe_io_slot_reset - called after the pci bus has been reset. 12272 * @pdev: Pointer to PCI device 12273 * 12274 * Restart the card from scratch, as if from a cold-boot. 12275 */ 12276 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev) 12277 { 12278 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 12279 pci_ers_result_t result; 12280 12281 if (pci_enable_device_mem(pdev)) { 12282 e_err(probe, "Cannot re-enable PCI device after reset.\n"); 12283 result = PCI_ERS_RESULT_DISCONNECT; 12284 } else { 12285 smp_mb__before_atomic(); 12286 clear_bit(__IXGBE_DISABLED, &adapter->state); 12287 adapter->hw.hw_addr = adapter->io_addr; 12288 pci_set_master(pdev); 12289 pci_restore_state(pdev); 12290 pci_save_state(pdev); 12291 12292 pci_wake_from_d3(pdev, false); 12293 12294 ixgbe_reset(adapter); 12295 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); 12296 result = PCI_ERS_RESULT_RECOVERED; 12297 } 12298 12299 return result; 12300 } 12301 12302 /** 12303 * ixgbe_io_resume - called when traffic can start flowing again. 12304 * @pdev: Pointer to PCI device 12305 * 12306 * This callback is called when the error recovery driver tells us that 12307 * its OK to resume normal operation. 12308 */ 12309 static void ixgbe_io_resume(struct pci_dev *pdev) 12310 { 12311 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 12312 struct net_device *netdev = adapter->netdev; 12313 12314 #ifdef CONFIG_PCI_IOV 12315 if (adapter->vferr_refcount) { 12316 e_info(drv, "Resuming after VF err\n"); 12317 adapter->vferr_refcount--; 12318 return; 12319 } 12320 12321 #endif 12322 rtnl_lock(); 12323 if (netif_running(netdev)) 12324 ixgbe_open(netdev); 12325 12326 netif_device_attach(netdev); 12327 rtnl_unlock(); 12328 } 12329 12330 static const struct pci_error_handlers ixgbe_err_handler = { 12331 .error_detected = ixgbe_io_error_detected, 12332 .slot_reset = ixgbe_io_slot_reset, 12333 .resume = ixgbe_io_resume, 12334 }; 12335 12336 static DEFINE_SIMPLE_DEV_PM_OPS(ixgbe_pm_ops, ixgbe_suspend, ixgbe_resume); 12337 12338 static struct pci_driver ixgbe_driver = { 12339 .name = ixgbe_driver_name, 12340 .id_table = ixgbe_pci_tbl, 12341 .probe = ixgbe_probe, 12342 .remove = ixgbe_remove, 12343 .driver.pm = pm_sleep_ptr(&ixgbe_pm_ops), 12344 .shutdown = ixgbe_shutdown, 12345 .sriov_configure = ixgbe_pci_sriov_configure, 12346 .err_handler = &ixgbe_err_handler 12347 }; 12348 12349 /** 12350 * ixgbe_init_module - Driver Registration Routine 12351 * 12352 * ixgbe_init_module is the first routine called when the driver is 12353 * loaded. All it does is register with the PCI subsystem. 12354 **/ 12355 static int __init ixgbe_init_module(void) 12356 { 12357 int ret; 12358 pr_info("%s\n", ixgbe_driver_string); 12359 pr_info("%s\n", ixgbe_copyright); 12360 12361 ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name); 12362 if (!ixgbe_wq) { 12363 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name); 12364 return -ENOMEM; 12365 } 12366 12367 ixgbe_dbg_init(); 12368 12369 ret = pci_register_driver(&ixgbe_driver); 12370 if (ret) { 12371 destroy_workqueue(ixgbe_wq); 12372 ixgbe_dbg_exit(); 12373 return ret; 12374 } 12375 12376 #ifdef CONFIG_IXGBE_DCA 12377 dca_register_notify(&dca_notifier); 12378 #endif 12379 12380 return 0; 12381 } 12382 12383 module_init(ixgbe_init_module); 12384 12385 /** 12386 * ixgbe_exit_module - Driver Exit Cleanup Routine 12387 * 12388 * ixgbe_exit_module is called just before the driver is removed 12389 * from memory. 12390 **/ 12391 static void __exit ixgbe_exit_module(void) 12392 { 12393 #ifdef CONFIG_IXGBE_DCA 12394 dca_unregister_notify(&dca_notifier); 12395 #endif 12396 pci_unregister_driver(&ixgbe_driver); 12397 12398 ixgbe_dbg_exit(); 12399 if (ixgbe_wq) { 12400 destroy_workqueue(ixgbe_wq); 12401 ixgbe_wq = NULL; 12402 } 12403 } 12404 12405 #ifdef CONFIG_IXGBE_DCA 12406 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event, 12407 void *p) 12408 { 12409 int ret_val; 12410 12411 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event, 12412 __ixgbe_notify_dca); 12413 12414 return ret_val ? NOTIFY_BAD : NOTIFY_DONE; 12415 } 12416 12417 #endif /* CONFIG_IXGBE_DCA */ 12418 12419 module_exit(ixgbe_exit_module); 12420 12421 /* ixgbe_main.c */ 12422