1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2024 Intel Corporation. */ 3 4 #include <linux/types.h> 5 #include <linux/module.h> 6 #include <linux/pci.h> 7 #include <linux/netdevice.h> 8 #include <linux/vmalloc.h> 9 #include <linux/string.h> 10 #include <linux/in.h> 11 #include <linux/interrupt.h> 12 #include <linux/iopoll.h> 13 #include <linux/ip.h> 14 #include <linux/tcp.h> 15 #include <linux/sctp.h> 16 #include <linux/pkt_sched.h> 17 #include <linux/ipv6.h> 18 #include <linux/slab.h> 19 #include <net/checksum.h> 20 #include <net/ip6_checksum.h> 21 #include <linux/etherdevice.h> 22 #include <linux/ethtool.h> 23 #include <linux/if.h> 24 #include <linux/if_vlan.h> 25 #include <linux/if_macvlan.h> 26 #include <linux/if_bridge.h> 27 #include <linux/prefetch.h> 28 #include <linux/bpf.h> 29 #include <linux/bpf_trace.h> 30 #include <linux/atomic.h> 31 #include <linux/numa.h> 32 #include <generated/utsrelease.h> 33 #include <scsi/fc/fc_fcoe.h> 34 #include <net/udp_tunnel.h> 35 #include <net/pkt_cls.h> 36 #include <net/tc_act/tc_gact.h> 37 #include <net/tc_act/tc_mirred.h> 38 #include <net/vxlan.h> 39 #include <net/mpls.h> 40 #include <net/netdev_queues.h> 41 #include <net/xdp_sock_drv.h> 42 #include <net/xfrm.h> 43 44 #include "ixgbe.h" 45 #include "ixgbe_common.h" 46 #include "ixgbe_e610.h" 47 #include "ixgbe_dcb_82599.h" 48 #include "ixgbe_mbx.h" 49 #include "ixgbe_phy.h" 50 #include "ixgbe_sriov.h" 51 #include "ixgbe_model.h" 52 #include "ixgbe_txrx_common.h" 53 #include "devlink/devlink.h" 54 55 char ixgbe_driver_name[] = "ixgbe"; 56 static const char ixgbe_driver_string[] = 57 "Intel(R) 10 Gigabit PCI Express Network Driver"; 58 #ifdef IXGBE_FCOE 59 char ixgbe_default_device_descr[] = 60 "Intel(R) 10 Gigabit Network Connection"; 61 #else 62 static char ixgbe_default_device_descr[] = 63 "Intel(R) 10 Gigabit Network Connection"; 64 #endif 65 static const char ixgbe_copyright[] = 66 "Copyright (c) 1999-2016 Intel Corporation."; 67 68 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter"; 69 70 static const struct ixgbe_info *ixgbe_info_tbl[] = { 71 [board_82598] = &ixgbe_82598_info, 72 [board_82599] = &ixgbe_82599_info, 73 [board_X540] = &ixgbe_X540_info, 74 [board_X550] = &ixgbe_X550_info, 75 [board_X550EM_x] = &ixgbe_X550EM_x_info, 76 [board_x550em_x_fw] = &ixgbe_x550em_x_fw_info, 77 [board_x550em_a] = &ixgbe_x550em_a_info, 78 [board_x550em_a_fw] = &ixgbe_x550em_a_fw_info, 79 [board_e610] = &ixgbe_e610_info, 80 }; 81 82 /* ixgbe_pci_tbl - PCI Device ID Table 83 * 84 * Wildcard entries (PCI_ANY_ID) should come last 85 * Last entry must be all 0s 86 * 87 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 88 * Class, Class Mask, private data (not used) } 89 */ 90 static const struct pci_device_id ixgbe_pci_tbl[] = { 91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 }, 92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 }, 93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 }, 94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 }, 95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 }, 96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 }, 97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 }, 98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 }, 99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 }, 100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 }, 101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 }, 102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 }, 103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 }, 104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 }, 105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 }, 106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 }, 107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 }, 108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 }, 109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 }, 110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 }, 111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 }, 112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 }, 113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 }, 114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 }, 115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 }, 116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 }, 117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 }, 118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 }, 119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 }, 120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 }, 121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550}, 122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550}, 123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x}, 124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x}, 125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x}, 126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x}, 127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x}, 128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw}, 129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a }, 130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a }, 131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a }, 132 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a }, 133 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a }, 134 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a}, 135 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a }, 136 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw }, 137 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw }, 138 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_BACKPLANE), board_e610}, 139 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_SFP), board_e610}, 140 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_10G_T), board_e610}, 141 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_2_5G_T), board_e610}, 142 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_SGMII), board_e610}, 143 /* required last entry */ 144 {0, } 145 }; 146 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl); 147 148 #ifdef CONFIG_IXGBE_DCA 149 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event, 150 void *p); 151 static struct notifier_block dca_notifier = { 152 .notifier_call = ixgbe_notify_dca, 153 .next = NULL, 154 .priority = 0 155 }; 156 #endif 157 158 #ifdef CONFIG_PCI_IOV 159 static unsigned int max_vfs; 160 module_param(max_vfs, uint, 0); 161 MODULE_PARM_DESC(max_vfs, 162 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)"); 163 #endif /* CONFIG_PCI_IOV */ 164 165 static bool allow_unsupported_sfp; 166 module_param(allow_unsupported_sfp, bool, 0444); 167 MODULE_PARM_DESC(allow_unsupported_sfp, 168 "Allow unsupported and untested SFP+ modules on 82599-based adapters"); 169 170 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) 171 static int debug = -1; 172 module_param(debug, int, 0); 173 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 174 175 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver"); 176 MODULE_LICENSE("GPL v2"); 177 178 DEFINE_STATIC_KEY_FALSE(ixgbe_xdp_locking_key); 179 EXPORT_SYMBOL(ixgbe_xdp_locking_key); 180 181 static struct workqueue_struct *ixgbe_wq; 182 183 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev); 184 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *); 185 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *); 186 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *); 187 188 static const struct net_device_ops ixgbe_netdev_ops; 189 190 static bool netif_is_ixgbe(struct net_device *dev) 191 { 192 return dev && (dev->netdev_ops == &ixgbe_netdev_ops); 193 } 194 195 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter, 196 u32 reg, u16 *value) 197 { 198 struct pci_dev *parent_dev; 199 struct pci_bus *parent_bus; 200 201 parent_bus = adapter->pdev->bus->parent; 202 if (!parent_bus) 203 return -1; 204 205 parent_dev = parent_bus->self; 206 if (!parent_dev) 207 return -1; 208 209 if (!pci_is_pcie(parent_dev)) 210 return -1; 211 212 pcie_capability_read_word(parent_dev, reg, value); 213 if (*value == IXGBE_FAILED_READ_CFG_WORD && 214 ixgbe_check_cfg_remove(&adapter->hw, parent_dev)) 215 return -1; 216 return 0; 217 } 218 219 static int ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter) 220 { 221 struct ixgbe_hw *hw = &adapter->hw; 222 u16 link_status = 0; 223 int err; 224 225 hw->bus.type = ixgbe_bus_type_pci_express; 226 227 /* Get the negotiated link width and speed from PCI config space of the 228 * parent, as this device is behind a switch 229 */ 230 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status); 231 232 /* assume caller will handle error case */ 233 if (err) 234 return err; 235 236 hw->bus.width = ixgbe_convert_bus_width(link_status); 237 hw->bus.speed = ixgbe_convert_bus_speed(link_status); 238 239 return 0; 240 } 241 242 /** 243 * ixgbe_pcie_from_parent - Determine whether PCIe info should come from parent 244 * @hw: hw specific details 245 * 246 * This function is used by probe to determine whether a device's PCI-Express 247 * bandwidth details should be gathered from the parent bus instead of from the 248 * device. Used to ensure that various locations all have the correct device ID 249 * checks. 250 * 251 * Return: true if information should be collected from the parent bus, false 252 * otherwise 253 */ 254 static bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw) 255 { 256 switch (hw->device_id) { 257 case IXGBE_DEV_ID_82599_SFP_SF_QP: 258 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 259 return true; 260 default: 261 return false; 262 } 263 } 264 265 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter, 266 int expected_gts) 267 { 268 struct ixgbe_hw *hw = &adapter->hw; 269 struct pci_dev *pdev; 270 271 /* Some devices are not connected over PCIe and thus do not negotiate 272 * speed. These devices do not have valid bus info, and thus any report 273 * we generate may not be correct. 274 */ 275 if (hw->bus.type == ixgbe_bus_type_internal) 276 return; 277 278 /* determine whether to use the parent device */ 279 if (ixgbe_pcie_from_parent(&adapter->hw)) 280 pdev = adapter->pdev->bus->parent->self; 281 else 282 pdev = adapter->pdev; 283 284 pcie_print_link_status(pdev); 285 } 286 287 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter) 288 { 289 if (!test_bit(__IXGBE_DOWN, &adapter->state) && 290 !test_bit(__IXGBE_REMOVING, &adapter->state) && 291 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state)) 292 queue_work(ixgbe_wq, &adapter->service_task); 293 } 294 295 static void ixgbe_remove_adapter(struct ixgbe_hw *hw) 296 { 297 struct ixgbe_adapter *adapter = hw->back; 298 299 if (!hw->hw_addr) 300 return; 301 hw->hw_addr = NULL; 302 e_dev_err("Adapter removed\n"); 303 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state)) 304 ixgbe_service_event_schedule(adapter); 305 } 306 307 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg) 308 { 309 u8 __iomem *reg_addr; 310 u32 value; 311 int i; 312 313 reg_addr = READ_ONCE(hw->hw_addr); 314 if (ixgbe_removed(reg_addr)) 315 return IXGBE_FAILED_READ_REG; 316 317 /* Register read of 0xFFFFFFF can indicate the adapter has been removed, 318 * so perform several status register reads to determine if the adapter 319 * has been removed. 320 */ 321 for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) { 322 value = readl(reg_addr + IXGBE_STATUS); 323 if (value != IXGBE_FAILED_READ_REG) 324 break; 325 mdelay(3); 326 } 327 328 if (value == IXGBE_FAILED_READ_REG) 329 ixgbe_remove_adapter(hw); 330 else 331 value = readl(reg_addr + reg); 332 return value; 333 } 334 335 /** 336 * ixgbe_read_reg - Read from device register 337 * @hw: hw specific details 338 * @reg: offset of register to read 339 * 340 * Returns : value read or IXGBE_FAILED_READ_REG if removed 341 * 342 * This function is used to read device registers. It checks for device 343 * removal by confirming any read that returns all ones by checking the 344 * status register value for all ones. This function avoids reading from 345 * the hardware if a removal was previously detected in which case it 346 * returns IXGBE_FAILED_READ_REG (all ones). 347 */ 348 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg) 349 { 350 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); 351 u32 value; 352 353 if (ixgbe_removed(reg_addr)) 354 return IXGBE_FAILED_READ_REG; 355 if (unlikely(hw->phy.nw_mng_if_sel & 356 IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) { 357 struct ixgbe_adapter *adapter; 358 int i; 359 360 for (i = 0; i < 200; ++i) { 361 value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY); 362 if (likely(!value)) 363 goto writes_completed; 364 if (value == IXGBE_FAILED_READ_REG) { 365 ixgbe_remove_adapter(hw); 366 return IXGBE_FAILED_READ_REG; 367 } 368 udelay(5); 369 } 370 371 adapter = hw->back; 372 e_warn(hw, "register writes incomplete %08x\n", value); 373 } 374 375 writes_completed: 376 value = readl(reg_addr + reg); 377 if (unlikely(value == IXGBE_FAILED_READ_REG)) 378 value = ixgbe_check_remove(hw, reg); 379 return value; 380 } 381 382 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev) 383 { 384 u16 value; 385 386 pci_read_config_word(pdev, PCI_VENDOR_ID, &value); 387 if (value == IXGBE_FAILED_READ_CFG_WORD) { 388 ixgbe_remove_adapter(hw); 389 return true; 390 } 391 return false; 392 } 393 394 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg) 395 { 396 struct ixgbe_adapter *adapter = hw->back; 397 u16 value; 398 399 if (ixgbe_removed(hw->hw_addr)) 400 return IXGBE_FAILED_READ_CFG_WORD; 401 pci_read_config_word(adapter->pdev, reg, &value); 402 if (value == IXGBE_FAILED_READ_CFG_WORD && 403 ixgbe_check_cfg_remove(hw, adapter->pdev)) 404 return IXGBE_FAILED_READ_CFG_WORD; 405 return value; 406 } 407 408 #ifdef CONFIG_PCI_IOV 409 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg) 410 { 411 struct ixgbe_adapter *adapter = hw->back; 412 u32 value; 413 414 if (ixgbe_removed(hw->hw_addr)) 415 return IXGBE_FAILED_READ_CFG_DWORD; 416 pci_read_config_dword(adapter->pdev, reg, &value); 417 if (value == IXGBE_FAILED_READ_CFG_DWORD && 418 ixgbe_check_cfg_remove(hw, adapter->pdev)) 419 return IXGBE_FAILED_READ_CFG_DWORD; 420 return value; 421 } 422 #endif /* CONFIG_PCI_IOV */ 423 424 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value) 425 { 426 struct ixgbe_adapter *adapter = hw->back; 427 428 if (ixgbe_removed(hw->hw_addr)) 429 return; 430 pci_write_config_word(adapter->pdev, reg, value); 431 } 432 433 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter) 434 { 435 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state)); 436 437 /* flush memory to make sure state is correct before next watchdog */ 438 smp_mb__before_atomic(); 439 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state); 440 } 441 442 struct ixgbe_reg_info { 443 u32 ofs; 444 char *name; 445 }; 446 447 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = { 448 449 /* General Registers */ 450 {IXGBE_CTRL, "CTRL"}, 451 {IXGBE_STATUS, "STATUS"}, 452 {IXGBE_CTRL_EXT, "CTRL_EXT"}, 453 454 /* Interrupt Registers */ 455 {IXGBE_EICR, "EICR"}, 456 457 /* RX Registers */ 458 {IXGBE_SRRCTL(0), "SRRCTL"}, 459 {IXGBE_DCA_RXCTRL(0), "DRXCTL"}, 460 {IXGBE_RDLEN(0), "RDLEN"}, 461 {IXGBE_RDH(0), "RDH"}, 462 {IXGBE_RDT(0), "RDT"}, 463 {IXGBE_RXDCTL(0), "RXDCTL"}, 464 {IXGBE_RDBAL(0), "RDBAL"}, 465 {IXGBE_RDBAH(0), "RDBAH"}, 466 467 /* TX Registers */ 468 {IXGBE_TDBAL(0), "TDBAL"}, 469 {IXGBE_TDBAH(0), "TDBAH"}, 470 {IXGBE_TDLEN(0), "TDLEN"}, 471 {IXGBE_TDH(0), "TDH"}, 472 {IXGBE_TDT(0), "TDT"}, 473 {IXGBE_TXDCTL(0), "TXDCTL"}, 474 475 /* List Terminator */ 476 { .name = NULL } 477 }; 478 479 480 /* 481 * ixgbe_regdump - register printout routine 482 */ 483 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo) 484 { 485 int i; 486 char rname[16]; 487 u32 regs[64]; 488 489 switch (reginfo->ofs) { 490 case IXGBE_SRRCTL(0): 491 for (i = 0; i < 64; i++) 492 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); 493 break; 494 case IXGBE_DCA_RXCTRL(0): 495 for (i = 0; i < 64; i++) 496 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); 497 break; 498 case IXGBE_RDLEN(0): 499 for (i = 0; i < 64; i++) 500 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i)); 501 break; 502 case IXGBE_RDH(0): 503 for (i = 0; i < 64; i++) 504 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i)); 505 break; 506 case IXGBE_RDT(0): 507 for (i = 0; i < 64; i++) 508 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i)); 509 break; 510 case IXGBE_RXDCTL(0): 511 for (i = 0; i < 64; i++) 512 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); 513 break; 514 case IXGBE_RDBAL(0): 515 for (i = 0; i < 64; i++) 516 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i)); 517 break; 518 case IXGBE_RDBAH(0): 519 for (i = 0; i < 64; i++) 520 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i)); 521 break; 522 case IXGBE_TDBAL(0): 523 for (i = 0; i < 64; i++) 524 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i)); 525 break; 526 case IXGBE_TDBAH(0): 527 for (i = 0; i < 64; i++) 528 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i)); 529 break; 530 case IXGBE_TDLEN(0): 531 for (i = 0; i < 64; i++) 532 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i)); 533 break; 534 case IXGBE_TDH(0): 535 for (i = 0; i < 64; i++) 536 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i)); 537 break; 538 case IXGBE_TDT(0): 539 for (i = 0; i < 64; i++) 540 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i)); 541 break; 542 case IXGBE_TXDCTL(0): 543 for (i = 0; i < 64; i++) 544 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i)); 545 break; 546 default: 547 pr_info("%-15s %08x\n", 548 reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs)); 549 return; 550 } 551 552 i = 0; 553 while (i < 64) { 554 int j; 555 char buf[9 * 8 + 1]; 556 char *p = buf; 557 558 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7); 559 for (j = 0; j < 8; j++) 560 p += sprintf(p, " %08x", regs[i++]); 561 pr_err("%-15s%s\n", rname, buf); 562 } 563 564 } 565 566 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n) 567 { 568 struct ixgbe_tx_buffer *tx_buffer; 569 570 tx_buffer = &ring->tx_buffer_info[ring->next_to_clean]; 571 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n", 572 n, ring->next_to_use, ring->next_to_clean, 573 (u64)dma_unmap_addr(tx_buffer, dma), 574 dma_unmap_len(tx_buffer, len), 575 tx_buffer->next_to_watch, 576 (u64)tx_buffer->time_stamp); 577 } 578 579 /* 580 * ixgbe_dump - Print registers, tx-rings and rx-rings 581 */ 582 static void ixgbe_dump(struct ixgbe_adapter *adapter) 583 { 584 struct net_device *netdev = adapter->netdev; 585 struct ixgbe_hw *hw = &adapter->hw; 586 struct ixgbe_reg_info *reginfo; 587 int n = 0; 588 struct ixgbe_ring *ring; 589 struct ixgbe_tx_buffer *tx_buffer; 590 union ixgbe_adv_tx_desc *tx_desc; 591 struct my_u0 { u64 a; u64 b; } *u0; 592 struct ixgbe_ring *rx_ring; 593 union ixgbe_adv_rx_desc *rx_desc; 594 struct ixgbe_rx_buffer *rx_buffer_info; 595 int i = 0; 596 597 if (!netif_msg_hw(adapter)) 598 return; 599 600 /* Print netdevice Info */ 601 if (netdev) { 602 dev_info(&adapter->pdev->dev, "Net device Info\n"); 603 pr_info("Device Name state " 604 "trans_start\n"); 605 pr_info("%-15s %016lX %016lX\n", 606 netdev->name, 607 netdev->state, 608 dev_trans_start(netdev)); 609 } 610 611 /* Print Registers */ 612 dev_info(&adapter->pdev->dev, "Register Dump\n"); 613 pr_info(" Register Name Value\n"); 614 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl; 615 reginfo->name; reginfo++) { 616 ixgbe_regdump(hw, reginfo); 617 } 618 619 /* Print TX Ring Summary */ 620 if (!netdev || !netif_running(netdev)) 621 return; 622 623 dev_info(&adapter->pdev->dev, "TX Rings Summary\n"); 624 pr_info(" %s %s %s %s\n", 625 "Queue [NTU] [NTC] [bi(ntc)->dma ]", 626 "leng", "ntw", "timestamp"); 627 for (n = 0; n < adapter->num_tx_queues; n++) { 628 ring = adapter->tx_ring[n]; 629 ixgbe_print_buffer(ring, n); 630 } 631 632 for (n = 0; n < adapter->num_xdp_queues; n++) { 633 ring = adapter->xdp_ring[n]; 634 ixgbe_print_buffer(ring, n); 635 } 636 637 /* Print TX Rings */ 638 if (!netif_msg_tx_done(adapter)) 639 goto rx_ring_summary; 640 641 dev_info(&adapter->pdev->dev, "TX Rings Dump\n"); 642 643 /* Transmit Descriptor Formats 644 * 645 * 82598 Advanced Transmit Descriptor 646 * +--------------------------------------------------------------+ 647 * 0 | Buffer Address [63:0] | 648 * +--------------------------------------------------------------+ 649 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN | 650 * +--------------------------------------------------------------+ 651 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0 652 * 653 * 82598 Advanced Transmit Descriptor (Write-Back Format) 654 * +--------------------------------------------------------------+ 655 * 0 | RSV [63:0] | 656 * +--------------------------------------------------------------+ 657 * 8 | RSV | STA | NXTSEQ | 658 * +--------------------------------------------------------------+ 659 * 63 36 35 32 31 0 660 * 661 * 82599+ Advanced Transmit Descriptor 662 * +--------------------------------------------------------------+ 663 * 0 | Buffer Address [63:0] | 664 * +--------------------------------------------------------------+ 665 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN | 666 * +--------------------------------------------------------------+ 667 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0 668 * 669 * 82599+ Advanced Transmit Descriptor (Write-Back Format) 670 * +--------------------------------------------------------------+ 671 * 0 | RSV [63:0] | 672 * +--------------------------------------------------------------+ 673 * 8 | RSV | STA | RSV | 674 * +--------------------------------------------------------------+ 675 * 63 36 35 32 31 0 676 */ 677 678 for (n = 0; n < adapter->num_tx_queues; n++) { 679 ring = adapter->tx_ring[n]; 680 pr_info("------------------------------------\n"); 681 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index); 682 pr_info("------------------------------------\n"); 683 pr_info("%s%s %s %s %s %s\n", 684 "T [desc] [address 63:0 ] ", 685 "[PlPOIdStDDt Ln] [bi->dma ] ", 686 "leng", "ntw", "timestamp", "bi->skb"); 687 688 for (i = 0; ring->desc && (i < ring->count); i++) { 689 tx_desc = IXGBE_TX_DESC(ring, i); 690 tx_buffer = &ring->tx_buffer_info[i]; 691 u0 = (struct my_u0 *)tx_desc; 692 if (dma_unmap_len(tx_buffer, len) > 0) { 693 const char *ring_desc; 694 695 if (i == ring->next_to_use && 696 i == ring->next_to_clean) 697 ring_desc = " NTC/U"; 698 else if (i == ring->next_to_use) 699 ring_desc = " NTU"; 700 else if (i == ring->next_to_clean) 701 ring_desc = " NTC"; 702 else 703 ring_desc = ""; 704 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p%s", 705 i, 706 le64_to_cpu((__force __le64)u0->a), 707 le64_to_cpu((__force __le64)u0->b), 708 (u64)dma_unmap_addr(tx_buffer, dma), 709 dma_unmap_len(tx_buffer, len), 710 tx_buffer->next_to_watch, 711 (u64)tx_buffer->time_stamp, 712 tx_buffer->skb, 713 ring_desc); 714 715 if (netif_msg_pktdata(adapter) && 716 tx_buffer->skb) 717 print_hex_dump(KERN_INFO, "", 718 DUMP_PREFIX_ADDRESS, 16, 1, 719 tx_buffer->skb->data, 720 dma_unmap_len(tx_buffer, len), 721 true); 722 } 723 } 724 } 725 726 /* Print RX Rings Summary */ 727 rx_ring_summary: 728 dev_info(&adapter->pdev->dev, "RX Rings Summary\n"); 729 pr_info("Queue [NTU] [NTC]\n"); 730 for (n = 0; n < adapter->num_rx_queues; n++) { 731 rx_ring = adapter->rx_ring[n]; 732 pr_info("%5d %5X %5X\n", 733 n, rx_ring->next_to_use, rx_ring->next_to_clean); 734 } 735 736 /* Print RX Rings */ 737 if (!netif_msg_rx_status(adapter)) 738 return; 739 740 dev_info(&adapter->pdev->dev, "RX Rings Dump\n"); 741 742 /* Receive Descriptor Formats 743 * 744 * 82598 Advanced Receive Descriptor (Read) Format 745 * 63 1 0 746 * +-----------------------------------------------------+ 747 * 0 | Packet Buffer Address [63:1] |A0/NSE| 748 * +----------------------------------------------+------+ 749 * 8 | Header Buffer Address [63:1] | DD | 750 * +-----------------------------------------------------+ 751 * 752 * 753 * 82598 Advanced Receive Descriptor (Write-Back) Format 754 * 755 * 63 48 47 32 31 30 21 20 16 15 4 3 0 756 * +------------------------------------------------------+ 757 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS | 758 * | Packet | IP | | | | Type | Type | 759 * | Checksum | Ident | | | | | | 760 * +------------------------------------------------------+ 761 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 762 * +------------------------------------------------------+ 763 * 63 48 47 32 31 20 19 0 764 * 765 * 82599+ Advanced Receive Descriptor (Read) Format 766 * 63 1 0 767 * +-----------------------------------------------------+ 768 * 0 | Packet Buffer Address [63:1] |A0/NSE| 769 * +----------------------------------------------+------+ 770 * 8 | Header Buffer Address [63:1] | DD | 771 * +-----------------------------------------------------+ 772 * 773 * 774 * 82599+ Advanced Receive Descriptor (Write-Back) Format 775 * 776 * 63 48 47 32 31 30 21 20 17 16 4 3 0 777 * +------------------------------------------------------+ 778 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS | 779 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type | 780 * |/ Flow Dir Flt ID | | | | | | 781 * +------------------------------------------------------+ 782 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP | 783 * +------------------------------------------------------+ 784 * 63 48 47 32 31 20 19 0 785 */ 786 787 for (n = 0; n < adapter->num_rx_queues; n++) { 788 rx_ring = adapter->rx_ring[n]; 789 pr_info("------------------------------------\n"); 790 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index); 791 pr_info("------------------------------------\n"); 792 pr_info("%s%s%s\n", 793 "R [desc] [ PktBuf A0] ", 794 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ", 795 "<-- Adv Rx Read format"); 796 pr_info("%s%s%s\n", 797 "RWB[desc] [PcsmIpSHl PtRs] ", 798 "[vl er S cks ln] ---------------- [bi->skb ] ", 799 "<-- Adv Rx Write-Back format"); 800 801 for (i = 0; i < rx_ring->count; i++) { 802 const char *ring_desc; 803 804 if (i == rx_ring->next_to_use) 805 ring_desc = " NTU"; 806 else if (i == rx_ring->next_to_clean) 807 ring_desc = " NTC"; 808 else 809 ring_desc = ""; 810 811 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 812 rx_desc = IXGBE_RX_DESC(rx_ring, i); 813 u0 = (struct my_u0 *)rx_desc; 814 if (rx_desc->wb.upper.length) { 815 /* Descriptor Done */ 816 pr_info("RWB[0x%03X] %016llX %016llX ---------------- %p%s\n", 817 i, 818 le64_to_cpu((__force __le64)u0->a), 819 le64_to_cpu((__force __le64)u0->b), 820 rx_buffer_info->skb, 821 ring_desc); 822 } else { 823 pr_info("R [0x%03X] %016llX %016llX %016llX %p%s\n", 824 i, 825 le64_to_cpu((__force __le64)u0->a), 826 le64_to_cpu((__force __le64)u0->b), 827 (u64)rx_buffer_info->dma, 828 rx_buffer_info->skb, 829 ring_desc); 830 831 if (netif_msg_pktdata(adapter) && 832 rx_buffer_info->dma) { 833 print_hex_dump(KERN_INFO, "", 834 DUMP_PREFIX_ADDRESS, 16, 1, 835 page_address(rx_buffer_info->page) + 836 rx_buffer_info->page_offset, 837 ixgbe_rx_bufsz(rx_ring), true); 838 } 839 } 840 } 841 } 842 } 843 844 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter) 845 { 846 u32 ctrl_ext; 847 848 /* Let firmware take over control of h/w */ 849 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); 850 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, 851 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD); 852 } 853 854 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter) 855 { 856 u32 ctrl_ext; 857 858 /* Let firmware know the driver has taken over */ 859 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); 860 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, 861 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD); 862 } 863 864 /** 865 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors 866 * @adapter: pointer to adapter struct 867 * @direction: 0 for Rx, 1 for Tx, -1 for other causes 868 * @queue: queue to map the corresponding interrupt to 869 * @msix_vector: the vector to map to the corresponding queue 870 * 871 */ 872 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction, 873 u8 queue, u8 msix_vector) 874 { 875 u32 ivar, index; 876 struct ixgbe_hw *hw = &adapter->hw; 877 switch (hw->mac.type) { 878 case ixgbe_mac_82598EB: 879 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 880 if (direction == -1) 881 direction = 0; 882 index = (((direction * 64) + queue) >> 2) & 0x1F; 883 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 884 ivar &= ~(0xFF << (8 * (queue & 0x3))); 885 ivar |= (msix_vector << (8 * (queue & 0x3))); 886 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar); 887 break; 888 case ixgbe_mac_82599EB: 889 case ixgbe_mac_X540: 890 case ixgbe_mac_X550: 891 case ixgbe_mac_X550EM_x: 892 case ixgbe_mac_x550em_a: 893 case ixgbe_mac_e610: 894 if (direction == -1) { 895 /* other causes */ 896 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 897 index = ((queue & 1) * 8); 898 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC); 899 ivar &= ~(0xFF << index); 900 ivar |= (msix_vector << index); 901 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar); 902 break; 903 } else { 904 /* tx or rx causes */ 905 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 906 index = ((16 * (queue & 1)) + (8 * direction)); 907 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1)); 908 ivar &= ~(0xFF << index); 909 ivar |= (msix_vector << index); 910 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar); 911 break; 912 } 913 default: 914 break; 915 } 916 } 917 918 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter, 919 u64 qmask) 920 { 921 u32 mask; 922 923 switch (adapter->hw.mac.type) { 924 case ixgbe_mac_82598EB: 925 mask = (IXGBE_EIMS_RTX_QUEUE & qmask); 926 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 927 break; 928 case ixgbe_mac_82599EB: 929 case ixgbe_mac_X540: 930 case ixgbe_mac_X550: 931 case ixgbe_mac_X550EM_x: 932 case ixgbe_mac_x550em_a: 933 case ixgbe_mac_e610: 934 mask = (qmask & 0xFFFFFFFF); 935 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); 936 mask = (qmask >> 32); 937 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask); 938 break; 939 default: 940 break; 941 } 942 } 943 944 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter) 945 { 946 struct ixgbe_hw *hw = &adapter->hw; 947 struct ixgbe_hw_stats *hwstats = &adapter->stats; 948 int i; 949 u32 data; 950 951 if ((hw->fc.current_mode != ixgbe_fc_full) && 952 (hw->fc.current_mode != ixgbe_fc_rx_pause)) 953 return; 954 955 switch (hw->mac.type) { 956 case ixgbe_mac_82598EB: 957 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 958 break; 959 default: 960 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 961 } 962 hwstats->lxoffrxc += data; 963 964 /* refill credits (no tx hang) if we received xoff */ 965 if (!data) 966 return; 967 968 for (i = 0; i < adapter->num_tx_queues; i++) 969 clear_bit(__IXGBE_HANG_CHECK_ARMED, 970 &adapter->tx_ring[i]->state); 971 972 for (i = 0; i < adapter->num_xdp_queues; i++) 973 clear_bit(__IXGBE_HANG_CHECK_ARMED, 974 &adapter->xdp_ring[i]->state); 975 } 976 977 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter) 978 { 979 struct ixgbe_hw *hw = &adapter->hw; 980 struct ixgbe_hw_stats *hwstats = &adapter->stats; 981 u32 xoff[8] = {0}; 982 u8 tc; 983 int i; 984 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable; 985 986 if (adapter->ixgbe_ieee_pfc) 987 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en); 988 989 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) { 990 ixgbe_update_xoff_rx_lfc(adapter); 991 return; 992 } 993 994 /* update stats for each tc, only valid with PFC enabled */ 995 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) { 996 u32 pxoffrxc; 997 998 switch (hw->mac.type) { 999 case ixgbe_mac_82598EB: 1000 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i)); 1001 break; 1002 default: 1003 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i)); 1004 } 1005 hwstats->pxoffrxc[i] += pxoffrxc; 1006 /* Get the TC for given UP */ 1007 tc = netdev_get_prio_tc_map(adapter->netdev, i); 1008 xoff[tc] += pxoffrxc; 1009 } 1010 1011 /* disarm tx queues that have received xoff frames */ 1012 for (i = 0; i < adapter->num_tx_queues; i++) { 1013 struct ixgbe_ring *tx_ring = adapter->tx_ring[i]; 1014 1015 tc = tx_ring->dcb_tc; 1016 if (xoff[tc]) 1017 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state); 1018 } 1019 1020 for (i = 0; i < adapter->num_xdp_queues; i++) { 1021 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i]; 1022 1023 tc = xdp_ring->dcb_tc; 1024 if (xoff[tc]) 1025 clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state); 1026 } 1027 } 1028 1029 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring) 1030 { 1031 return ring->stats.packets; 1032 } 1033 1034 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring) 1035 { 1036 unsigned int head, tail; 1037 1038 head = ring->next_to_clean; 1039 tail = ring->next_to_use; 1040 1041 return ((head <= tail) ? tail : tail + ring->count) - head; 1042 } 1043 1044 /** 1045 * ixgbe_get_vf_idx - provide VF index number based on queue index 1046 * @adapter: pointer to the adapter struct 1047 * @queue: Tx queue identifier 1048 * @vf: output VF index 1049 * 1050 * Provide VF index number associated to the input queue. 1051 * 1052 * Returns: 0 if VF provided or error number. 1053 */ 1054 static int ixgbe_get_vf_idx(struct ixgbe_adapter *adapter, u16 queue, u16 *vf) 1055 { 1056 struct ixgbe_hw *hw = &adapter->hw; 1057 u8 queue_count; 1058 u32 reg; 1059 1060 if (queue >= adapter->num_tx_queues) 1061 return -EINVAL; 1062 1063 /* Determine number of queues by checking 1064 * number of virtual functions 1065 */ 1066 reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); 1067 switch (reg & IXGBE_GCR_EXT_VT_MODE_MASK) { 1068 case IXGBE_GCR_EXT_VT_MODE_64: 1069 queue_count = IXGBE_64VFS_QUEUES; 1070 break; 1071 case IXGBE_GCR_EXT_VT_MODE_32: 1072 queue_count = IXGBE_32VFS_QUEUES; 1073 break; 1074 case IXGBE_GCR_EXT_VT_MODE_16: 1075 queue_count = IXGBE_16VFS_QUEUES; 1076 break; 1077 default: 1078 return -EINVAL; 1079 } 1080 1081 *vf = queue / queue_count; 1082 1083 return 0; 1084 } 1085 1086 static bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring) 1087 { 1088 u32 tx_done = ixgbe_get_tx_completed(tx_ring); 1089 u32 tx_done_old = tx_ring->tx_stats.tx_done_old; 1090 u32 tx_pending = ixgbe_get_tx_pending(tx_ring); 1091 1092 clear_check_for_tx_hang(tx_ring); 1093 1094 /* 1095 * Check for a hung queue, but be thorough. This verifies 1096 * that a transmit has been completed since the previous 1097 * check AND there is at least one packet pending. The 1098 * ARMED bit is set to indicate a potential hang. The 1099 * bit is cleared if a pause frame is received to remove 1100 * false hang detection due to PFC or 802.3x frames. By 1101 * requiring this to fail twice we avoid races with 1102 * pfc clearing the ARMED bit and conditions where we 1103 * run the check_tx_hang logic with a transmit completion 1104 * pending but without time to complete it yet. 1105 */ 1106 if (tx_done_old == tx_done && tx_pending) 1107 /* make sure it is true for two checks in a row */ 1108 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED, 1109 &tx_ring->state); 1110 /* update completed stats and continue */ 1111 tx_ring->tx_stats.tx_done_old = tx_done; 1112 /* reset the countdown */ 1113 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state); 1114 1115 return false; 1116 } 1117 1118 /** 1119 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout 1120 * @adapter: driver private struct 1121 **/ 1122 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter) 1123 { 1124 1125 /* Do the reset outside of interrupt context */ 1126 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 1127 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state); 1128 e_warn(drv, "initiating reset due to tx timeout\n"); 1129 ixgbe_service_event_schedule(adapter); 1130 } 1131 } 1132 1133 /** 1134 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate 1135 * @netdev: network interface device structure 1136 * @queue_index: Tx queue to set 1137 * @maxrate: desired maximum transmit bitrate 1138 **/ 1139 static int ixgbe_tx_maxrate(struct net_device *netdev, 1140 int queue_index, u32 maxrate) 1141 { 1142 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1143 struct ixgbe_hw *hw = &adapter->hw; 1144 u32 bcnrc_val = ixgbe_link_mbps(adapter); 1145 1146 if (!maxrate) 1147 return 0; 1148 1149 /* Calculate the rate factor values to set */ 1150 bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT; 1151 bcnrc_val /= maxrate; 1152 1153 /* clear everything but the rate factor */ 1154 bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK | 1155 IXGBE_RTTBCNRC_RF_DEC_MASK; 1156 1157 /* enable the rate scheduler */ 1158 bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA; 1159 1160 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index); 1161 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val); 1162 1163 return 0; 1164 } 1165 1166 /** 1167 * ixgbe_update_tx_ring_stats - Update Tx ring specific counters 1168 * @tx_ring: ring to update 1169 * @q_vector: queue vector ring belongs to 1170 * @pkts: number of processed packets 1171 * @bytes: number of processed bytes 1172 */ 1173 void ixgbe_update_tx_ring_stats(struct ixgbe_ring *tx_ring, 1174 struct ixgbe_q_vector *q_vector, u64 pkts, 1175 u64 bytes) 1176 { 1177 u64_stats_update_begin(&tx_ring->syncp); 1178 tx_ring->stats.bytes += bytes; 1179 tx_ring->stats.packets += pkts; 1180 u64_stats_update_end(&tx_ring->syncp); 1181 q_vector->tx.total_bytes += bytes; 1182 q_vector->tx.total_packets += pkts; 1183 } 1184 1185 /** 1186 * ixgbe_update_rx_ring_stats - Update Rx ring specific counters 1187 * @rx_ring: ring to update 1188 * @q_vector: queue vector ring belongs to 1189 * @pkts: number of processed packets 1190 * @bytes: number of processed bytes 1191 */ 1192 void ixgbe_update_rx_ring_stats(struct ixgbe_ring *rx_ring, 1193 struct ixgbe_q_vector *q_vector, u64 pkts, 1194 u64 bytes) 1195 { 1196 u64_stats_update_begin(&rx_ring->syncp); 1197 rx_ring->stats.bytes += bytes; 1198 rx_ring->stats.packets += pkts; 1199 u64_stats_update_end(&rx_ring->syncp); 1200 q_vector->rx.total_bytes += bytes; 1201 q_vector->rx.total_packets += pkts; 1202 } 1203 1204 /** 1205 * ixgbe_pf_handle_tx_hang - handle Tx hang on PF 1206 * @tx_ring: tx ring number 1207 * @next: next ring 1208 * 1209 * Prints a message containing details about the tx hang. 1210 */ 1211 static void ixgbe_pf_handle_tx_hang(struct ixgbe_ring *tx_ring, 1212 unsigned int next) 1213 { 1214 struct ixgbe_adapter *adapter = netdev_priv(tx_ring->netdev); 1215 struct ixgbe_hw *hw = &adapter->hw; 1216 1217 e_err(drv, "Detected Tx Unit Hang%s\n" 1218 " Tx Queue <%d>\n" 1219 " TDH, TDT <%x>, <%x>\n" 1220 " next_to_use <%x>\n" 1221 " next_to_clean <%x>\n" 1222 "tx_buffer_info[next_to_clean]\n" 1223 " time_stamp <%lx>\n" 1224 " jiffies <%lx>\n", 1225 ring_is_xdp(tx_ring) ? " (XDP)" : "", 1226 tx_ring->queue_index, 1227 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)), 1228 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)), 1229 tx_ring->next_to_use, next, 1230 tx_ring->tx_buffer_info[next].time_stamp, jiffies); 1231 1232 if (!ring_is_xdp(tx_ring)) 1233 netif_stop_subqueue(tx_ring->netdev, 1234 tx_ring->queue_index); 1235 } 1236 1237 /** 1238 * ixgbe_vf_handle_tx_hang - handle Tx hang on VF 1239 * @adapter: structure containing ring specific data 1240 * @vf: VF index 1241 * 1242 * Print a message containing details about malicious driver detection. 1243 * Set malicious VF link down if the detection happened several times. 1244 */ 1245 static void ixgbe_vf_handle_tx_hang(struct ixgbe_adapter *adapter, u16 vf) 1246 { 1247 struct ixgbe_hw *hw = &adapter->hw; 1248 1249 if (adapter->hw.mac.type != ixgbe_mac_e610) 1250 return; 1251 1252 e_warn(drv, 1253 "Malicious Driver Detection tx hang detected on PF %d VF %d MAC: %pM", 1254 hw->bus.func, vf, adapter->vfinfo[vf].vf_mac_addresses); 1255 1256 adapter->tx_hang_count[vf]++; 1257 if (adapter->tx_hang_count[vf] == IXGBE_MAX_TX_VF_HANGS) { 1258 ixgbe_set_vf_link_state(adapter, vf, 1259 IFLA_VF_LINK_STATE_DISABLE); 1260 adapter->tx_hang_count[vf] = 0; 1261 } 1262 } 1263 1264 static u32 ixgbe_poll_tx_icache(struct ixgbe_hw *hw, u16 queue, u16 idx) 1265 { 1266 IXGBE_WRITE_REG(hw, IXGBE_TXDESCIC, queue * idx); 1267 return IXGBE_READ_REG(hw, IXGBE_TXDESCIC); 1268 } 1269 1270 /** 1271 * ixgbe_check_illegal_queue - search for queue with illegal packet 1272 * @adapter: structure containing ring specific data 1273 * @queue: queue index 1274 * 1275 * Check if tx descriptor connected with input queue 1276 * contains illegal packet. 1277 * 1278 * Returns: true if queue contain illegal packet. 1279 */ 1280 static bool ixgbe_check_illegal_queue(struct ixgbe_adapter *adapter, 1281 u16 queue) 1282 { 1283 u32 hdr_len_reg, mss_len_reg, type_reg; 1284 struct ixgbe_hw *hw = &adapter->hw; 1285 u32 mss_len, header_len, reg; 1286 1287 for (u16 i = 0; i < IXGBE_MAX_TX_DESCRIPTORS; i++) { 1288 /* HW will clear bit IXGBE_TXDESCIC_READY when address 1289 * is written to address field. HW will set this bit 1290 * when iCache read is done, and data is ready at TIC_DWx. 1291 * Set descriptor address. 1292 */ 1293 read_poll_timeout(ixgbe_poll_tx_icache, reg, 1294 !(reg & IXGBE_TXDESCIC_READY), 0, 0, false, 1295 hw, queue, i); 1296 1297 /* read tx descriptor access registers */ 1298 hdr_len_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_VLAN_MACIP_LENS_REG)); 1299 type_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_TYPE_TUCMD_MLHL)); 1300 mss_len_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_MSS_L4LEN_IDX)); 1301 1302 /* check if Advanced Context Descriptor */ 1303 if (FIELD_GET(IXGBE_ADVTXD_DTYP_MASK, type_reg) != 1304 IXGBE_ADVTXD_DTYP_CTXT) 1305 continue; 1306 1307 /* check for illegal MSS and Header length */ 1308 mss_len = FIELD_GET(IXGBE_ADVTXD_MSS_MASK, mss_len_reg); 1309 header_len = FIELD_GET(IXGBE_ADVTXD_HEADER_LEN_MASK, 1310 hdr_len_reg); 1311 if ((mss_len + header_len) > SZ_16K) { 1312 e_warn(probe, "mss len + header len too long\n"); 1313 return true; 1314 } 1315 } 1316 1317 return false; 1318 } 1319 1320 /** 1321 * ixgbe_handle_mdd_event - handle mdd event 1322 * @adapter: structure containing ring specific data 1323 * @tx_ring: tx descriptor ring to handle 1324 * 1325 * Reset VF driver if malicious vf detected or 1326 * illegal packet in an any queue detected. 1327 */ 1328 static void ixgbe_handle_mdd_event(struct ixgbe_adapter *adapter, 1329 struct ixgbe_ring *tx_ring) 1330 { 1331 u16 vf, q; 1332 1333 if (adapter->vfinfo && ixgbe_check_mdd_event(adapter)) { 1334 /* vf mdd info and malicious vf detected */ 1335 if (!ixgbe_get_vf_idx(adapter, tx_ring->queue_index, &vf)) 1336 ixgbe_vf_handle_tx_hang(adapter, vf); 1337 } else { 1338 /* malicious vf not detected */ 1339 for (q = 0; q < IXGBE_MAX_TX_QUEUES; q++) { 1340 if (ixgbe_check_illegal_queue(adapter, q) && 1341 !ixgbe_get_vf_idx(adapter, q, &vf)) 1342 /* illegal queue detected */ 1343 ixgbe_vf_handle_tx_hang(adapter, vf); 1344 } 1345 } 1346 } 1347 1348 /** 1349 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes 1350 * @q_vector: structure containing interrupt and ring information 1351 * @tx_ring: tx ring to clean 1352 * @napi_budget: Used to determine if we are in netpoll 1353 **/ 1354 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector, 1355 struct ixgbe_ring *tx_ring, int napi_budget) 1356 { 1357 struct ixgbe_adapter *adapter = q_vector->adapter; 1358 struct ixgbe_tx_buffer *tx_buffer; 1359 union ixgbe_adv_tx_desc *tx_desc; 1360 unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0; 1361 unsigned int budget = q_vector->tx.work_limit; 1362 unsigned int i = tx_ring->next_to_clean; 1363 struct netdev_queue *txq; 1364 1365 if (test_bit(__IXGBE_DOWN, &adapter->state)) 1366 return true; 1367 1368 tx_buffer = &tx_ring->tx_buffer_info[i]; 1369 tx_desc = IXGBE_TX_DESC(tx_ring, i); 1370 i -= tx_ring->count; 1371 1372 do { 1373 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch; 1374 1375 /* if next_to_watch is not set then there is no work pending */ 1376 if (!eop_desc) 1377 break; 1378 1379 /* prevent any other reads prior to eop_desc */ 1380 smp_rmb(); 1381 1382 /* if DD is not set pending work has not been completed */ 1383 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 1384 break; 1385 1386 /* clear next_to_watch to prevent false hangs */ 1387 tx_buffer->next_to_watch = NULL; 1388 1389 /* update the statistics for this packet */ 1390 total_bytes += tx_buffer->bytecount; 1391 total_packets += tx_buffer->gso_segs; 1392 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC) 1393 total_ipsec++; 1394 1395 /* free the skb */ 1396 if (ring_is_xdp(tx_ring)) 1397 xdp_return_frame(tx_buffer->xdpf); 1398 else 1399 napi_consume_skb(tx_buffer->skb, napi_budget); 1400 1401 /* unmap skb header data */ 1402 dma_unmap_single(tx_ring->dev, 1403 dma_unmap_addr(tx_buffer, dma), 1404 dma_unmap_len(tx_buffer, len), 1405 DMA_TO_DEVICE); 1406 1407 /* clear tx_buffer data */ 1408 dma_unmap_len_set(tx_buffer, len, 0); 1409 1410 /* unmap remaining buffers */ 1411 while (tx_desc != eop_desc) { 1412 tx_buffer++; 1413 tx_desc++; 1414 i++; 1415 if (unlikely(!i)) { 1416 i -= tx_ring->count; 1417 tx_buffer = tx_ring->tx_buffer_info; 1418 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 1419 } 1420 1421 /* unmap any remaining paged data */ 1422 if (dma_unmap_len(tx_buffer, len)) { 1423 dma_unmap_page(tx_ring->dev, 1424 dma_unmap_addr(tx_buffer, dma), 1425 dma_unmap_len(tx_buffer, len), 1426 DMA_TO_DEVICE); 1427 dma_unmap_len_set(tx_buffer, len, 0); 1428 } 1429 } 1430 1431 /* move us one more past the eop_desc for start of next pkt */ 1432 tx_buffer++; 1433 tx_desc++; 1434 i++; 1435 if (unlikely(!i)) { 1436 i -= tx_ring->count; 1437 tx_buffer = tx_ring->tx_buffer_info; 1438 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 1439 } 1440 1441 /* issue prefetch for next Tx descriptor */ 1442 prefetch(tx_desc); 1443 1444 /* update budget accounting */ 1445 budget--; 1446 } while (likely(budget)); 1447 1448 i += tx_ring->count; 1449 tx_ring->next_to_clean = i; 1450 ixgbe_update_tx_ring_stats(tx_ring, q_vector, total_packets, 1451 total_bytes); 1452 adapter->tx_ipsec += total_ipsec; 1453 1454 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) { 1455 if (adapter->hw.mac.type == ixgbe_mac_e610) 1456 ixgbe_handle_mdd_event(adapter, tx_ring); 1457 1458 ixgbe_pf_handle_tx_hang(tx_ring, i); 1459 1460 e_info(probe, 1461 "tx hang %d detected on queue %d, resetting adapter\n", 1462 adapter->tx_timeout_count + 1, tx_ring->queue_index); 1463 1464 /* schedule immediate reset if we believe we hung */ 1465 ixgbe_tx_timeout_reset(adapter); 1466 1467 /* the adapter is about to reset, no point in enabling stuff */ 1468 return true; 1469 } 1470 1471 if (ring_is_xdp(tx_ring)) 1472 return !!budget; 1473 1474 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) 1475 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->queue_index); 1476 if (!__netif_txq_completed_wake(txq, total_packets, total_bytes, 1477 ixgbe_desc_unused(tx_ring), 1478 TX_WAKE_THRESHOLD, 1479 !netif_carrier_ok(tx_ring->netdev) || 1480 test_bit(__IXGBE_DOWN, &adapter->state))) 1481 ++tx_ring->tx_stats.restart_queue; 1482 1483 return !!budget; 1484 } 1485 1486 #ifdef CONFIG_IXGBE_DCA 1487 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, 1488 struct ixgbe_ring *tx_ring, 1489 int cpu) 1490 { 1491 struct ixgbe_hw *hw = &adapter->hw; 1492 u32 txctrl = 0; 1493 u16 reg_offset; 1494 1495 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 1496 txctrl = dca3_get_tag(tx_ring->dev, cpu); 1497 1498 switch (hw->mac.type) { 1499 case ixgbe_mac_82598EB: 1500 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx); 1501 break; 1502 case ixgbe_mac_82599EB: 1503 case ixgbe_mac_X540: 1504 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx); 1505 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599; 1506 break; 1507 default: 1508 /* for unknown hardware do not write register */ 1509 return; 1510 } 1511 1512 /* 1513 * We can enable relaxed ordering for reads, but not writes when 1514 * DCA is enabled. This is due to a known issue in some chipsets 1515 * which will cause the DCA tag to be cleared. 1516 */ 1517 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN | 1518 IXGBE_DCA_TXCTRL_DATA_RRO_EN | 1519 IXGBE_DCA_TXCTRL_DESC_DCA_EN; 1520 1521 IXGBE_WRITE_REG(hw, reg_offset, txctrl); 1522 } 1523 1524 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter, 1525 struct ixgbe_ring *rx_ring, 1526 int cpu) 1527 { 1528 struct ixgbe_hw *hw = &adapter->hw; 1529 u32 rxctrl = 0; 1530 u8 reg_idx = rx_ring->reg_idx; 1531 1532 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 1533 rxctrl = dca3_get_tag(rx_ring->dev, cpu); 1534 1535 switch (hw->mac.type) { 1536 case ixgbe_mac_82599EB: 1537 case ixgbe_mac_X540: 1538 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599; 1539 break; 1540 default: 1541 break; 1542 } 1543 1544 /* 1545 * We can enable relaxed ordering for reads, but not writes when 1546 * DCA is enabled. This is due to a known issue in some chipsets 1547 * which will cause the DCA tag to be cleared. 1548 */ 1549 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN | 1550 IXGBE_DCA_RXCTRL_DATA_DCA_EN | 1551 IXGBE_DCA_RXCTRL_DESC_DCA_EN; 1552 1553 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl); 1554 } 1555 1556 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector) 1557 { 1558 struct ixgbe_adapter *adapter = q_vector->adapter; 1559 struct ixgbe_ring *ring; 1560 int cpu = get_cpu(); 1561 1562 if (q_vector->cpu == cpu) 1563 goto out_no_update; 1564 1565 ixgbe_for_each_ring(ring, q_vector->tx) 1566 ixgbe_update_tx_dca(adapter, ring, cpu); 1567 1568 ixgbe_for_each_ring(ring, q_vector->rx) 1569 ixgbe_update_rx_dca(adapter, ring, cpu); 1570 1571 q_vector->cpu = cpu; 1572 out_no_update: 1573 put_cpu(); 1574 } 1575 1576 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter) 1577 { 1578 int i; 1579 1580 /* always use CB2 mode, difference is masked in the CB driver */ 1581 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 1582 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1583 IXGBE_DCA_CTRL_DCA_MODE_CB2); 1584 else 1585 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1586 IXGBE_DCA_CTRL_DCA_DISABLE); 1587 1588 for (i = 0; i < adapter->num_q_vectors; i++) { 1589 adapter->q_vector[i]->cpu = -1; 1590 ixgbe_update_dca(adapter->q_vector[i]); 1591 } 1592 } 1593 1594 static int __ixgbe_notify_dca(struct device *dev, void *data) 1595 { 1596 struct ixgbe_adapter *adapter = dev_get_drvdata(dev); 1597 unsigned long event = *(unsigned long *)data; 1598 1599 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE)) 1600 return 0; 1601 1602 switch (event) { 1603 case DCA_PROVIDER_ADD: 1604 /* if we're already enabled, don't do it again */ 1605 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 1606 break; 1607 if (dca_add_requester(dev) == 0) { 1608 adapter->flags |= IXGBE_FLAG_DCA_ENABLED; 1609 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1610 IXGBE_DCA_CTRL_DCA_MODE_CB2); 1611 break; 1612 } 1613 fallthrough; /* DCA is disabled. */ 1614 case DCA_PROVIDER_REMOVE: 1615 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { 1616 dca_remove_requester(dev); 1617 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED; 1618 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1619 IXGBE_DCA_CTRL_DCA_DISABLE); 1620 } 1621 break; 1622 } 1623 1624 return 0; 1625 } 1626 1627 #endif /* CONFIG_IXGBE_DCA */ 1628 1629 #define IXGBE_RSS_L4_TYPES_MASK \ 1630 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \ 1631 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \ 1632 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \ 1633 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP)) 1634 1635 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring, 1636 union ixgbe_adv_rx_desc *rx_desc, 1637 struct sk_buff *skb) 1638 { 1639 u16 rss_type; 1640 1641 if (!(ring->netdev->features & NETIF_F_RXHASH)) 1642 return; 1643 1644 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) & 1645 IXGBE_RXDADV_RSSTYPE_MASK; 1646 1647 if (!rss_type) 1648 return; 1649 1650 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss), 1651 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ? 1652 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3); 1653 } 1654 1655 #ifdef IXGBE_FCOE 1656 /** 1657 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type 1658 * @ring: structure containing ring specific data 1659 * @rx_desc: advanced rx descriptor 1660 * 1661 * Returns : true if it is FCoE pkt 1662 */ 1663 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring, 1664 union ixgbe_adv_rx_desc *rx_desc) 1665 { 1666 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info; 1667 1668 return test_bit(__IXGBE_RX_FCOE, &ring->state) && 1669 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) == 1670 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE << 1671 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT))); 1672 } 1673 1674 #endif /* IXGBE_FCOE */ 1675 /** 1676 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum 1677 * @ring: structure containing ring specific data 1678 * @rx_desc: current Rx descriptor being processed 1679 * @skb: skb currently being received and modified 1680 **/ 1681 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring, 1682 union ixgbe_adv_rx_desc *rx_desc, 1683 struct sk_buff *skb) 1684 { 1685 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info; 1686 bool encap_pkt = false; 1687 1688 skb_checksum_none_assert(skb); 1689 1690 /* Rx csum disabled */ 1691 if (!(ring->netdev->features & NETIF_F_RXCSUM)) 1692 return; 1693 1694 /* check for VXLAN and Geneve packets */ 1695 if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) { 1696 encap_pkt = true; 1697 skb->encapsulation = 1; 1698 } 1699 1700 /* if IP and error */ 1701 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) && 1702 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) { 1703 ring->rx_stats.csum_err++; 1704 return; 1705 } 1706 1707 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS)) 1708 return; 1709 1710 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) { 1711 /* 1712 * 82599 errata, UDP frames with a 0 checksum can be marked as 1713 * checksum errors. 1714 */ 1715 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) && 1716 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state)) 1717 return; 1718 1719 ring->rx_stats.csum_err++; 1720 return; 1721 } 1722 1723 /* It must be a TCP or UDP packet with a valid checksum */ 1724 skb->ip_summed = CHECKSUM_UNNECESSARY; 1725 if (encap_pkt) { 1726 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS)) 1727 return; 1728 1729 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) { 1730 skb->ip_summed = CHECKSUM_NONE; 1731 return; 1732 } 1733 /* If we checked the outer header let the stack know */ 1734 skb->csum_level = 1; 1735 } 1736 } 1737 1738 static unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring) 1739 { 1740 return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0; 1741 } 1742 1743 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring, 1744 struct ixgbe_rx_buffer *bi) 1745 { 1746 struct page *page = bi->page; 1747 dma_addr_t dma; 1748 1749 /* since we are recycling buffers we should seldom need to alloc */ 1750 if (likely(page)) 1751 return true; 1752 1753 /* alloc new page for storage */ 1754 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring)); 1755 if (unlikely(!page)) { 1756 rx_ring->rx_stats.alloc_rx_page_failed++; 1757 return false; 1758 } 1759 1760 /* map page for use */ 1761 dma = dma_map_page_attrs(rx_ring->dev, page, 0, 1762 ixgbe_rx_pg_size(rx_ring), 1763 DMA_FROM_DEVICE, 1764 IXGBE_RX_DMA_ATTR); 1765 1766 /* 1767 * if mapping failed free memory back to system since 1768 * there isn't much point in holding memory we can't use 1769 */ 1770 if (dma_mapping_error(rx_ring->dev, dma)) { 1771 __free_pages(page, ixgbe_rx_pg_order(rx_ring)); 1772 1773 rx_ring->rx_stats.alloc_rx_page_failed++; 1774 return false; 1775 } 1776 1777 bi->dma = dma; 1778 bi->page = page; 1779 bi->page_offset = rx_ring->rx_offset; 1780 page_ref_add(page, USHRT_MAX - 1); 1781 bi->pagecnt_bias = USHRT_MAX; 1782 rx_ring->rx_stats.alloc_rx_page++; 1783 1784 return true; 1785 } 1786 1787 /** 1788 * ixgbe_alloc_rx_buffers - Replace used receive buffers 1789 * @rx_ring: ring to place buffers on 1790 * @cleaned_count: number of buffers to replace 1791 **/ 1792 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count) 1793 { 1794 union ixgbe_adv_rx_desc *rx_desc; 1795 struct ixgbe_rx_buffer *bi; 1796 u16 i = rx_ring->next_to_use; 1797 u16 bufsz; 1798 1799 /* nothing to do */ 1800 if (!cleaned_count) 1801 return; 1802 1803 rx_desc = IXGBE_RX_DESC(rx_ring, i); 1804 bi = &rx_ring->rx_buffer_info[i]; 1805 i -= rx_ring->count; 1806 1807 bufsz = ixgbe_rx_bufsz(rx_ring); 1808 1809 do { 1810 if (!ixgbe_alloc_mapped_page(rx_ring, bi)) 1811 break; 1812 1813 /* sync the buffer for use by the device */ 1814 dma_sync_single_range_for_device(rx_ring->dev, bi->dma, 1815 bi->page_offset, bufsz, 1816 DMA_FROM_DEVICE); 1817 1818 /* 1819 * Refresh the desc even if buffer_addrs didn't change 1820 * because each write-back erases this info. 1821 */ 1822 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset); 1823 1824 rx_desc++; 1825 bi++; 1826 i++; 1827 if (unlikely(!i)) { 1828 rx_desc = IXGBE_RX_DESC(rx_ring, 0); 1829 bi = rx_ring->rx_buffer_info; 1830 i -= rx_ring->count; 1831 } 1832 1833 /* clear the length for the next_to_use descriptor */ 1834 rx_desc->wb.upper.length = 0; 1835 1836 cleaned_count--; 1837 } while (cleaned_count); 1838 1839 i += rx_ring->count; 1840 1841 if (rx_ring->next_to_use != i) { 1842 rx_ring->next_to_use = i; 1843 1844 /* update next to alloc since we have filled the ring */ 1845 rx_ring->next_to_alloc = i; 1846 1847 /* Force memory writes to complete before letting h/w 1848 * know there are new descriptors to fetch. (Only 1849 * applicable for weak-ordered memory model archs, 1850 * such as IA-64). 1851 */ 1852 wmb(); 1853 writel(i, rx_ring->tail); 1854 } 1855 } 1856 1857 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring, 1858 struct sk_buff *skb) 1859 { 1860 u16 hdr_len = skb_headlen(skb); 1861 1862 /* set gso_size to avoid messing up TCP MSS */ 1863 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len), 1864 IXGBE_CB(skb)->append_cnt); 1865 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; 1866 } 1867 1868 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring, 1869 struct sk_buff *skb) 1870 { 1871 /* if append_cnt is 0 then frame is not RSC */ 1872 if (!IXGBE_CB(skb)->append_cnt) 1873 return; 1874 1875 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt; 1876 rx_ring->rx_stats.rsc_flush++; 1877 1878 ixgbe_set_rsc_gso_size(rx_ring, skb); 1879 1880 /* gso_size is computed using append_cnt so always clear it last */ 1881 IXGBE_CB(skb)->append_cnt = 0; 1882 } 1883 1884 /** 1885 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor 1886 * @rx_ring: rx descriptor ring packet is being transacted on 1887 * @rx_desc: pointer to the EOP Rx descriptor 1888 * @skb: pointer to current skb being populated 1889 * 1890 * This function checks the ring, descriptor, and packet information in 1891 * order to populate the hash, checksum, VLAN, timestamp, protocol, and 1892 * other fields within the skb. 1893 **/ 1894 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring, 1895 union ixgbe_adv_rx_desc *rx_desc, 1896 struct sk_buff *skb) 1897 { 1898 struct net_device *dev = rx_ring->netdev; 1899 u32 flags = rx_ring->q_vector->adapter->flags; 1900 1901 ixgbe_update_rsc_stats(rx_ring, skb); 1902 1903 ixgbe_rx_hash(rx_ring, rx_desc, skb); 1904 1905 ixgbe_rx_checksum(rx_ring, rx_desc, skb); 1906 1907 if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED)) 1908 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb); 1909 1910 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) && 1911 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) { 1912 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan); 1913 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid); 1914 } 1915 1916 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP)) 1917 ixgbe_ipsec_rx(rx_ring, rx_desc, skb); 1918 1919 /* record Rx queue, or update MACVLAN statistics */ 1920 if (netif_is_ixgbe(dev)) 1921 skb_record_rx_queue(skb, rx_ring->queue_index); 1922 else 1923 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true, 1924 false); 1925 1926 skb->protocol = eth_type_trans(skb, dev); 1927 } 1928 1929 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector, 1930 struct sk_buff *skb) 1931 { 1932 napi_gro_receive(&q_vector->napi, skb); 1933 } 1934 1935 /** 1936 * ixgbe_is_non_eop - process handling of non-EOP buffers 1937 * @rx_ring: Rx ring being processed 1938 * @rx_desc: Rx descriptor for current buffer 1939 * @skb: Current socket buffer containing buffer in progress 1940 * 1941 * This function updates next to clean. If the buffer is an EOP buffer 1942 * this function exits returning false, otherwise it will place the 1943 * sk_buff in the next buffer to be chained and return true indicating 1944 * that this is in fact a non-EOP buffer. 1945 **/ 1946 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring, 1947 union ixgbe_adv_rx_desc *rx_desc, 1948 struct sk_buff *skb) 1949 { 1950 u32 ntc = rx_ring->next_to_clean + 1; 1951 1952 /* fetch, update, and store next to clean */ 1953 ntc = (ntc < rx_ring->count) ? ntc : 0; 1954 rx_ring->next_to_clean = ntc; 1955 1956 prefetch(IXGBE_RX_DESC(rx_ring, ntc)); 1957 1958 /* update RSC append count if present */ 1959 if (ring_is_rsc_enabled(rx_ring)) { 1960 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data & 1961 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK); 1962 1963 if (unlikely(rsc_enabled)) { 1964 u32 rsc_cnt = le32_to_cpu(rsc_enabled); 1965 1966 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT; 1967 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1; 1968 1969 /* update ntc based on RSC value */ 1970 ntc = le32_to_cpu(rx_desc->wb.upper.status_error); 1971 ntc &= IXGBE_RXDADV_NEXTP_MASK; 1972 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT; 1973 } 1974 } 1975 1976 /* if we are the last buffer then there is nothing else to do */ 1977 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))) 1978 return false; 1979 1980 /* place skb in next buffer to be received */ 1981 rx_ring->rx_buffer_info[ntc].skb = skb; 1982 rx_ring->rx_stats.non_eop_descs++; 1983 1984 return true; 1985 } 1986 1987 /** 1988 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail 1989 * @rx_ring: rx descriptor ring packet is being transacted on 1990 * @skb: pointer to current skb being adjusted 1991 * 1992 * This function is an ixgbe specific version of __pskb_pull_tail. The 1993 * main difference between this version and the original function is that 1994 * this function can make several assumptions about the state of things 1995 * that allow for significant optimizations versus the standard function. 1996 * As a result we can do things like drop a frag and maintain an accurate 1997 * truesize for the skb. 1998 */ 1999 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring, 2000 struct sk_buff *skb) 2001 { 2002 skb_frag_t *frag = &skb_shinfo(skb)->frags[0]; 2003 unsigned char *va; 2004 unsigned int pull_len; 2005 2006 /* 2007 * it is valid to use page_address instead of kmap since we are 2008 * working with pages allocated out of the lomem pool per 2009 * alloc_page(GFP_ATOMIC) 2010 */ 2011 va = skb_frag_address(frag); 2012 2013 /* 2014 * we need the header to contain the greater of either ETH_HLEN or 2015 * 60 bytes if the skb->len is less than 60 for skb_pad. 2016 */ 2017 pull_len = eth_get_headlen(skb->dev, va, IXGBE_RX_HDR_SIZE); 2018 2019 /* align pull length to size of long to optimize memcpy performance */ 2020 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long))); 2021 2022 /* update all of the pointers */ 2023 skb_frag_size_sub(frag, pull_len); 2024 skb_frag_off_add(frag, pull_len); 2025 skb->data_len -= pull_len; 2026 skb->tail += pull_len; 2027 } 2028 2029 /** 2030 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB 2031 * @rx_ring: rx descriptor ring packet is being transacted on 2032 * @skb: pointer to current skb being updated 2033 * 2034 * This function provides a basic DMA sync up for the first fragment of an 2035 * skb. The reason for doing this is that the first fragment cannot be 2036 * unmapped until we have reached the end of packet descriptor for a buffer 2037 * chain. 2038 */ 2039 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring, 2040 struct sk_buff *skb) 2041 { 2042 if (ring_uses_build_skb(rx_ring)) { 2043 unsigned long mask = (unsigned long)ixgbe_rx_pg_size(rx_ring) - 1; 2044 unsigned long offset = (unsigned long)(skb->data) & mask; 2045 2046 dma_sync_single_range_for_cpu(rx_ring->dev, 2047 IXGBE_CB(skb)->dma, 2048 offset, 2049 skb_headlen(skb), 2050 DMA_FROM_DEVICE); 2051 } else { 2052 skb_frag_t *frag = &skb_shinfo(skb)->frags[0]; 2053 2054 dma_sync_single_range_for_cpu(rx_ring->dev, 2055 IXGBE_CB(skb)->dma, 2056 skb_frag_off(frag), 2057 skb_frag_size(frag), 2058 DMA_FROM_DEVICE); 2059 } 2060 2061 /* If the page was released, just unmap it. */ 2062 if (unlikely(IXGBE_CB(skb)->page_released)) { 2063 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma, 2064 ixgbe_rx_pg_size(rx_ring), 2065 DMA_FROM_DEVICE, 2066 IXGBE_RX_DMA_ATTR); 2067 } 2068 } 2069 2070 /** 2071 * ixgbe_cleanup_headers - Correct corrupted or empty headers 2072 * @rx_ring: rx descriptor ring packet is being transacted on 2073 * @rx_desc: pointer to the EOP Rx descriptor 2074 * @skb: pointer to current skb being fixed 2075 * 2076 * Check if the skb is valid in the XDP case it will be an error pointer. 2077 * Return true in this case to abort processing and advance to next 2078 * descriptor. 2079 * 2080 * Check for corrupted packet headers caused by senders on the local L2 2081 * embedded NIC switch not setting up their Tx Descriptors right. These 2082 * should be very rare. 2083 * 2084 * Also address the case where we are pulling data in on pages only 2085 * and as such no data is present in the skb header. 2086 * 2087 * In addition if skb is not at least 60 bytes we need to pad it so that 2088 * it is large enough to qualify as a valid Ethernet frame. 2089 * 2090 * Returns true if an error was encountered and skb was freed. 2091 **/ 2092 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring, 2093 union ixgbe_adv_rx_desc *rx_desc, 2094 struct sk_buff *skb) 2095 { 2096 struct net_device *netdev = rx_ring->netdev; 2097 2098 /* Verify netdev is present, and that packet does not have any 2099 * errors that would be unacceptable to the netdev. 2100 */ 2101 if (!netdev || 2102 (unlikely(ixgbe_test_staterr(rx_desc, 2103 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) && 2104 !(netdev->features & NETIF_F_RXALL)))) { 2105 dev_kfree_skb_any(skb); 2106 return true; 2107 } 2108 2109 /* place header in linear portion of buffer */ 2110 if (!skb_headlen(skb)) 2111 ixgbe_pull_tail(rx_ring, skb); 2112 2113 #ifdef IXGBE_FCOE 2114 /* do not attempt to pad FCoE Frames as this will disrupt DDP */ 2115 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) 2116 return false; 2117 2118 #endif 2119 /* if eth_skb_pad returns an error the skb was freed */ 2120 if (eth_skb_pad(skb)) 2121 return true; 2122 2123 return false; 2124 } 2125 2126 /** 2127 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring 2128 * @rx_ring: rx descriptor ring to store buffers on 2129 * @old_buff: donor buffer to have page reused 2130 * 2131 * Synchronizes page for reuse by the adapter 2132 **/ 2133 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring, 2134 struct ixgbe_rx_buffer *old_buff) 2135 { 2136 struct ixgbe_rx_buffer *new_buff; 2137 u16 nta = rx_ring->next_to_alloc; 2138 2139 new_buff = &rx_ring->rx_buffer_info[nta]; 2140 2141 /* update, and store next to alloc */ 2142 nta++; 2143 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0; 2144 2145 /* Transfer page from old buffer to new buffer. 2146 * Move each member individually to avoid possible store 2147 * forwarding stalls and unnecessary copy of skb. 2148 */ 2149 new_buff->dma = old_buff->dma; 2150 new_buff->page = old_buff->page; 2151 new_buff->page_offset = old_buff->page_offset; 2152 new_buff->pagecnt_bias = old_buff->pagecnt_bias; 2153 } 2154 2155 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer, 2156 int rx_buffer_pgcnt) 2157 { 2158 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias; 2159 struct page *page = rx_buffer->page; 2160 2161 /* avoid re-using remote and pfmemalloc pages */ 2162 if (!dev_page_is_reusable(page)) 2163 return false; 2164 2165 #if (PAGE_SIZE < 8192) 2166 /* if we are only owner of page we can reuse it */ 2167 if (unlikely((rx_buffer_pgcnt - pagecnt_bias) > 1)) 2168 return false; 2169 #else 2170 /* The last offset is a bit aggressive in that we assume the 2171 * worst case of FCoE being enabled and using a 3K buffer. 2172 * However this should have minimal impact as the 1K extra is 2173 * still less than one buffer in size. 2174 */ 2175 #define IXGBE_LAST_OFFSET \ 2176 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K) 2177 if (rx_buffer->page_offset > IXGBE_LAST_OFFSET) 2178 return false; 2179 #endif 2180 2181 /* If we have drained the page fragment pool we need to update 2182 * the pagecnt_bias and page count so that we fully restock the 2183 * number of references the driver holds. 2184 */ 2185 if (unlikely(pagecnt_bias == 1)) { 2186 page_ref_add(page, USHRT_MAX - 1); 2187 rx_buffer->pagecnt_bias = USHRT_MAX; 2188 } 2189 2190 return true; 2191 } 2192 2193 /** 2194 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff 2195 * @rx_ring: rx descriptor ring to transact packets on 2196 * @rx_buffer: buffer containing page to add 2197 * @skb: sk_buff to place the data into 2198 * @size: size of data in rx_buffer 2199 * 2200 * This function will add the data contained in rx_buffer->page to the skb. 2201 * This is done either through a direct copy if the data in the buffer is 2202 * less than the skb header size, otherwise it will just attach the page as 2203 * a frag to the skb. 2204 * 2205 * The function will then update the page offset if necessary and return 2206 * true if the buffer can be reused by the adapter. 2207 **/ 2208 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring, 2209 struct ixgbe_rx_buffer *rx_buffer, 2210 struct sk_buff *skb, 2211 unsigned int size) 2212 { 2213 #if (PAGE_SIZE < 8192) 2214 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2; 2215 #else 2216 unsigned int truesize = rx_ring->rx_offset ? 2217 SKB_DATA_ALIGN(rx_ring->rx_offset + size) : 2218 SKB_DATA_ALIGN(size); 2219 #endif 2220 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page, 2221 rx_buffer->page_offset, size, truesize); 2222 #if (PAGE_SIZE < 8192) 2223 rx_buffer->page_offset ^= truesize; 2224 #else 2225 rx_buffer->page_offset += truesize; 2226 #endif 2227 } 2228 2229 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring, 2230 union ixgbe_adv_rx_desc *rx_desc, 2231 struct sk_buff **skb, 2232 const unsigned int size, 2233 int *rx_buffer_pgcnt) 2234 { 2235 struct ixgbe_rx_buffer *rx_buffer; 2236 2237 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; 2238 *rx_buffer_pgcnt = 2239 #if (PAGE_SIZE < 8192) 2240 page_count(rx_buffer->page); 2241 #else 2242 0; 2243 #endif 2244 prefetchw(rx_buffer->page); 2245 *skb = rx_buffer->skb; 2246 2247 /* Delay unmapping of the first packet. It carries the header 2248 * information, HW may still access the header after the writeback. 2249 * Only unmap it when EOP is reached 2250 */ 2251 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) { 2252 if (!*skb) 2253 goto skip_sync; 2254 } else { 2255 if (*skb) 2256 ixgbe_dma_sync_frag(rx_ring, *skb); 2257 } 2258 2259 /* we are reusing so sync this buffer for CPU use */ 2260 dma_sync_single_range_for_cpu(rx_ring->dev, 2261 rx_buffer->dma, 2262 rx_buffer->page_offset, 2263 size, 2264 DMA_FROM_DEVICE); 2265 skip_sync: 2266 rx_buffer->pagecnt_bias--; 2267 2268 return rx_buffer; 2269 } 2270 2271 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring, 2272 struct ixgbe_rx_buffer *rx_buffer, 2273 struct sk_buff *skb, 2274 int rx_buffer_pgcnt) 2275 { 2276 if (ixgbe_can_reuse_rx_page(rx_buffer, rx_buffer_pgcnt)) { 2277 /* hand second half of page back to the ring */ 2278 ixgbe_reuse_rx_page(rx_ring, rx_buffer); 2279 } else { 2280 if (skb && IXGBE_CB(skb)->dma == rx_buffer->dma) { 2281 /* the page has been released from the ring */ 2282 IXGBE_CB(skb)->page_released = true; 2283 } else { 2284 /* we are not reusing the buffer so unmap it */ 2285 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma, 2286 ixgbe_rx_pg_size(rx_ring), 2287 DMA_FROM_DEVICE, 2288 IXGBE_RX_DMA_ATTR); 2289 } 2290 __page_frag_cache_drain(rx_buffer->page, 2291 rx_buffer->pagecnt_bias); 2292 } 2293 2294 /* clear contents of rx_buffer */ 2295 rx_buffer->page = NULL; 2296 rx_buffer->skb = NULL; 2297 } 2298 2299 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring, 2300 struct ixgbe_rx_buffer *rx_buffer, 2301 struct xdp_buff *xdp, 2302 union ixgbe_adv_rx_desc *rx_desc) 2303 { 2304 unsigned int size = xdp->data_end - xdp->data; 2305 #if (PAGE_SIZE < 8192) 2306 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2; 2307 #else 2308 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end - 2309 xdp->data_hard_start); 2310 #endif 2311 struct sk_buff *skb; 2312 2313 /* prefetch first cache line of first page */ 2314 net_prefetch(xdp->data); 2315 2316 /* Note, we get here by enabling legacy-rx via: 2317 * 2318 * ethtool --set-priv-flags <dev> legacy-rx on 2319 * 2320 * In this mode, we currently get 0 extra XDP headroom as 2321 * opposed to having legacy-rx off, where we process XDP 2322 * packets going to stack via ixgbe_build_skb(). The latter 2323 * provides us currently with 192 bytes of headroom. 2324 * 2325 * For ixgbe_construct_skb() mode it means that the 2326 * xdp->data_meta will always point to xdp->data, since 2327 * the helper cannot expand the head. Should this ever 2328 * change in future for legacy-rx mode on, then lets also 2329 * add xdp->data_meta handling here. 2330 */ 2331 2332 /* allocate a skb to store the frags */ 2333 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE); 2334 if (unlikely(!skb)) 2335 return NULL; 2336 2337 if (size > IXGBE_RX_HDR_SIZE) { 2338 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) 2339 IXGBE_CB(skb)->dma = rx_buffer->dma; 2340 2341 skb_add_rx_frag(skb, 0, rx_buffer->page, 2342 xdp->data - page_address(rx_buffer->page), 2343 size, truesize); 2344 #if (PAGE_SIZE < 8192) 2345 rx_buffer->page_offset ^= truesize; 2346 #else 2347 rx_buffer->page_offset += truesize; 2348 #endif 2349 } else { 2350 memcpy(__skb_put(skb, size), 2351 xdp->data, ALIGN(size, sizeof(long))); 2352 rx_buffer->pagecnt_bias++; 2353 } 2354 2355 return skb; 2356 } 2357 2358 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring, 2359 struct ixgbe_rx_buffer *rx_buffer, 2360 struct xdp_buff *xdp, 2361 union ixgbe_adv_rx_desc *rx_desc) 2362 { 2363 unsigned int metasize = xdp->data - xdp->data_meta; 2364 #if (PAGE_SIZE < 8192) 2365 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2; 2366 #else 2367 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + 2368 SKB_DATA_ALIGN(xdp->data_end - 2369 xdp->data_hard_start); 2370 #endif 2371 struct sk_buff *skb; 2372 2373 /* Prefetch first cache line of first page. If xdp->data_meta 2374 * is unused, this points exactly as xdp->data, otherwise we 2375 * likely have a consumer accessing first few bytes of meta 2376 * data, and then actual data. 2377 */ 2378 net_prefetch(xdp->data_meta); 2379 2380 /* build an skb to around the page buffer */ 2381 skb = napi_build_skb(xdp->data_hard_start, truesize); 2382 if (unlikely(!skb)) 2383 return NULL; 2384 2385 /* update pointers within the skb to store the data */ 2386 skb_reserve(skb, xdp->data - xdp->data_hard_start); 2387 __skb_put(skb, xdp->data_end - xdp->data); 2388 if (metasize) 2389 skb_metadata_set(skb, metasize); 2390 2391 /* record DMA address if this is the start of a chain of buffers */ 2392 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) 2393 IXGBE_CB(skb)->dma = rx_buffer->dma; 2394 2395 /* update buffer offset */ 2396 #if (PAGE_SIZE < 8192) 2397 rx_buffer->page_offset ^= truesize; 2398 #else 2399 rx_buffer->page_offset += truesize; 2400 #endif 2401 2402 return skb; 2403 } 2404 2405 static int ixgbe_run_xdp(struct ixgbe_adapter *adapter, 2406 struct ixgbe_ring *rx_ring, 2407 struct xdp_buff *xdp) 2408 { 2409 int err, result = IXGBE_XDP_PASS; 2410 struct bpf_prog *xdp_prog; 2411 struct ixgbe_ring *ring; 2412 struct xdp_frame *xdpf; 2413 u32 act; 2414 2415 xdp_prog = READ_ONCE(rx_ring->xdp_prog); 2416 2417 if (!xdp_prog) 2418 goto xdp_out; 2419 2420 prefetchw(xdp->data_hard_start); /* xdp_frame write */ 2421 2422 act = bpf_prog_run_xdp(xdp_prog, xdp); 2423 switch (act) { 2424 case XDP_PASS: 2425 break; 2426 case XDP_TX: 2427 xdpf = xdp_convert_buff_to_frame(xdp); 2428 if (unlikely(!xdpf)) 2429 goto out_failure; 2430 ring = ixgbe_determine_xdp_ring(adapter); 2431 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 2432 spin_lock(&ring->tx_lock); 2433 result = ixgbe_xmit_xdp_ring(ring, xdpf); 2434 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 2435 spin_unlock(&ring->tx_lock); 2436 if (result == IXGBE_XDP_CONSUMED) 2437 goto out_failure; 2438 break; 2439 case XDP_REDIRECT: 2440 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog); 2441 if (err) 2442 goto out_failure; 2443 result = IXGBE_XDP_REDIR; 2444 break; 2445 default: 2446 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act); 2447 fallthrough; 2448 case XDP_ABORTED: 2449 out_failure: 2450 trace_xdp_exception(rx_ring->netdev, xdp_prog, act); 2451 fallthrough; /* handle aborts by dropping packet */ 2452 case XDP_DROP: 2453 result = IXGBE_XDP_CONSUMED; 2454 break; 2455 } 2456 xdp_out: 2457 return result; 2458 } 2459 2460 static unsigned int ixgbe_rx_frame_truesize(struct ixgbe_ring *rx_ring, 2461 unsigned int size) 2462 { 2463 unsigned int truesize; 2464 2465 #if (PAGE_SIZE < 8192) 2466 truesize = ixgbe_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */ 2467 #else 2468 truesize = rx_ring->rx_offset ? 2469 SKB_DATA_ALIGN(rx_ring->rx_offset + size) + 2470 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) : 2471 SKB_DATA_ALIGN(size); 2472 #endif 2473 return truesize; 2474 } 2475 2476 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring, 2477 struct ixgbe_rx_buffer *rx_buffer, 2478 unsigned int size) 2479 { 2480 unsigned int truesize = ixgbe_rx_frame_truesize(rx_ring, size); 2481 #if (PAGE_SIZE < 8192) 2482 rx_buffer->page_offset ^= truesize; 2483 #else 2484 rx_buffer->page_offset += truesize; 2485 #endif 2486 } 2487 2488 /** 2489 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf 2490 * @q_vector: structure containing interrupt and ring information 2491 * @rx_ring: rx descriptor ring to transact packets on 2492 * @budget: Total limit on number of packets to process 2493 * 2494 * This function provides a "bounce buffer" approach to Rx interrupt 2495 * processing. The advantage to this is that on systems that have 2496 * expensive overhead for IOMMU access this provides a means of avoiding 2497 * it by maintaining the mapping of the page to the system. 2498 * 2499 * Returns amount of work completed 2500 **/ 2501 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector, 2502 struct ixgbe_ring *rx_ring, 2503 const int budget) 2504 { 2505 unsigned int total_rx_bytes = 0, total_rx_packets = 0, frame_sz = 0; 2506 struct ixgbe_adapter *adapter = q_vector->adapter; 2507 #ifdef IXGBE_FCOE 2508 int ddp_bytes; 2509 unsigned int mss = 0; 2510 #endif /* IXGBE_FCOE */ 2511 u16 cleaned_count = ixgbe_desc_unused(rx_ring); 2512 unsigned int offset = rx_ring->rx_offset; 2513 unsigned int xdp_xmit = 0; 2514 struct xdp_buff xdp; 2515 int xdp_res = 0; 2516 2517 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */ 2518 #if (PAGE_SIZE < 8192) 2519 frame_sz = ixgbe_rx_frame_truesize(rx_ring, 0); 2520 #endif 2521 xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq); 2522 2523 while (likely(total_rx_packets < budget)) { 2524 union ixgbe_adv_rx_desc *rx_desc; 2525 struct ixgbe_rx_buffer *rx_buffer; 2526 struct sk_buff *skb; 2527 int rx_buffer_pgcnt; 2528 unsigned int size; 2529 2530 /* return some buffers to hardware, one at a time is too slow */ 2531 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) { 2532 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count); 2533 cleaned_count = 0; 2534 } 2535 2536 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean); 2537 size = le16_to_cpu(rx_desc->wb.upper.length); 2538 if (!size) 2539 break; 2540 2541 /* This memory barrier is needed to keep us from reading 2542 * any other fields out of the rx_desc until we know the 2543 * descriptor has been written back 2544 */ 2545 dma_rmb(); 2546 2547 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size, &rx_buffer_pgcnt); 2548 2549 /* retrieve a buffer from the ring */ 2550 if (!skb) { 2551 unsigned char *hard_start; 2552 2553 hard_start = page_address(rx_buffer->page) + 2554 rx_buffer->page_offset - offset; 2555 xdp_prepare_buff(&xdp, hard_start, offset, size, true); 2556 xdp_buff_clear_frags_flag(&xdp); 2557 #if (PAGE_SIZE > 4096) 2558 /* At larger PAGE_SIZE, frame_sz depend on len size */ 2559 xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, size); 2560 #endif 2561 xdp_res = ixgbe_run_xdp(adapter, rx_ring, &xdp); 2562 } 2563 2564 if (xdp_res) { 2565 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) { 2566 xdp_xmit |= xdp_res; 2567 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size); 2568 } else { 2569 rx_buffer->pagecnt_bias++; 2570 } 2571 total_rx_packets++; 2572 total_rx_bytes += size; 2573 } else if (skb) { 2574 ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size); 2575 } else if (ring_uses_build_skb(rx_ring)) { 2576 skb = ixgbe_build_skb(rx_ring, rx_buffer, 2577 &xdp, rx_desc); 2578 } else { 2579 skb = ixgbe_construct_skb(rx_ring, rx_buffer, 2580 &xdp, rx_desc); 2581 } 2582 2583 /* exit if we failed to retrieve a buffer */ 2584 if (!xdp_res && !skb) { 2585 rx_ring->rx_stats.alloc_rx_buff_failed++; 2586 rx_buffer->pagecnt_bias++; 2587 break; 2588 } 2589 2590 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb, rx_buffer_pgcnt); 2591 cleaned_count++; 2592 2593 /* place incomplete frames back on ring for completion */ 2594 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb)) 2595 continue; 2596 2597 /* verify the packet layout is correct */ 2598 if (xdp_res || ixgbe_cleanup_headers(rx_ring, rx_desc, skb)) 2599 continue; 2600 2601 /* probably a little skewed due to removing CRC */ 2602 total_rx_bytes += skb->len; 2603 2604 /* populate checksum, timestamp, VLAN, and protocol */ 2605 ixgbe_process_skb_fields(rx_ring, rx_desc, skb); 2606 2607 #ifdef IXGBE_FCOE 2608 /* if ddp, not passing to ULD unless for FCP_RSP or error */ 2609 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) { 2610 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb); 2611 /* include DDPed FCoE data */ 2612 if (ddp_bytes > 0) { 2613 if (!mss) { 2614 mss = rx_ring->netdev->mtu - 2615 sizeof(struct fcoe_hdr) - 2616 sizeof(struct fc_frame_header) - 2617 sizeof(struct fcoe_crc_eof); 2618 if (mss > 512) 2619 mss &= ~511; 2620 } 2621 total_rx_bytes += ddp_bytes; 2622 total_rx_packets += DIV_ROUND_UP(ddp_bytes, 2623 mss); 2624 } 2625 if (!ddp_bytes) { 2626 dev_kfree_skb_any(skb); 2627 continue; 2628 } 2629 } 2630 2631 #endif /* IXGBE_FCOE */ 2632 ixgbe_rx_skb(q_vector, skb); 2633 2634 /* update budget accounting */ 2635 total_rx_packets++; 2636 } 2637 2638 if (xdp_xmit & IXGBE_XDP_REDIR) 2639 xdp_do_flush(); 2640 2641 if (xdp_xmit & IXGBE_XDP_TX) { 2642 struct ixgbe_ring *ring = ixgbe_determine_xdp_ring(adapter); 2643 2644 ixgbe_xdp_ring_update_tail_locked(ring); 2645 } 2646 2647 ixgbe_update_rx_ring_stats(rx_ring, q_vector, total_rx_packets, 2648 total_rx_bytes); 2649 2650 return total_rx_packets; 2651 } 2652 2653 /** 2654 * ixgbe_configure_msix - Configure MSI-X hardware 2655 * @adapter: board private structure 2656 * 2657 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X 2658 * interrupts. 2659 **/ 2660 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter) 2661 { 2662 struct ixgbe_q_vector *q_vector; 2663 int v_idx; 2664 u32 mask; 2665 2666 /* Populate MSIX to EITR Select */ 2667 if (adapter->num_vfs > 32) { 2668 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1; 2669 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel); 2670 } 2671 2672 /* 2673 * Populate the IVAR table and set the ITR values to the 2674 * corresponding register. 2675 */ 2676 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) { 2677 struct ixgbe_ring *ring; 2678 q_vector = adapter->q_vector[v_idx]; 2679 2680 ixgbe_for_each_ring(ring, q_vector->rx) 2681 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx); 2682 2683 ixgbe_for_each_ring(ring, q_vector->tx) 2684 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx); 2685 2686 ixgbe_write_eitr(q_vector); 2687 } 2688 2689 switch (adapter->hw.mac.type) { 2690 case ixgbe_mac_82598EB: 2691 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX, 2692 v_idx); 2693 break; 2694 case ixgbe_mac_82599EB: 2695 case ixgbe_mac_X540: 2696 case ixgbe_mac_X550: 2697 case ixgbe_mac_X550EM_x: 2698 case ixgbe_mac_x550em_a: 2699 case ixgbe_mac_e610: 2700 ixgbe_set_ivar(adapter, -1, 1, v_idx); 2701 break; 2702 default: 2703 break; 2704 } 2705 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950); 2706 2707 /* set up to autoclear timer, and the vectors */ 2708 mask = IXGBE_EIMS_ENABLE_MASK; 2709 mask &= ~(IXGBE_EIMS_OTHER | 2710 IXGBE_EIMS_MAILBOX | 2711 IXGBE_EIMS_LSC); 2712 2713 if (adapter->hw.mac.type == ixgbe_mac_e610) 2714 mask &= ~IXGBE_EIMS_FW_EVENT; 2715 2716 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask); 2717 } 2718 2719 /** 2720 * ixgbe_update_itr - update the dynamic ITR value based on statistics 2721 * @q_vector: structure containing interrupt and ring information 2722 * @ring_container: structure containing ring performance data 2723 * 2724 * Stores a new ITR value based on packets and byte 2725 * counts during the last interrupt. The advantage of per interrupt 2726 * computation is faster updates and more accurate ITR for the current 2727 * traffic pattern. Constants in this function were computed 2728 * based on theoretical maximum wire speed and thresholds were set based 2729 * on testing data as well as attempting to minimize response time 2730 * while increasing bulk throughput. 2731 **/ 2732 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector, 2733 struct ixgbe_ring_container *ring_container) 2734 { 2735 unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS | 2736 IXGBE_ITR_ADAPTIVE_LATENCY; 2737 unsigned int avg_wire_size, packets, bytes; 2738 unsigned long next_update = jiffies; 2739 2740 /* If we don't have any rings just leave ourselves set for maximum 2741 * possible latency so we take ourselves out of the equation. 2742 */ 2743 if (!ring_container->ring) 2744 return; 2745 2746 /* If we didn't update within up to 1 - 2 jiffies we can assume 2747 * that either packets are coming in so slow there hasn't been 2748 * any work, or that there is so much work that NAPI is dealing 2749 * with interrupt moderation and we don't need to do anything. 2750 */ 2751 if (time_after(next_update, ring_container->next_update)) 2752 goto clear_counts; 2753 2754 packets = ring_container->total_packets; 2755 2756 /* We have no packets to actually measure against. This means 2757 * either one of the other queues on this vector is active or 2758 * we are a Tx queue doing TSO with too high of an interrupt rate. 2759 * 2760 * When this occurs just tick up our delay by the minimum value 2761 * and hope that this extra delay will prevent us from being called 2762 * without any work on our queue. 2763 */ 2764 if (!packets) { 2765 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC; 2766 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS) 2767 itr = IXGBE_ITR_ADAPTIVE_MAX_USECS; 2768 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY; 2769 goto clear_counts; 2770 } 2771 2772 bytes = ring_container->total_bytes; 2773 2774 /* If packets are less than 4 or bytes are less than 9000 assume 2775 * insufficient data to use bulk rate limiting approach. We are 2776 * likely latency driven. 2777 */ 2778 if (packets < 4 && bytes < 9000) { 2779 itr = IXGBE_ITR_ADAPTIVE_LATENCY; 2780 goto adjust_by_size; 2781 } 2782 2783 /* Between 4 and 48 we can assume that our current interrupt delay 2784 * is only slightly too low. As such we should increase it by a small 2785 * fixed amount. 2786 */ 2787 if (packets < 48) { 2788 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC; 2789 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS) 2790 itr = IXGBE_ITR_ADAPTIVE_MAX_USECS; 2791 goto clear_counts; 2792 } 2793 2794 /* Between 48 and 96 is our "goldilocks" zone where we are working 2795 * out "just right". Just report that our current ITR is good for us. 2796 */ 2797 if (packets < 96) { 2798 itr = q_vector->itr >> 2; 2799 goto clear_counts; 2800 } 2801 2802 /* If packet count is 96 or greater we are likely looking at a slight 2803 * overrun of the delay we want. Try halving our delay to see if that 2804 * will cut the number of packets in half per interrupt. 2805 */ 2806 if (packets < 256) { 2807 itr = q_vector->itr >> 3; 2808 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS) 2809 itr = IXGBE_ITR_ADAPTIVE_MIN_USECS; 2810 goto clear_counts; 2811 } 2812 2813 /* The paths below assume we are dealing with a bulk ITR since number 2814 * of packets is 256 or greater. We are just going to have to compute 2815 * a value and try to bring the count under control, though for smaller 2816 * packet sizes there isn't much we can do as NAPI polling will likely 2817 * be kicking in sooner rather than later. 2818 */ 2819 itr = IXGBE_ITR_ADAPTIVE_BULK; 2820 2821 adjust_by_size: 2822 /* If packet counts are 256 or greater we can assume we have a gross 2823 * overestimation of what the rate should be. Instead of trying to fine 2824 * tune it just use the formula below to try and dial in an exact value 2825 * give the current packet size of the frame. 2826 */ 2827 avg_wire_size = bytes / packets; 2828 2829 /* The following is a crude approximation of: 2830 * wmem_default / (size + overhead) = desired_pkts_per_int 2831 * rate / bits_per_byte / (size + ethernet overhead) = pkt_rate 2832 * (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value 2833 * 2834 * Assuming wmem_default is 212992 and overhead is 640 bytes per 2835 * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the 2836 * formula down to 2837 * 2838 * (170 * (size + 24)) / (size + 640) = ITR 2839 * 2840 * We first do some math on the packet size and then finally bitshift 2841 * by 8 after rounding up. We also have to account for PCIe link speed 2842 * difference as ITR scales based on this. 2843 */ 2844 if (avg_wire_size <= 60) { 2845 /* Start at 50k ints/sec */ 2846 avg_wire_size = 5120; 2847 } else if (avg_wire_size <= 316) { 2848 /* 50K ints/sec to 16K ints/sec */ 2849 avg_wire_size *= 40; 2850 avg_wire_size += 2720; 2851 } else if (avg_wire_size <= 1084) { 2852 /* 16K ints/sec to 9.2K ints/sec */ 2853 avg_wire_size *= 15; 2854 avg_wire_size += 11452; 2855 } else if (avg_wire_size < 1968) { 2856 /* 9.2K ints/sec to 8K ints/sec */ 2857 avg_wire_size *= 5; 2858 avg_wire_size += 22420; 2859 } else { 2860 /* plateau at a limit of 8K ints/sec */ 2861 avg_wire_size = 32256; 2862 } 2863 2864 /* If we are in low latency mode half our delay which doubles the rate 2865 * to somewhere between 100K to 16K ints/sec 2866 */ 2867 if (itr & IXGBE_ITR_ADAPTIVE_LATENCY) 2868 avg_wire_size >>= 1; 2869 2870 /* Resultant value is 256 times larger than it needs to be. This 2871 * gives us room to adjust the value as needed to either increase 2872 * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc. 2873 * 2874 * Use addition as we have already recorded the new latency flag 2875 * for the ITR value. 2876 */ 2877 switch (q_vector->adapter->link_speed) { 2878 case IXGBE_LINK_SPEED_10GB_FULL: 2879 case IXGBE_LINK_SPEED_100_FULL: 2880 default: 2881 itr += DIV_ROUND_UP(avg_wire_size, 2882 IXGBE_ITR_ADAPTIVE_MIN_INC * 256) * 2883 IXGBE_ITR_ADAPTIVE_MIN_INC; 2884 break; 2885 case IXGBE_LINK_SPEED_2_5GB_FULL: 2886 case IXGBE_LINK_SPEED_1GB_FULL: 2887 case IXGBE_LINK_SPEED_10_FULL: 2888 if (avg_wire_size > 8064) 2889 avg_wire_size = 8064; 2890 itr += DIV_ROUND_UP(avg_wire_size, 2891 IXGBE_ITR_ADAPTIVE_MIN_INC * 64) * 2892 IXGBE_ITR_ADAPTIVE_MIN_INC; 2893 break; 2894 } 2895 2896 clear_counts: 2897 /* write back value */ 2898 ring_container->itr = itr; 2899 2900 /* next update should occur within next jiffy */ 2901 ring_container->next_update = next_update + 1; 2902 2903 ring_container->total_bytes = 0; 2904 ring_container->total_packets = 0; 2905 } 2906 2907 /** 2908 * ixgbe_write_eitr - write EITR register in hardware specific way 2909 * @q_vector: structure containing interrupt and ring information 2910 * 2911 * This function is made to be called by ethtool and by the driver 2912 * when it needs to update EITR registers at runtime. Hardware 2913 * specific quirks/differences are taken care of here. 2914 */ 2915 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector) 2916 { 2917 struct ixgbe_adapter *adapter = q_vector->adapter; 2918 struct ixgbe_hw *hw = &adapter->hw; 2919 int v_idx = q_vector->v_idx; 2920 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR; 2921 2922 switch (adapter->hw.mac.type) { 2923 case ixgbe_mac_82598EB: 2924 /* must write high and low 16 bits to reset counter */ 2925 itr_reg |= (itr_reg << 16); 2926 break; 2927 case ixgbe_mac_82599EB: 2928 case ixgbe_mac_X540: 2929 case ixgbe_mac_X550: 2930 case ixgbe_mac_X550EM_x: 2931 case ixgbe_mac_x550em_a: 2932 case ixgbe_mac_e610: 2933 /* 2934 * set the WDIS bit to not clear the timer bits and cause an 2935 * immediate assertion of the interrupt 2936 */ 2937 itr_reg |= IXGBE_EITR_CNT_WDIS; 2938 break; 2939 default: 2940 break; 2941 } 2942 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg); 2943 } 2944 2945 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector) 2946 { 2947 u32 new_itr; 2948 2949 ixgbe_update_itr(q_vector, &q_vector->tx); 2950 ixgbe_update_itr(q_vector, &q_vector->rx); 2951 2952 /* use the smallest value of new ITR delay calculations */ 2953 new_itr = min(q_vector->rx.itr, q_vector->tx.itr); 2954 2955 /* Clear latency flag if set, shift into correct position */ 2956 new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY; 2957 new_itr <<= 2; 2958 2959 if (new_itr != q_vector->itr) { 2960 /* save the algorithm value here */ 2961 q_vector->itr = new_itr; 2962 2963 ixgbe_write_eitr(q_vector); 2964 } 2965 } 2966 2967 /** 2968 * ixgbe_check_overtemp_subtask - check for over temperature 2969 * @adapter: pointer to adapter 2970 **/ 2971 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter) 2972 { 2973 struct ixgbe_hw *hw = &adapter->hw; 2974 u32 eicr = adapter->interrupt_event; 2975 2976 if (test_bit(__IXGBE_DOWN, &adapter->state)) 2977 return; 2978 2979 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT)) 2980 return; 2981 2982 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT; 2983 2984 switch (hw->device_id) { 2985 case IXGBE_DEV_ID_82599_T3_LOM: 2986 /* 2987 * Since the warning interrupt is for both ports 2988 * we don't have to check if: 2989 * - This interrupt wasn't for our port. 2990 * - We may have missed the interrupt so always have to 2991 * check if we got a LSC 2992 */ 2993 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) && 2994 !(eicr & IXGBE_EICR_LSC)) 2995 return; 2996 2997 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) { 2998 u32 speed; 2999 bool link_up = false; 3000 3001 hw->mac.ops.check_link(hw, &speed, &link_up, false); 3002 3003 if (link_up) 3004 return; 3005 } 3006 3007 /* Check if this is not due to overtemp */ 3008 if (!hw->phy.ops.check_overtemp(hw)) 3009 return; 3010 3011 break; 3012 case IXGBE_DEV_ID_X550EM_A_1G_T: 3013 case IXGBE_DEV_ID_X550EM_A_1G_T_L: 3014 if (!hw->phy.ops.check_overtemp(hw)) 3015 return; 3016 break; 3017 default: 3018 if (adapter->hw.mac.type >= ixgbe_mac_X540) 3019 return; 3020 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw))) 3021 return; 3022 break; 3023 } 3024 e_crit(drv, "%s\n", ixgbe_overheat_msg); 3025 3026 adapter->interrupt_event = 0; 3027 } 3028 3029 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr) 3030 { 3031 struct ixgbe_hw *hw = &adapter->hw; 3032 3033 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) && 3034 (eicr & IXGBE_EICR_GPI_SDP1(hw))) { 3035 e_crit(probe, "Fan has stopped, replace the adapter\n"); 3036 /* write to clear the interrupt */ 3037 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw)); 3038 } 3039 } 3040 3041 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr) 3042 { 3043 struct ixgbe_hw *hw = &adapter->hw; 3044 3045 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)) 3046 return; 3047 3048 switch (adapter->hw.mac.type) { 3049 case ixgbe_mac_82599EB: 3050 /* 3051 * Need to check link state so complete overtemp check 3052 * on service task 3053 */ 3054 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) || 3055 (eicr & IXGBE_EICR_LSC)) && 3056 (!test_bit(__IXGBE_DOWN, &adapter->state))) { 3057 adapter->interrupt_event = eicr; 3058 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT; 3059 ixgbe_service_event_schedule(adapter); 3060 return; 3061 } 3062 return; 3063 case ixgbe_mac_x550em_a: 3064 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) { 3065 adapter->interrupt_event = eicr; 3066 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT; 3067 ixgbe_service_event_schedule(adapter); 3068 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 3069 IXGBE_EICR_GPI_SDP0_X550EM_a); 3070 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR, 3071 IXGBE_EICR_GPI_SDP0_X550EM_a); 3072 } 3073 return; 3074 case ixgbe_mac_X550: 3075 case ixgbe_mac_X540: 3076 if (!(eicr & IXGBE_EICR_TS)) 3077 return; 3078 break; 3079 default: 3080 return; 3081 } 3082 3083 e_crit(drv, "%s\n", ixgbe_overheat_msg); 3084 } 3085 3086 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw) 3087 { 3088 switch (hw->mac.type) { 3089 case ixgbe_mac_82598EB: 3090 if (hw->phy.type == ixgbe_phy_nl) 3091 return true; 3092 return false; 3093 case ixgbe_mac_82599EB: 3094 case ixgbe_mac_X550EM_x: 3095 case ixgbe_mac_x550em_a: 3096 switch (hw->mac.ops.get_media_type(hw)) { 3097 case ixgbe_media_type_fiber: 3098 case ixgbe_media_type_fiber_qsfp: 3099 return true; 3100 default: 3101 return false; 3102 } 3103 default: 3104 return false; 3105 } 3106 } 3107 3108 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr) 3109 { 3110 struct ixgbe_hw *hw = &adapter->hw; 3111 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw); 3112 3113 if (!ixgbe_is_sfp(hw)) 3114 return; 3115 3116 /* Later MAC's use different SDP */ 3117 if (hw->mac.type >= ixgbe_mac_X540) 3118 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3119 3120 if (eicr & eicr_mask) { 3121 /* Clear the interrupt */ 3122 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 3123 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 3124 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET; 3125 adapter->sfp_poll_time = 0; 3126 ixgbe_service_event_schedule(adapter); 3127 } 3128 } 3129 3130 if (adapter->hw.mac.type == ixgbe_mac_82599EB && 3131 (eicr & IXGBE_EICR_GPI_SDP1(hw))) { 3132 /* Clear the interrupt */ 3133 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw)); 3134 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 3135 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG; 3136 ixgbe_service_event_schedule(adapter); 3137 } 3138 } 3139 } 3140 3141 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter) 3142 { 3143 struct ixgbe_hw *hw = &adapter->hw; 3144 3145 adapter->lsc_int++; 3146 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; 3147 adapter->link_check_timeout = jiffies; 3148 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 3149 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 3150 IXGBE_WRITE_FLUSH(hw); 3151 ixgbe_service_event_schedule(adapter); 3152 } 3153 } 3154 3155 /** 3156 * ixgbe_check_phy_fw_load - check if PHY FW load failed 3157 * @adapter: pointer to adapter structure 3158 * @link_cfg_err: bitmap from the link info structure 3159 * 3160 * Check if external PHY FW load failed and print an error message if it did. 3161 */ 3162 static void ixgbe_check_phy_fw_load(struct ixgbe_adapter *adapter, 3163 u8 link_cfg_err) 3164 { 3165 if (!(link_cfg_err & IXGBE_ACI_LINK_EXTERNAL_PHY_LOAD_FAILURE)) { 3166 adapter->flags2 &= ~IXGBE_FLAG2_PHY_FW_LOAD_FAILED; 3167 return; 3168 } 3169 3170 if (adapter->flags2 & IXGBE_FLAG2_PHY_FW_LOAD_FAILED) 3171 return; 3172 3173 if (link_cfg_err & IXGBE_ACI_LINK_EXTERNAL_PHY_LOAD_FAILURE) { 3174 netdev_err(adapter->netdev, "Device failed to load the FW for the external PHY. Please download and install the latest NVM for your device and try again\n"); 3175 adapter->flags2 |= IXGBE_FLAG2_PHY_FW_LOAD_FAILED; 3176 } 3177 } 3178 3179 /** 3180 * ixgbe_check_module_power - check module power level 3181 * @adapter: pointer to adapter structure 3182 * @link_cfg_err: bitmap from the link info structure 3183 * 3184 * Check module power level returned by a previous call to aci_get_link_info 3185 * and print error messages if module power level is not supported. 3186 */ 3187 static void ixgbe_check_module_power(struct ixgbe_adapter *adapter, 3188 u8 link_cfg_err) 3189 { 3190 /* If module power level is supported, clear the flag. */ 3191 if (!(link_cfg_err & (IXGBE_ACI_LINK_INVAL_MAX_POWER_LIMIT | 3192 IXGBE_ACI_LINK_MODULE_POWER_UNSUPPORTED))) { 3193 adapter->flags2 &= ~IXGBE_FLAG2_MOD_POWER_UNSUPPORTED; 3194 return; 3195 } 3196 3197 /* If IXGBE_FLAG2_MOD_POWER_UNSUPPORTED was previously set and the 3198 * above block didn't clear this bit, there's nothing to do. 3199 */ 3200 if (adapter->flags2 & IXGBE_FLAG2_MOD_POWER_UNSUPPORTED) 3201 return; 3202 3203 if (link_cfg_err & IXGBE_ACI_LINK_INVAL_MAX_POWER_LIMIT) { 3204 netdev_err(adapter->netdev, "The installed module is incompatible with the device's NVM image. Cannot start link.\n"); 3205 adapter->flags2 |= IXGBE_FLAG2_MOD_POWER_UNSUPPORTED; 3206 } else if (link_cfg_err & IXGBE_ACI_LINK_MODULE_POWER_UNSUPPORTED) { 3207 netdev_err(adapter->netdev, "The module's power requirements exceed the device's power supply. Cannot start link.\n"); 3208 adapter->flags2 |= IXGBE_FLAG2_MOD_POWER_UNSUPPORTED; 3209 } 3210 } 3211 3212 /** 3213 * ixgbe_check_link_cfg_err - check if link configuration failed 3214 * @adapter: pointer to adapter structure 3215 * @link_cfg_err: bitmap from the link info structure 3216 * 3217 * Print if any link configuration failure happens due to the value in the 3218 * link_cfg_err parameter in the link info structure. 3219 */ 3220 static void ixgbe_check_link_cfg_err(struct ixgbe_adapter *adapter, 3221 u8 link_cfg_err) 3222 { 3223 ixgbe_check_module_power(adapter, link_cfg_err); 3224 ixgbe_check_phy_fw_load(adapter, link_cfg_err); 3225 } 3226 3227 /** 3228 * ixgbe_process_link_status_event - process the link event 3229 * @adapter: pointer to adapter structure 3230 * @link_up: true if the physical link is up and false if it is down 3231 * @link_speed: current link speed received from the link event 3232 * 3233 * Return: 0 on success or negative value on failure. 3234 */ 3235 static int 3236 ixgbe_process_link_status_event(struct ixgbe_adapter *adapter, bool link_up, 3237 u16 link_speed) 3238 { 3239 struct ixgbe_hw *hw = &adapter->hw; 3240 int status; 3241 3242 /* Update the link info structures and re-enable link events, 3243 * don't bail on failure due to other book keeping needed. 3244 */ 3245 status = ixgbe_update_link_info(hw); 3246 if (status) 3247 e_dev_err("Failed to update link status, err %d aq_err %d\n", 3248 status, hw->aci.last_status); 3249 3250 ixgbe_check_link_cfg_err(adapter, hw->link.link_info.link_cfg_err); 3251 3252 /* Check if the link state is up after updating link info, and treat 3253 * this event as an UP event since the link is actually UP now. 3254 */ 3255 if (hw->link.link_info.link_info & IXGBE_ACI_LINK_UP) 3256 link_up = true; 3257 3258 /* Turn off PHY if media was removed. */ 3259 if (!(adapter->flags2 & IXGBE_FLAG2_NO_MEDIA) && 3260 !(hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE)) 3261 adapter->flags2 |= IXGBE_FLAG2_NO_MEDIA; 3262 3263 if (link_up == adapter->link_up && 3264 link_up == netif_carrier_ok(adapter->netdev) && 3265 link_speed == adapter->link_speed) 3266 return 0; 3267 3268 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; 3269 adapter->link_check_timeout = jiffies; 3270 ixgbe_watchdog_update_link(adapter); 3271 3272 if (link_up) 3273 ixgbe_watchdog_link_is_up(adapter); 3274 else 3275 ixgbe_watchdog_link_is_down(adapter); 3276 3277 return 0; 3278 } 3279 3280 /** 3281 * ixgbe_handle_link_status_event - handle link status event via ACI 3282 * @adapter: pointer to adapter structure 3283 * @e: event structure containing link status info 3284 */ 3285 static void 3286 ixgbe_handle_link_status_event(struct ixgbe_adapter *adapter, 3287 struct ixgbe_aci_event *e) 3288 { 3289 struct ixgbe_aci_cmd_get_link_status_data *link_data; 3290 u16 link_speed; 3291 bool link_up; 3292 3293 link_data = (struct ixgbe_aci_cmd_get_link_status_data *)e->msg_buf; 3294 3295 link_up = !!(link_data->link_info & IXGBE_ACI_LINK_UP); 3296 link_speed = le16_to_cpu(link_data->link_speed); 3297 3298 if (ixgbe_process_link_status_event(adapter, link_up, link_speed)) 3299 e_dev_warn("Could not process link status event"); 3300 } 3301 3302 /** 3303 * ixgbe_schedule_fw_event - schedule Firmware event 3304 * @adapter: pointer to the adapter structure 3305 * 3306 * If the adapter is not in down, removing or resetting state, 3307 * an event is scheduled. 3308 */ 3309 static void ixgbe_schedule_fw_event(struct ixgbe_adapter *adapter) 3310 { 3311 if (!test_bit(__IXGBE_DOWN, &adapter->state) && 3312 !test_bit(__IXGBE_REMOVING, &adapter->state) && 3313 !test_bit(__IXGBE_RESETTING, &adapter->state)) { 3314 adapter->flags2 |= IXGBE_FLAG2_FW_ASYNC_EVENT; 3315 ixgbe_service_event_schedule(adapter); 3316 } 3317 } 3318 3319 /** 3320 * ixgbe_aci_event_cleanup - release msg_buf memory 3321 * @event: pointer to the event holding msg_buf to be released 3322 * 3323 * Clean memory allocated for event's msg_buf. Implements auto memory cleanup. 3324 */ 3325 static void ixgbe_aci_event_cleanup(struct ixgbe_aci_event *event) 3326 { 3327 kfree(event->msg_buf); 3328 } 3329 3330 /** 3331 * ixgbe_handle_fw_event - handle Firmware event 3332 * @adapter: pointer to the adapter structure 3333 * 3334 * Obtain an event from the ACI and then and then process it according to the 3335 * type of the event and the opcode. 3336 */ 3337 static void ixgbe_handle_fw_event(struct ixgbe_adapter *adapter) 3338 { 3339 struct ixgbe_aci_event event __cleanup(ixgbe_aci_event_cleanup); 3340 struct ixgbe_hw *hw = &adapter->hw; 3341 bool pending = false; 3342 int err; 3343 3344 if (adapter->flags2 & IXGBE_FLAG2_FW_ASYNC_EVENT) 3345 adapter->flags2 &= ~IXGBE_FLAG2_FW_ASYNC_EVENT; 3346 event.buf_len = IXGBE_ACI_MAX_BUFFER_SIZE; 3347 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); 3348 if (!event.msg_buf) 3349 return; 3350 3351 do { 3352 err = ixgbe_aci_get_event(hw, &event, &pending); 3353 if (err) 3354 break; 3355 3356 switch (le16_to_cpu(event.desc.opcode)) { 3357 case ixgbe_aci_opc_get_link_status: 3358 ixgbe_handle_link_status_event(adapter, &event); 3359 break; 3360 case ixgbe_aci_opc_temp_tca_event: 3361 e_crit(drv, "%s\n", ixgbe_overheat_msg); 3362 ixgbe_down(adapter); 3363 break; 3364 default: 3365 e_warn(hw, "unknown FW async event captured\n"); 3366 break; 3367 } 3368 } while (pending); 3369 } 3370 3371 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter, 3372 u64 qmask) 3373 { 3374 struct ixgbe_hw *hw = &adapter->hw; 3375 u32 mask; 3376 3377 switch (hw->mac.type) { 3378 case ixgbe_mac_82598EB: 3379 mask = (IXGBE_EIMS_RTX_QUEUE & qmask); 3380 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 3381 break; 3382 case ixgbe_mac_82599EB: 3383 case ixgbe_mac_X540: 3384 case ixgbe_mac_X550: 3385 case ixgbe_mac_X550EM_x: 3386 case ixgbe_mac_x550em_a: 3387 case ixgbe_mac_e610: 3388 mask = (qmask & 0xFFFFFFFF); 3389 if (mask) 3390 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 3391 mask = (qmask >> 32); 3392 if (mask) 3393 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 3394 break; 3395 default: 3396 break; 3397 } 3398 /* skip the flush */ 3399 } 3400 3401 /** 3402 * ixgbe_irq_enable - Enable default interrupt generation settings 3403 * @adapter: board private structure 3404 * @queues: enable irqs for queues 3405 * @flush: flush register write 3406 **/ 3407 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues, 3408 bool flush) 3409 { 3410 struct ixgbe_hw *hw = &adapter->hw; 3411 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 3412 3413 /* don't reenable LSC while waiting for link */ 3414 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) 3415 mask &= ~IXGBE_EIMS_LSC; 3416 3417 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) 3418 switch (adapter->hw.mac.type) { 3419 case ixgbe_mac_82599EB: 3420 mask |= IXGBE_EIMS_GPI_SDP0(hw); 3421 break; 3422 case ixgbe_mac_X540: 3423 case ixgbe_mac_X550: 3424 case ixgbe_mac_X550EM_x: 3425 case ixgbe_mac_x550em_a: 3426 mask |= IXGBE_EIMS_TS; 3427 break; 3428 default: 3429 break; 3430 } 3431 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) 3432 mask |= IXGBE_EIMS_GPI_SDP1(hw); 3433 switch (adapter->hw.mac.type) { 3434 case ixgbe_mac_82599EB: 3435 mask |= IXGBE_EIMS_GPI_SDP1(hw); 3436 mask |= IXGBE_EIMS_GPI_SDP2(hw); 3437 fallthrough; 3438 case ixgbe_mac_X540: 3439 case ixgbe_mac_X550: 3440 case ixgbe_mac_X550EM_x: 3441 case ixgbe_mac_e610: 3442 mask |= IXGBE_EIMS_FW_EVENT; 3443 fallthrough; 3444 case ixgbe_mac_x550em_a: 3445 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP || 3446 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP || 3447 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) 3448 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw); 3449 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t) 3450 mask |= IXGBE_EICR_GPI_SDP0_X540; 3451 mask |= IXGBE_EIMS_ECC; 3452 mask |= IXGBE_EIMS_MAILBOX; 3453 break; 3454 default: 3455 break; 3456 } 3457 3458 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) && 3459 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT)) 3460 mask |= IXGBE_EIMS_FLOW_DIR; 3461 3462 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); 3463 if (queues) 3464 ixgbe_irq_enable_queues(adapter, ~0); 3465 if (flush) 3466 IXGBE_WRITE_FLUSH(&adapter->hw); 3467 } 3468 3469 static irqreturn_t ixgbe_msix_other(int irq, void *data) 3470 { 3471 struct ixgbe_adapter *adapter = data; 3472 struct ixgbe_hw *hw = &adapter->hw; 3473 u32 eicr; 3474 3475 /* 3476 * Workaround for Silicon errata. Use clear-by-write instead 3477 * of clear-by-read. Reading with EICS will return the 3478 * interrupt causes without clearing, which later be done 3479 * with the write to EICR. 3480 */ 3481 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3482 3483 /* The lower 16bits of the EICR register are for the queue interrupts 3484 * which should be masked here in order to not accidentally clear them if 3485 * the bits are high when ixgbe_msix_other is called. There is a race 3486 * condition otherwise which results in possible performance loss 3487 * especially if the ixgbe_msix_other interrupt is triggering 3488 * consistently (as it would when PPS is turned on for the X540 device) 3489 */ 3490 eicr &= 0xFFFF0000; 3491 3492 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3493 3494 if (eicr & IXGBE_EICR_LSC) 3495 ixgbe_check_lsc(adapter); 3496 3497 if (eicr & IXGBE_EICR_MAILBOX) 3498 ixgbe_msg_task(adapter); 3499 3500 if (eicr & IXGBE_EICR_FW_EVENT) 3501 ixgbe_schedule_fw_event(adapter); 3502 3503 switch (hw->mac.type) { 3504 case ixgbe_mac_82599EB: 3505 case ixgbe_mac_X540: 3506 case ixgbe_mac_X550: 3507 case ixgbe_mac_X550EM_x: 3508 case ixgbe_mac_x550em_a: 3509 case ixgbe_mac_e610: 3510 if (hw->phy.type == ixgbe_phy_x550em_ext_t && 3511 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3512 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT; 3513 ixgbe_service_event_schedule(adapter); 3514 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3515 IXGBE_EICR_GPI_SDP0_X540); 3516 } 3517 if (eicr & IXGBE_EICR_ECC) { 3518 e_info(link, "Received ECC Err, initiating reset\n"); 3519 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state); 3520 ixgbe_service_event_schedule(adapter); 3521 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); 3522 } 3523 /* Handle Flow Director Full threshold interrupt */ 3524 if (eicr & IXGBE_EICR_FLOW_DIR) { 3525 int reinit_count = 0; 3526 int i; 3527 for (i = 0; i < adapter->num_tx_queues; i++) { 3528 struct ixgbe_ring *ring = adapter->tx_ring[i]; 3529 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE, 3530 &ring->state)) 3531 reinit_count++; 3532 } 3533 if (reinit_count) { 3534 /* no more flow director interrupts until after init */ 3535 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR); 3536 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT; 3537 ixgbe_service_event_schedule(adapter); 3538 } 3539 } 3540 ixgbe_check_sfp_event(adapter, eicr); 3541 ixgbe_check_overtemp_event(adapter, eicr); 3542 break; 3543 default: 3544 break; 3545 } 3546 3547 ixgbe_check_fan_failure(adapter, eicr); 3548 3549 if (unlikely(eicr & IXGBE_EICR_TIMESYNC)) 3550 ixgbe_ptp_check_pps_event(adapter); 3551 3552 /* re-enable the original interrupt state, no lsc, no queues */ 3553 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 3554 ixgbe_irq_enable(adapter, false, false); 3555 3556 return IRQ_HANDLED; 3557 } 3558 3559 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data) 3560 { 3561 struct ixgbe_q_vector *q_vector = data; 3562 3563 /* EIAM disabled interrupts (on this vector) for us */ 3564 3565 if (q_vector->rx.ring || q_vector->tx.ring) 3566 napi_schedule_irqoff(&q_vector->napi); 3567 3568 return IRQ_HANDLED; 3569 } 3570 3571 /** 3572 * ixgbe_poll - NAPI Rx polling callback 3573 * @napi: structure for representing this polling device 3574 * @budget: how many packets driver is allowed to clean 3575 * 3576 * This function is used for legacy and MSI, NAPI mode 3577 **/ 3578 int ixgbe_poll(struct napi_struct *napi, int budget) 3579 { 3580 struct ixgbe_q_vector *q_vector = 3581 container_of(napi, struct ixgbe_q_vector, napi); 3582 struct ixgbe_adapter *adapter = q_vector->adapter; 3583 struct ixgbe_ring *ring; 3584 int per_ring_budget, work_done = 0; 3585 bool clean_complete = true; 3586 3587 #ifdef CONFIG_IXGBE_DCA 3588 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 3589 ixgbe_update_dca(q_vector); 3590 #endif 3591 3592 ixgbe_for_each_ring(ring, q_vector->tx) { 3593 bool wd = ring->xsk_pool ? 3594 ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) : 3595 ixgbe_clean_tx_irq(q_vector, ring, budget); 3596 3597 if (!wd) 3598 clean_complete = false; 3599 } 3600 3601 /* Exit if we are called by netpoll */ 3602 if (budget <= 0) 3603 return budget; 3604 3605 /* attempt to distribute budget to each queue fairly, but don't allow 3606 * the budget to go below 1 because we'll exit polling */ 3607 if (q_vector->rx.count > 1) 3608 per_ring_budget = max(budget/q_vector->rx.count, 1); 3609 else 3610 per_ring_budget = budget; 3611 3612 ixgbe_for_each_ring(ring, q_vector->rx) { 3613 int cleaned = ring->xsk_pool ? 3614 ixgbe_clean_rx_irq_zc(q_vector, ring, 3615 per_ring_budget) : 3616 ixgbe_clean_rx_irq(q_vector, ring, 3617 per_ring_budget); 3618 3619 work_done += cleaned; 3620 if (cleaned >= per_ring_budget) 3621 clean_complete = false; 3622 } 3623 3624 /* If all work not completed, return budget and keep polling */ 3625 if (!clean_complete) 3626 return budget; 3627 3628 /* all work done, exit the polling mode */ 3629 if (likely(napi_complete_done(napi, work_done))) { 3630 if (adapter->rx_itr_setting & 1) 3631 ixgbe_set_itr(q_vector); 3632 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 3633 ixgbe_irq_enable_queues(adapter, 3634 BIT_ULL(q_vector->v_idx)); 3635 } 3636 3637 return min(work_done, budget - 1); 3638 } 3639 3640 /** 3641 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts 3642 * @adapter: board private structure 3643 * 3644 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests 3645 * interrupts from the kernel. 3646 **/ 3647 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter) 3648 { 3649 struct net_device *netdev = adapter->netdev; 3650 unsigned int ri = 0, ti = 0; 3651 int vector, err; 3652 3653 for (vector = 0; vector < adapter->num_q_vectors; vector++) { 3654 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector]; 3655 struct msix_entry *entry = &adapter->msix_entries[vector]; 3656 3657 if (q_vector->tx.ring && q_vector->rx.ring) { 3658 snprintf(q_vector->name, sizeof(q_vector->name), 3659 "%s-TxRx-%u", netdev->name, ri++); 3660 ti++; 3661 } else if (q_vector->rx.ring) { 3662 snprintf(q_vector->name, sizeof(q_vector->name), 3663 "%s-rx-%u", netdev->name, ri++); 3664 } else if (q_vector->tx.ring) { 3665 snprintf(q_vector->name, sizeof(q_vector->name), 3666 "%s-tx-%u", netdev->name, ti++); 3667 } else { 3668 /* skip this unused q_vector */ 3669 continue; 3670 } 3671 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0, 3672 q_vector->name, q_vector); 3673 if (err) { 3674 e_err(probe, "request_irq failed for MSIX interrupt " 3675 "Error: %d\n", err); 3676 goto free_queue_irqs; 3677 } 3678 /* If Flow Director is enabled, set interrupt affinity */ 3679 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) { 3680 /* assign the mask for this irq */ 3681 irq_update_affinity_hint(entry->vector, 3682 &q_vector->affinity_mask); 3683 } 3684 } 3685 3686 err = request_irq(adapter->msix_entries[vector].vector, 3687 ixgbe_msix_other, 0, netdev->name, adapter); 3688 if (err) { 3689 e_err(probe, "request_irq for msix_other failed: %d\n", err); 3690 goto free_queue_irqs; 3691 } 3692 3693 return 0; 3694 3695 free_queue_irqs: 3696 while (vector) { 3697 vector--; 3698 irq_update_affinity_hint(adapter->msix_entries[vector].vector, 3699 NULL); 3700 free_irq(adapter->msix_entries[vector].vector, 3701 adapter->q_vector[vector]); 3702 } 3703 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; 3704 pci_disable_msix(adapter->pdev); 3705 kfree(adapter->msix_entries); 3706 adapter->msix_entries = NULL; 3707 return err; 3708 } 3709 3710 /** 3711 * ixgbe_intr - legacy mode Interrupt Handler 3712 * @irq: interrupt number 3713 * @data: pointer to a network interface device structure 3714 **/ 3715 static irqreturn_t ixgbe_intr(int irq, void *data) 3716 { 3717 struct ixgbe_adapter *adapter = data; 3718 struct ixgbe_hw *hw = &adapter->hw; 3719 struct ixgbe_q_vector *q_vector = adapter->q_vector[0]; 3720 u32 eicr; 3721 3722 /* 3723 * Workaround for silicon errata #26 on 82598. Mask the interrupt 3724 * before the read of EICR. 3725 */ 3726 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); 3727 3728 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read 3729 * therefore no explicit interrupt disable is necessary */ 3730 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 3731 if (!eicr) { 3732 /* 3733 * shared interrupt alert! 3734 * make sure interrupts are enabled because the read will 3735 * have disabled interrupts due to EIAM 3736 * finish the workaround of silicon errata on 82598. Unmask 3737 * the interrupt that we masked before the EICR read. 3738 */ 3739 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 3740 ixgbe_irq_enable(adapter, true, true); 3741 return IRQ_NONE; /* Not our interrupt */ 3742 } 3743 3744 if (eicr & IXGBE_EICR_LSC) 3745 ixgbe_check_lsc(adapter); 3746 3747 if (eicr & IXGBE_EICR_FW_EVENT) 3748 ixgbe_schedule_fw_event(adapter); 3749 3750 switch (hw->mac.type) { 3751 case ixgbe_mac_82599EB: 3752 ixgbe_check_sfp_event(adapter, eicr); 3753 fallthrough; 3754 case ixgbe_mac_X540: 3755 case ixgbe_mac_X550: 3756 case ixgbe_mac_X550EM_x: 3757 case ixgbe_mac_x550em_a: 3758 case ixgbe_mac_e610: 3759 if (eicr & IXGBE_EICR_ECC) { 3760 e_info(link, "Received ECC Err, initiating reset\n"); 3761 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state); 3762 ixgbe_service_event_schedule(adapter); 3763 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); 3764 } 3765 ixgbe_check_overtemp_event(adapter, eicr); 3766 break; 3767 default: 3768 break; 3769 } 3770 3771 ixgbe_check_fan_failure(adapter, eicr); 3772 if (unlikely(eicr & IXGBE_EICR_TIMESYNC)) 3773 ixgbe_ptp_check_pps_event(adapter); 3774 3775 /* would disable interrupts here but EIAM disabled it */ 3776 napi_schedule_irqoff(&q_vector->napi); 3777 3778 /* 3779 * re-enable link(maybe) and non-queue interrupts, no flush. 3780 * ixgbe_poll will re-enable the queue interrupts 3781 */ 3782 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 3783 ixgbe_irq_enable(adapter, false, false); 3784 3785 return IRQ_HANDLED; 3786 } 3787 3788 /** 3789 * ixgbe_request_irq - initialize interrupts 3790 * @adapter: board private structure 3791 * 3792 * Attempts to configure interrupts using the best available 3793 * capabilities of the hardware and kernel. 3794 **/ 3795 static int ixgbe_request_irq(struct ixgbe_adapter *adapter) 3796 { 3797 struct net_device *netdev = adapter->netdev; 3798 int err; 3799 3800 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) 3801 err = ixgbe_request_msix_irqs(adapter); 3802 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) 3803 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0, 3804 netdev->name, adapter); 3805 else 3806 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED, 3807 netdev->name, adapter); 3808 3809 if (err) 3810 e_err(probe, "request_irq failed, Error %d\n", err); 3811 3812 return err; 3813 } 3814 3815 static void ixgbe_free_irq(struct ixgbe_adapter *adapter) 3816 { 3817 int vector; 3818 3819 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { 3820 free_irq(adapter->pdev->irq, adapter); 3821 return; 3822 } 3823 3824 if (!adapter->msix_entries) 3825 return; 3826 3827 for (vector = 0; vector < adapter->num_q_vectors; vector++) { 3828 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector]; 3829 struct msix_entry *entry = &adapter->msix_entries[vector]; 3830 3831 /* free only the irqs that were actually requested */ 3832 if (!q_vector->rx.ring && !q_vector->tx.ring) 3833 continue; 3834 3835 /* clear the affinity_mask in the IRQ descriptor */ 3836 irq_update_affinity_hint(entry->vector, NULL); 3837 3838 free_irq(entry->vector, q_vector); 3839 } 3840 3841 free_irq(adapter->msix_entries[vector].vector, adapter); 3842 } 3843 3844 /** 3845 * ixgbe_irq_disable - Mask off interrupt generation on the NIC 3846 * @adapter: board private structure 3847 **/ 3848 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter) 3849 { 3850 switch (adapter->hw.mac.type) { 3851 case ixgbe_mac_82598EB: 3852 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); 3853 break; 3854 case ixgbe_mac_82599EB: 3855 case ixgbe_mac_X540: 3856 case ixgbe_mac_X550: 3857 case ixgbe_mac_X550EM_x: 3858 case ixgbe_mac_x550em_a: 3859 case ixgbe_mac_e610: 3860 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); 3861 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); 3862 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); 3863 break; 3864 default: 3865 break; 3866 } 3867 IXGBE_WRITE_FLUSH(&adapter->hw); 3868 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 3869 int vector; 3870 3871 for (vector = 0; vector < adapter->num_q_vectors; vector++) 3872 synchronize_irq(adapter->msix_entries[vector].vector); 3873 3874 synchronize_irq(adapter->msix_entries[vector++].vector); 3875 } else { 3876 synchronize_irq(adapter->pdev->irq); 3877 } 3878 } 3879 3880 /** 3881 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts 3882 * @adapter: board private structure 3883 * 3884 **/ 3885 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter) 3886 { 3887 struct ixgbe_q_vector *q_vector = adapter->q_vector[0]; 3888 3889 ixgbe_write_eitr(q_vector); 3890 3891 ixgbe_set_ivar(adapter, 0, 0, 0); 3892 ixgbe_set_ivar(adapter, 1, 0, 0); 3893 3894 e_info(hw, "Legacy interrupt IVAR setup done\n"); 3895 } 3896 3897 /** 3898 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset 3899 * @adapter: board private structure 3900 * @ring: structure containing ring specific data 3901 * 3902 * Configure the Tx descriptor ring after a reset. 3903 **/ 3904 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter, 3905 struct ixgbe_ring *ring) 3906 { 3907 struct ixgbe_hw *hw = &adapter->hw; 3908 u64 tdba = ring->dma; 3909 int wait_loop = 10; 3910 u32 txdctl = IXGBE_TXDCTL_ENABLE; 3911 u8 reg_idx = ring->reg_idx; 3912 3913 ring->xsk_pool = NULL; 3914 if (ring_is_xdp(ring)) 3915 ring->xsk_pool = ixgbe_xsk_pool(adapter, ring); 3916 3917 /* disable queue to avoid issues while updating state */ 3918 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0); 3919 IXGBE_WRITE_FLUSH(hw); 3920 3921 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx), 3922 (tdba & DMA_BIT_MASK(32))); 3923 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32)); 3924 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx), 3925 ring->count * sizeof(union ixgbe_adv_tx_desc)); 3926 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0); 3927 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0); 3928 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx); 3929 3930 /* 3931 * set WTHRESH to encourage burst writeback, it should not be set 3932 * higher than 1 when: 3933 * - ITR is 0 as it could cause false TX hangs 3934 * - ITR is set to > 100k int/sec and BQL is enabled 3935 * 3936 * In order to avoid issues WTHRESH + PTHRESH should always be equal 3937 * to or less than the number of on chip descriptors, which is 3938 * currently 40. 3939 */ 3940 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR)) 3941 txdctl |= 1u << 16; /* WTHRESH = 1 */ 3942 else 3943 txdctl |= 8u << 16; /* WTHRESH = 8 */ 3944 3945 /* 3946 * Setting PTHRESH to 32 both improves performance 3947 * and avoids a TX hang with DFP enabled 3948 */ 3949 txdctl |= (1u << 8) | /* HTHRESH = 1 */ 3950 32; /* PTHRESH = 32 */ 3951 3952 /* reinitialize flowdirector state */ 3953 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) { 3954 ring->atr_sample_rate = adapter->atr_sample_rate; 3955 ring->atr_count = 0; 3956 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state); 3957 } else { 3958 ring->atr_sample_rate = 0; 3959 } 3960 3961 /* initialize XPS */ 3962 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) { 3963 struct ixgbe_q_vector *q_vector = ring->q_vector; 3964 3965 if (q_vector) 3966 netif_set_xps_queue(ring->netdev, 3967 &q_vector->affinity_mask, 3968 ring->queue_index); 3969 } 3970 3971 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state); 3972 3973 /* reinitialize tx_buffer_info */ 3974 memset(ring->tx_buffer_info, 0, 3975 sizeof(struct ixgbe_tx_buffer) * ring->count); 3976 3977 /* enable queue */ 3978 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl); 3979 3980 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */ 3981 if (hw->mac.type == ixgbe_mac_82598EB && 3982 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) 3983 return; 3984 3985 /* poll to verify queue is enabled */ 3986 do { 3987 usleep_range(1000, 2000); 3988 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); 3989 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); 3990 if (!wait_loop) 3991 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx); 3992 } 3993 3994 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter) 3995 { 3996 struct ixgbe_hw *hw = &adapter->hw; 3997 u32 rttdcs, mtqc; 3998 u8 tcs = adapter->hw_tcs; 3999 4000 if (hw->mac.type == ixgbe_mac_82598EB) 4001 return; 4002 4003 /* disable the arbiter while setting MTQC */ 4004 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 4005 rttdcs |= IXGBE_RTTDCS_ARBDIS; 4006 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 4007 4008 /* set transmit pool layout */ 4009 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 4010 mtqc = IXGBE_MTQC_VT_ENA; 4011 if (tcs > 4) 4012 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ; 4013 else if (tcs > 1) 4014 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ; 4015 else if (adapter->ring_feature[RING_F_VMDQ].mask == 4016 IXGBE_82599_VMDQ_4Q_MASK) 4017 mtqc |= IXGBE_MTQC_32VF; 4018 else 4019 mtqc |= IXGBE_MTQC_64VF; 4020 } else { 4021 if (tcs > 4) { 4022 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ; 4023 } else if (tcs > 1) { 4024 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ; 4025 } else { 4026 u8 max_txq = adapter->num_tx_queues + 4027 adapter->num_xdp_queues; 4028 if (max_txq > 63) 4029 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ; 4030 else 4031 mtqc = IXGBE_MTQC_64Q_1PB; 4032 } 4033 } 4034 4035 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc); 4036 4037 /* Enable Security TX Buffer IFG for multiple pb */ 4038 if (tcs) { 4039 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); 4040 sectx |= IXGBE_SECTX_DCB; 4041 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx); 4042 } 4043 4044 /* re-enable the arbiter */ 4045 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 4046 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 4047 } 4048 4049 /** 4050 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset 4051 * @adapter: board private structure 4052 * 4053 * Configure the Tx unit of the MAC after a reset. 4054 **/ 4055 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter) 4056 { 4057 struct ixgbe_hw *hw = &adapter->hw; 4058 u32 dmatxctl; 4059 u32 i; 4060 4061 ixgbe_setup_mtqc(adapter); 4062 4063 if (hw->mac.type != ixgbe_mac_82598EB) { 4064 /* DMATXCTL.EN must be before Tx queues are enabled */ 4065 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 4066 dmatxctl |= IXGBE_DMATXCTL_TE; 4067 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 4068 } 4069 4070 /* Setup the HW Tx Head and Tail descriptor pointers */ 4071 for (i = 0; i < adapter->num_tx_queues; i++) 4072 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]); 4073 for (i = 0; i < adapter->num_xdp_queues; i++) 4074 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]); 4075 } 4076 4077 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter, 4078 struct ixgbe_ring *ring) 4079 { 4080 struct ixgbe_hw *hw = &adapter->hw; 4081 u8 reg_idx = ring->reg_idx; 4082 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx)); 4083 4084 srrctl |= IXGBE_SRRCTL_DROP_EN; 4085 4086 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl); 4087 } 4088 4089 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter, 4090 struct ixgbe_ring *ring) 4091 { 4092 struct ixgbe_hw *hw = &adapter->hw; 4093 u8 reg_idx = ring->reg_idx; 4094 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx)); 4095 4096 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 4097 4098 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl); 4099 } 4100 4101 #ifdef CONFIG_IXGBE_DCB 4102 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter) 4103 #else 4104 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter) 4105 #endif 4106 { 4107 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable; 4108 struct ixgbe_hw *hw = &adapter->hw; 4109 int i; 4110 4111 if (hw->mac.ops.disable_mdd) 4112 hw->mac.ops.disable_mdd(hw); 4113 4114 if (adapter->ixgbe_ieee_pfc) 4115 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en); 4116 4117 /* 4118 * We should set the drop enable bit if: 4119 * SR-IOV is enabled 4120 * or 4121 * Number of Rx queues > 1 and flow control is disabled 4122 * 4123 * This allows us to avoid head of line blocking for security 4124 * and performance reasons. 4125 */ 4126 if (adapter->num_vfs || (adapter->num_rx_queues > 1 && 4127 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) { 4128 for (i = 0; i < adapter->num_rx_queues; i++) 4129 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]); 4130 } else { 4131 for (i = 0; i < adapter->num_rx_queues; i++) 4132 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]); 4133 } 4134 4135 if (hw->mac.ops.enable_mdd) 4136 hw->mac.ops.enable_mdd(hw); 4137 } 4138 4139 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 4140 4141 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, 4142 struct ixgbe_ring *rx_ring) 4143 { 4144 struct ixgbe_hw *hw = &adapter->hw; 4145 u32 srrctl; 4146 u8 reg_idx = rx_ring->reg_idx; 4147 4148 if (hw->mac.type == ixgbe_mac_82598EB) { 4149 u16 mask = adapter->ring_feature[RING_F_RSS].mask; 4150 4151 /* 4152 * if VMDq is not active we must program one srrctl register 4153 * per RSS queue since we have enabled RDRXCTL.MVMEN 4154 */ 4155 reg_idx &= mask; 4156 } 4157 4158 /* configure header buffer length, needed for RSC */ 4159 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 4160 4161 /* configure the packet buffer length */ 4162 if (rx_ring->xsk_pool) { 4163 u32 xsk_buf_len = xsk_pool_get_rx_frame_size(rx_ring->xsk_pool); 4164 4165 /* If the MAC support setting RXDCTL.RLPML, the 4166 * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and 4167 * RXDCTL.RLPML is set to the actual UMEM buffer 4168 * size. If not, then we are stuck with a 1k buffer 4169 * size resolution. In this case frames larger than 4170 * the UMEM buffer size viewed in a 1k resolution will 4171 * be dropped. 4172 */ 4173 if (hw->mac.type != ixgbe_mac_82599EB) 4174 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4175 else 4176 srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4177 } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) { 4178 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4179 } else { 4180 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4181 } 4182 4183 /* configure descriptor type */ 4184 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 4185 4186 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl); 4187 } 4188 4189 /** 4190 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries 4191 * @adapter: device handle 4192 * 4193 * - 82598/82599/X540: 128 4194 * - X550(non-SRIOV mode): 512 4195 * - X550(SRIOV mode): 64 4196 */ 4197 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter) 4198 { 4199 if (adapter->hw.mac.type < ixgbe_mac_X550) 4200 return 128; 4201 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 4202 return 64; 4203 else 4204 return 512; 4205 } 4206 4207 /** 4208 * ixgbe_store_key - Write the RSS key to HW 4209 * @adapter: device handle 4210 * 4211 * Write the RSS key stored in adapter.rss_key to HW. 4212 */ 4213 void ixgbe_store_key(struct ixgbe_adapter *adapter) 4214 { 4215 struct ixgbe_hw *hw = &adapter->hw; 4216 int i; 4217 4218 for (i = 0; i < 10; i++) 4219 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]); 4220 } 4221 4222 /** 4223 * ixgbe_init_rss_key - Initialize adapter RSS key 4224 * @adapter: device handle 4225 * 4226 * Allocates and initializes the RSS key if it is not allocated. 4227 **/ 4228 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter) 4229 { 4230 u32 *rss_key; 4231 4232 if (!adapter->rss_key) { 4233 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL); 4234 if (unlikely(!rss_key)) 4235 return -ENOMEM; 4236 4237 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE); 4238 adapter->rss_key = rss_key; 4239 } 4240 4241 return 0; 4242 } 4243 4244 /** 4245 * ixgbe_store_reta - Write the RETA table to HW 4246 * @adapter: device handle 4247 * 4248 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW. 4249 */ 4250 void ixgbe_store_reta(struct ixgbe_adapter *adapter) 4251 { 4252 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 4253 struct ixgbe_hw *hw = &adapter->hw; 4254 u32 reta = 0; 4255 u32 indices_multi; 4256 u8 *indir_tbl = adapter->rss_indir_tbl; 4257 4258 /* Fill out the redirection table as follows: 4259 * - 82598: 8 bit wide entries containing pair of 4 bit RSS 4260 * indices. 4261 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index 4262 * - X550: 8 bit wide entries containing 6 bit RSS index 4263 */ 4264 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 4265 indices_multi = 0x11; 4266 else 4267 indices_multi = 0x1; 4268 4269 /* Write redirection table to HW */ 4270 for (i = 0; i < reta_entries; i++) { 4271 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8; 4272 if ((i & 3) == 3) { 4273 if (i < 128) 4274 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 4275 else 4276 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), 4277 reta); 4278 reta = 0; 4279 } 4280 } 4281 } 4282 4283 /** 4284 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode) 4285 * @adapter: device handle 4286 * 4287 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW. 4288 */ 4289 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter) 4290 { 4291 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 4292 struct ixgbe_hw *hw = &adapter->hw; 4293 u32 vfreta = 0; 4294 4295 /* Write redirection table to HW */ 4296 for (i = 0; i < reta_entries; i++) { 4297 u16 pool = adapter->num_rx_pools; 4298 4299 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8; 4300 if ((i & 3) != 3) 4301 continue; 4302 4303 while (pool--) 4304 IXGBE_WRITE_REG(hw, 4305 IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)), 4306 vfreta); 4307 vfreta = 0; 4308 } 4309 } 4310 4311 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter) 4312 { 4313 u32 i, j; 4314 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 4315 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices; 4316 4317 /* Program table for at least 4 queues w/ SR-IOV so that VFs can 4318 * make full use of any rings they may have. We will use the 4319 * PSRTYPE register to control how many rings we use within the PF. 4320 */ 4321 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4)) 4322 rss_i = 4; 4323 4324 /* Fill out hash function seeds */ 4325 ixgbe_store_key(adapter); 4326 4327 /* Fill out redirection table */ 4328 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl)); 4329 4330 for (i = 0, j = 0; i < reta_entries; i++, j++) { 4331 if (j == rss_i) 4332 j = 0; 4333 4334 adapter->rss_indir_tbl[i] = j; 4335 } 4336 4337 ixgbe_store_reta(adapter); 4338 } 4339 4340 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter) 4341 { 4342 struct ixgbe_hw *hw = &adapter->hw; 4343 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices; 4344 int i, j; 4345 4346 /* Fill out hash function seeds */ 4347 for (i = 0; i < 10; i++) { 4348 u16 pool = adapter->num_rx_pools; 4349 4350 while (pool--) 4351 IXGBE_WRITE_REG(hw, 4352 IXGBE_PFVFRSSRK(i, VMDQ_P(pool)), 4353 *(adapter->rss_key + i)); 4354 } 4355 4356 /* Fill out the redirection table */ 4357 for (i = 0, j = 0; i < 64; i++, j++) { 4358 if (j == rss_i) 4359 j = 0; 4360 4361 adapter->rss_indir_tbl[i] = j; 4362 } 4363 4364 ixgbe_store_vfreta(adapter); 4365 } 4366 4367 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter) 4368 { 4369 struct ixgbe_hw *hw = &adapter->hw; 4370 u32 mrqc = 0, rss_field = 0, vfmrqc = 0; 4371 u32 rxcsum; 4372 4373 /* Disable indicating checksum in descriptor, enables RSS hash */ 4374 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 4375 rxcsum |= IXGBE_RXCSUM_PCSD; 4376 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 4377 4378 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 4379 if (adapter->ring_feature[RING_F_RSS].mask) 4380 mrqc = IXGBE_MRQC_RSSEN; 4381 } else { 4382 u8 tcs = adapter->hw_tcs; 4383 4384 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 4385 if (tcs > 4) 4386 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */ 4387 else if (tcs > 1) 4388 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */ 4389 else if (adapter->ring_feature[RING_F_VMDQ].mask == 4390 IXGBE_82599_VMDQ_4Q_MASK) 4391 mrqc = IXGBE_MRQC_VMDQRSS32EN; 4392 else 4393 mrqc = IXGBE_MRQC_VMDQRSS64EN; 4394 4395 /* Enable L3/L4 for Tx Switched packets only for X550, 4396 * older devices do not support this feature 4397 */ 4398 if (hw->mac.type >= ixgbe_mac_X550) 4399 mrqc |= IXGBE_MRQC_L3L4TXSWEN; 4400 } else { 4401 if (tcs > 4) 4402 mrqc = IXGBE_MRQC_RTRSS8TCEN; 4403 else if (tcs > 1) 4404 mrqc = IXGBE_MRQC_RTRSS4TCEN; 4405 else 4406 mrqc = IXGBE_MRQC_RSSEN; 4407 } 4408 } 4409 4410 /* Perform hash on these packet types */ 4411 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 | 4412 IXGBE_MRQC_RSS_FIELD_IPV4_TCP | 4413 IXGBE_MRQC_RSS_FIELD_IPV6 | 4414 IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 4415 4416 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 4417 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 4418 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 4419 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 4420 4421 if ((hw->mac.type >= ixgbe_mac_X550) && 4422 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) { 4423 u16 pool = adapter->num_rx_pools; 4424 4425 /* Enable VF RSS mode */ 4426 mrqc |= IXGBE_MRQC_MULTIPLE_RSS; 4427 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 4428 4429 /* Setup RSS through the VF registers */ 4430 ixgbe_setup_vfreta(adapter); 4431 vfmrqc = IXGBE_MRQC_RSSEN; 4432 vfmrqc |= rss_field; 4433 4434 while (pool--) 4435 IXGBE_WRITE_REG(hw, 4436 IXGBE_PFVFMRQC(VMDQ_P(pool)), 4437 vfmrqc); 4438 } else { 4439 ixgbe_setup_reta(adapter); 4440 mrqc |= rss_field; 4441 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 4442 } 4443 } 4444 4445 /** 4446 * ixgbe_configure_rscctl - enable RSC for the indicated ring 4447 * @adapter: address of board private structure 4448 * @ring: structure containing ring specific data 4449 **/ 4450 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, 4451 struct ixgbe_ring *ring) 4452 { 4453 struct ixgbe_hw *hw = &adapter->hw; 4454 u32 rscctrl; 4455 u8 reg_idx = ring->reg_idx; 4456 4457 if (!ring_is_rsc_enabled(ring)) 4458 return; 4459 4460 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx)); 4461 rscctrl |= IXGBE_RSCCTL_RSCEN; 4462 /* 4463 * we must limit the number of descriptors so that the 4464 * total size of max desc * buf_len is not greater 4465 * than 65536 4466 */ 4467 rscctrl |= IXGBE_RSCCTL_MAXDESC_16; 4468 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl); 4469 } 4470 4471 #define IXGBE_MAX_RX_DESC_POLL 10 4472 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter, 4473 struct ixgbe_ring *ring) 4474 { 4475 struct ixgbe_hw *hw = &adapter->hw; 4476 int wait_loop = IXGBE_MAX_RX_DESC_POLL; 4477 u32 rxdctl; 4478 u8 reg_idx = ring->reg_idx; 4479 4480 if (ixgbe_removed(hw->hw_addr)) 4481 return; 4482 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */ 4483 if (hw->mac.type == ixgbe_mac_82598EB && 4484 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) 4485 return; 4486 4487 do { 4488 usleep_range(1000, 2000); 4489 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 4490 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE)); 4491 4492 if (!wait_loop) { 4493 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within " 4494 "the polling period\n", reg_idx); 4495 } 4496 } 4497 4498 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter, 4499 struct ixgbe_ring *ring) 4500 { 4501 struct ixgbe_hw *hw = &adapter->hw; 4502 union ixgbe_adv_rx_desc *rx_desc; 4503 u64 rdba = ring->dma; 4504 u32 rxdctl; 4505 u8 reg_idx = ring->reg_idx; 4506 4507 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq); 4508 ring->xsk_pool = ixgbe_xsk_pool(adapter, ring); 4509 if (ring->xsk_pool) { 4510 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq, 4511 MEM_TYPE_XSK_BUFF_POOL, 4512 NULL)); 4513 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq); 4514 } else { 4515 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq, 4516 MEM_TYPE_PAGE_SHARED, NULL)); 4517 } 4518 4519 /* disable queue to avoid use of these values while updating state */ 4520 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 4521 rxdctl &= ~IXGBE_RXDCTL_ENABLE; 4522 4523 /* write value back with RXDCTL.ENABLE bit cleared */ 4524 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); 4525 IXGBE_WRITE_FLUSH(hw); 4526 4527 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32))); 4528 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32)); 4529 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx), 4530 ring->count * sizeof(union ixgbe_adv_rx_desc)); 4531 /* Force flushing of IXGBE_RDLEN to prevent MDD */ 4532 IXGBE_WRITE_FLUSH(hw); 4533 4534 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0); 4535 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0); 4536 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx); 4537 4538 ixgbe_configure_srrctl(adapter, ring); 4539 ixgbe_configure_rscctl(adapter, ring); 4540 4541 if (hw->mac.type == ixgbe_mac_82598EB) { 4542 /* 4543 * enable cache line friendly hardware writes: 4544 * PTHRESH=32 descriptors (half the internal cache), 4545 * this also removes ugly rx_no_buffer_count increment 4546 * HTHRESH=4 descriptors (to minimize latency on fetch) 4547 * WTHRESH=8 burst writeback up to two cache lines 4548 */ 4549 rxdctl &= ~0x3FFFFF; 4550 rxdctl |= 0x080420; 4551 #if (PAGE_SIZE < 8192) 4552 /* RXDCTL.RLPML does not work on 82599 */ 4553 } else if (hw->mac.type != ixgbe_mac_82599EB) { 4554 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK | 4555 IXGBE_RXDCTL_RLPML_EN); 4556 4557 /* Limit the maximum frame size so we don't overrun the skb. 4558 * This can happen in SRIOV mode when the MTU of the VF is 4559 * higher than the MTU of the PF. 4560 */ 4561 if (ring_uses_build_skb(ring) && 4562 !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state)) 4563 rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB | 4564 IXGBE_RXDCTL_RLPML_EN; 4565 #endif 4566 } 4567 4568 ring->rx_offset = ixgbe_rx_offset(ring); 4569 4570 if (ring->xsk_pool && hw->mac.type != ixgbe_mac_82599EB) { 4571 u32 xsk_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool); 4572 4573 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK | 4574 IXGBE_RXDCTL_RLPML_EN); 4575 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN; 4576 4577 ring->rx_buf_len = xsk_buf_len; 4578 } 4579 4580 /* initialize rx_buffer_info */ 4581 memset(ring->rx_buffer_info, 0, 4582 sizeof(struct ixgbe_rx_buffer) * ring->count); 4583 4584 /* initialize Rx descriptor 0 */ 4585 rx_desc = IXGBE_RX_DESC(ring, 0); 4586 rx_desc->wb.upper.length = 0; 4587 4588 /* enable receive descriptor ring */ 4589 rxdctl |= IXGBE_RXDCTL_ENABLE; 4590 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); 4591 4592 ixgbe_rx_desc_queue_enable(adapter, ring); 4593 if (ring->xsk_pool) 4594 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring)); 4595 else 4596 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring)); 4597 } 4598 4599 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter) 4600 { 4601 struct ixgbe_hw *hw = &adapter->hw; 4602 int rss_i = adapter->ring_feature[RING_F_RSS].indices; 4603 u16 pool = adapter->num_rx_pools; 4604 4605 /* PSRTYPE must be initialized in non 82598 adapters */ 4606 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 4607 IXGBE_PSRTYPE_UDPHDR | 4608 IXGBE_PSRTYPE_IPV4HDR | 4609 IXGBE_PSRTYPE_L2HDR | 4610 IXGBE_PSRTYPE_IPV6HDR; 4611 4612 if (hw->mac.type == ixgbe_mac_82598EB) 4613 return; 4614 4615 if (rss_i > 3) 4616 psrtype |= 2u << 29; 4617 else if (rss_i > 1) 4618 psrtype |= 1u << 29; 4619 4620 while (pool--) 4621 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype); 4622 } 4623 4624 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter) 4625 { 4626 struct ixgbe_hw *hw = &adapter->hw; 4627 u16 pool = adapter->num_rx_pools; 4628 u32 reg_offset, vf_shift, vmolr; 4629 u32 gcr_ext, vmdctl; 4630 int i; 4631 4632 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 4633 return; 4634 4635 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL); 4636 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN; 4637 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK; 4638 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT; 4639 vmdctl |= IXGBE_VT_CTL_REPLEN; 4640 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl); 4641 4642 /* accept untagged packets until a vlan tag is 4643 * specifically set for the VMDQ queue/pool 4644 */ 4645 vmolr = IXGBE_VMOLR_AUPE; 4646 while (pool--) 4647 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr); 4648 4649 vf_shift = VMDQ_P(0) % 32; 4650 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0; 4651 4652 /* Enable only the PF's pool for Tx/Rx */ 4653 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift)); 4654 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1); 4655 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift)); 4656 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1); 4657 if (adapter->bridge_mode == BRIDGE_MODE_VEB) 4658 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); 4659 4660 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */ 4661 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0)); 4662 4663 /* clear VLAN promisc flag so VFTA will be updated if necessary */ 4664 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC; 4665 4666 /* 4667 * Set up VF register offsets for selected VT Mode, 4668 * i.e. 32 or 64 VFs for SR-IOV 4669 */ 4670 switch (adapter->ring_feature[RING_F_VMDQ].mask) { 4671 case IXGBE_82599_VMDQ_8Q_MASK: 4672 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16; 4673 break; 4674 case IXGBE_82599_VMDQ_4Q_MASK: 4675 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32; 4676 break; 4677 default: 4678 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64; 4679 break; 4680 } 4681 4682 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); 4683 4684 for (i = 0; i < adapter->num_vfs; i++) { 4685 /* configure spoof checking */ 4686 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, 4687 adapter->vfinfo[i].spoofchk_enabled); 4688 4689 /* Enable/Disable RSS query feature */ 4690 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i, 4691 adapter->vfinfo[i].rss_query_enabled); 4692 } 4693 } 4694 4695 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter) 4696 { 4697 struct ixgbe_hw *hw = &adapter->hw; 4698 struct net_device *netdev = adapter->netdev; 4699 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 4700 struct ixgbe_ring *rx_ring; 4701 int i; 4702 u32 mhadd, hlreg0; 4703 4704 #ifdef IXGBE_FCOE 4705 /* adjust max frame to be able to do baby jumbo for FCoE */ 4706 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) && 4707 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE)) 4708 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE; 4709 4710 #endif /* IXGBE_FCOE */ 4711 4712 /* adjust max frame to be at least the size of a standard frame */ 4713 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN)) 4714 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN); 4715 4716 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 4717 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) { 4718 mhadd &= ~IXGBE_MHADD_MFS_MASK; 4719 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT; 4720 4721 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 4722 } 4723 4724 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); 4725 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */ 4726 hlreg0 |= IXGBE_HLREG0_JUMBOEN; 4727 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); 4728 4729 /* 4730 * Setup the HW Rx Head and Tail Descriptor Pointers and 4731 * the Base and Length of the Rx Descriptor Ring 4732 */ 4733 for (i = 0; i < adapter->num_rx_queues; i++) { 4734 rx_ring = adapter->rx_ring[i]; 4735 4736 clear_ring_rsc_enabled(rx_ring); 4737 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4738 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state); 4739 4740 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) 4741 set_ring_rsc_enabled(rx_ring); 4742 4743 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state)) 4744 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4745 4746 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) 4747 continue; 4748 4749 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state); 4750 4751 #if (PAGE_SIZE < 8192) 4752 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) 4753 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4754 4755 if (IXGBE_2K_TOO_SMALL_WITH_PADDING || 4756 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN))) 4757 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4758 #endif 4759 } 4760 } 4761 4762 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter) 4763 { 4764 struct ixgbe_hw *hw = &adapter->hw; 4765 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 4766 4767 switch (hw->mac.type) { 4768 case ixgbe_mac_82598EB: 4769 /* 4770 * For VMDq support of different descriptor types or 4771 * buffer sizes through the use of multiple SRRCTL 4772 * registers, RDRXCTL.MVMEN must be set to 1 4773 * 4774 * also, the manual doesn't mention it clearly but DCA hints 4775 * will only use queue 0's tags unless this bit is set. Side 4776 * effects of setting this bit are only that SRRCTL must be 4777 * fully programmed [0..15] 4778 */ 4779 rdrxctl |= IXGBE_RDRXCTL_MVMEN; 4780 break; 4781 case ixgbe_mac_X550: 4782 case ixgbe_mac_X550EM_x: 4783 case ixgbe_mac_x550em_a: 4784 case ixgbe_mac_e610: 4785 if (adapter->num_vfs) 4786 rdrxctl |= IXGBE_RDRXCTL_PSP; 4787 fallthrough; 4788 case ixgbe_mac_82599EB: 4789 case ixgbe_mac_X540: 4790 /* Disable RSC for ACK packets */ 4791 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU, 4792 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU))); 4793 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE; 4794 /* hardware requires some bits to be set by default */ 4795 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX); 4796 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP; 4797 break; 4798 default: 4799 /* We should do nothing since we don't know this hardware */ 4800 return; 4801 } 4802 4803 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl); 4804 } 4805 4806 /** 4807 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset 4808 * @adapter: board private structure 4809 * 4810 * Configure the Rx unit of the MAC after a reset. 4811 **/ 4812 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) 4813 { 4814 struct ixgbe_hw *hw = &adapter->hw; 4815 int i; 4816 u32 rxctrl, rfctl; 4817 4818 /* disable receives while setting up the descriptors */ 4819 hw->mac.ops.disable_rx(hw); 4820 4821 ixgbe_setup_psrtype(adapter); 4822 ixgbe_setup_rdrxctl(adapter); 4823 4824 /* RSC Setup */ 4825 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL); 4826 rfctl &= ~IXGBE_RFCTL_RSC_DIS; 4827 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) 4828 rfctl |= IXGBE_RFCTL_RSC_DIS; 4829 4830 /* disable NFS filtering */ 4831 rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS); 4832 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl); 4833 4834 /* Program registers for the distribution of queues */ 4835 ixgbe_setup_mrqc(adapter); 4836 4837 /* set_rx_buffer_len must be called before ring initialization */ 4838 ixgbe_set_rx_buffer_len(adapter); 4839 4840 /* 4841 * Setup the HW Rx Head and Tail Descriptor Pointers and 4842 * the Base and Length of the Rx Descriptor Ring 4843 */ 4844 for (i = 0; i < adapter->num_rx_queues; i++) 4845 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]); 4846 4847 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 4848 /* disable drop enable for 82598 parts */ 4849 if (hw->mac.type == ixgbe_mac_82598EB) 4850 rxctrl |= IXGBE_RXCTRL_DMBYPS; 4851 4852 /* enable all receives */ 4853 rxctrl |= IXGBE_RXCTRL_RXEN; 4854 hw->mac.ops.enable_rx_dma(hw, rxctrl); 4855 } 4856 4857 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, 4858 __be16 proto, u16 vid) 4859 { 4860 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 4861 struct ixgbe_hw *hw = &adapter->hw; 4862 4863 /* add VID to filter table */ 4864 if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) 4865 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid); 4866 4867 set_bit(vid, adapter->active_vlans); 4868 4869 return 0; 4870 } 4871 4872 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan) 4873 { 4874 u32 vlvf; 4875 int idx; 4876 4877 /* short cut the special case */ 4878 if (vlan == 0) 4879 return 0; 4880 4881 /* Search for the vlan id in the VLVF entries */ 4882 for (idx = IXGBE_VLVF_ENTRIES; --idx;) { 4883 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx)); 4884 if ((vlvf & VLAN_VID_MASK) == vlan) 4885 break; 4886 } 4887 4888 return idx; 4889 } 4890 4891 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid) 4892 { 4893 struct ixgbe_hw *hw = &adapter->hw; 4894 u32 bits, word; 4895 int idx; 4896 4897 idx = ixgbe_find_vlvf_entry(hw, vid); 4898 if (!idx) 4899 return; 4900 4901 /* See if any other pools are set for this VLAN filter 4902 * entry other than the PF. 4903 */ 4904 word = idx * 2 + (VMDQ_P(0) / 32); 4905 bits = ~BIT(VMDQ_P(0) % 32); 4906 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word)); 4907 4908 /* Disable the filter so this falls into the default pool. */ 4909 if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) { 4910 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) 4911 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0); 4912 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0); 4913 } 4914 } 4915 4916 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, 4917 __be16 proto, u16 vid) 4918 { 4919 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 4920 struct ixgbe_hw *hw = &adapter->hw; 4921 4922 /* remove VID from filter table */ 4923 if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) 4924 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true); 4925 4926 clear_bit(vid, adapter->active_vlans); 4927 4928 return 0; 4929 } 4930 4931 /** 4932 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping 4933 * @adapter: driver data 4934 */ 4935 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter) 4936 { 4937 struct ixgbe_hw *hw = &adapter->hw; 4938 u32 vlnctrl; 4939 int i, j; 4940 4941 switch (hw->mac.type) { 4942 case ixgbe_mac_82598EB: 4943 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 4944 vlnctrl &= ~IXGBE_VLNCTRL_VME; 4945 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 4946 break; 4947 case ixgbe_mac_82599EB: 4948 case ixgbe_mac_X540: 4949 case ixgbe_mac_X550: 4950 case ixgbe_mac_X550EM_x: 4951 case ixgbe_mac_x550em_a: 4952 case ixgbe_mac_e610: 4953 for (i = 0; i < adapter->num_rx_queues; i++) { 4954 struct ixgbe_ring *ring = adapter->rx_ring[i]; 4955 4956 if (!netif_is_ixgbe(ring->netdev)) 4957 continue; 4958 4959 j = ring->reg_idx; 4960 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); 4961 vlnctrl &= ~IXGBE_RXDCTL_VME; 4962 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl); 4963 } 4964 break; 4965 default: 4966 break; 4967 } 4968 } 4969 4970 /** 4971 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping 4972 * @adapter: driver data 4973 */ 4974 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter) 4975 { 4976 struct ixgbe_hw *hw = &adapter->hw; 4977 u32 vlnctrl; 4978 int i, j; 4979 4980 switch (hw->mac.type) { 4981 case ixgbe_mac_82598EB: 4982 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 4983 vlnctrl |= IXGBE_VLNCTRL_VME; 4984 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 4985 break; 4986 case ixgbe_mac_82599EB: 4987 case ixgbe_mac_X540: 4988 case ixgbe_mac_X550: 4989 case ixgbe_mac_X550EM_x: 4990 case ixgbe_mac_x550em_a: 4991 case ixgbe_mac_e610: 4992 for (i = 0; i < adapter->num_rx_queues; i++) { 4993 struct ixgbe_ring *ring = adapter->rx_ring[i]; 4994 4995 if (!netif_is_ixgbe(ring->netdev)) 4996 continue; 4997 4998 j = ring->reg_idx; 4999 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); 5000 vlnctrl |= IXGBE_RXDCTL_VME; 5001 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl); 5002 } 5003 break; 5004 default: 5005 break; 5006 } 5007 } 5008 5009 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter) 5010 { 5011 struct ixgbe_hw *hw = &adapter->hw; 5012 u32 vlnctrl, i; 5013 5014 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 5015 5016 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) { 5017 /* For VMDq and SR-IOV we must leave VLAN filtering enabled */ 5018 vlnctrl |= IXGBE_VLNCTRL_VFE; 5019 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 5020 } else { 5021 vlnctrl &= ~IXGBE_VLNCTRL_VFE; 5022 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 5023 return; 5024 } 5025 5026 /* Nothing to do for 82598 */ 5027 if (hw->mac.type == ixgbe_mac_82598EB) 5028 return; 5029 5030 /* We are already in VLAN promisc, nothing to do */ 5031 if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC) 5032 return; 5033 5034 /* Set flag so we don't redo unnecessary work */ 5035 adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC; 5036 5037 /* Add PF to all active pools */ 5038 for (i = IXGBE_VLVF_ENTRIES; --i;) { 5039 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32); 5040 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset); 5041 5042 vlvfb |= BIT(VMDQ_P(0) % 32); 5043 IXGBE_WRITE_REG(hw, reg_offset, vlvfb); 5044 } 5045 5046 /* Set all bits in the VLAN filter table array */ 5047 for (i = hw->mac.vft_size; i--;) 5048 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U); 5049 } 5050 5051 #define VFTA_BLOCK_SIZE 8 5052 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset) 5053 { 5054 struct ixgbe_hw *hw = &adapter->hw; 5055 u32 vfta[VFTA_BLOCK_SIZE] = { 0 }; 5056 u32 vid_start = vfta_offset * 32; 5057 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32); 5058 u32 i, vid, word, bits; 5059 5060 for (i = IXGBE_VLVF_ENTRIES; --i;) { 5061 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i)); 5062 5063 /* pull VLAN ID from VLVF */ 5064 vid = vlvf & VLAN_VID_MASK; 5065 5066 /* only concern ourselves with a certain range */ 5067 if (vid < vid_start || vid >= vid_end) 5068 continue; 5069 5070 if (vlvf) { 5071 /* record VLAN ID in VFTA */ 5072 vfta[(vid - vid_start) / 32] |= BIT(vid % 32); 5073 5074 /* if PF is part of this then continue */ 5075 if (test_bit(vid, adapter->active_vlans)) 5076 continue; 5077 } 5078 5079 /* remove PF from the pool */ 5080 word = i * 2 + VMDQ_P(0) / 32; 5081 bits = ~BIT(VMDQ_P(0) % 32); 5082 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word)); 5083 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits); 5084 } 5085 5086 /* extract values from active_vlans and write back to VFTA */ 5087 for (i = VFTA_BLOCK_SIZE; i--;) { 5088 vid = (vfta_offset + i) * 32; 5089 word = vid / BITS_PER_LONG; 5090 bits = vid % BITS_PER_LONG; 5091 5092 vfta[i] |= adapter->active_vlans[word] >> bits; 5093 5094 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]); 5095 } 5096 } 5097 5098 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter) 5099 { 5100 struct ixgbe_hw *hw = &adapter->hw; 5101 u32 vlnctrl, i; 5102 5103 /* Set VLAN filtering to enabled */ 5104 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 5105 vlnctrl |= IXGBE_VLNCTRL_VFE; 5106 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 5107 5108 if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) || 5109 hw->mac.type == ixgbe_mac_82598EB) 5110 return; 5111 5112 /* We are not in VLAN promisc, nothing to do */ 5113 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) 5114 return; 5115 5116 /* Set flag so we don't redo unnecessary work */ 5117 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC; 5118 5119 for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE) 5120 ixgbe_scrub_vfta(adapter, i); 5121 } 5122 5123 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter) 5124 { 5125 u16 vid = 1; 5126 5127 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0); 5128 5129 for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID) 5130 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid); 5131 } 5132 5133 /** 5134 * ixgbe_write_mc_addr_list - write multicast addresses to MTA 5135 * @netdev: network interface device structure 5136 * 5137 * Writes multicast address list to the MTA hash table. 5138 * Returns: -ENOMEM on failure 5139 * 0 on no addresses written 5140 * X on writing X addresses to MTA 5141 **/ 5142 static int ixgbe_write_mc_addr_list(struct net_device *netdev) 5143 { 5144 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 5145 struct ixgbe_hw *hw = &adapter->hw; 5146 5147 if (!netif_running(netdev)) 5148 return 0; 5149 5150 if (hw->mac.ops.update_mc_addr_list) 5151 hw->mac.ops.update_mc_addr_list(hw, netdev); 5152 else 5153 return -ENOMEM; 5154 5155 #ifdef CONFIG_PCI_IOV 5156 ixgbe_restore_vf_multicasts(adapter); 5157 #endif 5158 5159 return netdev_mc_count(netdev); 5160 } 5161 5162 #ifdef CONFIG_PCI_IOV 5163 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter) 5164 { 5165 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5166 struct ixgbe_hw *hw = &adapter->hw; 5167 int i; 5168 5169 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5170 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED; 5171 5172 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) 5173 hw->mac.ops.set_rar(hw, i, 5174 mac_table->addr, 5175 mac_table->pool, 5176 IXGBE_RAH_AV); 5177 else 5178 hw->mac.ops.clear_rar(hw, i); 5179 } 5180 } 5181 5182 #endif 5183 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter) 5184 { 5185 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5186 struct ixgbe_hw *hw = &adapter->hw; 5187 int i; 5188 5189 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5190 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED)) 5191 continue; 5192 5193 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED; 5194 5195 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) 5196 hw->mac.ops.set_rar(hw, i, 5197 mac_table->addr, 5198 mac_table->pool, 5199 IXGBE_RAH_AV); 5200 else 5201 hw->mac.ops.clear_rar(hw, i); 5202 } 5203 } 5204 5205 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter) 5206 { 5207 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5208 struct ixgbe_hw *hw = &adapter->hw; 5209 int i; 5210 5211 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5212 mac_table->state |= IXGBE_MAC_STATE_MODIFIED; 5213 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE; 5214 } 5215 5216 ixgbe_sync_mac_table(adapter); 5217 } 5218 5219 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool) 5220 { 5221 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5222 struct ixgbe_hw *hw = &adapter->hw; 5223 int i, count = 0; 5224 5225 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5226 /* do not count default RAR as available */ 5227 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT) 5228 continue; 5229 5230 /* only count unused and addresses that belong to us */ 5231 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) { 5232 if (mac_table->pool != pool) 5233 continue; 5234 } 5235 5236 count++; 5237 } 5238 5239 return count; 5240 } 5241 5242 /* this function destroys the first RAR entry */ 5243 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter) 5244 { 5245 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5246 struct ixgbe_hw *hw = &adapter->hw; 5247 5248 memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN); 5249 mac_table->pool = VMDQ_P(0); 5250 5251 mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE; 5252 5253 hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool, 5254 IXGBE_RAH_AV); 5255 } 5256 5257 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, 5258 const u8 *addr, u16 pool) 5259 { 5260 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5261 struct ixgbe_hw *hw = &adapter->hw; 5262 int i; 5263 5264 if (is_zero_ether_addr(addr)) 5265 return -EINVAL; 5266 5267 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5268 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) 5269 continue; 5270 5271 ether_addr_copy(mac_table->addr, addr); 5272 mac_table->pool = pool; 5273 5274 mac_table->state |= IXGBE_MAC_STATE_MODIFIED | 5275 IXGBE_MAC_STATE_IN_USE; 5276 5277 ixgbe_sync_mac_table(adapter); 5278 5279 return i; 5280 } 5281 5282 return -ENOMEM; 5283 } 5284 5285 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, 5286 const u8 *addr, u16 pool) 5287 { 5288 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; 5289 struct ixgbe_hw *hw = &adapter->hw; 5290 int i; 5291 5292 if (is_zero_ether_addr(addr)) 5293 return -EINVAL; 5294 5295 /* search table for addr, if found clear IN_USE flag and sync */ 5296 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { 5297 /* we can only delete an entry if it is in use */ 5298 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE)) 5299 continue; 5300 /* we only care about entries that belong to the given pool */ 5301 if (mac_table->pool != pool) 5302 continue; 5303 /* we only care about a specific MAC address */ 5304 if (!ether_addr_equal(addr, mac_table->addr)) 5305 continue; 5306 5307 mac_table->state |= IXGBE_MAC_STATE_MODIFIED; 5308 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE; 5309 5310 ixgbe_sync_mac_table(adapter); 5311 5312 return 0; 5313 } 5314 5315 return -ENOMEM; 5316 } 5317 5318 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr) 5319 { 5320 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 5321 int ret; 5322 5323 ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0)); 5324 5325 return min_t(int, ret, 0); 5326 } 5327 5328 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr) 5329 { 5330 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 5331 5332 ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0)); 5333 5334 return 0; 5335 } 5336 5337 /** 5338 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set 5339 * @netdev: network interface device structure 5340 * 5341 * The set_rx_method entry point is called whenever the unicast/multicast 5342 * address list or the network interface flags are updated. This routine is 5343 * responsible for configuring the hardware for proper unicast, multicast and 5344 * promiscuous mode. 5345 **/ 5346 void ixgbe_set_rx_mode(struct net_device *netdev) 5347 { 5348 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 5349 struct ixgbe_hw *hw = &adapter->hw; 5350 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE; 5351 netdev_features_t features = netdev->features; 5352 int count; 5353 5354 /* Check for Promiscuous and All Multicast modes */ 5355 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 5356 5357 /* set all bits that we expect to always be set */ 5358 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */ 5359 fctrl |= IXGBE_FCTRL_BAM; 5360 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */ 5361 fctrl |= IXGBE_FCTRL_PMCF; 5362 5363 /* clear the bits we are changing the status of */ 5364 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 5365 if (netdev->flags & IFF_PROMISC) { 5366 hw->addr_ctrl.user_set_promisc = true; 5367 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 5368 vmolr |= IXGBE_VMOLR_MPE; 5369 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER; 5370 } else { 5371 if (netdev->flags & IFF_ALLMULTI) { 5372 fctrl |= IXGBE_FCTRL_MPE; 5373 vmolr |= IXGBE_VMOLR_MPE; 5374 } 5375 hw->addr_ctrl.user_set_promisc = false; 5376 } 5377 5378 /* 5379 * Write addresses to available RAR registers, if there is not 5380 * sufficient space to store all the addresses then enable 5381 * unicast promiscuous mode 5382 */ 5383 if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) { 5384 fctrl |= IXGBE_FCTRL_UPE; 5385 vmolr |= IXGBE_VMOLR_ROPE; 5386 } 5387 5388 /* Write addresses to the MTA, if the attempt fails 5389 * then we should just turn on promiscuous mode so 5390 * that we can at least receive multicast traffic 5391 */ 5392 count = ixgbe_write_mc_addr_list(netdev); 5393 if (count < 0) { 5394 fctrl |= IXGBE_FCTRL_MPE; 5395 vmolr |= IXGBE_VMOLR_MPE; 5396 } else if (count) { 5397 vmolr |= IXGBE_VMOLR_ROMPE; 5398 } 5399 5400 if (hw->mac.type != ixgbe_mac_82598EB) { 5401 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) & 5402 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE | 5403 IXGBE_VMOLR_ROPE); 5404 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr); 5405 } 5406 5407 /* This is useful for sniffing bad packets. */ 5408 if (features & NETIF_F_RXALL) { 5409 /* UPE and MPE will be handled by normal PROMISC logic 5410 * in e1000e_set_rx_mode */ 5411 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */ 5412 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */ 5413 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */ 5414 5415 fctrl &= ~(IXGBE_FCTRL_DPF); 5416 /* NOTE: VLAN filtering is disabled by setting PROMISC */ 5417 } 5418 5419 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 5420 5421 if (features & NETIF_F_HW_VLAN_CTAG_RX) 5422 ixgbe_vlan_strip_enable(adapter); 5423 else 5424 ixgbe_vlan_strip_disable(adapter); 5425 5426 if (features & NETIF_F_HW_VLAN_CTAG_FILTER) 5427 ixgbe_vlan_promisc_disable(adapter); 5428 else 5429 ixgbe_vlan_promisc_enable(adapter); 5430 } 5431 5432 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter) 5433 { 5434 int q_idx; 5435 5436 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) 5437 napi_enable(&adapter->q_vector[q_idx]->napi); 5438 } 5439 5440 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter) 5441 { 5442 int q_idx; 5443 5444 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) 5445 napi_disable(&adapter->q_vector[q_idx]->napi); 5446 } 5447 5448 static int ixgbe_udp_tunnel_sync(struct net_device *dev, unsigned int table) 5449 { 5450 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 5451 struct ixgbe_hw *hw = &adapter->hw; 5452 struct udp_tunnel_info ti; 5453 5454 udp_tunnel_nic_get_port(dev, table, 0, &ti); 5455 if (ti.type == UDP_TUNNEL_TYPE_VXLAN) 5456 adapter->vxlan_port = ti.port; 5457 else 5458 adapter->geneve_port = ti.port; 5459 5460 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, 5461 ntohs(adapter->vxlan_port) | 5462 ntohs(adapter->geneve_port) << 5463 IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT); 5464 return 0; 5465 } 5466 5467 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550 = { 5468 .sync_table = ixgbe_udp_tunnel_sync, 5469 .flags = UDP_TUNNEL_NIC_INFO_IPV4_ONLY, 5470 .tables = { 5471 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 5472 }, 5473 }; 5474 5475 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550em_a = { 5476 .sync_table = ixgbe_udp_tunnel_sync, 5477 .flags = UDP_TUNNEL_NIC_INFO_IPV4_ONLY, 5478 .tables = { 5479 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 5480 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, }, 5481 }, 5482 }; 5483 5484 #ifdef CONFIG_IXGBE_DCB 5485 /** 5486 * ixgbe_configure_dcb - Configure DCB hardware 5487 * @adapter: ixgbe adapter struct 5488 * 5489 * This is called by the driver on open to configure the DCB hardware. 5490 * This is also called by the gennetlink interface when reconfiguring 5491 * the DCB state. 5492 */ 5493 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter) 5494 { 5495 struct ixgbe_hw *hw = &adapter->hw; 5496 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 5497 5498 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) { 5499 if (hw->mac.type == ixgbe_mac_82598EB) 5500 netif_set_tso_max_size(adapter->netdev, 65536); 5501 return; 5502 } 5503 5504 if (hw->mac.type == ixgbe_mac_82598EB) 5505 netif_set_tso_max_size(adapter->netdev, 32768); 5506 5507 #ifdef IXGBE_FCOE 5508 if (adapter->netdev->fcoe_mtu) 5509 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE); 5510 #endif 5511 5512 /* reconfigure the hardware */ 5513 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) { 5514 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame, 5515 DCB_TX_CONFIG); 5516 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame, 5517 DCB_RX_CONFIG); 5518 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg); 5519 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) { 5520 ixgbe_dcb_hw_ets(&adapter->hw, 5521 adapter->ixgbe_ieee_ets, 5522 max_frame); 5523 ixgbe_dcb_hw_pfc_config(&adapter->hw, 5524 adapter->ixgbe_ieee_pfc->pfc_en, 5525 adapter->ixgbe_ieee_ets->prio_tc); 5526 } 5527 5528 /* Enable RSS Hash per TC */ 5529 if (hw->mac.type != ixgbe_mac_82598EB) { 5530 u32 msb = 0; 5531 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1; 5532 5533 while (rss_i) { 5534 msb++; 5535 rss_i >>= 1; 5536 } 5537 5538 /* write msb to all 8 TCs in one write */ 5539 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111); 5540 } 5541 } 5542 #endif 5543 5544 /* Additional bittime to account for IXGBE framing */ 5545 #define IXGBE_ETH_FRAMING 20 5546 5547 /** 5548 * ixgbe_hpbthresh - calculate high water mark for flow control 5549 * 5550 * @adapter: board private structure to calculate for 5551 * @pb: packet buffer to calculate 5552 */ 5553 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb) 5554 { 5555 struct ixgbe_hw *hw = &adapter->hw; 5556 struct net_device *dev = adapter->netdev; 5557 int link, tc, kb, marker; 5558 u32 dv_id, rx_pba; 5559 5560 /* Calculate max LAN frame size */ 5561 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING; 5562 5563 #ifdef IXGBE_FCOE 5564 /* FCoE traffic class uses FCOE jumbo frames */ 5565 if (dev->fcoe_mtu && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE && 5566 (pb == ixgbe_fcoe_get_tc(adapter))) 5567 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE; 5568 #endif 5569 5570 /* Calculate delay value for device */ 5571 switch (hw->mac.type) { 5572 case ixgbe_mac_X540: 5573 case ixgbe_mac_X550: 5574 case ixgbe_mac_X550EM_x: 5575 case ixgbe_mac_x550em_a: 5576 case ixgbe_mac_e610: 5577 dv_id = IXGBE_DV_X540(link, tc); 5578 break; 5579 default: 5580 dv_id = IXGBE_DV(link, tc); 5581 break; 5582 } 5583 5584 /* Loopback switch introduces additional latency */ 5585 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 5586 dv_id += IXGBE_B2BT(tc); 5587 5588 /* Delay value is calculated in bit times convert to KB */ 5589 kb = IXGBE_BT2KB(dv_id); 5590 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10; 5591 5592 marker = rx_pba - kb; 5593 5594 /* It is possible that the packet buffer is not large enough 5595 * to provide required headroom. In this case throw an error 5596 * to user and a do the best we can. 5597 */ 5598 if (marker < 0) { 5599 e_warn(drv, "Packet Buffer(%i) can not provide enough" 5600 "headroom to support flow control." 5601 "Decrease MTU or number of traffic classes\n", pb); 5602 marker = tc + 1; 5603 } 5604 5605 return marker; 5606 } 5607 5608 /** 5609 * ixgbe_lpbthresh - calculate low water mark for flow control 5610 * 5611 * @adapter: board private structure to calculate for 5612 * @pb: packet buffer to calculate 5613 */ 5614 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb) 5615 { 5616 struct ixgbe_hw *hw = &adapter->hw; 5617 struct net_device *dev = adapter->netdev; 5618 int tc; 5619 u32 dv_id; 5620 5621 /* Calculate max LAN frame size */ 5622 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN; 5623 5624 #ifdef IXGBE_FCOE 5625 /* FCoE traffic class uses FCOE jumbo frames */ 5626 if (dev->fcoe_mtu && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE && 5627 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up))) 5628 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE; 5629 #endif 5630 5631 /* Calculate delay value for device */ 5632 switch (hw->mac.type) { 5633 case ixgbe_mac_X540: 5634 case ixgbe_mac_X550: 5635 case ixgbe_mac_X550EM_x: 5636 case ixgbe_mac_x550em_a: 5637 case ixgbe_mac_e610: 5638 dv_id = IXGBE_LOW_DV_X540(tc); 5639 break; 5640 default: 5641 dv_id = IXGBE_LOW_DV(tc); 5642 break; 5643 } 5644 5645 /* Delay value is calculated in bit times convert to KB */ 5646 return IXGBE_BT2KB(dv_id); 5647 } 5648 5649 /* 5650 * ixgbe_pbthresh_setup - calculate and setup high low water marks 5651 */ 5652 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter) 5653 { 5654 struct ixgbe_hw *hw = &adapter->hw; 5655 int num_tc = adapter->hw_tcs; 5656 int i; 5657 5658 if (!num_tc) 5659 num_tc = 1; 5660 5661 for (i = 0; i < num_tc; i++) { 5662 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i); 5663 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i); 5664 5665 /* Low water marks must not be larger than high water marks */ 5666 if (hw->fc.low_water[i] > hw->fc.high_water[i]) 5667 hw->fc.low_water[i] = 0; 5668 } 5669 5670 for (; i < MAX_TRAFFIC_CLASS; i++) 5671 hw->fc.high_water[i] = 0; 5672 } 5673 5674 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter) 5675 { 5676 struct ixgbe_hw *hw = &adapter->hw; 5677 int hdrm; 5678 u8 tc = adapter->hw_tcs; 5679 5680 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE || 5681 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) 5682 hdrm = 32 << adapter->fdir_pballoc; 5683 else 5684 hdrm = 0; 5685 5686 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL); 5687 ixgbe_pbthresh_setup(adapter); 5688 } 5689 5690 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter) 5691 { 5692 struct ixgbe_hw *hw = &adapter->hw; 5693 struct hlist_node *node2; 5694 struct ixgbe_fdir_filter *filter; 5695 u8 queue; 5696 5697 spin_lock(&adapter->fdir_perfect_lock); 5698 5699 if (!hlist_empty(&adapter->fdir_filter_list)) 5700 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask); 5701 5702 hlist_for_each_entry_safe(filter, node2, 5703 &adapter->fdir_filter_list, fdir_node) { 5704 if (filter->action == IXGBE_FDIR_DROP_QUEUE) { 5705 queue = IXGBE_FDIR_DROP_QUEUE; 5706 } else { 5707 u32 ring = ethtool_get_flow_spec_ring(filter->action); 5708 u8 vf = ethtool_get_flow_spec_ring_vf(filter->action); 5709 5710 if (!vf && (ring >= adapter->num_rx_queues)) { 5711 e_err(drv, "FDIR restore failed without VF, ring: %u\n", 5712 ring); 5713 continue; 5714 } else if (vf && 5715 ((vf > adapter->num_vfs) || 5716 ring >= adapter->num_rx_queues_per_pool)) { 5717 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n", 5718 vf, ring); 5719 continue; 5720 } 5721 5722 /* Map the ring onto the absolute queue index */ 5723 if (!vf) 5724 queue = adapter->rx_ring[ring]->reg_idx; 5725 else 5726 queue = ((vf - 1) * 5727 adapter->num_rx_queues_per_pool) + ring; 5728 } 5729 5730 ixgbe_fdir_write_perfect_filter_82599(hw, 5731 &filter->filter, filter->sw_idx, queue); 5732 } 5733 5734 spin_unlock(&adapter->fdir_perfect_lock); 5735 } 5736 5737 /** 5738 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue 5739 * @rx_ring: ring to free buffers from 5740 **/ 5741 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring) 5742 { 5743 u16 i = rx_ring->next_to_clean; 5744 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i]; 5745 5746 if (rx_ring->xsk_pool) { 5747 ixgbe_xsk_clean_rx_ring(rx_ring); 5748 goto skip_free; 5749 } 5750 5751 /* Free all the Rx ring sk_buffs */ 5752 while (i != rx_ring->next_to_alloc) { 5753 if (rx_buffer->skb) { 5754 struct sk_buff *skb = rx_buffer->skb; 5755 if (IXGBE_CB(skb)->page_released) 5756 dma_unmap_page_attrs(rx_ring->dev, 5757 IXGBE_CB(skb)->dma, 5758 ixgbe_rx_pg_size(rx_ring), 5759 DMA_FROM_DEVICE, 5760 IXGBE_RX_DMA_ATTR); 5761 dev_kfree_skb(skb); 5762 } 5763 5764 /* Invalidate cache lines that may have been written to by 5765 * device so that we avoid corrupting memory. 5766 */ 5767 dma_sync_single_range_for_cpu(rx_ring->dev, 5768 rx_buffer->dma, 5769 rx_buffer->page_offset, 5770 ixgbe_rx_bufsz(rx_ring), 5771 DMA_FROM_DEVICE); 5772 5773 /* free resources associated with mapping */ 5774 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma, 5775 ixgbe_rx_pg_size(rx_ring), 5776 DMA_FROM_DEVICE, 5777 IXGBE_RX_DMA_ATTR); 5778 __page_frag_cache_drain(rx_buffer->page, 5779 rx_buffer->pagecnt_bias); 5780 5781 i++; 5782 rx_buffer++; 5783 if (i == rx_ring->count) { 5784 i = 0; 5785 rx_buffer = rx_ring->rx_buffer_info; 5786 } 5787 } 5788 5789 skip_free: 5790 rx_ring->next_to_alloc = 0; 5791 rx_ring->next_to_clean = 0; 5792 rx_ring->next_to_use = 0; 5793 } 5794 5795 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter, 5796 struct ixgbe_fwd_adapter *accel) 5797 { 5798 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices; 5799 int num_tc = netdev_get_num_tc(adapter->netdev); 5800 struct net_device *vdev = accel->netdev; 5801 int i, baseq, err; 5802 5803 baseq = accel->pool * adapter->num_rx_queues_per_pool; 5804 netdev_dbg(vdev, "pool %i:%i queues %i:%i\n", 5805 accel->pool, adapter->num_rx_pools, 5806 baseq, baseq + adapter->num_rx_queues_per_pool); 5807 5808 accel->rx_base_queue = baseq; 5809 accel->tx_base_queue = baseq; 5810 5811 /* record configuration for macvlan interface in vdev */ 5812 for (i = 0; i < num_tc; i++) 5813 netdev_bind_sb_channel_queue(adapter->netdev, vdev, 5814 i, rss_i, baseq + (rss_i * i)); 5815 5816 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) 5817 adapter->rx_ring[baseq + i]->netdev = vdev; 5818 5819 /* Guarantee all rings are updated before we update the 5820 * MAC address filter. 5821 */ 5822 wmb(); 5823 5824 /* ixgbe_add_mac_filter will return an index if it succeeds, so we 5825 * need to only treat it as an error value if it is negative. 5826 */ 5827 err = ixgbe_add_mac_filter(adapter, vdev->dev_addr, 5828 VMDQ_P(accel->pool)); 5829 if (err >= 0) 5830 return 0; 5831 5832 /* if we cannot add the MAC rule then disable the offload */ 5833 macvlan_release_l2fw_offload(vdev); 5834 5835 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) 5836 adapter->rx_ring[baseq + i]->netdev = NULL; 5837 5838 netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n"); 5839 5840 /* unbind the queues and drop the subordinate channel config */ 5841 netdev_unbind_sb_channel(adapter->netdev, vdev); 5842 netdev_set_sb_channel(vdev, 0); 5843 5844 clear_bit(accel->pool, adapter->fwd_bitmask); 5845 kfree(accel); 5846 5847 return err; 5848 } 5849 5850 static int ixgbe_macvlan_up(struct net_device *vdev, 5851 struct netdev_nested_priv *priv) 5852 { 5853 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)priv->data; 5854 struct ixgbe_fwd_adapter *accel; 5855 5856 if (!netif_is_macvlan(vdev)) 5857 return 0; 5858 5859 accel = macvlan_accel_priv(vdev); 5860 if (!accel) 5861 return 0; 5862 5863 ixgbe_fwd_ring_up(adapter, accel); 5864 5865 return 0; 5866 } 5867 5868 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter) 5869 { 5870 struct netdev_nested_priv priv = { 5871 .data = (void *)adapter, 5872 }; 5873 5874 netdev_walk_all_upper_dev_rcu(adapter->netdev, 5875 ixgbe_macvlan_up, &priv); 5876 } 5877 5878 static void ixgbe_configure(struct ixgbe_adapter *adapter) 5879 { 5880 struct ixgbe_hw *hw = &adapter->hw; 5881 5882 ixgbe_configure_pb(adapter); 5883 #ifdef CONFIG_IXGBE_DCB 5884 ixgbe_configure_dcb(adapter); 5885 #endif 5886 /* 5887 * We must restore virtualization before VLANs or else 5888 * the VLVF registers will not be populated 5889 */ 5890 ixgbe_configure_virtualization(adapter); 5891 5892 ixgbe_set_rx_mode(adapter->netdev); 5893 ixgbe_restore_vlan(adapter); 5894 ixgbe_ipsec_restore(adapter); 5895 5896 switch (hw->mac.type) { 5897 case ixgbe_mac_82599EB: 5898 case ixgbe_mac_X540: 5899 hw->mac.ops.disable_rx_buff(hw); 5900 break; 5901 default: 5902 break; 5903 } 5904 5905 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) { 5906 ixgbe_init_fdir_signature_82599(&adapter->hw, 5907 adapter->fdir_pballoc); 5908 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) { 5909 ixgbe_init_fdir_perfect_82599(&adapter->hw, 5910 adapter->fdir_pballoc); 5911 ixgbe_fdir_filter_restore(adapter); 5912 } 5913 5914 switch (hw->mac.type) { 5915 case ixgbe_mac_82599EB: 5916 case ixgbe_mac_X540: 5917 hw->mac.ops.enable_rx_buff(hw); 5918 break; 5919 default: 5920 break; 5921 } 5922 5923 #ifdef CONFIG_IXGBE_DCA 5924 /* configure DCA */ 5925 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE) 5926 ixgbe_setup_dca(adapter); 5927 #endif /* CONFIG_IXGBE_DCA */ 5928 5929 #ifdef IXGBE_FCOE 5930 /* configure FCoE L2 filters, redirection table, and Rx control */ 5931 ixgbe_configure_fcoe(adapter); 5932 5933 #endif /* IXGBE_FCOE */ 5934 ixgbe_configure_tx(adapter); 5935 ixgbe_configure_rx(adapter); 5936 ixgbe_configure_dfwd(adapter); 5937 } 5938 5939 /** 5940 * ixgbe_enable_link_status_events - enable link status events 5941 * @adapter: pointer to the adapter structure 5942 * @mask: event mask to be set 5943 * 5944 * Enables link status events by invoking ixgbe_configure_lse() 5945 * 5946 * Return: the exit code of the operation. 5947 */ 5948 static int ixgbe_enable_link_status_events(struct ixgbe_adapter *adapter, 5949 u16 mask) 5950 { 5951 int err; 5952 5953 err = ixgbe_configure_lse(&adapter->hw, true, mask); 5954 if (err) 5955 return err; 5956 5957 adapter->lse_mask = mask; 5958 return 0; 5959 } 5960 5961 /** 5962 * ixgbe_disable_link_status_events - disable link status events 5963 * @adapter: pointer to the adapter structure 5964 * 5965 * Disables link status events by invoking ixgbe_configure_lse() 5966 * 5967 * Return: the exit code of the operation. 5968 */ 5969 static int ixgbe_disable_link_status_events(struct ixgbe_adapter *adapter) 5970 { 5971 int err; 5972 5973 err = ixgbe_configure_lse(&adapter->hw, false, adapter->lse_mask); 5974 if (err) 5975 return err; 5976 5977 adapter->lse_mask = 0; 5978 return 0; 5979 } 5980 5981 /** 5982 * ixgbe_sfp_link_config - set up SFP+ link 5983 * @adapter: pointer to private adapter struct 5984 **/ 5985 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter) 5986 { 5987 /* 5988 * We are assuming the worst case scenario here, and that 5989 * is that an SFP was inserted/removed after the reset 5990 * but before SFP detection was enabled. As such the best 5991 * solution is to just start searching as soon as we start 5992 */ 5993 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 5994 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP; 5995 5996 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET; 5997 adapter->sfp_poll_time = 0; 5998 } 5999 6000 /** 6001 * ixgbe_non_sfp_link_config - set up non-SFP+ link 6002 * @hw: pointer to private hardware struct 6003 * 6004 * Configure non-SFP link. 6005 * 6006 * Return: 0 on success, negative on failure 6007 **/ 6008 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw) 6009 { 6010 struct ixgbe_adapter *adapter = container_of(hw, struct ixgbe_adapter, 6011 hw); 6012 u16 mask = ~((u16)(IXGBE_ACI_LINK_EVENT_UPDOWN | 6013 IXGBE_ACI_LINK_EVENT_MEDIA_NA | 6014 IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL | 6015 IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL)); 6016 bool autoneg, link_up = false; 6017 int ret = -EIO; 6018 u32 speed; 6019 6020 if (hw->mac.ops.check_link) 6021 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false); 6022 6023 if (ret) 6024 return ret; 6025 6026 speed = hw->phy.autoneg_advertised; 6027 if (!speed && hw->mac.ops.get_link_capabilities) { 6028 ret = hw->mac.ops.get_link_capabilities(hw, &speed, 6029 &autoneg); 6030 /* remove NBASE-T speeds from default autonegotiation 6031 * to accommodate broken network switches in the field 6032 * which cannot cope with advertised NBASE-T speeds 6033 */ 6034 speed &= ~(IXGBE_LINK_SPEED_5GB_FULL | 6035 IXGBE_LINK_SPEED_2_5GB_FULL); 6036 } 6037 6038 if (ret) 6039 return ret; 6040 6041 if (hw->mac.ops.setup_link) { 6042 if (adapter->hw.mac.type == ixgbe_mac_e610) { 6043 ret = ixgbe_enable_link_status_events(adapter, mask); 6044 if (ret) 6045 return ret; 6046 } 6047 ret = hw->mac.ops.setup_link(hw, speed, link_up); 6048 } 6049 6050 return ret; 6051 } 6052 6053 /** 6054 * ixgbe_check_media_subtask - check for media 6055 * @adapter: pointer to adapter structure 6056 * 6057 * If media is available then initialize PHY user configuration. Configure the 6058 * PHY if the interface is up. 6059 */ 6060 static void ixgbe_check_media_subtask(struct ixgbe_adapter *adapter) 6061 { 6062 struct ixgbe_hw *hw = &adapter->hw; 6063 6064 /* No need to check for media if it's already present */ 6065 if (!(adapter->flags2 & IXGBE_FLAG2_NO_MEDIA)) 6066 return; 6067 6068 /* Refresh link info and check if media is present */ 6069 if (ixgbe_update_link_info(hw)) 6070 return; 6071 6072 ixgbe_check_link_cfg_err(adapter, hw->link.link_info.link_cfg_err); 6073 6074 if (hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE) { 6075 /* PHY settings are reset on media insertion, reconfigure 6076 * PHY to preserve settings. 6077 */ 6078 if (!(ixgbe_non_sfp_link_config(&adapter->hw))) 6079 adapter->flags2 &= ~IXGBE_FLAG2_NO_MEDIA; 6080 6081 /* A Link Status Event will be generated; the event handler 6082 * will complete bringing the interface up 6083 */ 6084 } 6085 } 6086 6087 /** 6088 * ixgbe_clear_vf_stats_counters - Clear out VF stats after reset 6089 * @adapter: board private structure 6090 * 6091 * On a reset we need to clear out the VF stats or accounting gets 6092 * messed up because they're not clear on read. 6093 **/ 6094 static void ixgbe_clear_vf_stats_counters(struct ixgbe_adapter *adapter) 6095 { 6096 struct ixgbe_hw *hw = &adapter->hw; 6097 int i; 6098 6099 for (i = 0; i < adapter->num_vfs; i++) { 6100 adapter->vfinfo[i].last_vfstats.gprc = 6101 IXGBE_READ_REG(hw, IXGBE_PVFGPRC(i)); 6102 adapter->vfinfo[i].saved_rst_vfstats.gprc += 6103 adapter->vfinfo[i].vfstats.gprc; 6104 adapter->vfinfo[i].vfstats.gprc = 0; 6105 adapter->vfinfo[i].last_vfstats.gptc = 6106 IXGBE_READ_REG(hw, IXGBE_PVFGPTC(i)); 6107 adapter->vfinfo[i].saved_rst_vfstats.gptc += 6108 adapter->vfinfo[i].vfstats.gptc; 6109 adapter->vfinfo[i].vfstats.gptc = 0; 6110 adapter->vfinfo[i].last_vfstats.gorc = 6111 IXGBE_READ_REG(hw, IXGBE_PVFGORC_LSB(i)); 6112 adapter->vfinfo[i].saved_rst_vfstats.gorc += 6113 adapter->vfinfo[i].vfstats.gorc; 6114 adapter->vfinfo[i].vfstats.gorc = 0; 6115 adapter->vfinfo[i].last_vfstats.gotc = 6116 IXGBE_READ_REG(hw, IXGBE_PVFGOTC_LSB(i)); 6117 adapter->vfinfo[i].saved_rst_vfstats.gotc += 6118 adapter->vfinfo[i].vfstats.gotc; 6119 adapter->vfinfo[i].vfstats.gotc = 0; 6120 adapter->vfinfo[i].last_vfstats.mprc = 6121 IXGBE_READ_REG(hw, IXGBE_PVFMPRC(i)); 6122 adapter->vfinfo[i].saved_rst_vfstats.mprc += 6123 adapter->vfinfo[i].vfstats.mprc; 6124 adapter->vfinfo[i].vfstats.mprc = 0; 6125 } 6126 } 6127 6128 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter) 6129 { 6130 struct ixgbe_hw *hw = &adapter->hw; 6131 u32 gpie = 0; 6132 6133 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 6134 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT | 6135 IXGBE_GPIE_OCD; 6136 gpie |= IXGBE_GPIE_EIAME; 6137 /* 6138 * use EIAM to auto-mask when MSI-X interrupt is asserted 6139 * this saves a register write for every interrupt 6140 */ 6141 switch (hw->mac.type) { 6142 case ixgbe_mac_82598EB: 6143 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 6144 break; 6145 case ixgbe_mac_82599EB: 6146 case ixgbe_mac_X540: 6147 case ixgbe_mac_X550: 6148 case ixgbe_mac_X550EM_x: 6149 case ixgbe_mac_x550em_a: 6150 case ixgbe_mac_e610: 6151 default: 6152 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 6153 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 6154 break; 6155 } 6156 } else { 6157 /* legacy interrupts, use EIAM to auto-mask when reading EICR, 6158 * specifically only auto mask tx and rx interrupts */ 6159 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 6160 } 6161 6162 /* XXX: to interrupt immediately for EICS writes, enable this */ 6163 /* gpie |= IXGBE_GPIE_EIMEN; */ 6164 6165 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 6166 gpie &= ~IXGBE_GPIE_VTMODE_MASK; 6167 6168 switch (adapter->ring_feature[RING_F_VMDQ].mask) { 6169 case IXGBE_82599_VMDQ_8Q_MASK: 6170 gpie |= IXGBE_GPIE_VTMODE_16; 6171 break; 6172 case IXGBE_82599_VMDQ_4Q_MASK: 6173 gpie |= IXGBE_GPIE_VTMODE_32; 6174 break; 6175 default: 6176 gpie |= IXGBE_GPIE_VTMODE_64; 6177 break; 6178 } 6179 } 6180 6181 /* Enable Thermal over heat sensor interrupt */ 6182 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) { 6183 switch (adapter->hw.mac.type) { 6184 case ixgbe_mac_82599EB: 6185 gpie |= IXGBE_SDP0_GPIEN_8259X; 6186 break; 6187 default: 6188 break; 6189 } 6190 } 6191 6192 /* Enable fan failure interrupt */ 6193 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) 6194 gpie |= IXGBE_SDP1_GPIEN(hw); 6195 6196 switch (hw->mac.type) { 6197 case ixgbe_mac_82599EB: 6198 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X; 6199 break; 6200 case ixgbe_mac_X550EM_x: 6201 case ixgbe_mac_x550em_a: 6202 gpie |= IXGBE_SDP0_GPIEN_X540; 6203 break; 6204 default: 6205 break; 6206 } 6207 6208 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 6209 } 6210 6211 static void ixgbe_up_complete(struct ixgbe_adapter *adapter) 6212 { 6213 struct ixgbe_hw *hw = &adapter->hw; 6214 int err; 6215 u32 ctrl_ext; 6216 6217 ixgbe_get_hw_control(adapter); 6218 ixgbe_setup_gpie(adapter); 6219 6220 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) 6221 ixgbe_configure_msix(adapter); 6222 else 6223 ixgbe_configure_msi_and_legacy(adapter); 6224 6225 /* enable the optics for 82599 SFP+ fiber */ 6226 if (hw->mac.ops.enable_tx_laser) 6227 hw->mac.ops.enable_tx_laser(hw); 6228 6229 if (hw->phy.ops.set_phy_power) 6230 hw->phy.ops.set_phy_power(hw, true); 6231 6232 smp_mb__before_atomic(); 6233 clear_bit(__IXGBE_DOWN, &adapter->state); 6234 ixgbe_napi_enable_all(adapter); 6235 6236 if (ixgbe_is_sfp(hw)) { 6237 ixgbe_sfp_link_config(adapter); 6238 } else { 6239 err = ixgbe_non_sfp_link_config(hw); 6240 if (err) 6241 e_err(probe, "link_config FAILED %d\n", err); 6242 } 6243 6244 /* clear any pending interrupts, may auto mask */ 6245 IXGBE_READ_REG(hw, IXGBE_EICR); 6246 ixgbe_irq_enable(adapter, true, true); 6247 6248 /* 6249 * If this adapter has a fan, check to see if we had a failure 6250 * before we enabled the interrupt. 6251 */ 6252 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) { 6253 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 6254 if (esdp & IXGBE_ESDP_SDP1) 6255 e_crit(drv, "Fan has stopped, replace the adapter\n"); 6256 } 6257 6258 /* bring the link up in the watchdog, this could race with our first 6259 * link up interrupt but shouldn't be a problem */ 6260 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; 6261 adapter->link_check_timeout = jiffies; 6262 mod_timer(&adapter->service_timer, jiffies); 6263 6264 ixgbe_clear_vf_stats_counters(adapter); 6265 /* Set PF Reset Done bit so PF/VF Mail Ops can work */ 6266 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 6267 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 6268 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 6269 6270 /* update setting rx tx for all active vfs */ 6271 ixgbe_set_all_vfs(adapter); 6272 } 6273 6274 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter) 6275 { 6276 /* put off any impending NetWatchDogTimeout */ 6277 netif_trans_update(adapter->netdev); 6278 6279 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) 6280 usleep_range(1000, 2000); 6281 if (adapter->hw.phy.type == ixgbe_phy_fw) 6282 ixgbe_watchdog_link_is_down(adapter); 6283 ixgbe_down(adapter); 6284 /* 6285 * If SR-IOV enabled then wait a bit before bringing the adapter 6286 * back up to give the VFs time to respond to the reset. The 6287 * two second wait is based upon the watchdog timer cycle in 6288 * the VF driver. 6289 */ 6290 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 6291 msleep(2000); 6292 ixgbe_up(adapter); 6293 clear_bit(__IXGBE_RESETTING, &adapter->state); 6294 } 6295 6296 void ixgbe_up(struct ixgbe_adapter *adapter) 6297 { 6298 /* hardware has been reset, we need to reload some things */ 6299 ixgbe_configure(adapter); 6300 6301 ixgbe_up_complete(adapter); 6302 } 6303 6304 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter) 6305 { 6306 u16 devctl2; 6307 6308 pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2); 6309 6310 switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) { 6311 case IXGBE_PCIDEVCTRL2_17_34s: 6312 case IXGBE_PCIDEVCTRL2_4_8s: 6313 /* For now we cap the upper limit on delay to 2 seconds 6314 * as we end up going up to 34 seconds of delay in worst 6315 * case timeout value. 6316 */ 6317 case IXGBE_PCIDEVCTRL2_1_2s: 6318 return 2000000ul; /* 2.0 s */ 6319 case IXGBE_PCIDEVCTRL2_260_520ms: 6320 return 520000ul; /* 520 ms */ 6321 case IXGBE_PCIDEVCTRL2_65_130ms: 6322 return 130000ul; /* 130 ms */ 6323 case IXGBE_PCIDEVCTRL2_16_32ms: 6324 return 32000ul; /* 32 ms */ 6325 case IXGBE_PCIDEVCTRL2_1_2ms: 6326 return 2000ul; /* 2 ms */ 6327 case IXGBE_PCIDEVCTRL2_50_100us: 6328 return 100ul; /* 100 us */ 6329 case IXGBE_PCIDEVCTRL2_16_32ms_def: 6330 return 32000ul; /* 32 ms */ 6331 default: 6332 break; 6333 } 6334 6335 /* We shouldn't need to hit this path, but just in case default as 6336 * though completion timeout is not supported and support 32ms. 6337 */ 6338 return 32000ul; 6339 } 6340 6341 void ixgbe_disable_rx(struct ixgbe_adapter *adapter) 6342 { 6343 unsigned long wait_delay, delay_interval; 6344 struct ixgbe_hw *hw = &adapter->hw; 6345 int i, wait_loop; 6346 u32 rxdctl; 6347 6348 /* disable receives */ 6349 hw->mac.ops.disable_rx(hw); 6350 6351 if (ixgbe_removed(hw->hw_addr)) 6352 return; 6353 6354 /* disable all enabled Rx queues */ 6355 for (i = 0; i < adapter->num_rx_queues; i++) { 6356 struct ixgbe_ring *ring = adapter->rx_ring[i]; 6357 u8 reg_idx = ring->reg_idx; 6358 6359 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 6360 rxdctl &= ~IXGBE_RXDCTL_ENABLE; 6361 rxdctl |= IXGBE_RXDCTL_SWFLSH; 6362 6363 /* write value back with RXDCTL.ENABLE bit cleared */ 6364 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); 6365 } 6366 6367 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */ 6368 if (hw->mac.type == ixgbe_mac_82598EB && 6369 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) 6370 return; 6371 6372 /* Determine our minimum delay interval. We will increase this value 6373 * with each subsequent test. This way if the device returns quickly 6374 * we should spend as little time as possible waiting, however as 6375 * the time increases we will wait for larger periods of time. 6376 * 6377 * The trick here is that we increase the interval using the 6378 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result 6379 * of that wait is that it totals up to 100x whatever interval we 6380 * choose. Since our minimum wait is 100us we can just divide the 6381 * total timeout by 100 to get our minimum delay interval. 6382 */ 6383 delay_interval = ixgbe_get_completion_timeout(adapter) / 100; 6384 6385 wait_loop = IXGBE_MAX_RX_DESC_POLL; 6386 wait_delay = delay_interval; 6387 6388 while (wait_loop--) { 6389 usleep_range(wait_delay, wait_delay + 10); 6390 wait_delay += delay_interval * 2; 6391 rxdctl = 0; 6392 6393 /* OR together the reading of all the active RXDCTL registers, 6394 * and then test the result. We need the disable to complete 6395 * before we start freeing the memory and invalidating the 6396 * DMA mappings. 6397 */ 6398 for (i = 0; i < adapter->num_rx_queues; i++) { 6399 struct ixgbe_ring *ring = adapter->rx_ring[i]; 6400 u8 reg_idx = ring->reg_idx; 6401 6402 rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 6403 } 6404 6405 if (!(rxdctl & IXGBE_RXDCTL_ENABLE)) 6406 return; 6407 } 6408 6409 e_err(drv, 6410 "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n"); 6411 } 6412 6413 void ixgbe_disable_tx(struct ixgbe_adapter *adapter) 6414 { 6415 unsigned long wait_delay, delay_interval; 6416 struct ixgbe_hw *hw = &adapter->hw; 6417 int i, wait_loop; 6418 u32 txdctl; 6419 6420 if (ixgbe_removed(hw->hw_addr)) 6421 return; 6422 6423 /* disable all enabled Tx queues */ 6424 for (i = 0; i < adapter->num_tx_queues; i++) { 6425 struct ixgbe_ring *ring = adapter->tx_ring[i]; 6426 u8 reg_idx = ring->reg_idx; 6427 6428 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); 6429 } 6430 6431 /* disable all enabled XDP Tx queues */ 6432 for (i = 0; i < adapter->num_xdp_queues; i++) { 6433 struct ixgbe_ring *ring = adapter->xdp_ring[i]; 6434 u8 reg_idx = ring->reg_idx; 6435 6436 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); 6437 } 6438 6439 /* If the link is not up there shouldn't be much in the way of 6440 * pending transactions. Those that are left will be flushed out 6441 * when the reset logic goes through the flush sequence to clean out 6442 * the pending Tx transactions. 6443 */ 6444 if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) 6445 goto dma_engine_disable; 6446 6447 /* Determine our minimum delay interval. We will increase this value 6448 * with each subsequent test. This way if the device returns quickly 6449 * we should spend as little time as possible waiting, however as 6450 * the time increases we will wait for larger periods of time. 6451 * 6452 * The trick here is that we increase the interval using the 6453 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result 6454 * of that wait is that it totals up to 100x whatever interval we 6455 * choose. Since our minimum wait is 100us we can just divide the 6456 * total timeout by 100 to get our minimum delay interval. 6457 */ 6458 delay_interval = ixgbe_get_completion_timeout(adapter) / 100; 6459 6460 wait_loop = IXGBE_MAX_RX_DESC_POLL; 6461 wait_delay = delay_interval; 6462 6463 while (wait_loop--) { 6464 usleep_range(wait_delay, wait_delay + 10); 6465 wait_delay += delay_interval * 2; 6466 txdctl = 0; 6467 6468 /* OR together the reading of all the active TXDCTL registers, 6469 * and then test the result. We need the disable to complete 6470 * before we start freeing the memory and invalidating the 6471 * DMA mappings. 6472 */ 6473 for (i = 0; i < adapter->num_tx_queues; i++) { 6474 struct ixgbe_ring *ring = adapter->tx_ring[i]; 6475 u8 reg_idx = ring->reg_idx; 6476 6477 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); 6478 } 6479 for (i = 0; i < adapter->num_xdp_queues; i++) { 6480 struct ixgbe_ring *ring = adapter->xdp_ring[i]; 6481 u8 reg_idx = ring->reg_idx; 6482 6483 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); 6484 } 6485 6486 if (!(txdctl & IXGBE_TXDCTL_ENABLE)) 6487 goto dma_engine_disable; 6488 } 6489 6490 e_err(drv, 6491 "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n"); 6492 6493 dma_engine_disable: 6494 /* Disable the Tx DMA engine on 82599 and later MAC */ 6495 switch (hw->mac.type) { 6496 case ixgbe_mac_82599EB: 6497 case ixgbe_mac_X540: 6498 case ixgbe_mac_X550: 6499 case ixgbe_mac_X550EM_x: 6500 case ixgbe_mac_x550em_a: 6501 case ixgbe_mac_e610: 6502 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, 6503 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) & 6504 ~IXGBE_DMATXCTL_TE)); 6505 fallthrough; 6506 default: 6507 break; 6508 } 6509 } 6510 6511 void ixgbe_reset(struct ixgbe_adapter *adapter) 6512 { 6513 struct ixgbe_hw *hw = &adapter->hw; 6514 struct net_device *netdev = adapter->netdev; 6515 int err; 6516 6517 if (ixgbe_removed(hw->hw_addr)) 6518 return; 6519 /* lock SFP init bit to prevent race conditions with the watchdog */ 6520 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 6521 usleep_range(1000, 2000); 6522 6523 /* clear all SFP and link config related flags while holding SFP_INIT */ 6524 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP | 6525 IXGBE_FLAG2_SFP_NEEDS_RESET); 6526 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG; 6527 6528 err = hw->mac.ops.init_hw(hw); 6529 switch (err) { 6530 case 0: 6531 case -ENOENT: 6532 case -EOPNOTSUPP: 6533 break; 6534 case -EALREADY: 6535 e_dev_err("primary disable timed out\n"); 6536 break; 6537 case -EACCES: 6538 /* We are running on a pre-production device, log a warning */ 6539 e_dev_warn("This device is a pre-production adapter/LOM. " 6540 "Please be aware there may be issues associated with " 6541 "your hardware. If you are experiencing problems " 6542 "please contact your Intel or hardware " 6543 "representative who provided you with this " 6544 "hardware.\n"); 6545 break; 6546 default: 6547 e_dev_err("Hardware Error: %d\n", err); 6548 } 6549 6550 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 6551 6552 /* flush entries out of MAC table */ 6553 ixgbe_flush_sw_mac_table(adapter); 6554 __dev_uc_unsync(netdev, NULL); 6555 6556 /* do not flush user set addresses */ 6557 ixgbe_mac_set_default_filter(adapter); 6558 6559 /* update SAN MAC vmdq pool selection */ 6560 if (hw->mac.san_mac_rar_index) 6561 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0)); 6562 6563 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) 6564 ixgbe_ptp_reset(adapter); 6565 6566 if (hw->phy.ops.set_phy_power) { 6567 if (!netif_running(adapter->netdev) && !adapter->wol) 6568 hw->phy.ops.set_phy_power(hw, false); 6569 else 6570 hw->phy.ops.set_phy_power(hw, true); 6571 } 6572 } 6573 6574 /** 6575 * ixgbe_clean_tx_ring - Free Tx Buffers 6576 * @tx_ring: ring to be cleaned 6577 **/ 6578 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring) 6579 { 6580 u16 i = tx_ring->next_to_clean; 6581 struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i]; 6582 6583 if (tx_ring->xsk_pool) { 6584 ixgbe_xsk_clean_tx_ring(tx_ring); 6585 goto out; 6586 } 6587 6588 while (i != tx_ring->next_to_use) { 6589 union ixgbe_adv_tx_desc *eop_desc, *tx_desc; 6590 6591 /* Free all the Tx ring sk_buffs */ 6592 if (ring_is_xdp(tx_ring)) 6593 xdp_return_frame(tx_buffer->xdpf); 6594 else 6595 dev_kfree_skb_any(tx_buffer->skb); 6596 6597 /* unmap skb header data */ 6598 dma_unmap_single(tx_ring->dev, 6599 dma_unmap_addr(tx_buffer, dma), 6600 dma_unmap_len(tx_buffer, len), 6601 DMA_TO_DEVICE); 6602 6603 /* check for eop_desc to determine the end of the packet */ 6604 eop_desc = tx_buffer->next_to_watch; 6605 tx_desc = IXGBE_TX_DESC(tx_ring, i); 6606 6607 /* unmap remaining buffers */ 6608 while (tx_desc != eop_desc) { 6609 tx_buffer++; 6610 tx_desc++; 6611 i++; 6612 if (unlikely(i == tx_ring->count)) { 6613 i = 0; 6614 tx_buffer = tx_ring->tx_buffer_info; 6615 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 6616 } 6617 6618 /* unmap any remaining paged data */ 6619 if (dma_unmap_len(tx_buffer, len)) 6620 dma_unmap_page(tx_ring->dev, 6621 dma_unmap_addr(tx_buffer, dma), 6622 dma_unmap_len(tx_buffer, len), 6623 DMA_TO_DEVICE); 6624 } 6625 6626 /* move us one more past the eop_desc for start of next pkt */ 6627 tx_buffer++; 6628 i++; 6629 if (unlikely(i == tx_ring->count)) { 6630 i = 0; 6631 tx_buffer = tx_ring->tx_buffer_info; 6632 } 6633 } 6634 6635 /* reset BQL for queue */ 6636 if (!ring_is_xdp(tx_ring)) 6637 netdev_tx_reset_queue(txring_txq(tx_ring)); 6638 6639 out: 6640 /* reset next_to_use and next_to_clean */ 6641 tx_ring->next_to_use = 0; 6642 tx_ring->next_to_clean = 0; 6643 } 6644 6645 /** 6646 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues 6647 * @adapter: board private structure 6648 **/ 6649 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter) 6650 { 6651 int i; 6652 6653 for (i = 0; i < adapter->num_rx_queues; i++) 6654 ixgbe_clean_rx_ring(adapter->rx_ring[i]); 6655 } 6656 6657 /** 6658 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues 6659 * @adapter: board private structure 6660 **/ 6661 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter) 6662 { 6663 int i; 6664 6665 for (i = 0; i < adapter->num_tx_queues; i++) 6666 ixgbe_clean_tx_ring(adapter->tx_ring[i]); 6667 for (i = 0; i < adapter->num_xdp_queues; i++) 6668 ixgbe_clean_tx_ring(adapter->xdp_ring[i]); 6669 } 6670 6671 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter) 6672 { 6673 struct hlist_node *node2; 6674 struct ixgbe_fdir_filter *filter; 6675 6676 spin_lock(&adapter->fdir_perfect_lock); 6677 6678 hlist_for_each_entry_safe(filter, node2, 6679 &adapter->fdir_filter_list, fdir_node) { 6680 hlist_del(&filter->fdir_node); 6681 kfree(filter); 6682 } 6683 adapter->fdir_filter_count = 0; 6684 6685 spin_unlock(&adapter->fdir_perfect_lock); 6686 } 6687 6688 void ixgbe_down(struct ixgbe_adapter *adapter) 6689 { 6690 struct net_device *netdev = adapter->netdev; 6691 struct ixgbe_hw *hw = &adapter->hw; 6692 int i; 6693 6694 /* signal that we are down to the interrupt handler */ 6695 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state)) 6696 return; /* do nothing if already down */ 6697 6698 /* Shut off incoming Tx traffic */ 6699 netif_tx_stop_all_queues(netdev); 6700 6701 /* call carrier off first to avoid false dev_watchdog timeouts */ 6702 netif_carrier_off(netdev); 6703 netif_tx_disable(netdev); 6704 6705 /* Disable Rx */ 6706 ixgbe_disable_rx(adapter); 6707 6708 /* synchronize_rcu() needed for pending XDP buffers to drain */ 6709 if (adapter->xdp_ring[0]) 6710 synchronize_rcu(); 6711 6712 ixgbe_irq_disable(adapter); 6713 6714 ixgbe_napi_disable_all(adapter); 6715 6716 clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state); 6717 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT; 6718 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE; 6719 6720 timer_delete_sync(&adapter->service_timer); 6721 6722 if (adapter->num_vfs) { 6723 /* Clear EITR Select mapping */ 6724 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0); 6725 6726 /* Mark all the VFs as inactive */ 6727 for (i = 0 ; i < adapter->num_vfs; i++) 6728 adapter->vfinfo[i].clear_to_send = false; 6729 6730 /* update setting rx tx for all active vfs */ 6731 ixgbe_set_all_vfs(adapter); 6732 } 6733 6734 /* disable transmits in the hardware now that interrupts are off */ 6735 ixgbe_disable_tx(adapter); 6736 6737 if (!pci_channel_offline(adapter->pdev)) 6738 ixgbe_reset(adapter); 6739 6740 /* power down the optics for 82599 SFP+ fiber */ 6741 if (hw->mac.ops.disable_tx_laser) 6742 hw->mac.ops.disable_tx_laser(hw); 6743 6744 ixgbe_clean_all_tx_rings(adapter); 6745 ixgbe_clean_all_rx_rings(adapter); 6746 if (adapter->hw.mac.type == ixgbe_mac_e610) 6747 ixgbe_disable_link_status_events(adapter); 6748 } 6749 6750 /** 6751 * ixgbe_set_eee_capable - helper function to determine EEE support on X550 6752 * @adapter: board private structure 6753 */ 6754 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter) 6755 { 6756 struct ixgbe_hw *hw = &adapter->hw; 6757 6758 switch (hw->device_id) { 6759 case IXGBE_DEV_ID_X550EM_A_1G_T: 6760 case IXGBE_DEV_ID_X550EM_A_1G_T_L: 6761 if (!hw->phy.eee_speeds_supported) 6762 break; 6763 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE; 6764 if (!hw->phy.eee_speeds_advertised) 6765 break; 6766 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED; 6767 break; 6768 default: 6769 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE; 6770 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED; 6771 break; 6772 } 6773 } 6774 6775 /** 6776 * ixgbe_tx_timeout - Respond to a Tx Hang 6777 * @netdev: network interface device structure 6778 * @txqueue: queue number that timed out 6779 **/ 6780 static void ixgbe_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue) 6781 { 6782 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 6783 6784 /* Do the reset outside of interrupt context */ 6785 ixgbe_tx_timeout_reset(adapter); 6786 } 6787 6788 #ifdef CONFIG_IXGBE_DCB 6789 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter) 6790 { 6791 struct ixgbe_hw *hw = &adapter->hw; 6792 struct tc_configuration *tc; 6793 int j; 6794 6795 switch (hw->mac.type) { 6796 case ixgbe_mac_82598EB: 6797 case ixgbe_mac_82599EB: 6798 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS; 6799 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS; 6800 break; 6801 case ixgbe_mac_X540: 6802 case ixgbe_mac_X550: 6803 case ixgbe_mac_e610: 6804 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS; 6805 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS; 6806 break; 6807 case ixgbe_mac_X550EM_x: 6808 case ixgbe_mac_x550em_a: 6809 default: 6810 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS; 6811 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS; 6812 break; 6813 } 6814 6815 /* Configure DCB traffic classes */ 6816 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) { 6817 tc = &adapter->dcb_cfg.tc_config[j]; 6818 tc->path[DCB_TX_CONFIG].bwg_id = 0; 6819 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1); 6820 tc->path[DCB_RX_CONFIG].bwg_id = 0; 6821 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1); 6822 tc->dcb_pfc = pfc_disabled; 6823 } 6824 6825 /* Initialize default user to priority mapping, UPx->TC0 */ 6826 tc = &adapter->dcb_cfg.tc_config[0]; 6827 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF; 6828 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF; 6829 6830 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100; 6831 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100; 6832 adapter->dcb_cfg.pfc_mode_enable = false; 6833 adapter->dcb_set_bitmap = 0x00; 6834 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE) 6835 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE; 6836 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg, 6837 sizeof(adapter->temp_dcb_cfg)); 6838 } 6839 #endif 6840 6841 /** 6842 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter) 6843 * @adapter: board private structure to initialize 6844 * @ii: pointer to ixgbe_info for device 6845 * 6846 * ixgbe_sw_init initializes the Adapter private data structure. 6847 * Fields are initialized based on PCI device information and 6848 * OS network device settings (MTU size). 6849 **/ 6850 static int ixgbe_sw_init(struct ixgbe_adapter *adapter, 6851 const struct ixgbe_info *ii) 6852 { 6853 struct ixgbe_hw *hw = &adapter->hw; 6854 struct pci_dev *pdev = adapter->pdev; 6855 unsigned int rss, fdir; 6856 u32 fwsm; 6857 int i; 6858 6859 /* PCI config space info */ 6860 6861 hw->vendor_id = pdev->vendor; 6862 hw->device_id = pdev->device; 6863 hw->revision_id = pdev->revision; 6864 hw->subsystem_vendor_id = pdev->subsystem_vendor; 6865 hw->subsystem_device_id = pdev->subsystem_device; 6866 6867 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME; 6868 6869 /* get_invariants needs the device IDs */ 6870 ii->get_invariants(hw); 6871 6872 /* Set common capability flags and settings */ 6873 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus()); 6874 adapter->ring_feature[RING_F_RSS].limit = rss; 6875 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE; 6876 adapter->max_q_vectors = MAX_Q_VECTORS_82599; 6877 adapter->atr_sample_rate = 20; 6878 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus()); 6879 adapter->ring_feature[RING_F_FDIR].limit = fdir; 6880 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K; 6881 adapter->ring_feature[RING_F_VMDQ].limit = 1; 6882 #ifdef CONFIG_IXGBE_DCA 6883 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE; 6884 #endif 6885 #ifdef CONFIG_IXGBE_DCB 6886 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE; 6887 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 6888 #endif 6889 #ifdef IXGBE_FCOE 6890 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE; 6891 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; 6892 #ifdef CONFIG_IXGBE_DCB 6893 /* Default traffic class to use for FCoE */ 6894 adapter->fcoe.up = IXGBE_FCOE_DEFTC; 6895 #endif /* CONFIG_IXGBE_DCB */ 6896 #endif /* IXGBE_FCOE */ 6897 6898 /* initialize static ixgbe jump table entries */ 6899 adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]), 6900 GFP_KERNEL); 6901 if (!adapter->jump_tables[0]) 6902 return -ENOMEM; 6903 adapter->jump_tables[0]->mat = ixgbe_ipv4_fields; 6904 6905 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) 6906 adapter->jump_tables[i] = NULL; 6907 6908 adapter->mac_table = kcalloc(hw->mac.num_rar_entries, 6909 sizeof(struct ixgbe_mac_addr), 6910 GFP_KERNEL); 6911 if (!adapter->mac_table) 6912 return -ENOMEM; 6913 6914 if (ixgbe_init_rss_key(adapter)) 6915 return -ENOMEM; 6916 6917 adapter->af_xdp_zc_qps = bitmap_zalloc(IXGBE_MAX_XDP_QS, GFP_KERNEL); 6918 if (!adapter->af_xdp_zc_qps) 6919 return -ENOMEM; 6920 6921 /* Set MAC specific capability flags and exceptions */ 6922 switch (hw->mac.type) { 6923 case ixgbe_mac_82598EB: 6924 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE; 6925 6926 if (hw->device_id == IXGBE_DEV_ID_82598AT) 6927 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE; 6928 6929 adapter->max_q_vectors = MAX_Q_VECTORS_82598; 6930 adapter->ring_feature[RING_F_FDIR].limit = 0; 6931 adapter->atr_sample_rate = 0; 6932 adapter->fdir_pballoc = 0; 6933 #ifdef IXGBE_FCOE 6934 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE; 6935 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; 6936 #ifdef CONFIG_IXGBE_DCB 6937 adapter->fcoe.up = 0; 6938 #endif /* IXGBE_DCB */ 6939 #endif /* IXGBE_FCOE */ 6940 break; 6941 case ixgbe_mac_82599EB: 6942 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM) 6943 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; 6944 break; 6945 case ixgbe_mac_X540: 6946 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw)); 6947 if (fwsm & IXGBE_FWSM_TS_ENABLED) 6948 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; 6949 break; 6950 case ixgbe_mac_x550em_a: 6951 switch (hw->device_id) { 6952 case IXGBE_DEV_ID_X550EM_A_1G_T: 6953 case IXGBE_DEV_ID_X550EM_A_1G_T_L: 6954 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; 6955 break; 6956 default: 6957 break; 6958 } 6959 fallthrough; 6960 case ixgbe_mac_X550EM_x: 6961 #ifdef CONFIG_IXGBE_DCB 6962 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE; 6963 #endif 6964 #ifdef IXGBE_FCOE 6965 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE; 6966 #ifdef CONFIG_IXGBE_DCB 6967 adapter->fcoe.up = 0; 6968 #endif /* IXGBE_DCB */ 6969 #endif /* IXGBE_FCOE */ 6970 fallthrough; 6971 case ixgbe_mac_X550: 6972 if (hw->mac.type == ixgbe_mac_X550) 6973 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; 6974 #ifdef CONFIG_IXGBE_DCA 6975 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE; 6976 #endif 6977 break; 6978 default: 6979 break; 6980 } 6981 6982 #ifdef IXGBE_FCOE 6983 /* FCoE support exists, always init the FCoE lock */ 6984 spin_lock_init(&adapter->fcoe.lock); 6985 6986 #endif 6987 /* n-tuple support exists, always init our spinlock */ 6988 spin_lock_init(&adapter->fdir_perfect_lock); 6989 6990 /* init spinlock to avoid concurrency of VF resources */ 6991 spin_lock_init(&adapter->vfs_lock); 6992 6993 #ifdef CONFIG_IXGBE_DCB 6994 ixgbe_init_dcb(adapter); 6995 #endif 6996 ixgbe_init_ipsec_offload(adapter); 6997 6998 /* default flow control settings */ 6999 hw->fc.requested_mode = ixgbe_fc_full; 7000 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */ 7001 ixgbe_pbthresh_setup(adapter); 7002 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE; 7003 hw->fc.send_xon = true; 7004 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw); 7005 7006 #ifdef CONFIG_PCI_IOV 7007 if (max_vfs > 0) 7008 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n"); 7009 7010 /* assign number of SR-IOV VFs */ 7011 if (hw->mac.type != ixgbe_mac_82598EB) { 7012 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) { 7013 max_vfs = 0; 7014 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n"); 7015 } 7016 } 7017 #endif /* CONFIG_PCI_IOV */ 7018 7019 /* enable itr by default in dynamic mode */ 7020 adapter->rx_itr_setting = 1; 7021 adapter->tx_itr_setting = 1; 7022 7023 /* set default ring sizes */ 7024 adapter->tx_ring_count = IXGBE_DEFAULT_TXD; 7025 adapter->rx_ring_count = IXGBE_DEFAULT_RXD; 7026 7027 /* set default work limits */ 7028 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK; 7029 7030 /* initialize eeprom parameters */ 7031 if (hw->eeprom.ops.init_params(hw)) { 7032 e_dev_err("EEPROM initialization failed\n"); 7033 return -EIO; 7034 } 7035 7036 /* PF holds first pool slot */ 7037 set_bit(0, adapter->fwd_bitmask); 7038 set_bit(__IXGBE_DOWN, &adapter->state); 7039 7040 /* enable locking for XDP_TX if we have more CPUs than queues */ 7041 if (nr_cpu_ids > IXGBE_MAX_XDP_QS) 7042 static_branch_enable(&ixgbe_xdp_locking_key); 7043 7044 return 0; 7045 } 7046 7047 /** 7048 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors) 7049 * @tx_ring: tx descriptor ring (for a specific queue) to setup 7050 * 7051 * Return 0 on success, negative on failure 7052 **/ 7053 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring) 7054 { 7055 struct device *dev = tx_ring->dev; 7056 int orig_node = dev_to_node(dev); 7057 int ring_node = NUMA_NO_NODE; 7058 int size; 7059 7060 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count; 7061 7062 if (tx_ring->q_vector) 7063 ring_node = tx_ring->q_vector->numa_node; 7064 7065 tx_ring->tx_buffer_info = vmalloc_node(size, ring_node); 7066 if (!tx_ring->tx_buffer_info) 7067 tx_ring->tx_buffer_info = vmalloc(size); 7068 if (!tx_ring->tx_buffer_info) 7069 goto err; 7070 7071 /* round up to nearest 4K */ 7072 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc); 7073 tx_ring->size = ALIGN(tx_ring->size, 4096); 7074 7075 set_dev_node(dev, ring_node); 7076 tx_ring->desc = dma_alloc_coherent(dev, 7077 tx_ring->size, 7078 &tx_ring->dma, 7079 GFP_KERNEL); 7080 set_dev_node(dev, orig_node); 7081 if (!tx_ring->desc) 7082 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size, 7083 &tx_ring->dma, GFP_KERNEL); 7084 if (!tx_ring->desc) 7085 goto err; 7086 7087 tx_ring->next_to_use = 0; 7088 tx_ring->next_to_clean = 0; 7089 return 0; 7090 7091 err: 7092 vfree(tx_ring->tx_buffer_info); 7093 tx_ring->tx_buffer_info = NULL; 7094 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n"); 7095 return -ENOMEM; 7096 } 7097 7098 /** 7099 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources 7100 * @adapter: board private structure 7101 * 7102 * If this function returns with an error, then it's possible one or 7103 * more of the rings is populated (while the rest are not). It is the 7104 * callers duty to clean those orphaned rings. 7105 * 7106 * Return 0 on success, negative on failure 7107 **/ 7108 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter) 7109 { 7110 int i, j = 0, err = 0; 7111 7112 for (i = 0; i < adapter->num_tx_queues; i++) { 7113 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]); 7114 if (!err) 7115 continue; 7116 7117 e_err(probe, "Allocation for Tx Queue %u failed\n", i); 7118 goto err_setup_tx; 7119 } 7120 for (j = 0; j < adapter->num_xdp_queues; j++) { 7121 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]); 7122 if (!err) 7123 continue; 7124 7125 e_err(probe, "Allocation for Tx Queue %u failed\n", j); 7126 goto err_setup_tx; 7127 } 7128 7129 return 0; 7130 err_setup_tx: 7131 /* rewind the index freeing the rings as we go */ 7132 while (j--) 7133 ixgbe_free_tx_resources(adapter->xdp_ring[j]); 7134 while (i--) 7135 ixgbe_free_tx_resources(adapter->tx_ring[i]); 7136 return err; 7137 } 7138 7139 static int ixgbe_rx_napi_id(struct ixgbe_ring *rx_ring) 7140 { 7141 struct ixgbe_q_vector *q_vector = rx_ring->q_vector; 7142 7143 return q_vector ? q_vector->napi.napi_id : 0; 7144 } 7145 7146 /** 7147 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors) 7148 * @adapter: pointer to ixgbe_adapter 7149 * @rx_ring: rx descriptor ring (for a specific queue) to setup 7150 * 7151 * Returns 0 on success, negative on failure 7152 **/ 7153 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter, 7154 struct ixgbe_ring *rx_ring) 7155 { 7156 struct device *dev = rx_ring->dev; 7157 int orig_node = dev_to_node(dev); 7158 int ring_node = NUMA_NO_NODE; 7159 int size; 7160 7161 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count; 7162 7163 if (rx_ring->q_vector) 7164 ring_node = rx_ring->q_vector->numa_node; 7165 7166 rx_ring->rx_buffer_info = vmalloc_node(size, ring_node); 7167 if (!rx_ring->rx_buffer_info) 7168 rx_ring->rx_buffer_info = vmalloc(size); 7169 if (!rx_ring->rx_buffer_info) 7170 goto err; 7171 7172 /* Round up to nearest 4K */ 7173 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc); 7174 rx_ring->size = ALIGN(rx_ring->size, 4096); 7175 7176 set_dev_node(dev, ring_node); 7177 rx_ring->desc = dma_alloc_coherent(dev, 7178 rx_ring->size, 7179 &rx_ring->dma, 7180 GFP_KERNEL); 7181 set_dev_node(dev, orig_node); 7182 if (!rx_ring->desc) 7183 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size, 7184 &rx_ring->dma, GFP_KERNEL); 7185 if (!rx_ring->desc) 7186 goto err; 7187 7188 rx_ring->next_to_clean = 0; 7189 rx_ring->next_to_use = 0; 7190 7191 /* XDP RX-queue info */ 7192 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev, 7193 rx_ring->queue_index, ixgbe_rx_napi_id(rx_ring)) < 0) 7194 goto err; 7195 7196 WRITE_ONCE(rx_ring->xdp_prog, adapter->xdp_prog); 7197 7198 return 0; 7199 err: 7200 vfree(rx_ring->rx_buffer_info); 7201 rx_ring->rx_buffer_info = NULL; 7202 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n"); 7203 return -ENOMEM; 7204 } 7205 7206 /** 7207 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources 7208 * @adapter: board private structure 7209 * 7210 * If this function returns with an error, then it's possible one or 7211 * more of the rings is populated (while the rest are not). It is the 7212 * callers duty to clean those orphaned rings. 7213 * 7214 * Return 0 on success, negative on failure 7215 **/ 7216 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter) 7217 { 7218 int i, err = 0; 7219 7220 for (i = 0; i < adapter->num_rx_queues; i++) { 7221 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]); 7222 if (!err) 7223 continue; 7224 7225 e_err(probe, "Allocation for Rx Queue %u failed\n", i); 7226 goto err_setup_rx; 7227 } 7228 7229 #ifdef IXGBE_FCOE 7230 err = ixgbe_setup_fcoe_ddp_resources(adapter); 7231 if (!err) 7232 #endif 7233 return 0; 7234 err_setup_rx: 7235 /* rewind the index freeing the rings as we go */ 7236 while (i--) 7237 ixgbe_free_rx_resources(adapter->rx_ring[i]); 7238 return err; 7239 } 7240 7241 /** 7242 * ixgbe_free_tx_resources - Free Tx Resources per Queue 7243 * @tx_ring: Tx descriptor ring for a specific queue 7244 * 7245 * Free all transmit software resources 7246 **/ 7247 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring) 7248 { 7249 ixgbe_clean_tx_ring(tx_ring); 7250 7251 vfree(tx_ring->tx_buffer_info); 7252 tx_ring->tx_buffer_info = NULL; 7253 7254 /* if not set, then don't free */ 7255 if (!tx_ring->desc) 7256 return; 7257 7258 dma_free_coherent(tx_ring->dev, tx_ring->size, 7259 tx_ring->desc, tx_ring->dma); 7260 7261 tx_ring->desc = NULL; 7262 } 7263 7264 /** 7265 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues 7266 * @adapter: board private structure 7267 * 7268 * Free all transmit software resources 7269 **/ 7270 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter) 7271 { 7272 int i; 7273 7274 for (i = 0; i < adapter->num_tx_queues; i++) 7275 if (adapter->tx_ring[i]->desc) 7276 ixgbe_free_tx_resources(adapter->tx_ring[i]); 7277 for (i = 0; i < adapter->num_xdp_queues; i++) 7278 if (adapter->xdp_ring[i]->desc) 7279 ixgbe_free_tx_resources(adapter->xdp_ring[i]); 7280 } 7281 7282 /** 7283 * ixgbe_free_rx_resources - Free Rx Resources 7284 * @rx_ring: ring to clean the resources from 7285 * 7286 * Free all receive software resources 7287 **/ 7288 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring) 7289 { 7290 ixgbe_clean_rx_ring(rx_ring); 7291 7292 rx_ring->xdp_prog = NULL; 7293 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 7294 vfree(rx_ring->rx_buffer_info); 7295 rx_ring->rx_buffer_info = NULL; 7296 7297 /* if not set, then don't free */ 7298 if (!rx_ring->desc) 7299 return; 7300 7301 dma_free_coherent(rx_ring->dev, rx_ring->size, 7302 rx_ring->desc, rx_ring->dma); 7303 7304 rx_ring->desc = NULL; 7305 } 7306 7307 /** 7308 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues 7309 * @adapter: board private structure 7310 * 7311 * Free all receive software resources 7312 **/ 7313 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter) 7314 { 7315 int i; 7316 7317 #ifdef IXGBE_FCOE 7318 ixgbe_free_fcoe_ddp_resources(adapter); 7319 7320 #endif 7321 for (i = 0; i < adapter->num_rx_queues; i++) 7322 if (adapter->rx_ring[i]->desc) 7323 ixgbe_free_rx_resources(adapter->rx_ring[i]); 7324 } 7325 7326 /** 7327 * ixgbe_max_xdp_frame_size - returns the maximum allowed frame size for XDP 7328 * @adapter: device handle, pointer to adapter 7329 */ 7330 static int ixgbe_max_xdp_frame_size(struct ixgbe_adapter *adapter) 7331 { 7332 if (PAGE_SIZE >= 8192 || adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) 7333 return IXGBE_RXBUFFER_2K; 7334 else 7335 return IXGBE_RXBUFFER_3K; 7336 } 7337 7338 /** 7339 * ixgbe_change_mtu - Change the Maximum Transfer Unit 7340 * @netdev: network interface device structure 7341 * @new_mtu: new value for maximum frame size 7342 * 7343 * Returns 0 on success, negative on failure 7344 **/ 7345 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu) 7346 { 7347 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 7348 7349 if (ixgbe_enabled_xdp_adapter(adapter)) { 7350 int new_frame_size = new_mtu + IXGBE_PKT_HDR_PAD; 7351 7352 if (new_frame_size > ixgbe_max_xdp_frame_size(adapter)) { 7353 e_warn(probe, "Requested MTU size is not supported with XDP\n"); 7354 return -EINVAL; 7355 } 7356 } 7357 7358 /* 7359 * For 82599EB we cannot allow legacy VFs to enable their receive 7360 * paths when MTU greater than 1500 is configured. So display a 7361 * warning that legacy VFs will be disabled. 7362 */ 7363 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && 7364 (adapter->hw.mac.type == ixgbe_mac_82599EB) && 7365 (new_mtu > ETH_DATA_LEN)) 7366 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n"); 7367 7368 netdev_dbg(netdev, "changing MTU from %d to %d\n", 7369 netdev->mtu, new_mtu); 7370 7371 /* must set new MTU before calling down or up */ 7372 WRITE_ONCE(netdev->mtu, new_mtu); 7373 7374 if (netif_running(netdev)) 7375 ixgbe_reinit_locked(adapter); 7376 7377 return 0; 7378 } 7379 7380 /** 7381 * ixgbe_open - Called when a network interface is made active 7382 * @netdev: network interface device structure 7383 * 7384 * Returns 0 on success, negative value on failure 7385 * 7386 * The open entry point is called when a network interface is made 7387 * active by the system (IFF_UP). At this point all resources needed 7388 * for transmit and receive operations are allocated, the interrupt 7389 * handler is registered with the OS, the watchdog timer is started, 7390 * and the stack is notified that the interface is ready. 7391 **/ 7392 int ixgbe_open(struct net_device *netdev) 7393 { 7394 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 7395 struct ixgbe_hw *hw = &adapter->hw; 7396 int err, queues; 7397 7398 /* disallow open during test */ 7399 if (test_bit(__IXGBE_TESTING, &adapter->state)) 7400 return -EBUSY; 7401 7402 netif_carrier_off(netdev); 7403 7404 /* allocate transmit descriptors */ 7405 err = ixgbe_setup_all_tx_resources(adapter); 7406 if (err) 7407 goto err_setup_tx; 7408 7409 /* allocate receive descriptors */ 7410 err = ixgbe_setup_all_rx_resources(adapter); 7411 if (err) 7412 goto err_setup_rx; 7413 7414 ixgbe_configure(adapter); 7415 7416 err = ixgbe_request_irq(adapter); 7417 if (err) 7418 goto err_req_irq; 7419 7420 /* Notify the stack of the actual queue counts. */ 7421 queues = adapter->num_tx_queues; 7422 err = netif_set_real_num_tx_queues(netdev, queues); 7423 if (err) 7424 goto err_set_queues; 7425 7426 queues = adapter->num_rx_queues; 7427 err = netif_set_real_num_rx_queues(netdev, queues); 7428 if (err) 7429 goto err_set_queues; 7430 7431 ixgbe_ptp_init(adapter); 7432 7433 ixgbe_up_complete(adapter); 7434 7435 udp_tunnel_nic_reset_ntf(netdev); 7436 if (adapter->hw.mac.type == ixgbe_mac_e610) { 7437 int err = ixgbe_update_link_info(&adapter->hw); 7438 7439 if (err) 7440 e_dev_err("Failed to update link info, err %d.\n", err); 7441 7442 ixgbe_check_link_cfg_err(adapter, 7443 adapter->hw.link.link_info.link_cfg_err); 7444 7445 err = ixgbe_non_sfp_link_config(&adapter->hw); 7446 if (ixgbe_non_sfp_link_config(&adapter->hw)) 7447 e_dev_err("Link setup failed, err %d.\n", err); 7448 } 7449 7450 return 0; 7451 7452 err_set_queues: 7453 ixgbe_free_irq(adapter); 7454 err_req_irq: 7455 ixgbe_free_all_rx_resources(adapter); 7456 if (hw->phy.ops.set_phy_power && !adapter->wol) 7457 hw->phy.ops.set_phy_power(&adapter->hw, false); 7458 err_setup_rx: 7459 ixgbe_free_all_tx_resources(adapter); 7460 err_setup_tx: 7461 ixgbe_reset(adapter); 7462 7463 return err; 7464 } 7465 7466 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter) 7467 { 7468 ixgbe_ptp_suspend(adapter); 7469 7470 if (adapter->hw.phy.ops.enter_lplu) { 7471 adapter->hw.phy.reset_disable = true; 7472 ixgbe_down(adapter); 7473 adapter->hw.phy.ops.enter_lplu(&adapter->hw); 7474 adapter->hw.phy.reset_disable = false; 7475 } else { 7476 ixgbe_down(adapter); 7477 } 7478 7479 ixgbe_free_irq(adapter); 7480 7481 ixgbe_free_all_tx_resources(adapter); 7482 ixgbe_free_all_rx_resources(adapter); 7483 } 7484 7485 /** 7486 * ixgbe_close - Disables a network interface 7487 * @netdev: network interface device structure 7488 * 7489 * Returns 0, this is not allowed to fail 7490 * 7491 * The close entry point is called when an interface is de-activated 7492 * by the OS. The hardware is still under the drivers control, but 7493 * needs to be disabled. A global MAC reset is issued to stop the 7494 * hardware, and all transmit and receive resources are freed. 7495 **/ 7496 int ixgbe_close(struct net_device *netdev) 7497 { 7498 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 7499 7500 ixgbe_ptp_stop(adapter); 7501 7502 if (netif_device_present(netdev)) 7503 ixgbe_close_suspend(adapter); 7504 7505 ixgbe_fdir_filter_exit(adapter); 7506 7507 ixgbe_release_hw_control(adapter); 7508 7509 return 0; 7510 } 7511 7512 static int ixgbe_resume(struct device *dev_d) 7513 { 7514 struct pci_dev *pdev = to_pci_dev(dev_d); 7515 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 7516 struct net_device *netdev = adapter->netdev; 7517 u32 err; 7518 7519 adapter->hw.hw_addr = adapter->io_addr; 7520 7521 err = pci_enable_device_mem(pdev); 7522 if (err) { 7523 e_dev_err("Cannot enable PCI device from suspend\n"); 7524 return err; 7525 } 7526 smp_mb__before_atomic(); 7527 clear_bit(__IXGBE_DISABLED, &adapter->state); 7528 pci_set_master(pdev); 7529 7530 device_wakeup_disable(dev_d); 7531 7532 ixgbe_reset(adapter); 7533 7534 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); 7535 7536 rtnl_lock(); 7537 err = ixgbe_init_interrupt_scheme(adapter); 7538 if (!err && netif_running(netdev)) 7539 err = ixgbe_open(netdev); 7540 7541 7542 if (!err) 7543 netif_device_attach(netdev); 7544 rtnl_unlock(); 7545 7546 return err; 7547 } 7548 7549 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake) 7550 { 7551 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 7552 struct net_device *netdev = adapter->netdev; 7553 struct ixgbe_hw *hw = &adapter->hw; 7554 u32 ctrl; 7555 u32 wufc = adapter->wol; 7556 7557 rtnl_lock(); 7558 netif_device_detach(netdev); 7559 7560 if (netif_running(netdev)) 7561 ixgbe_close_suspend(adapter); 7562 7563 ixgbe_clear_interrupt_scheme(adapter); 7564 rtnl_unlock(); 7565 7566 if (hw->mac.ops.stop_link_on_d3) 7567 hw->mac.ops.stop_link_on_d3(hw); 7568 7569 if (wufc) { 7570 u32 fctrl; 7571 7572 ixgbe_set_rx_mode(netdev); 7573 7574 /* enable the optics for 82599 SFP+ fiber as we can WoL */ 7575 if (hw->mac.ops.enable_tx_laser) 7576 hw->mac.ops.enable_tx_laser(hw); 7577 7578 /* enable the reception of multicast packets */ 7579 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 7580 fctrl |= IXGBE_FCTRL_MPE; 7581 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 7582 7583 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); 7584 ctrl |= IXGBE_CTRL_GIO_DIS; 7585 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); 7586 7587 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc); 7588 } else { 7589 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); 7590 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 7591 } 7592 7593 switch (hw->mac.type) { 7594 case ixgbe_mac_82598EB: 7595 pci_wake_from_d3(pdev, false); 7596 break; 7597 case ixgbe_mac_82599EB: 7598 case ixgbe_mac_X540: 7599 case ixgbe_mac_X550: 7600 case ixgbe_mac_X550EM_x: 7601 case ixgbe_mac_x550em_a: 7602 case ixgbe_mac_e610: 7603 pci_wake_from_d3(pdev, !!wufc); 7604 break; 7605 default: 7606 break; 7607 } 7608 7609 *enable_wake = !!wufc; 7610 if (hw->phy.ops.set_phy_power && !*enable_wake) 7611 hw->phy.ops.set_phy_power(hw, false); 7612 7613 ixgbe_release_hw_control(adapter); 7614 7615 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state)) 7616 pci_disable_device(pdev); 7617 7618 return 0; 7619 } 7620 7621 static int ixgbe_suspend(struct device *dev_d) 7622 { 7623 struct pci_dev *pdev = to_pci_dev(dev_d); 7624 int retval; 7625 bool wake; 7626 7627 retval = __ixgbe_shutdown(pdev, &wake); 7628 7629 device_set_wakeup_enable(dev_d, wake); 7630 7631 return retval; 7632 } 7633 7634 static void ixgbe_shutdown(struct pci_dev *pdev) 7635 { 7636 bool wake; 7637 7638 __ixgbe_shutdown(pdev, &wake); 7639 7640 if (system_state == SYSTEM_POWER_OFF) { 7641 pci_wake_from_d3(pdev, wake); 7642 pci_set_power_state(pdev, PCI_D3hot); 7643 } 7644 } 7645 7646 /** 7647 * ixgbe_update_stats - Update the board statistics counters. 7648 * @adapter: board private structure 7649 **/ 7650 void ixgbe_update_stats(struct ixgbe_adapter *adapter) 7651 { 7652 struct net_device *netdev = adapter->netdev; 7653 struct ixgbe_hw *hw = &adapter->hw; 7654 struct ixgbe_hw_stats *hwstats = &adapter->stats; 7655 u64 total_mpc = 0; 7656 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot; 7657 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0; 7658 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0; 7659 u64 alloc_rx_page = 0; 7660 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0; 7661 7662 if (test_bit(__IXGBE_DOWN, &adapter->state) || 7663 test_bit(__IXGBE_RESETTING, &adapter->state)) 7664 return; 7665 7666 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { 7667 u64 rsc_count = 0; 7668 u64 rsc_flush = 0; 7669 for (i = 0; i < adapter->num_rx_queues; i++) { 7670 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count; 7671 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush; 7672 } 7673 adapter->rsc_total_count = rsc_count; 7674 adapter->rsc_total_flush = rsc_flush; 7675 } 7676 7677 for (i = 0; i < adapter->num_rx_queues; i++) { 7678 struct ixgbe_ring *rx_ring = READ_ONCE(adapter->rx_ring[i]); 7679 7680 if (!rx_ring) 7681 continue; 7682 non_eop_descs += rx_ring->rx_stats.non_eop_descs; 7683 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page; 7684 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed; 7685 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed; 7686 hw_csum_rx_error += rx_ring->rx_stats.csum_err; 7687 bytes += rx_ring->stats.bytes; 7688 packets += rx_ring->stats.packets; 7689 } 7690 adapter->non_eop_descs = non_eop_descs; 7691 adapter->alloc_rx_page = alloc_rx_page; 7692 adapter->alloc_rx_page_failed = alloc_rx_page_failed; 7693 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed; 7694 adapter->hw_csum_rx_error = hw_csum_rx_error; 7695 netdev->stats.rx_bytes = bytes; 7696 netdev->stats.rx_packets = packets; 7697 7698 bytes = 0; 7699 packets = 0; 7700 /* gather some stats to the adapter struct that are per queue */ 7701 for (i = 0; i < adapter->num_tx_queues; i++) { 7702 struct ixgbe_ring *tx_ring = READ_ONCE(adapter->tx_ring[i]); 7703 7704 if (!tx_ring) 7705 continue; 7706 restart_queue += tx_ring->tx_stats.restart_queue; 7707 tx_busy += tx_ring->tx_stats.tx_busy; 7708 bytes += tx_ring->stats.bytes; 7709 packets += tx_ring->stats.packets; 7710 } 7711 for (i = 0; i < adapter->num_xdp_queues; i++) { 7712 struct ixgbe_ring *xdp_ring = READ_ONCE(adapter->xdp_ring[i]); 7713 7714 if (!xdp_ring) 7715 continue; 7716 restart_queue += xdp_ring->tx_stats.restart_queue; 7717 tx_busy += xdp_ring->tx_stats.tx_busy; 7718 bytes += xdp_ring->stats.bytes; 7719 packets += xdp_ring->stats.packets; 7720 } 7721 adapter->restart_queue = restart_queue; 7722 adapter->tx_busy = tx_busy; 7723 netdev->stats.tx_bytes = bytes; 7724 netdev->stats.tx_packets = packets; 7725 7726 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 7727 7728 /* 8 register reads */ 7729 for (i = 0; i < 8; i++) { 7730 /* for packet buffers not used, the register should read 0 */ 7731 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i)); 7732 missed_rx += mpc; 7733 hwstats->mpc[i] += mpc; 7734 total_mpc += hwstats->mpc[i]; 7735 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i)); 7736 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i)); 7737 switch (hw->mac.type) { 7738 case ixgbe_mac_82598EB: 7739 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i)); 7740 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i)); 7741 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i)); 7742 hwstats->pxonrxc[i] += 7743 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i)); 7744 break; 7745 case ixgbe_mac_82599EB: 7746 case ixgbe_mac_X540: 7747 case ixgbe_mac_X550: 7748 case ixgbe_mac_X550EM_x: 7749 case ixgbe_mac_x550em_a: 7750 case ixgbe_mac_e610: 7751 hwstats->pxonrxc[i] += 7752 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i)); 7753 break; 7754 default: 7755 break; 7756 } 7757 } 7758 7759 /*16 register reads */ 7760 for (i = 0; i < 16; i++) { 7761 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 7762 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 7763 if (hw->mac.type == ixgbe_mac_82599EB || 7764 hw->mac.type == ixgbe_mac_X540 || 7765 hw->mac.type == ixgbe_mac_X550 || 7766 hw->mac.type == ixgbe_mac_X550EM_x || 7767 hw->mac.type == ixgbe_mac_x550em_a || 7768 hw->mac.type == ixgbe_mac_e610) { 7769 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)); 7770 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */ 7771 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)); 7772 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */ 7773 } 7774 } 7775 7776 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 7777 /* work around hardware counting issue */ 7778 hwstats->gprc -= missed_rx; 7779 7780 ixgbe_update_xoff_received(adapter); 7781 7782 /* 82598 hardware only has a 32 bit counter in the high register */ 7783 switch (hw->mac.type) { 7784 case ixgbe_mac_82598EB: 7785 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 7786 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 7787 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 7788 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); 7789 break; 7790 case ixgbe_mac_X540: 7791 case ixgbe_mac_X550: 7792 case ixgbe_mac_X550EM_x: 7793 case ixgbe_mac_x550em_a: 7794 case ixgbe_mac_e610: 7795 /* OS2BMC stats are X540 and later */ 7796 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC); 7797 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC); 7798 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC); 7799 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC); 7800 fallthrough; 7801 case ixgbe_mac_82599EB: 7802 for (i = 0; i < 16; i++) 7803 adapter->hw_rx_no_dma_resources += 7804 IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 7805 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL); 7806 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */ 7807 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL); 7808 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */ 7809 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL); 7810 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */ 7811 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 7812 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH); 7813 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS); 7814 #ifdef IXGBE_FCOE 7815 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 7816 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 7817 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 7818 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 7819 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 7820 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 7821 /* Add up per cpu counters for total ddp aloc fail */ 7822 if (adapter->fcoe.ddp_pool) { 7823 struct ixgbe_fcoe *fcoe = &adapter->fcoe; 7824 struct ixgbe_fcoe_ddp_pool *ddp_pool; 7825 unsigned int cpu; 7826 u64 noddp = 0, noddp_ext_buff = 0; 7827 for_each_possible_cpu(cpu) { 7828 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu); 7829 noddp += ddp_pool->noddp; 7830 noddp_ext_buff += ddp_pool->noddp_ext_buff; 7831 } 7832 hwstats->fcoe_noddp = noddp; 7833 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff; 7834 } 7835 #endif /* IXGBE_FCOE */ 7836 break; 7837 default: 7838 break; 7839 } 7840 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 7841 hwstats->bprc += bprc; 7842 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 7843 if (hw->mac.type == ixgbe_mac_82598EB) 7844 hwstats->mprc -= bprc; 7845 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC); 7846 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 7847 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 7848 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 7849 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 7850 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 7851 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 7852 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 7853 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 7854 hwstats->lxontxc += lxon; 7855 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 7856 hwstats->lxofftxc += lxoff; 7857 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 7858 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 7859 /* 7860 * 82598 errata - tx of flow control packets is included in tx counters 7861 */ 7862 xon_off_tot = lxon + lxoff; 7863 hwstats->gptc -= xon_off_tot; 7864 hwstats->mptc -= xon_off_tot; 7865 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN)); 7866 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 7867 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 7868 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 7869 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 7870 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 7871 hwstats->ptc64 -= xon_off_tot; 7872 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 7873 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 7874 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 7875 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 7876 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 7877 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 7878 7879 /* Fill out the OS statistics structure */ 7880 netdev->stats.multicast = hwstats->mprc; 7881 7882 /* Rx Errors */ 7883 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec; 7884 netdev->stats.rx_dropped = 0; 7885 netdev->stats.rx_length_errors = hwstats->rlec; 7886 netdev->stats.rx_crc_errors = hwstats->crcerrs; 7887 netdev->stats.rx_missed_errors = total_mpc; 7888 7889 /* VF Stats Collection - skip while resetting because these 7890 * are not clear on read and otherwise you'll sometimes get 7891 * crazy values. 7892 */ 7893 if (!test_bit(__IXGBE_RESETTING, &adapter->state)) { 7894 for (i = 0; i < adapter->num_vfs; i++) { 7895 UPDATE_VF_COUNTER_32bit(IXGBE_PVFGPRC(i), 7896 adapter->vfinfo[i].last_vfstats.gprc, 7897 adapter->vfinfo[i].vfstats.gprc); 7898 UPDATE_VF_COUNTER_32bit(IXGBE_PVFGPTC(i), 7899 adapter->vfinfo[i].last_vfstats.gptc, 7900 adapter->vfinfo[i].vfstats.gptc); 7901 UPDATE_VF_COUNTER_36bit(IXGBE_PVFGORC_LSB(i), 7902 IXGBE_PVFGORC_MSB(i), 7903 adapter->vfinfo[i].last_vfstats.gorc, 7904 adapter->vfinfo[i].vfstats.gorc); 7905 UPDATE_VF_COUNTER_36bit(IXGBE_PVFGOTC_LSB(i), 7906 IXGBE_PVFGOTC_MSB(i), 7907 adapter->vfinfo[i].last_vfstats.gotc, 7908 adapter->vfinfo[i].vfstats.gotc); 7909 UPDATE_VF_COUNTER_32bit(IXGBE_PVFMPRC(i), 7910 adapter->vfinfo[i].last_vfstats.mprc, 7911 adapter->vfinfo[i].vfstats.mprc); 7912 } 7913 } 7914 } 7915 7916 /** 7917 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table 7918 * @adapter: pointer to the device adapter structure 7919 **/ 7920 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter) 7921 { 7922 struct ixgbe_hw *hw = &adapter->hw; 7923 int i; 7924 7925 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT)) 7926 return; 7927 7928 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT; 7929 7930 /* if interface is down do nothing */ 7931 if (test_bit(__IXGBE_DOWN, &adapter->state)) 7932 return; 7933 7934 /* do nothing if we are not using signature filters */ 7935 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE)) 7936 return; 7937 7938 adapter->fdir_overflow++; 7939 7940 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) { 7941 for (i = 0; i < adapter->num_tx_queues; i++) 7942 set_bit(__IXGBE_TX_FDIR_INIT_DONE, 7943 &(adapter->tx_ring[i]->state)); 7944 for (i = 0; i < adapter->num_xdp_queues; i++) 7945 set_bit(__IXGBE_TX_FDIR_INIT_DONE, 7946 &adapter->xdp_ring[i]->state); 7947 /* re-enable flow director interrupts */ 7948 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); 7949 } else { 7950 e_err(probe, "failed to finish FDIR re-initialization, " 7951 "ignored adding FDIR ATR filters\n"); 7952 } 7953 } 7954 7955 /** 7956 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts 7957 * @adapter: pointer to the device adapter structure 7958 * 7959 * This function serves two purposes. First it strobes the interrupt lines 7960 * in order to make certain interrupts are occurring. Secondly it sets the 7961 * bits needed to check for TX hangs. As a result we should immediately 7962 * determine if a hang has occurred. 7963 */ 7964 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter) 7965 { 7966 struct ixgbe_hw *hw = &adapter->hw; 7967 u64 eics = 0; 7968 int i; 7969 7970 /* If we're down, removing or resetting, just bail */ 7971 if (test_bit(__IXGBE_DOWN, &adapter->state) || 7972 test_bit(__IXGBE_REMOVING, &adapter->state) || 7973 test_bit(__IXGBE_RESETTING, &adapter->state)) 7974 return; 7975 7976 /* Force detection of hung controller */ 7977 if (netif_carrier_ok(adapter->netdev)) { 7978 for (i = 0; i < adapter->num_tx_queues; i++) 7979 set_check_for_tx_hang(adapter->tx_ring[i]); 7980 for (i = 0; i < adapter->num_xdp_queues; i++) 7981 set_check_for_tx_hang(adapter->xdp_ring[i]); 7982 } 7983 7984 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { 7985 /* 7986 * for legacy and MSI interrupts don't set any bits 7987 * that are enabled for EIAM, because this operation 7988 * would set *both* EIMS and EICS for any bit in EIAM 7989 */ 7990 IXGBE_WRITE_REG(hw, IXGBE_EICS, 7991 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER)); 7992 } else { 7993 /* get one bit for every active tx/rx interrupt vector */ 7994 for (i = 0; i < adapter->num_q_vectors; i++) { 7995 struct ixgbe_q_vector *qv = adapter->q_vector[i]; 7996 if (qv->rx.ring || qv->tx.ring) 7997 eics |= BIT_ULL(i); 7998 } 7999 } 8000 8001 /* Cause software interrupt to ensure rings are cleaned */ 8002 ixgbe_irq_rearm_queues(adapter, eics); 8003 } 8004 8005 /** 8006 * ixgbe_watchdog_update_link - update the link status 8007 * @adapter: pointer to the device adapter structure 8008 **/ 8009 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter) 8010 { 8011 struct ixgbe_hw *hw = &adapter->hw; 8012 u32 link_speed = adapter->link_speed; 8013 bool link_up = adapter->link_up; 8014 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable; 8015 8016 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)) 8017 return; 8018 8019 if (hw->mac.ops.check_link) { 8020 hw->mac.ops.check_link(hw, &link_speed, &link_up, false); 8021 } else { 8022 /* always assume link is up, if no check link function */ 8023 link_speed = IXGBE_LINK_SPEED_10GB_FULL; 8024 link_up = true; 8025 } 8026 8027 if (adapter->ixgbe_ieee_pfc) 8028 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en); 8029 8030 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) { 8031 hw->mac.ops.fc_enable(hw); 8032 ixgbe_set_rx_drop_en(adapter); 8033 } 8034 8035 if (link_up || 8036 time_after(jiffies, (adapter->link_check_timeout + 8037 IXGBE_TRY_LINK_TIMEOUT))) { 8038 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE; 8039 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC); 8040 IXGBE_WRITE_FLUSH(hw); 8041 } 8042 8043 adapter->link_up = link_up; 8044 adapter->link_speed = link_speed; 8045 } 8046 8047 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter) 8048 { 8049 #ifdef CONFIG_IXGBE_DCB 8050 struct net_device *netdev = adapter->netdev; 8051 struct dcb_app app = { 8052 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE, 8053 .protocol = 0, 8054 }; 8055 u8 up = 0; 8056 8057 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) 8058 up = dcb_ieee_getapp_mask(netdev, &app); 8059 8060 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0; 8061 #endif 8062 } 8063 8064 /** 8065 * ixgbe_watchdog_link_is_up - update netif_carrier status and 8066 * print link up message 8067 * @adapter: pointer to the device adapter structure 8068 **/ 8069 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter) 8070 { 8071 struct net_device *netdev = adapter->netdev; 8072 struct ixgbe_hw *hw = &adapter->hw; 8073 u32 link_speed = adapter->link_speed; 8074 const char *speed_str; 8075 bool flow_rx, flow_tx; 8076 8077 /* only continue if link was previously down */ 8078 if (netif_carrier_ok(netdev)) 8079 return; 8080 8081 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP; 8082 8083 switch (hw->mac.type) { 8084 case ixgbe_mac_82598EB: { 8085 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 8086 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS); 8087 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE); 8088 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X); 8089 } 8090 break; 8091 case ixgbe_mac_X540: 8092 case ixgbe_mac_X550: 8093 case ixgbe_mac_X550EM_x: 8094 case ixgbe_mac_x550em_a: 8095 case ixgbe_mac_e610: 8096 case ixgbe_mac_82599EB: { 8097 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN); 8098 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG); 8099 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE); 8100 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X); 8101 } 8102 break; 8103 default: 8104 flow_tx = false; 8105 flow_rx = false; 8106 break; 8107 } 8108 8109 adapter->last_rx_ptp_check = jiffies; 8110 8111 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) 8112 ixgbe_ptp_start_cyclecounter(adapter); 8113 8114 switch (link_speed) { 8115 case IXGBE_LINK_SPEED_10GB_FULL: 8116 speed_str = "10 Gbps"; 8117 break; 8118 case IXGBE_LINK_SPEED_5GB_FULL: 8119 speed_str = "5 Gbps"; 8120 break; 8121 case IXGBE_LINK_SPEED_2_5GB_FULL: 8122 speed_str = "2.5 Gbps"; 8123 break; 8124 case IXGBE_LINK_SPEED_1GB_FULL: 8125 speed_str = "1 Gbps"; 8126 break; 8127 case IXGBE_LINK_SPEED_100_FULL: 8128 speed_str = "100 Mbps"; 8129 break; 8130 case IXGBE_LINK_SPEED_10_FULL: 8131 speed_str = "10 Mbps"; 8132 break; 8133 default: 8134 speed_str = "unknown speed"; 8135 break; 8136 } 8137 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str, 8138 ((flow_rx && flow_tx) ? "RX/TX" : 8139 (flow_rx ? "RX" : 8140 (flow_tx ? "TX" : "None")))); 8141 8142 netif_carrier_on(netdev); 8143 ixgbe_check_vf_rate_limit(adapter); 8144 8145 if (adapter->num_vfs && hw->mac.ops.enable_mdd) 8146 hw->mac.ops.enable_mdd(hw); 8147 8148 /* enable transmits */ 8149 netif_tx_wake_all_queues(adapter->netdev); 8150 8151 /* update the default user priority for VFs */ 8152 ixgbe_update_default_up(adapter); 8153 8154 /* ping all the active vfs to let them know link has changed */ 8155 ixgbe_ping_all_vfs(adapter); 8156 } 8157 8158 /** 8159 * ixgbe_watchdog_link_is_down - update netif_carrier status and 8160 * print link down message 8161 * @adapter: pointer to the adapter structure 8162 **/ 8163 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter) 8164 { 8165 struct net_device *netdev = adapter->netdev; 8166 struct ixgbe_hw *hw = &adapter->hw; 8167 8168 adapter->link_up = false; 8169 adapter->link_speed = 0; 8170 8171 /* only continue if link was up previously */ 8172 if (!netif_carrier_ok(netdev)) 8173 return; 8174 8175 adapter->link_down_events++; 8176 8177 /* poll for SFP+ cable when link is down */ 8178 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB) 8179 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP; 8180 8181 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) 8182 ixgbe_ptp_start_cyclecounter(adapter); 8183 8184 e_info(drv, "NIC Link is Down\n"); 8185 netif_carrier_off(netdev); 8186 8187 /* ping all the active vfs to let them know link has changed */ 8188 ixgbe_ping_all_vfs(adapter); 8189 } 8190 8191 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter) 8192 { 8193 int i; 8194 8195 for (i = 0; i < adapter->num_tx_queues; i++) { 8196 struct ixgbe_ring *tx_ring = adapter->tx_ring[i]; 8197 8198 if (tx_ring->next_to_use != tx_ring->next_to_clean) 8199 return true; 8200 } 8201 8202 for (i = 0; i < adapter->num_xdp_queues; i++) { 8203 struct ixgbe_ring *ring = adapter->xdp_ring[i]; 8204 8205 if (ring->next_to_use != ring->next_to_clean) 8206 return true; 8207 } 8208 8209 return false; 8210 } 8211 8212 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter) 8213 { 8214 struct ixgbe_hw *hw = &adapter->hw; 8215 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; 8216 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask); 8217 8218 int i, j; 8219 8220 if (!adapter->num_vfs) 8221 return false; 8222 8223 /* resetting the PF is only needed for MAC before X550 */ 8224 if (hw->mac.type >= ixgbe_mac_X550) 8225 return false; 8226 8227 for (i = 0; i < adapter->num_vfs; i++) { 8228 for (j = 0; j < q_per_pool; j++) { 8229 u32 h, t; 8230 8231 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j)); 8232 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j)); 8233 8234 if (h != t) 8235 return true; 8236 } 8237 } 8238 8239 return false; 8240 } 8241 8242 /** 8243 * ixgbe_watchdog_flush_tx - flush queues on link down 8244 * @adapter: pointer to the device adapter structure 8245 **/ 8246 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter) 8247 { 8248 if (!netif_carrier_ok(adapter->netdev)) { 8249 if (ixgbe_ring_tx_pending(adapter) || 8250 ixgbe_vf_tx_pending(adapter)) { 8251 /* We've lost link, so the controller stops DMA, 8252 * but we've got queued Tx work that's never going 8253 * to get done, so reset controller to flush Tx. 8254 * (Do the reset outside of interrupt context). 8255 */ 8256 e_warn(drv, "initiating reset to clear Tx work after link loss\n"); 8257 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state); 8258 } 8259 } 8260 } 8261 8262 #ifdef CONFIG_PCI_IOV 8263 static void ixgbe_bad_vf_abort(struct ixgbe_adapter *adapter, u32 vf) 8264 { 8265 struct ixgbe_hw *hw = &adapter->hw; 8266 8267 if (adapter->hw.mac.type == ixgbe_mac_82599EB && 8268 adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF) { 8269 adapter->vfinfo[vf].primary_abort_count++; 8270 if (adapter->vfinfo[vf].primary_abort_count == 8271 IXGBE_PRIMARY_ABORT_LIMIT) { 8272 ixgbe_set_vf_link_state(adapter, vf, 8273 IFLA_VF_LINK_STATE_DISABLE); 8274 adapter->vfinfo[vf].primary_abort_count = 0; 8275 8276 e_info(drv, 8277 "Malicious Driver Detection event detected on PF %d VF %d MAC: %pM mdd-disable-vf=on", 8278 hw->bus.func, vf, 8279 adapter->vfinfo[vf].vf_mac_addresses); 8280 } 8281 } 8282 } 8283 8284 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter) 8285 { 8286 struct ixgbe_hw *hw = &adapter->hw; 8287 struct pci_dev *pdev = adapter->pdev; 8288 unsigned int vf; 8289 u32 gpc; 8290 8291 if (!(netif_carrier_ok(adapter->netdev))) 8292 return; 8293 8294 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC); 8295 if (gpc) /* If incrementing then no need for the check below */ 8296 return; 8297 /* Check to see if a bad DMA write target from an errant or 8298 * malicious VF has caused a PCIe error. If so then we can 8299 * issue a VFLR to the offending VF(s) and then resume without 8300 * requesting a full slot reset. 8301 */ 8302 8303 if (!pdev) 8304 return; 8305 8306 /* check status reg for all VFs owned by this PF */ 8307 for (vf = 0; vf < adapter->num_vfs; ++vf) { 8308 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev; 8309 u16 status_reg; 8310 8311 if (!vfdev) 8312 continue; 8313 pci_read_config_word(vfdev, PCI_STATUS, &status_reg); 8314 if (status_reg != IXGBE_FAILED_READ_CFG_WORD && 8315 status_reg & PCI_STATUS_REC_MASTER_ABORT) { 8316 ixgbe_bad_vf_abort(adapter, vf); 8317 pcie_flr(vfdev); 8318 } 8319 } 8320 } 8321 8322 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter) 8323 { 8324 u32 ssvpc; 8325 8326 /* Do not perform spoof check for 82598 or if not in IOV mode */ 8327 if (adapter->hw.mac.type == ixgbe_mac_82598EB || 8328 adapter->num_vfs == 0) 8329 return; 8330 8331 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC); 8332 8333 /* 8334 * ssvpc register is cleared on read, if zero then no 8335 * spoofed packets in the last interval. 8336 */ 8337 if (!ssvpc) 8338 return; 8339 8340 e_warn(drv, "%u Spoofed packets detected\n", ssvpc); 8341 } 8342 #else 8343 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter) 8344 { 8345 } 8346 8347 static void 8348 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter) 8349 { 8350 } 8351 #endif /* CONFIG_PCI_IOV */ 8352 8353 8354 /** 8355 * ixgbe_watchdog_subtask - check and bring link up 8356 * @adapter: pointer to the device adapter structure 8357 **/ 8358 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter) 8359 { 8360 /* if interface is down, removing or resetting, do nothing */ 8361 if (test_bit(__IXGBE_DOWN, &adapter->state) || 8362 test_bit(__IXGBE_REMOVING, &adapter->state) || 8363 test_bit(__IXGBE_RESETTING, &adapter->state)) 8364 return; 8365 8366 ixgbe_watchdog_update_link(adapter); 8367 8368 if (adapter->link_up) 8369 ixgbe_watchdog_link_is_up(adapter); 8370 else 8371 ixgbe_watchdog_link_is_down(adapter); 8372 8373 ixgbe_check_for_bad_vf(adapter); 8374 ixgbe_spoof_check(adapter); 8375 ixgbe_update_stats(adapter); 8376 8377 ixgbe_watchdog_flush_tx(adapter); 8378 } 8379 8380 /** 8381 * ixgbe_sfp_detection_subtask - poll for SFP+ cable 8382 * @adapter: the ixgbe adapter structure 8383 **/ 8384 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter) 8385 { 8386 struct ixgbe_hw *hw = &adapter->hw; 8387 int err; 8388 8389 /* not searching for SFP so there is nothing to do here */ 8390 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) && 8391 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET)) 8392 return; 8393 8394 if (adapter->sfp_poll_time && 8395 time_after(adapter->sfp_poll_time, jiffies)) 8396 return; /* If not yet time to poll for SFP */ 8397 8398 /* someone else is in init, wait until next service event */ 8399 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 8400 return; 8401 8402 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1; 8403 8404 err = hw->phy.ops.identify_sfp(hw); 8405 if (err == -EOPNOTSUPP) 8406 goto sfp_out; 8407 8408 if (err == -ENOENT) { 8409 /* If no cable is present, then we need to reset 8410 * the next time we find a good cable. */ 8411 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET; 8412 } 8413 8414 /* exit on error */ 8415 if (err) 8416 goto sfp_out; 8417 8418 /* exit if reset not needed */ 8419 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET)) 8420 goto sfp_out; 8421 8422 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET; 8423 8424 /* 8425 * A module may be identified correctly, but the EEPROM may not have 8426 * support for that module. setup_sfp() will fail in that case, so 8427 * we should not allow that module to load. 8428 */ 8429 if (hw->mac.type == ixgbe_mac_82598EB) 8430 err = hw->phy.ops.reset(hw); 8431 else 8432 err = hw->mac.ops.setup_sfp(hw); 8433 8434 if (err == -EOPNOTSUPP) 8435 goto sfp_out; 8436 8437 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG; 8438 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type); 8439 8440 sfp_out: 8441 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 8442 8443 if (err == -EOPNOTSUPP && 8444 adapter->netdev->reg_state == NETREG_REGISTERED) { 8445 e_dev_err("failed to initialize because an unsupported " 8446 "SFP+ module type was detected.\n"); 8447 e_dev_err("Reload the driver after installing a " 8448 "supported module.\n"); 8449 unregister_netdev(adapter->netdev); 8450 } 8451 } 8452 8453 /** 8454 * ixgbe_sfp_link_config_subtask - set up link SFP after module install 8455 * @adapter: the ixgbe adapter structure 8456 **/ 8457 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter) 8458 { 8459 struct ixgbe_hw *hw = &adapter->hw; 8460 u32 cap_speed; 8461 u32 speed; 8462 bool autoneg = false; 8463 8464 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG)) 8465 return; 8466 8467 /* someone else is in init, wait until next service event */ 8468 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 8469 return; 8470 8471 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG; 8472 8473 hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg); 8474 8475 /* advertise highest capable link speed */ 8476 if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL)) 8477 speed = IXGBE_LINK_SPEED_10GB_FULL; 8478 else 8479 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL | 8480 IXGBE_LINK_SPEED_1GB_FULL); 8481 8482 if (hw->mac.ops.setup_link) 8483 hw->mac.ops.setup_link(hw, speed, true); 8484 8485 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; 8486 adapter->link_check_timeout = jiffies; 8487 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 8488 } 8489 8490 /** 8491 * ixgbe_service_timer - Timer Call-back 8492 * @t: pointer to timer_list structure 8493 **/ 8494 static void ixgbe_service_timer(struct timer_list *t) 8495 { 8496 struct ixgbe_adapter *adapter = timer_container_of(adapter, t, 8497 service_timer); 8498 unsigned long next_event_offset; 8499 8500 /* poll faster when waiting for link */ 8501 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) 8502 next_event_offset = HZ / 10; 8503 else 8504 next_event_offset = HZ * 2; 8505 8506 /* Reset the timer */ 8507 mod_timer(&adapter->service_timer, next_event_offset + jiffies); 8508 8509 ixgbe_service_event_schedule(adapter); 8510 } 8511 8512 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter) 8513 { 8514 struct ixgbe_hw *hw = &adapter->hw; 8515 bool overtemp; 8516 8517 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT)) 8518 return; 8519 8520 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT; 8521 8522 if (!hw->phy.ops.handle_lasi) 8523 return; 8524 8525 hw->phy.ops.handle_lasi(&adapter->hw, &overtemp); 8526 if (overtemp) 8527 e_crit(drv, "%s\n", ixgbe_overheat_msg); 8528 } 8529 8530 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter) 8531 { 8532 if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state)) 8533 return; 8534 8535 rtnl_lock(); 8536 /* If we're already down, removing or resetting, just bail */ 8537 if (test_bit(__IXGBE_DOWN, &adapter->state) || 8538 test_bit(__IXGBE_REMOVING, &adapter->state) || 8539 test_bit(__IXGBE_RESETTING, &adapter->state)) { 8540 rtnl_unlock(); 8541 return; 8542 } 8543 8544 ixgbe_dump(adapter); 8545 netdev_err(adapter->netdev, "Reset adapter\n"); 8546 adapter->tx_timeout_count++; 8547 8548 ixgbe_reinit_locked(adapter); 8549 rtnl_unlock(); 8550 } 8551 8552 static int ixgbe_check_fw_api_mismatch(struct ixgbe_adapter *adapter) 8553 { 8554 struct ixgbe_hw *hw = &adapter->hw; 8555 8556 if (hw->mac.type != ixgbe_mac_e610) 8557 return 0; 8558 8559 if (hw->mac.ops.get_fw_ver && hw->mac.ops.get_fw_ver(hw)) 8560 return 0; 8561 8562 if (hw->api_maj_ver > IXGBE_FW_API_VER_MAJOR) { 8563 e_dev_err("The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); 8564 8565 adapter->flags2 |= IXGBE_FLAG2_API_MISMATCH; 8566 return -EOPNOTSUPP; 8567 } else if (hw->api_maj_ver == IXGBE_FW_API_VER_MAJOR && 8568 hw->api_min_ver > IXGBE_FW_API_VER_MINOR + IXGBE_FW_API_VER_DIFF_ALLOWED) { 8569 e_dev_info("The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); 8570 adapter->flags2 |= IXGBE_FLAG2_API_MISMATCH; 8571 } else if (hw->api_maj_ver < IXGBE_FW_API_VER_MAJOR || 8572 hw->api_min_ver < IXGBE_FW_API_VER_MINOR - IXGBE_FW_API_VER_DIFF_ALLOWED) { 8573 e_dev_info("The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); 8574 adapter->flags2 |= IXGBE_FLAG2_API_MISMATCH; 8575 } 8576 8577 return 0; 8578 } 8579 8580 /** 8581 * ixgbe_check_fw_error - Check firmware for errors 8582 * @adapter: the adapter private structure 8583 * 8584 * Check firmware errors in register FWSM 8585 */ 8586 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter) 8587 { 8588 struct ixgbe_hw *hw = &adapter->hw; 8589 u32 fwsm; 8590 int err; 8591 8592 /* read fwsm.ext_err_ind register and log errors */ 8593 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw)); 8594 8595 /* skip if E610's FW is reloading, warning in that case may be misleading */ 8596 if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK || 8597 (!(fwsm & IXGBE_FWSM_FW_VAL_BIT) && !(hw->mac.type == ixgbe_mac_e610))) 8598 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n", 8599 fwsm); 8600 8601 if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) { 8602 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n"); 8603 return true; 8604 } 8605 if (!(adapter->flags2 & IXGBE_FLAG2_API_MISMATCH)) { 8606 err = ixgbe_check_fw_api_mismatch(adapter); 8607 if (err) 8608 return true; 8609 } 8610 8611 /* return here if FW rollback mode has been already detected */ 8612 if (adapter->flags2 & IXGBE_FLAG2_FW_ROLLBACK) 8613 return false; 8614 8615 if (hw->mac.ops.fw_rollback_mode && hw->mac.ops.fw_rollback_mode(hw)) { 8616 struct ixgbe_nvm_info *nvm_info = &adapter->hw.flash.nvm; 8617 char ver_buff[64] = ""; 8618 8619 if (hw->mac.ops.get_fw_ver && hw->mac.ops.get_fw_ver(hw)) 8620 goto no_version; 8621 8622 if (hw->mac.ops.get_nvm_ver && 8623 hw->mac.ops.get_nvm_ver(hw, nvm_info)) 8624 goto no_version; 8625 8626 snprintf(ver_buff, sizeof(ver_buff), 8627 "Current version is NVM:%x.%x.%x, FW:%d.%d. ", 8628 nvm_info->major, nvm_info->minor, nvm_info->eetrack, 8629 hw->fw_maj_ver, hw->fw_maj_ver); 8630 no_version: 8631 e_dev_warn("Firmware rollback mode detected. %sDevice may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode.", 8632 ver_buff); 8633 8634 adapter->flags2 |= IXGBE_FLAG2_FW_ROLLBACK; 8635 } 8636 8637 return false; 8638 } 8639 8640 static void ixgbe_recovery_service_task(struct work_struct *work) 8641 { 8642 struct ixgbe_adapter *adapter = container_of(work, 8643 struct ixgbe_adapter, 8644 service_task); 8645 8646 ixgbe_handle_fw_event(adapter); 8647 ixgbe_service_event_complete(adapter); 8648 8649 mod_timer(&adapter->service_timer, jiffies + msecs_to_jiffies(100)); 8650 } 8651 8652 /** 8653 * ixgbe_service_task - manages and runs subtasks 8654 * @work: pointer to work_struct containing our data 8655 **/ 8656 static void ixgbe_service_task(struct work_struct *work) 8657 { 8658 struct ixgbe_adapter *adapter = container_of(work, 8659 struct ixgbe_adapter, 8660 service_task); 8661 if (ixgbe_removed(adapter->hw.hw_addr)) { 8662 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 8663 rtnl_lock(); 8664 ixgbe_down(adapter); 8665 rtnl_unlock(); 8666 } 8667 ixgbe_service_event_complete(adapter); 8668 return; 8669 } 8670 if (ixgbe_check_fw_error(adapter)) { 8671 if (!test_bit(__IXGBE_DOWN, &adapter->state)) { 8672 if (adapter->mii_bus) { 8673 mdiobus_unregister(adapter->mii_bus); 8674 adapter->mii_bus = NULL; 8675 } 8676 unregister_netdev(adapter->netdev); 8677 } 8678 ixgbe_service_event_complete(adapter); 8679 return; 8680 } 8681 if (adapter->hw.mac.type == ixgbe_mac_e610) { 8682 if (adapter->flags2 & IXGBE_FLAG2_FW_ASYNC_EVENT) 8683 ixgbe_handle_fw_event(adapter); 8684 ixgbe_check_media_subtask(adapter); 8685 } 8686 ixgbe_reset_subtask(adapter); 8687 ixgbe_phy_interrupt_subtask(adapter); 8688 ixgbe_sfp_detection_subtask(adapter); 8689 ixgbe_sfp_link_config_subtask(adapter); 8690 ixgbe_check_overtemp_subtask(adapter); 8691 ixgbe_watchdog_subtask(adapter); 8692 ixgbe_fdir_reinit_subtask(adapter); 8693 ixgbe_check_hang_subtask(adapter); 8694 8695 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) { 8696 ixgbe_ptp_overflow_check(adapter); 8697 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER) 8698 ixgbe_ptp_rx_hang(adapter); 8699 ixgbe_ptp_tx_hang(adapter); 8700 } 8701 8702 ixgbe_service_event_complete(adapter); 8703 } 8704 8705 static int ixgbe_tso(struct ixgbe_ring *tx_ring, 8706 struct ixgbe_tx_buffer *first, 8707 u8 *hdr_len, 8708 struct ixgbe_ipsec_tx_data *itd) 8709 { 8710 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx; 8711 struct sk_buff *skb = first->skb; 8712 union { 8713 struct iphdr *v4; 8714 struct ipv6hdr *v6; 8715 unsigned char *hdr; 8716 } ip; 8717 union { 8718 struct tcphdr *tcp; 8719 struct udphdr *udp; 8720 unsigned char *hdr; 8721 } l4; 8722 u32 paylen, l4_offset; 8723 u32 fceof_saidx = 0; 8724 int err; 8725 8726 if (skb->ip_summed != CHECKSUM_PARTIAL) 8727 return 0; 8728 8729 if (!skb_is_gso(skb)) 8730 return 0; 8731 8732 err = skb_cow_head(skb, 0); 8733 if (err < 0) 8734 return err; 8735 8736 if (eth_p_mpls(first->protocol)) 8737 ip.hdr = skb_inner_network_header(skb); 8738 else 8739 ip.hdr = skb_network_header(skb); 8740 l4.hdr = skb_checksum_start(skb); 8741 8742 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ 8743 type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ? 8744 IXGBE_ADVTXD_TUCMD_L4T_UDP : IXGBE_ADVTXD_TUCMD_L4T_TCP; 8745 8746 /* initialize outer IP header fields */ 8747 if (ip.v4->version == 4) { 8748 unsigned char *csum_start = skb_checksum_start(skb); 8749 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4); 8750 int len = csum_start - trans_start; 8751 8752 /* IP header will have to cancel out any data that 8753 * is not a part of the outer IP header, so set to 8754 * a reverse csum if needed, else init check to 0. 8755 */ 8756 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ? 8757 csum_fold(csum_partial(trans_start, 8758 len, 0)) : 0; 8759 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4; 8760 8761 ip.v4->tot_len = 0; 8762 first->tx_flags |= IXGBE_TX_FLAGS_TSO | 8763 IXGBE_TX_FLAGS_CSUM | 8764 IXGBE_TX_FLAGS_IPV4; 8765 } else { 8766 ip.v6->payload_len = 0; 8767 first->tx_flags |= IXGBE_TX_FLAGS_TSO | 8768 IXGBE_TX_FLAGS_CSUM; 8769 } 8770 8771 /* determine offset of inner transport header */ 8772 l4_offset = l4.hdr - skb->data; 8773 8774 /* remove payload length from inner checksum */ 8775 paylen = skb->len - l4_offset; 8776 8777 if (type_tucmd & IXGBE_ADVTXD_TUCMD_L4T_TCP) { 8778 /* compute length of segmentation header */ 8779 *hdr_len = (l4.tcp->doff * 4) + l4_offset; 8780 csum_replace_by_diff(&l4.tcp->check, 8781 (__force __wsum)htonl(paylen)); 8782 } else { 8783 /* compute length of segmentation header */ 8784 *hdr_len = sizeof(*l4.udp) + l4_offset; 8785 csum_replace_by_diff(&l4.udp->check, 8786 (__force __wsum)htonl(paylen)); 8787 } 8788 8789 /* update gso size and bytecount with header size */ 8790 first->gso_segs = skb_shinfo(skb)->gso_segs; 8791 first->bytecount += (first->gso_segs - 1) * *hdr_len; 8792 8793 /* mss_l4len_id: use 0 as index for TSO */ 8794 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT; 8795 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT; 8796 8797 fceof_saidx |= itd->sa_idx; 8798 type_tucmd |= itd->flags | itd->trailer_len; 8799 8800 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */ 8801 vlan_macip_lens = l4.hdr - ip.hdr; 8802 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT; 8803 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; 8804 8805 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 8806 mss_l4len_idx); 8807 8808 return 1; 8809 } 8810 8811 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring, 8812 struct ixgbe_tx_buffer *first, 8813 struct ixgbe_ipsec_tx_data *itd) 8814 { 8815 struct sk_buff *skb = first->skb; 8816 u32 vlan_macip_lens = 0; 8817 u32 fceof_saidx = 0; 8818 u32 type_tucmd = 0; 8819 8820 if (skb->ip_summed != CHECKSUM_PARTIAL) { 8821 csum_failed: 8822 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | 8823 IXGBE_TX_FLAGS_CC))) 8824 return; 8825 goto no_csum; 8826 } 8827 8828 switch (skb->csum_offset) { 8829 case offsetof(struct tcphdr, check): 8830 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP; 8831 fallthrough; 8832 case offsetof(struct udphdr, check): 8833 break; 8834 case offsetof(struct sctphdr, checksum): 8835 /* validate that this is actually an SCTP request */ 8836 if (skb_csum_is_sctp(skb)) { 8837 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP; 8838 break; 8839 } 8840 fallthrough; 8841 default: 8842 skb_checksum_help(skb); 8843 goto csum_failed; 8844 } 8845 8846 /* update TX checksum flag */ 8847 first->tx_flags |= IXGBE_TX_FLAGS_CSUM; 8848 vlan_macip_lens = skb_checksum_start_offset(skb) - 8849 skb_network_offset(skb); 8850 no_csum: 8851 /* vlan_macip_lens: MACLEN, VLAN tag */ 8852 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT; 8853 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; 8854 8855 fceof_saidx |= itd->sa_idx; 8856 type_tucmd |= itd->flags | itd->trailer_len; 8857 8858 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0); 8859 } 8860 8861 #define IXGBE_SET_FLAG(_input, _flag, _result) \ 8862 ((_flag <= _result) ? \ 8863 ((u32)(_input & _flag) * (_result / _flag)) : \ 8864 ((u32)(_input & _flag) / (_flag / _result))) 8865 8866 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags) 8867 { 8868 /* set type for advanced descriptor with frame checksum insertion */ 8869 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA | 8870 IXGBE_ADVTXD_DCMD_DEXT | 8871 IXGBE_ADVTXD_DCMD_IFCS; 8872 8873 /* set HW vlan bit if vlan is present */ 8874 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN, 8875 IXGBE_ADVTXD_DCMD_VLE); 8876 8877 /* set segmentation enable bits for TSO/FSO */ 8878 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO, 8879 IXGBE_ADVTXD_DCMD_TSE); 8880 8881 /* set timestamp bit if present */ 8882 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP, 8883 IXGBE_ADVTXD_MAC_TSTAMP); 8884 8885 /* insert frame checksum */ 8886 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS); 8887 8888 return cmd_type; 8889 } 8890 8891 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc, 8892 u32 tx_flags, unsigned int paylen) 8893 { 8894 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT; 8895 8896 /* enable L4 checksum for TSO and TX checksum offload */ 8897 olinfo_status |= IXGBE_SET_FLAG(tx_flags, 8898 IXGBE_TX_FLAGS_CSUM, 8899 IXGBE_ADVTXD_POPTS_TXSM); 8900 8901 /* enable IPv4 checksum for TSO */ 8902 olinfo_status |= IXGBE_SET_FLAG(tx_flags, 8903 IXGBE_TX_FLAGS_IPV4, 8904 IXGBE_ADVTXD_POPTS_IXSM); 8905 8906 /* enable IPsec */ 8907 olinfo_status |= IXGBE_SET_FLAG(tx_flags, 8908 IXGBE_TX_FLAGS_IPSEC, 8909 IXGBE_ADVTXD_POPTS_IPSEC); 8910 8911 /* 8912 * Check Context must be set if Tx switch is enabled, which it 8913 * always is for case where virtual functions are running 8914 */ 8915 olinfo_status |= IXGBE_SET_FLAG(tx_flags, 8916 IXGBE_TX_FLAGS_CC, 8917 IXGBE_ADVTXD_CC); 8918 8919 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); 8920 } 8921 8922 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size) 8923 { 8924 if (!netif_subqueue_try_stop(tx_ring->netdev, tx_ring->queue_index, 8925 ixgbe_desc_unused(tx_ring), size)) 8926 return -EBUSY; 8927 8928 ++tx_ring->tx_stats.restart_queue; 8929 return 0; 8930 } 8931 8932 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size) 8933 { 8934 if (likely(ixgbe_desc_unused(tx_ring) >= size)) 8935 return 0; 8936 8937 return __ixgbe_maybe_stop_tx(tx_ring, size); 8938 } 8939 8940 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring, 8941 struct ixgbe_tx_buffer *first, 8942 const u8 hdr_len) 8943 { 8944 struct sk_buff *skb = first->skb; 8945 struct ixgbe_tx_buffer *tx_buffer; 8946 union ixgbe_adv_tx_desc *tx_desc; 8947 skb_frag_t *frag; 8948 dma_addr_t dma; 8949 unsigned int data_len, size; 8950 u32 tx_flags = first->tx_flags; 8951 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags); 8952 u16 i = tx_ring->next_to_use; 8953 8954 tx_desc = IXGBE_TX_DESC(tx_ring, i); 8955 8956 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len); 8957 8958 size = skb_headlen(skb); 8959 data_len = skb->data_len; 8960 8961 #ifdef IXGBE_FCOE 8962 if (tx_flags & IXGBE_TX_FLAGS_FCOE) { 8963 if (data_len < sizeof(struct fcoe_crc_eof)) { 8964 size -= sizeof(struct fcoe_crc_eof) - data_len; 8965 data_len = 0; 8966 } else { 8967 data_len -= sizeof(struct fcoe_crc_eof); 8968 } 8969 } 8970 8971 #endif 8972 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE); 8973 8974 tx_buffer = first; 8975 8976 for (frag = &skb_shinfo(skb)->frags[0];; frag++) { 8977 if (dma_mapping_error(tx_ring->dev, dma)) 8978 goto dma_error; 8979 8980 /* record length, and DMA address */ 8981 dma_unmap_len_set(tx_buffer, len, size); 8982 dma_unmap_addr_set(tx_buffer, dma, dma); 8983 8984 tx_desc->read.buffer_addr = cpu_to_le64(dma); 8985 8986 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) { 8987 tx_desc->read.cmd_type_len = 8988 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD); 8989 8990 i++; 8991 tx_desc++; 8992 if (i == tx_ring->count) { 8993 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 8994 i = 0; 8995 } 8996 tx_desc->read.olinfo_status = 0; 8997 8998 dma += IXGBE_MAX_DATA_PER_TXD; 8999 size -= IXGBE_MAX_DATA_PER_TXD; 9000 9001 tx_desc->read.buffer_addr = cpu_to_le64(dma); 9002 } 9003 9004 if (likely(!data_len)) 9005 break; 9006 9007 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size); 9008 9009 i++; 9010 tx_desc++; 9011 if (i == tx_ring->count) { 9012 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 9013 i = 0; 9014 } 9015 tx_desc->read.olinfo_status = 0; 9016 9017 #ifdef IXGBE_FCOE 9018 size = min_t(unsigned int, data_len, skb_frag_size(frag)); 9019 #else 9020 size = skb_frag_size(frag); 9021 #endif 9022 data_len -= size; 9023 9024 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size, 9025 DMA_TO_DEVICE); 9026 9027 tx_buffer = &tx_ring->tx_buffer_info[i]; 9028 } 9029 9030 /* write last descriptor with RS and EOP bits */ 9031 cmd_type |= size | IXGBE_TXD_CMD; 9032 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); 9033 9034 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount); 9035 9036 /* set the timestamp */ 9037 first->time_stamp = jiffies; 9038 9039 skb_tx_timestamp(skb); 9040 9041 /* 9042 * Force memory writes to complete before letting h/w know there 9043 * are new descriptors to fetch. (Only applicable for weak-ordered 9044 * memory model archs, such as IA-64). 9045 * 9046 * We also need this memory barrier to make certain all of the 9047 * status bits have been updated before next_to_watch is written. 9048 */ 9049 wmb(); 9050 9051 /* set next_to_watch value indicating a packet is present */ 9052 first->next_to_watch = tx_desc; 9053 9054 i++; 9055 if (i == tx_ring->count) 9056 i = 0; 9057 9058 tx_ring->next_to_use = i; 9059 9060 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED); 9061 9062 if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) { 9063 writel(i, tx_ring->tail); 9064 } 9065 9066 return 0; 9067 dma_error: 9068 dev_err(tx_ring->dev, "TX DMA map failed\n"); 9069 9070 /* clear dma mappings for failed tx_buffer_info map */ 9071 for (;;) { 9072 tx_buffer = &tx_ring->tx_buffer_info[i]; 9073 if (dma_unmap_len(tx_buffer, len)) 9074 dma_unmap_page(tx_ring->dev, 9075 dma_unmap_addr(tx_buffer, dma), 9076 dma_unmap_len(tx_buffer, len), 9077 DMA_TO_DEVICE); 9078 dma_unmap_len_set(tx_buffer, len, 0); 9079 if (tx_buffer == first) 9080 break; 9081 if (i == 0) 9082 i += tx_ring->count; 9083 i--; 9084 } 9085 9086 dev_kfree_skb_any(first->skb); 9087 first->skb = NULL; 9088 9089 tx_ring->next_to_use = i; 9090 9091 return -1; 9092 } 9093 9094 static void ixgbe_atr(struct ixgbe_ring *ring, 9095 struct ixgbe_tx_buffer *first) 9096 { 9097 struct ixgbe_q_vector *q_vector = ring->q_vector; 9098 union ixgbe_atr_hash_dword input = { .dword = 0 }; 9099 union ixgbe_atr_hash_dword common = { .dword = 0 }; 9100 union { 9101 unsigned char *network; 9102 struct iphdr *ipv4; 9103 struct ipv6hdr *ipv6; 9104 } hdr; 9105 struct tcphdr *th; 9106 unsigned int hlen; 9107 struct sk_buff *skb; 9108 __be16 vlan_id; 9109 int l4_proto; 9110 9111 /* if ring doesn't have a interrupt vector, cannot perform ATR */ 9112 if (!q_vector) 9113 return; 9114 9115 /* do nothing if sampling is disabled */ 9116 if (!ring->atr_sample_rate) 9117 return; 9118 9119 ring->atr_count++; 9120 9121 /* currently only IPv4/IPv6 with TCP is supported */ 9122 if ((first->protocol != htons(ETH_P_IP)) && 9123 (first->protocol != htons(ETH_P_IPV6))) 9124 return; 9125 9126 /* snag network header to get L4 type and address */ 9127 skb = first->skb; 9128 hdr.network = skb_network_header(skb); 9129 if (unlikely(hdr.network <= skb->data)) 9130 return; 9131 if (skb->encapsulation && 9132 first->protocol == htons(ETH_P_IP) && 9133 hdr.ipv4->protocol == IPPROTO_UDP) { 9134 struct ixgbe_adapter *adapter = q_vector->adapter; 9135 9136 if (unlikely(skb_tail_pointer(skb) < hdr.network + 9137 vxlan_headroom(0))) 9138 return; 9139 9140 /* verify the port is recognized as VXLAN */ 9141 if (adapter->vxlan_port && 9142 udp_hdr(skb)->dest == adapter->vxlan_port) 9143 hdr.network = skb_inner_network_header(skb); 9144 9145 if (adapter->geneve_port && 9146 udp_hdr(skb)->dest == adapter->geneve_port) 9147 hdr.network = skb_inner_network_header(skb); 9148 } 9149 9150 /* Make sure we have at least [minimum IPv4 header + TCP] 9151 * or [IPv6 header] bytes 9152 */ 9153 if (unlikely(skb_tail_pointer(skb) < hdr.network + 40)) 9154 return; 9155 9156 /* Currently only IPv4/IPv6 with TCP is supported */ 9157 switch (hdr.ipv4->version) { 9158 case IPVERSION: 9159 /* access ihl as u8 to avoid unaligned access on ia64 */ 9160 hlen = (hdr.network[0] & 0x0F) << 2; 9161 l4_proto = hdr.ipv4->protocol; 9162 break; 9163 case 6: 9164 hlen = hdr.network - skb->data; 9165 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL); 9166 hlen -= hdr.network - skb->data; 9167 break; 9168 default: 9169 return; 9170 } 9171 9172 if (l4_proto != IPPROTO_TCP) 9173 return; 9174 9175 if (unlikely(skb_tail_pointer(skb) < hdr.network + 9176 hlen + sizeof(struct tcphdr))) 9177 return; 9178 9179 th = (struct tcphdr *)(hdr.network + hlen); 9180 9181 /* skip this packet since the socket is closing */ 9182 if (th->fin) 9183 return; 9184 9185 /* sample on all syn packets or once every atr sample count */ 9186 if (!th->syn && (ring->atr_count < ring->atr_sample_rate)) 9187 return; 9188 9189 /* reset sample count */ 9190 ring->atr_count = 0; 9191 9192 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT); 9193 9194 /* 9195 * src and dst are inverted, think how the receiver sees them 9196 * 9197 * The input is broken into two sections, a non-compressed section 9198 * containing vm_pool, vlan_id, and flow_type. The rest of the data 9199 * is XORed together and stored in the compressed dword. 9200 */ 9201 input.formatted.vlan_id = vlan_id; 9202 9203 /* 9204 * since src port and flex bytes occupy the same word XOR them together 9205 * and write the value to source port portion of compressed dword 9206 */ 9207 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN)) 9208 common.port.src ^= th->dest ^ htons(ETH_P_8021Q); 9209 else 9210 common.port.src ^= th->dest ^ first->protocol; 9211 common.port.dst ^= th->source; 9212 9213 switch (hdr.ipv4->version) { 9214 case IPVERSION: 9215 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 9216 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr; 9217 break; 9218 case 6: 9219 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6; 9220 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^ 9221 hdr.ipv6->saddr.s6_addr32[1] ^ 9222 hdr.ipv6->saddr.s6_addr32[2] ^ 9223 hdr.ipv6->saddr.s6_addr32[3] ^ 9224 hdr.ipv6->daddr.s6_addr32[0] ^ 9225 hdr.ipv6->daddr.s6_addr32[1] ^ 9226 hdr.ipv6->daddr.s6_addr32[2] ^ 9227 hdr.ipv6->daddr.s6_addr32[3]; 9228 break; 9229 default: 9230 break; 9231 } 9232 9233 if (hdr.network != skb_network_header(skb)) 9234 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK; 9235 9236 /* This assumes the Rx queue and Tx queue are bound to the same CPU */ 9237 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw, 9238 input, common, ring->queue_index); 9239 } 9240 9241 #ifdef IXGBE_FCOE 9242 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb, 9243 struct net_device *sb_dev) 9244 { 9245 struct ixgbe_adapter *adapter; 9246 struct ixgbe_ring_feature *f; 9247 int txq; 9248 9249 if (sb_dev) { 9250 u8 tc = netdev_get_prio_tc_map(dev, skb->priority); 9251 struct net_device *vdev = sb_dev; 9252 9253 txq = vdev->tc_to_txq[tc].offset; 9254 txq += reciprocal_scale(skb_get_hash(skb), 9255 vdev->tc_to_txq[tc].count); 9256 9257 return txq; 9258 } 9259 9260 /* 9261 * only execute the code below if protocol is FCoE 9262 * or FIP and we have FCoE enabled on the adapter 9263 */ 9264 switch (vlan_get_protocol(skb)) { 9265 case htons(ETH_P_FCOE): 9266 case htons(ETH_P_FIP): 9267 adapter = ixgbe_from_netdev(dev); 9268 9269 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) 9270 break; 9271 fallthrough; 9272 default: 9273 return netdev_pick_tx(dev, skb, sb_dev); 9274 } 9275 9276 f = &adapter->ring_feature[RING_F_FCOE]; 9277 9278 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) : 9279 smp_processor_id(); 9280 9281 while (txq >= f->indices) 9282 txq -= f->indices; 9283 9284 return txq + f->offset; 9285 } 9286 9287 #endif 9288 int ixgbe_xmit_xdp_ring(struct ixgbe_ring *ring, 9289 struct xdp_frame *xdpf) 9290 { 9291 struct skb_shared_info *sinfo = xdp_get_shared_info_from_frame(xdpf); 9292 u8 nr_frags = unlikely(xdp_frame_has_frags(xdpf)) ? sinfo->nr_frags : 0; 9293 u16 i = 0, index = ring->next_to_use; 9294 struct ixgbe_tx_buffer *tx_head = &ring->tx_buffer_info[index]; 9295 struct ixgbe_tx_buffer *tx_buff = tx_head; 9296 union ixgbe_adv_tx_desc *tx_desc = IXGBE_TX_DESC(ring, index); 9297 u32 cmd_type, len = xdpf->len; 9298 void *data = xdpf->data; 9299 9300 if (unlikely(ixgbe_desc_unused(ring) < 1 + nr_frags)) 9301 return IXGBE_XDP_CONSUMED; 9302 9303 tx_head->bytecount = xdp_get_frame_len(xdpf); 9304 tx_head->gso_segs = 1; 9305 tx_head->xdpf = xdpf; 9306 9307 tx_desc->read.olinfo_status = 9308 cpu_to_le32(tx_head->bytecount << IXGBE_ADVTXD_PAYLEN_SHIFT); 9309 9310 for (;;) { 9311 dma_addr_t dma; 9312 9313 dma = dma_map_single(ring->dev, data, len, DMA_TO_DEVICE); 9314 if (dma_mapping_error(ring->dev, dma)) 9315 goto unmap; 9316 9317 dma_unmap_len_set(tx_buff, len, len); 9318 dma_unmap_addr_set(tx_buff, dma, dma); 9319 9320 cmd_type = IXGBE_ADVTXD_DTYP_DATA | IXGBE_ADVTXD_DCMD_DEXT | 9321 IXGBE_ADVTXD_DCMD_IFCS | len; 9322 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); 9323 tx_desc->read.buffer_addr = cpu_to_le64(dma); 9324 tx_buff->protocol = 0; 9325 9326 if (++index == ring->count) 9327 index = 0; 9328 9329 if (i == nr_frags) 9330 break; 9331 9332 tx_buff = &ring->tx_buffer_info[index]; 9333 tx_desc = IXGBE_TX_DESC(ring, index); 9334 tx_desc->read.olinfo_status = 0; 9335 9336 data = skb_frag_address(&sinfo->frags[i]); 9337 len = skb_frag_size(&sinfo->frags[i]); 9338 i++; 9339 } 9340 /* put descriptor type bits */ 9341 tx_desc->read.cmd_type_len |= cpu_to_le32(IXGBE_TXD_CMD); 9342 9343 /* Avoid any potential race with xdp_xmit and cleanup */ 9344 smp_wmb(); 9345 9346 tx_head->next_to_watch = tx_desc; 9347 ring->next_to_use = index; 9348 9349 return IXGBE_XDP_TX; 9350 9351 unmap: 9352 for (;;) { 9353 tx_buff = &ring->tx_buffer_info[index]; 9354 if (dma_unmap_len(tx_buff, len)) 9355 dma_unmap_page(ring->dev, dma_unmap_addr(tx_buff, dma), 9356 dma_unmap_len(tx_buff, len), 9357 DMA_TO_DEVICE); 9358 dma_unmap_len_set(tx_buff, len, 0); 9359 if (tx_buff == tx_head) 9360 break; 9361 9362 if (!index) 9363 index += ring->count; 9364 index--; 9365 } 9366 9367 return IXGBE_XDP_CONSUMED; 9368 } 9369 9370 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, 9371 struct ixgbe_adapter *adapter, 9372 struct ixgbe_ring *tx_ring) 9373 { 9374 struct ixgbe_tx_buffer *first; 9375 int tso; 9376 u32 tx_flags = 0; 9377 unsigned short f; 9378 u16 count = TXD_USE_COUNT(skb_headlen(skb)); 9379 struct ixgbe_ipsec_tx_data ipsec_tx = { 0 }; 9380 __be16 protocol = skb->protocol; 9381 u8 hdr_len = 0; 9382 9383 /* 9384 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD, 9385 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD, 9386 * + 2 desc gap to keep tail from touching head, 9387 * + 1 desc for context descriptor, 9388 * otherwise try next time 9389 */ 9390 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) 9391 count += TXD_USE_COUNT(skb_frag_size( 9392 &skb_shinfo(skb)->frags[f])); 9393 9394 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) { 9395 tx_ring->tx_stats.tx_busy++; 9396 return NETDEV_TX_BUSY; 9397 } 9398 9399 /* record the location of the first descriptor for this packet */ 9400 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use]; 9401 first->skb = skb; 9402 first->bytecount = skb->len; 9403 first->gso_segs = 1; 9404 9405 /* if we have a HW VLAN tag being added default to the HW one */ 9406 if (skb_vlan_tag_present(skb)) { 9407 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT; 9408 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN; 9409 /* else if it is a SW VLAN check the next protocol and store the tag */ 9410 } else if (protocol == htons(ETH_P_8021Q)) { 9411 struct vlan_hdr *vhdr, _vhdr; 9412 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr); 9413 if (!vhdr) 9414 goto out_drop; 9415 9416 tx_flags |= ntohs(vhdr->h_vlan_TCI) << 9417 IXGBE_TX_FLAGS_VLAN_SHIFT; 9418 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN; 9419 } 9420 protocol = vlan_get_protocol(skb); 9421 9422 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 9423 adapter->ptp_clock) { 9424 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON && 9425 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS, 9426 &adapter->state)) { 9427 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 9428 tx_flags |= IXGBE_TX_FLAGS_TSTAMP; 9429 9430 /* schedule check for Tx timestamp */ 9431 adapter->ptp_tx_skb = skb_get(skb); 9432 adapter->ptp_tx_start = jiffies; 9433 schedule_work(&adapter->ptp_tx_work); 9434 } else { 9435 adapter->tx_hwtstamp_skipped++; 9436 } 9437 } 9438 9439 #ifdef CONFIG_PCI_IOV 9440 /* 9441 * Use the l2switch_enable flag - would be false if the DMA 9442 * Tx switch had been disabled. 9443 */ 9444 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 9445 tx_flags |= IXGBE_TX_FLAGS_CC; 9446 9447 #endif 9448 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */ 9449 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && 9450 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) || 9451 (skb->priority != TC_PRIO_CONTROL))) { 9452 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK; 9453 tx_flags |= (skb->priority & 0x7) << 9454 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT; 9455 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) { 9456 struct vlan_ethhdr *vhdr; 9457 9458 if (skb_cow_head(skb, 0)) 9459 goto out_drop; 9460 vhdr = skb_vlan_eth_hdr(skb); 9461 vhdr->h_vlan_TCI = htons(tx_flags >> 9462 IXGBE_TX_FLAGS_VLAN_SHIFT); 9463 } else { 9464 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN; 9465 } 9466 } 9467 9468 /* record initial flags and protocol */ 9469 first->tx_flags = tx_flags; 9470 first->protocol = protocol; 9471 9472 #ifdef IXGBE_FCOE 9473 /* setup tx offload for FCoE */ 9474 if ((protocol == htons(ETH_P_FCOE)) && 9475 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) { 9476 tso = ixgbe_fso(tx_ring, first, &hdr_len); 9477 if (tso < 0) 9478 goto out_drop; 9479 9480 goto xmit_fcoe; 9481 } 9482 9483 #endif /* IXGBE_FCOE */ 9484 9485 #ifdef CONFIG_IXGBE_IPSEC 9486 if (xfrm_offload(skb) && 9487 !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx)) 9488 goto out_drop; 9489 #endif 9490 tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx); 9491 if (tso < 0) 9492 goto out_drop; 9493 else if (!tso) 9494 ixgbe_tx_csum(tx_ring, first, &ipsec_tx); 9495 9496 /* add the ATR filter if ATR is on */ 9497 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state)) 9498 ixgbe_atr(tx_ring, first); 9499 9500 #ifdef IXGBE_FCOE 9501 xmit_fcoe: 9502 #endif /* IXGBE_FCOE */ 9503 if (ixgbe_tx_map(tx_ring, first, hdr_len)) 9504 goto cleanup_tx_timestamp; 9505 9506 return NETDEV_TX_OK; 9507 9508 out_drop: 9509 dev_kfree_skb_any(first->skb); 9510 first->skb = NULL; 9511 cleanup_tx_timestamp: 9512 if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) { 9513 dev_kfree_skb_any(adapter->ptp_tx_skb); 9514 adapter->ptp_tx_skb = NULL; 9515 cancel_work_sync(&adapter->ptp_tx_work); 9516 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state); 9517 } 9518 9519 return NETDEV_TX_OK; 9520 } 9521 9522 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb, 9523 struct net_device *netdev, 9524 struct ixgbe_ring *ring) 9525 { 9526 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9527 struct ixgbe_ring *tx_ring; 9528 9529 /* 9530 * The minimum packet size for olinfo paylen is 17 so pad the skb 9531 * in order to meet this minimum size requirement. 9532 */ 9533 if (skb_put_padto(skb, 17)) 9534 return NETDEV_TX_OK; 9535 9536 tx_ring = ring ? ring : adapter->tx_ring[skb_get_queue_mapping(skb)]; 9537 if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state))) 9538 return NETDEV_TX_BUSY; 9539 9540 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring); 9541 } 9542 9543 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb, 9544 struct net_device *netdev) 9545 { 9546 return __ixgbe_xmit_frame(skb, netdev, NULL); 9547 } 9548 9549 /** 9550 * ixgbe_set_mac - Change the Ethernet Address of the NIC 9551 * @netdev: network interface device structure 9552 * @p: pointer to an address structure 9553 * 9554 * Returns 0 on success, negative on failure 9555 **/ 9556 static int ixgbe_set_mac(struct net_device *netdev, void *p) 9557 { 9558 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9559 struct ixgbe_hw *hw = &adapter->hw; 9560 struct sockaddr *addr = p; 9561 9562 if (!is_valid_ether_addr(addr->sa_data)) 9563 return -EADDRNOTAVAIL; 9564 9565 eth_hw_addr_set(netdev, addr->sa_data); 9566 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len); 9567 9568 ixgbe_mac_set_default_filter(adapter); 9569 9570 return 0; 9571 } 9572 9573 static int 9574 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr) 9575 { 9576 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9577 struct ixgbe_hw *hw = &adapter->hw; 9578 u16 value; 9579 int rc; 9580 9581 if (adapter->mii_bus) { 9582 int regnum = addr; 9583 9584 if (devad != MDIO_DEVAD_NONE) 9585 return mdiobus_c45_read(adapter->mii_bus, prtad, 9586 devad, regnum); 9587 9588 return mdiobus_read(adapter->mii_bus, prtad, regnum); 9589 } 9590 9591 if (prtad != hw->phy.mdio.prtad) 9592 return -EINVAL; 9593 rc = hw->phy.ops.read_reg(hw, addr, devad, &value); 9594 if (!rc) 9595 rc = value; 9596 return rc; 9597 } 9598 9599 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad, 9600 u16 addr, u16 value) 9601 { 9602 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9603 struct ixgbe_hw *hw = &adapter->hw; 9604 9605 if (adapter->mii_bus) { 9606 int regnum = addr; 9607 9608 if (devad != MDIO_DEVAD_NONE) 9609 return mdiobus_c45_write(adapter->mii_bus, prtad, devad, 9610 regnum, value); 9611 9612 return mdiobus_write(adapter->mii_bus, prtad, regnum, value); 9613 } 9614 9615 if (prtad != hw->phy.mdio.prtad) 9616 return -EINVAL; 9617 return hw->phy.ops.write_reg(hw, addr, devad, value); 9618 } 9619 9620 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd) 9621 { 9622 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9623 9624 switch (cmd) { 9625 case SIOCGMIIPHY: 9626 if (!adapter->hw.phy.ops.read_reg) 9627 return -EOPNOTSUPP; 9628 fallthrough; 9629 default: 9630 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd); 9631 } 9632 } 9633 9634 /** 9635 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding 9636 * netdev->dev_addrs 9637 * @dev: network interface device structure 9638 * 9639 * Returns non-zero on failure 9640 **/ 9641 static int ixgbe_add_sanmac_netdev(struct net_device *dev) 9642 { 9643 int err = 0; 9644 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 9645 struct ixgbe_hw *hw = &adapter->hw; 9646 9647 if (is_valid_ether_addr(hw->mac.san_addr)) { 9648 rtnl_lock(); 9649 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN); 9650 rtnl_unlock(); 9651 9652 /* update SAN MAC vmdq pool selection */ 9653 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0)); 9654 } 9655 return err; 9656 } 9657 9658 /** 9659 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding 9660 * netdev->dev_addrs 9661 * @dev: network interface device structure 9662 * 9663 * Returns non-zero on failure 9664 **/ 9665 static int ixgbe_del_sanmac_netdev(struct net_device *dev) 9666 { 9667 int err = 0; 9668 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 9669 struct ixgbe_mac_info *mac = &adapter->hw.mac; 9670 9671 if (is_valid_ether_addr(mac->san_addr)) { 9672 rtnl_lock(); 9673 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN); 9674 rtnl_unlock(); 9675 } 9676 return err; 9677 } 9678 9679 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats, 9680 struct ixgbe_ring *ring) 9681 { 9682 u64 bytes, packets; 9683 unsigned int start; 9684 9685 if (ring) { 9686 do { 9687 start = u64_stats_fetch_begin(&ring->syncp); 9688 packets = ring->stats.packets; 9689 bytes = ring->stats.bytes; 9690 } while (u64_stats_fetch_retry(&ring->syncp, start)); 9691 stats->tx_packets += packets; 9692 stats->tx_bytes += bytes; 9693 } 9694 } 9695 9696 static void ixgbe_get_stats64(struct net_device *netdev, 9697 struct rtnl_link_stats64 *stats) 9698 { 9699 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9700 int i; 9701 9702 rcu_read_lock(); 9703 for (i = 0; i < adapter->num_rx_queues; i++) { 9704 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]); 9705 u64 bytes, packets; 9706 unsigned int start; 9707 9708 if (ring) { 9709 do { 9710 start = u64_stats_fetch_begin(&ring->syncp); 9711 packets = ring->stats.packets; 9712 bytes = ring->stats.bytes; 9713 } while (u64_stats_fetch_retry(&ring->syncp, start)); 9714 stats->rx_packets += packets; 9715 stats->rx_bytes += bytes; 9716 } 9717 } 9718 9719 for (i = 0; i < adapter->num_tx_queues; i++) { 9720 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]); 9721 9722 ixgbe_get_ring_stats64(stats, ring); 9723 } 9724 for (i = 0; i < adapter->num_xdp_queues; i++) { 9725 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]); 9726 9727 ixgbe_get_ring_stats64(stats, ring); 9728 } 9729 rcu_read_unlock(); 9730 9731 /* following stats updated by ixgbe_watchdog_task() */ 9732 stats->multicast = netdev->stats.multicast; 9733 stats->rx_errors = netdev->stats.rx_errors; 9734 stats->rx_length_errors = netdev->stats.rx_length_errors; 9735 stats->rx_crc_errors = netdev->stats.rx_crc_errors; 9736 stats->rx_missed_errors = netdev->stats.rx_missed_errors; 9737 } 9738 9739 static int ixgbe_ndo_get_vf_stats(struct net_device *netdev, int vf, 9740 struct ifla_vf_stats *vf_stats) 9741 { 9742 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 9743 9744 if (vf < 0 || vf >= adapter->num_vfs) 9745 return -EINVAL; 9746 9747 vf_stats->rx_packets = adapter->vfinfo[vf].vfstats.gprc; 9748 vf_stats->rx_bytes = adapter->vfinfo[vf].vfstats.gorc; 9749 vf_stats->tx_packets = adapter->vfinfo[vf].vfstats.gptc; 9750 vf_stats->tx_bytes = adapter->vfinfo[vf].vfstats.gotc; 9751 vf_stats->multicast = adapter->vfinfo[vf].vfstats.mprc; 9752 9753 return 0; 9754 } 9755 9756 #ifdef CONFIG_IXGBE_DCB 9757 /** 9758 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid. 9759 * @adapter: pointer to ixgbe_adapter 9760 * @tc: number of traffic classes currently enabled 9761 * 9762 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm 9763 * 802.1Q priority maps to a packet buffer that exists. 9764 */ 9765 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc) 9766 { 9767 struct ixgbe_hw *hw = &adapter->hw; 9768 u32 reg, rsave; 9769 int i; 9770 9771 /* 82598 have a static priority to TC mapping that can not 9772 * be changed so no validation is needed. 9773 */ 9774 if (hw->mac.type == ixgbe_mac_82598EB) 9775 return; 9776 9777 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC); 9778 rsave = reg; 9779 9780 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { 9781 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT); 9782 9783 /* If up2tc is out of bounds default to zero */ 9784 if (up2tc > tc) 9785 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT); 9786 } 9787 9788 if (reg != rsave) 9789 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg); 9790 9791 return; 9792 } 9793 9794 /** 9795 * ixgbe_set_prio_tc_map - Configure netdev prio tc map 9796 * @adapter: Pointer to adapter struct 9797 * 9798 * Populate the netdev user priority to tc map 9799 */ 9800 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter) 9801 { 9802 struct net_device *dev = adapter->netdev; 9803 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg; 9804 struct ieee_ets *ets = adapter->ixgbe_ieee_ets; 9805 u8 prio; 9806 9807 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) { 9808 u8 tc = 0; 9809 9810 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) 9811 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio); 9812 else if (ets) 9813 tc = ets->prio_tc[prio]; 9814 9815 netdev_set_prio_tc_map(dev, prio, tc); 9816 } 9817 } 9818 9819 #endif /* CONFIG_IXGBE_DCB */ 9820 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, 9821 struct netdev_nested_priv *priv) 9822 { 9823 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)priv->data; 9824 struct ixgbe_fwd_adapter *accel; 9825 int pool; 9826 9827 /* we only care about macvlans... */ 9828 if (!netif_is_macvlan(vdev)) 9829 return 0; 9830 9831 /* that have hardware offload enabled... */ 9832 accel = macvlan_accel_priv(vdev); 9833 if (!accel) 9834 return 0; 9835 9836 /* If we can relocate to a different bit do so */ 9837 pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools); 9838 if (pool < adapter->num_rx_pools) { 9839 set_bit(pool, adapter->fwd_bitmask); 9840 accel->pool = pool; 9841 return 0; 9842 } 9843 9844 /* if we cannot find a free pool then disable the offload */ 9845 netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n"); 9846 macvlan_release_l2fw_offload(vdev); 9847 9848 /* unbind the queues and drop the subordinate channel config */ 9849 netdev_unbind_sb_channel(adapter->netdev, vdev); 9850 netdev_set_sb_channel(vdev, 0); 9851 9852 kfree(accel); 9853 9854 return 0; 9855 } 9856 9857 static void ixgbe_defrag_macvlan_pools(struct net_device *dev) 9858 { 9859 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 9860 struct netdev_nested_priv priv = { 9861 .data = (void *)adapter, 9862 }; 9863 9864 /* flush any stale bits out of the fwd bitmask */ 9865 bitmap_clear(adapter->fwd_bitmask, 1, 63); 9866 9867 /* walk through upper devices reassigning pools */ 9868 netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool, 9869 &priv); 9870 } 9871 9872 /** 9873 * ixgbe_setup_tc - configure net_device for multiple traffic classes 9874 * 9875 * @dev: net device to configure 9876 * @tc: number of traffic classes to enable 9877 */ 9878 int ixgbe_setup_tc(struct net_device *dev, u8 tc) 9879 { 9880 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 9881 struct ixgbe_hw *hw = &adapter->hw; 9882 9883 /* Hardware supports up to 8 traffic classes */ 9884 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs) 9885 return -EINVAL; 9886 9887 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS) 9888 return -EINVAL; 9889 9890 /* Hardware has to reinitialize queues and interrupts to 9891 * match packet buffer alignment. Unfortunately, the 9892 * hardware is not flexible enough to do this dynamically. 9893 */ 9894 if (netif_running(dev)) 9895 ixgbe_close(dev); 9896 else 9897 ixgbe_reset(adapter); 9898 9899 ixgbe_clear_interrupt_scheme(adapter); 9900 9901 #ifdef CONFIG_IXGBE_DCB 9902 if (tc) { 9903 if (adapter->xdp_prog) { 9904 e_warn(probe, "DCB is not supported with XDP\n"); 9905 9906 ixgbe_init_interrupt_scheme(adapter); 9907 if (netif_running(dev)) 9908 ixgbe_open(dev); 9909 return -EINVAL; 9910 } 9911 9912 netdev_set_num_tc(dev, tc); 9913 ixgbe_set_prio_tc_map(adapter); 9914 9915 adapter->hw_tcs = tc; 9916 adapter->flags |= IXGBE_FLAG_DCB_ENABLED; 9917 9918 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 9919 adapter->last_lfc_mode = adapter->hw.fc.requested_mode; 9920 adapter->hw.fc.requested_mode = ixgbe_fc_none; 9921 } 9922 } else { 9923 netdev_reset_tc(dev); 9924 9925 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 9926 adapter->hw.fc.requested_mode = adapter->last_lfc_mode; 9927 9928 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 9929 adapter->hw_tcs = tc; 9930 9931 adapter->temp_dcb_cfg.pfc_mode_enable = false; 9932 adapter->dcb_cfg.pfc_mode_enable = false; 9933 } 9934 9935 ixgbe_validate_rtr(adapter, tc); 9936 9937 #endif /* CONFIG_IXGBE_DCB */ 9938 ixgbe_init_interrupt_scheme(adapter); 9939 9940 ixgbe_defrag_macvlan_pools(dev); 9941 9942 if (netif_running(dev)) 9943 return ixgbe_open(dev); 9944 9945 return 0; 9946 } 9947 9948 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter, 9949 struct tc_cls_u32_offload *cls) 9950 { 9951 u32 hdl = cls->knode.handle; 9952 u32 uhtid = TC_U32_USERHTID(cls->knode.handle); 9953 u32 loc = cls->knode.handle & 0xfffff; 9954 int err = 0, i, j; 9955 struct ixgbe_jump_table *jump = NULL; 9956 9957 if (loc > IXGBE_MAX_HW_ENTRIES) 9958 return -EINVAL; 9959 9960 if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE)) 9961 return -EINVAL; 9962 9963 /* Clear this filter in the link data it is associated with */ 9964 if (uhtid != 0x800) { 9965 jump = adapter->jump_tables[uhtid]; 9966 if (!jump) 9967 return -EINVAL; 9968 if (!test_bit(loc - 1, jump->child_loc_map)) 9969 return -EINVAL; 9970 clear_bit(loc - 1, jump->child_loc_map); 9971 } 9972 9973 /* Check if the filter being deleted is a link */ 9974 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) { 9975 jump = adapter->jump_tables[i]; 9976 if (jump && jump->link_hdl == hdl) { 9977 /* Delete filters in the hardware in the child hash 9978 * table associated with this link 9979 */ 9980 for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) { 9981 if (!test_bit(j, jump->child_loc_map)) 9982 continue; 9983 spin_lock(&adapter->fdir_perfect_lock); 9984 err = ixgbe_update_ethtool_fdir_entry(adapter, 9985 NULL, 9986 j + 1); 9987 spin_unlock(&adapter->fdir_perfect_lock); 9988 clear_bit(j, jump->child_loc_map); 9989 } 9990 /* Remove resources for this link */ 9991 kfree(jump->input); 9992 kfree(jump->mask); 9993 kfree(jump); 9994 adapter->jump_tables[i] = NULL; 9995 return err; 9996 } 9997 } 9998 9999 spin_lock(&adapter->fdir_perfect_lock); 10000 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc); 10001 spin_unlock(&adapter->fdir_perfect_lock); 10002 return err; 10003 } 10004 10005 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter, 10006 struct tc_cls_u32_offload *cls) 10007 { 10008 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle); 10009 10010 if (uhtid >= IXGBE_MAX_LINK_HANDLE) 10011 return -EINVAL; 10012 10013 /* This ixgbe devices do not support hash tables at the moment 10014 * so abort when given hash tables. 10015 */ 10016 if (cls->hnode.divisor > 0) 10017 return -EINVAL; 10018 10019 set_bit(uhtid - 1, &adapter->tables); 10020 return 0; 10021 } 10022 10023 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter, 10024 struct tc_cls_u32_offload *cls) 10025 { 10026 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle); 10027 10028 if (uhtid >= IXGBE_MAX_LINK_HANDLE) 10029 return -EINVAL; 10030 10031 clear_bit(uhtid - 1, &adapter->tables); 10032 return 0; 10033 } 10034 10035 #ifdef CONFIG_NET_CLS_ACT 10036 struct upper_walk_data { 10037 struct ixgbe_adapter *adapter; 10038 u64 action; 10039 int ifindex; 10040 u8 queue; 10041 }; 10042 10043 static int get_macvlan_queue(struct net_device *upper, 10044 struct netdev_nested_priv *priv) 10045 { 10046 if (netif_is_macvlan(upper)) { 10047 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper); 10048 struct ixgbe_adapter *adapter; 10049 struct upper_walk_data *data; 10050 int ifindex; 10051 10052 data = (struct upper_walk_data *)priv->data; 10053 ifindex = data->ifindex; 10054 adapter = data->adapter; 10055 if (vadapter && upper->ifindex == ifindex) { 10056 data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx; 10057 data->action = data->queue; 10058 return 1; 10059 } 10060 } 10061 10062 return 0; 10063 } 10064 10065 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex, 10066 u8 *queue, u64 *action) 10067 { 10068 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; 10069 unsigned int num_vfs = adapter->num_vfs, vf; 10070 struct netdev_nested_priv priv; 10071 struct upper_walk_data data; 10072 struct net_device *upper; 10073 10074 /* redirect to a SRIOV VF */ 10075 for (vf = 0; vf < num_vfs; ++vf) { 10076 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev); 10077 if (upper->ifindex == ifindex) { 10078 *queue = vf * __ALIGN_MASK(1, ~vmdq->mask); 10079 *action = vf + 1; 10080 *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 10081 return 0; 10082 } 10083 } 10084 10085 /* redirect to a offloaded macvlan netdev */ 10086 data.adapter = adapter; 10087 data.ifindex = ifindex; 10088 data.action = 0; 10089 data.queue = 0; 10090 priv.data = (void *)&data; 10091 if (netdev_walk_all_upper_dev_rcu(adapter->netdev, 10092 get_macvlan_queue, &priv)) { 10093 *action = data.action; 10094 *queue = data.queue; 10095 10096 return 0; 10097 } 10098 10099 return -EINVAL; 10100 } 10101 10102 static int parse_tc_actions(struct ixgbe_adapter *adapter, 10103 struct tcf_exts *exts, u64 *action, u8 *queue) 10104 { 10105 const struct tc_action *a; 10106 int i; 10107 10108 if (!tcf_exts_has_actions(exts)) 10109 return -EINVAL; 10110 10111 tcf_exts_for_each_action(i, a, exts) { 10112 /* Drop action */ 10113 if (is_tcf_gact_shot(a)) { 10114 *action = IXGBE_FDIR_DROP_QUEUE; 10115 *queue = IXGBE_FDIR_DROP_QUEUE; 10116 return 0; 10117 } 10118 10119 /* Redirect to a VF or a offloaded macvlan */ 10120 if (is_tcf_mirred_egress_redirect(a)) { 10121 struct net_device *dev = tcf_mirred_dev(a); 10122 10123 if (!dev) 10124 return -EINVAL; 10125 return handle_redirect_action(adapter, dev->ifindex, 10126 queue, action); 10127 } 10128 10129 return -EINVAL; 10130 } 10131 10132 return -EINVAL; 10133 } 10134 #else 10135 static int parse_tc_actions(struct ixgbe_adapter *adapter, 10136 struct tcf_exts *exts, u64 *action, u8 *queue) 10137 { 10138 return -EINVAL; 10139 } 10140 #endif /* CONFIG_NET_CLS_ACT */ 10141 10142 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input, 10143 union ixgbe_atr_input *mask, 10144 struct tc_cls_u32_offload *cls, 10145 struct ixgbe_mat_field *field_ptr, 10146 struct ixgbe_nexthdr *nexthdr) 10147 { 10148 int i, j, off; 10149 __be32 val, m; 10150 bool found_entry = false, found_jump_field = false; 10151 10152 for (i = 0; i < cls->knode.sel->nkeys; i++) { 10153 off = cls->knode.sel->keys[i].off; 10154 val = cls->knode.sel->keys[i].val; 10155 m = cls->knode.sel->keys[i].mask; 10156 10157 for (j = 0; field_ptr[j].val; j++) { 10158 if (field_ptr[j].off == off) { 10159 field_ptr[j].val(input, mask, (__force u32)val, 10160 (__force u32)m); 10161 input->filter.formatted.flow_type |= 10162 field_ptr[j].type; 10163 found_entry = true; 10164 break; 10165 } 10166 } 10167 if (nexthdr) { 10168 if (nexthdr->off == cls->knode.sel->keys[i].off && 10169 nexthdr->val == 10170 (__force u32)cls->knode.sel->keys[i].val && 10171 nexthdr->mask == 10172 (__force u32)cls->knode.sel->keys[i].mask) 10173 found_jump_field = true; 10174 else 10175 continue; 10176 } 10177 } 10178 10179 if (nexthdr && !found_jump_field) 10180 return -EINVAL; 10181 10182 if (!found_entry) 10183 return 0; 10184 10185 mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | 10186 IXGBE_ATR_L4TYPE_MASK; 10187 10188 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4) 10189 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK; 10190 10191 return 0; 10192 } 10193 10194 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter, 10195 struct tc_cls_u32_offload *cls) 10196 { 10197 __be16 protocol = cls->common.protocol; 10198 u32 loc = cls->knode.handle & 0xfffff; 10199 struct ixgbe_hw *hw = &adapter->hw; 10200 struct ixgbe_mat_field *field_ptr; 10201 struct ixgbe_fdir_filter *input = NULL; 10202 union ixgbe_atr_input *mask = NULL; 10203 struct ixgbe_jump_table *jump = NULL; 10204 int i, err = -EINVAL; 10205 u8 queue; 10206 u32 uhtid, link_uhtid; 10207 10208 uhtid = TC_U32_USERHTID(cls->knode.handle); 10209 link_uhtid = TC_U32_USERHTID(cls->knode.link_handle); 10210 10211 /* At the moment cls_u32 jumps to network layer and skips past 10212 * L2 headers. The canonical method to match L2 frames is to use 10213 * negative values. However this is error prone at best but really 10214 * just broken because there is no way to "know" what sort of hdr 10215 * is in front of the network layer. Fix cls_u32 to support L2 10216 * headers when needed. 10217 */ 10218 if (protocol != htons(ETH_P_IP)) 10219 return err; 10220 10221 if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) { 10222 e_err(drv, "Location out of range\n"); 10223 return err; 10224 } 10225 10226 /* cls u32 is a graph starting at root node 0x800. The driver tracks 10227 * links and also the fields used to advance the parser across each 10228 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map 10229 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h 10230 * To add support for new nodes update ixgbe_model.h parse structures 10231 * this function _should_ be generic try not to hardcode values here. 10232 */ 10233 if (uhtid == 0x800) { 10234 field_ptr = (adapter->jump_tables[0])->mat; 10235 } else { 10236 if (uhtid >= IXGBE_MAX_LINK_HANDLE) 10237 return err; 10238 if (!adapter->jump_tables[uhtid]) 10239 return err; 10240 field_ptr = (adapter->jump_tables[uhtid])->mat; 10241 } 10242 10243 if (!field_ptr) 10244 return err; 10245 10246 /* At this point we know the field_ptr is valid and need to either 10247 * build cls_u32 link or attach filter. Because adding a link to 10248 * a handle that does not exist is invalid and the same for adding 10249 * rules to handles that don't exist. 10250 */ 10251 10252 if (link_uhtid) { 10253 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps; 10254 10255 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE) 10256 return err; 10257 10258 if (!test_bit(link_uhtid - 1, &adapter->tables)) 10259 return err; 10260 10261 /* Multiple filters as links to the same hash table are not 10262 * supported. To add a new filter with the same next header 10263 * but different match/jump conditions, create a new hash table 10264 * and link to it. 10265 */ 10266 if (adapter->jump_tables[link_uhtid] && 10267 (adapter->jump_tables[link_uhtid])->link_hdl) { 10268 e_err(drv, "Link filter exists for link: %x\n", 10269 link_uhtid); 10270 return err; 10271 } 10272 10273 for (i = 0; nexthdr[i].jump; i++) { 10274 if (nexthdr[i].o != cls->knode.sel->offoff || 10275 nexthdr[i].s != cls->knode.sel->offshift || 10276 nexthdr[i].m != 10277 (__force u32)cls->knode.sel->offmask) 10278 return err; 10279 10280 jump = kzalloc(sizeof(*jump), GFP_KERNEL); 10281 if (!jump) 10282 return -ENOMEM; 10283 input = kzalloc(sizeof(*input), GFP_KERNEL); 10284 if (!input) { 10285 err = -ENOMEM; 10286 goto free_jump; 10287 } 10288 mask = kzalloc(sizeof(*mask), GFP_KERNEL); 10289 if (!mask) { 10290 err = -ENOMEM; 10291 goto free_input; 10292 } 10293 jump->input = input; 10294 jump->mask = mask; 10295 jump->link_hdl = cls->knode.handle; 10296 10297 err = ixgbe_clsu32_build_input(input, mask, cls, 10298 field_ptr, &nexthdr[i]); 10299 if (!err) { 10300 jump->mat = nexthdr[i].jump; 10301 adapter->jump_tables[link_uhtid] = jump; 10302 break; 10303 } else { 10304 kfree(mask); 10305 kfree(input); 10306 kfree(jump); 10307 } 10308 } 10309 return 0; 10310 } 10311 10312 input = kzalloc(sizeof(*input), GFP_KERNEL); 10313 if (!input) 10314 return -ENOMEM; 10315 mask = kzalloc(sizeof(*mask), GFP_KERNEL); 10316 if (!mask) { 10317 err = -ENOMEM; 10318 goto free_input; 10319 } 10320 10321 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) { 10322 if ((adapter->jump_tables[uhtid])->input) 10323 memcpy(input, (adapter->jump_tables[uhtid])->input, 10324 sizeof(*input)); 10325 if ((adapter->jump_tables[uhtid])->mask) 10326 memcpy(mask, (adapter->jump_tables[uhtid])->mask, 10327 sizeof(*mask)); 10328 10329 /* Lookup in all child hash tables if this location is already 10330 * filled with a filter 10331 */ 10332 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) { 10333 struct ixgbe_jump_table *link = adapter->jump_tables[i]; 10334 10335 if (link && (test_bit(loc - 1, link->child_loc_map))) { 10336 e_err(drv, "Filter exists in location: %x\n", 10337 loc); 10338 err = -EINVAL; 10339 goto err_out; 10340 } 10341 } 10342 } 10343 err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL); 10344 if (err) 10345 goto err_out; 10346 10347 err = parse_tc_actions(adapter, cls->knode.exts, &input->action, 10348 &queue); 10349 if (err < 0) 10350 goto err_out; 10351 10352 input->sw_idx = loc; 10353 10354 spin_lock(&adapter->fdir_perfect_lock); 10355 10356 if (hlist_empty(&adapter->fdir_filter_list)) { 10357 memcpy(&adapter->fdir_mask, mask, sizeof(*mask)); 10358 err = ixgbe_fdir_set_input_mask_82599(hw, mask); 10359 if (err) 10360 goto err_out_w_lock; 10361 } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) { 10362 err = -EINVAL; 10363 goto err_out_w_lock; 10364 } 10365 10366 ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask); 10367 err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter, 10368 input->sw_idx, queue); 10369 if (err) 10370 goto err_out_w_lock; 10371 10372 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx); 10373 spin_unlock(&adapter->fdir_perfect_lock); 10374 10375 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) 10376 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map); 10377 10378 kfree(mask); 10379 return err; 10380 err_out_w_lock: 10381 spin_unlock(&adapter->fdir_perfect_lock); 10382 err_out: 10383 kfree(mask); 10384 free_input: 10385 kfree(input); 10386 free_jump: 10387 kfree(jump); 10388 return err; 10389 } 10390 10391 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter, 10392 struct tc_cls_u32_offload *cls_u32) 10393 { 10394 switch (cls_u32->command) { 10395 case TC_CLSU32_NEW_KNODE: 10396 case TC_CLSU32_REPLACE_KNODE: 10397 return ixgbe_configure_clsu32(adapter, cls_u32); 10398 case TC_CLSU32_DELETE_KNODE: 10399 return ixgbe_delete_clsu32(adapter, cls_u32); 10400 case TC_CLSU32_NEW_HNODE: 10401 case TC_CLSU32_REPLACE_HNODE: 10402 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32); 10403 case TC_CLSU32_DELETE_HNODE: 10404 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32); 10405 default: 10406 return -EOPNOTSUPP; 10407 } 10408 } 10409 10410 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 10411 void *cb_priv) 10412 { 10413 struct ixgbe_adapter *adapter = cb_priv; 10414 10415 if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data)) 10416 return -EOPNOTSUPP; 10417 10418 switch (type) { 10419 case TC_SETUP_CLSU32: 10420 return ixgbe_setup_tc_cls_u32(adapter, type_data); 10421 default: 10422 return -EOPNOTSUPP; 10423 } 10424 } 10425 10426 static int ixgbe_setup_tc_mqprio(struct net_device *dev, 10427 struct tc_mqprio_qopt *mqprio) 10428 { 10429 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 10430 return ixgbe_setup_tc(dev, mqprio->num_tc); 10431 } 10432 10433 static LIST_HEAD(ixgbe_block_cb_list); 10434 10435 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type, 10436 void *type_data) 10437 { 10438 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10439 10440 switch (type) { 10441 case TC_SETUP_BLOCK: 10442 return flow_block_cb_setup_simple(type_data, 10443 &ixgbe_block_cb_list, 10444 ixgbe_setup_tc_block_cb, 10445 adapter, adapter, true); 10446 case TC_SETUP_QDISC_MQPRIO: 10447 return ixgbe_setup_tc_mqprio(dev, type_data); 10448 default: 10449 return -EOPNOTSUPP; 10450 } 10451 } 10452 10453 #ifdef CONFIG_PCI_IOV 10454 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter) 10455 { 10456 struct net_device *netdev = adapter->netdev; 10457 10458 rtnl_lock(); 10459 ixgbe_setup_tc(netdev, adapter->hw_tcs); 10460 rtnl_unlock(); 10461 } 10462 10463 #endif 10464 void ixgbe_do_reset(struct net_device *netdev) 10465 { 10466 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 10467 10468 if (netif_running(netdev)) 10469 ixgbe_reinit_locked(adapter); 10470 else 10471 ixgbe_reset(adapter); 10472 } 10473 10474 static netdev_features_t ixgbe_fix_features(struct net_device *netdev, 10475 netdev_features_t features) 10476 { 10477 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 10478 10479 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */ 10480 if (!(features & NETIF_F_RXCSUM)) 10481 features &= ~NETIF_F_LRO; 10482 10483 /* Turn off LRO if not RSC capable */ 10484 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)) 10485 features &= ~NETIF_F_LRO; 10486 10487 if (adapter->xdp_prog && (features & NETIF_F_LRO)) { 10488 e_dev_err("LRO is not supported with XDP\n"); 10489 features &= ~NETIF_F_LRO; 10490 } 10491 10492 return features; 10493 } 10494 10495 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter) 10496 { 10497 int rss = min_t(int, ixgbe_max_rss_indices(adapter), 10498 num_online_cpus()); 10499 10500 /* go back to full RSS if we're not running SR-IOV */ 10501 if (!adapter->ring_feature[RING_F_VMDQ].offset) 10502 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED | 10503 IXGBE_FLAG_SRIOV_ENABLED); 10504 10505 adapter->ring_feature[RING_F_RSS].limit = rss; 10506 adapter->ring_feature[RING_F_VMDQ].limit = 1; 10507 10508 ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs); 10509 } 10510 10511 static int ixgbe_set_features(struct net_device *netdev, 10512 netdev_features_t features) 10513 { 10514 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 10515 netdev_features_t changed = netdev->features ^ features; 10516 bool need_reset = false; 10517 10518 /* Make sure RSC matches LRO, reset if change */ 10519 if (!(features & NETIF_F_LRO)) { 10520 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) 10521 need_reset = true; 10522 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; 10523 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) && 10524 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { 10525 if (adapter->rx_itr_setting == 1 || 10526 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { 10527 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; 10528 need_reset = true; 10529 } else if ((changed ^ features) & NETIF_F_LRO) { 10530 e_info(probe, "rx-usecs set too low, " 10531 "disabling RSC\n"); 10532 } 10533 } 10534 10535 /* 10536 * Check if Flow Director n-tuple support or hw_tc support was 10537 * enabled or disabled. If the state changed, we need to reset. 10538 */ 10539 if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) { 10540 /* turn off ATR, enable perfect filters and reset */ 10541 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) 10542 need_reset = true; 10543 10544 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; 10545 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE; 10546 } else { 10547 /* turn off perfect filters, enable ATR and reset */ 10548 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) 10549 need_reset = true; 10550 10551 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE; 10552 10553 /* We cannot enable ATR if SR-IOV is enabled */ 10554 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED || 10555 /* We cannot enable ATR if we have 2 or more tcs */ 10556 (adapter->hw_tcs > 1) || 10557 /* We cannot enable ATR if RSS is disabled */ 10558 (adapter->ring_feature[RING_F_RSS].limit <= 1) || 10559 /* A sample rate of 0 indicates ATR disabled */ 10560 (!adapter->atr_sample_rate)) 10561 ; /* do nothing not supported */ 10562 else /* otherwise supported and set the flag */ 10563 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; 10564 } 10565 10566 if (changed & NETIF_F_RXALL) 10567 need_reset = true; 10568 10569 netdev->features = features; 10570 10571 if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1) 10572 ixgbe_reset_l2fw_offload(adapter); 10573 else if (need_reset) 10574 ixgbe_do_reset(netdev); 10575 else if (changed & (NETIF_F_HW_VLAN_CTAG_RX | 10576 NETIF_F_HW_VLAN_CTAG_FILTER)) 10577 ixgbe_set_rx_mode(netdev); 10578 10579 return 1; 10580 } 10581 10582 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], 10583 struct net_device *dev, 10584 const unsigned char *addr, u16 vid, 10585 u16 flags, bool *notified, 10586 struct netlink_ext_ack *extack) 10587 { 10588 /* guarantee we can provide a unique filter for the unicast address */ 10589 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) { 10590 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10591 u16 pool = VMDQ_P(0); 10592 10593 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool)) 10594 return -ENOMEM; 10595 } 10596 10597 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags); 10598 } 10599 10600 /** 10601 * ixgbe_configure_bridge_mode - set various bridge modes 10602 * @adapter: the private structure 10603 * @mode: requested bridge mode 10604 * 10605 * Configure some settings require for various bridge modes. 10606 **/ 10607 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter, 10608 __u16 mode) 10609 { 10610 struct ixgbe_hw *hw = &adapter->hw; 10611 unsigned int p, num_pools; 10612 u32 vmdctl; 10613 10614 switch (mode) { 10615 case BRIDGE_MODE_VEPA: 10616 /* disable Tx loopback, rely on switch hairpin mode */ 10617 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0); 10618 10619 /* must enable Rx switching replication to allow multicast 10620 * packet reception on all VFs, and to enable source address 10621 * pruning. 10622 */ 10623 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); 10624 vmdctl |= IXGBE_VT_CTL_REPLEN; 10625 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl); 10626 10627 /* enable Rx source address pruning. Note, this requires 10628 * replication to be enabled or else it does nothing. 10629 */ 10630 num_pools = adapter->num_vfs + adapter->num_rx_pools; 10631 for (p = 0; p < num_pools; p++) { 10632 if (hw->mac.ops.set_source_address_pruning) 10633 hw->mac.ops.set_source_address_pruning(hw, 10634 true, 10635 p); 10636 } 10637 break; 10638 case BRIDGE_MODE_VEB: 10639 /* enable Tx loopback for internal VF/PF communication */ 10640 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 10641 IXGBE_PFDTXGSWC_VT_LBEN); 10642 10643 /* disable Rx switching replication unless we have SR-IOV 10644 * virtual functions 10645 */ 10646 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); 10647 if (!adapter->num_vfs) 10648 vmdctl &= ~IXGBE_VT_CTL_REPLEN; 10649 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl); 10650 10651 /* disable Rx source address pruning, since we don't expect to 10652 * be receiving external loopback of our transmitted frames. 10653 */ 10654 num_pools = adapter->num_vfs + adapter->num_rx_pools; 10655 for (p = 0; p < num_pools; p++) { 10656 if (hw->mac.ops.set_source_address_pruning) 10657 hw->mac.ops.set_source_address_pruning(hw, 10658 false, 10659 p); 10660 } 10661 break; 10662 default: 10663 return -EINVAL; 10664 } 10665 10666 adapter->bridge_mode = mode; 10667 10668 e_info(drv, "enabling bridge mode: %s\n", 10669 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); 10670 10671 return 0; 10672 } 10673 10674 static int ixgbe_ndo_bridge_setlink(struct net_device *dev, 10675 struct nlmsghdr *nlh, u16 flags, 10676 struct netlink_ext_ack *extack) 10677 { 10678 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10679 struct nlattr *attr, *br_spec; 10680 int rem; 10681 10682 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 10683 return -EOPNOTSUPP; 10684 10685 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); 10686 if (!br_spec) 10687 return -EINVAL; 10688 10689 nla_for_each_nested_type(attr, IFLA_BRIDGE_MODE, br_spec, rem) { 10690 __u16 mode = nla_get_u16(attr); 10691 int status = ixgbe_configure_bridge_mode(adapter, mode); 10692 10693 if (status) 10694 return status; 10695 10696 break; 10697 } 10698 10699 return 0; 10700 } 10701 10702 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 10703 struct net_device *dev, 10704 u32 filter_mask, int nlflags) 10705 { 10706 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10707 10708 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 10709 return 0; 10710 10711 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, 10712 adapter->bridge_mode, 0, 0, nlflags, 10713 filter_mask, NULL); 10714 } 10715 10716 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev) 10717 { 10718 struct ixgbe_adapter *adapter = ixgbe_from_netdev(pdev); 10719 struct ixgbe_fwd_adapter *accel; 10720 int tcs = adapter->hw_tcs ? : 1; 10721 int pool, err; 10722 10723 if (adapter->xdp_prog) { 10724 e_warn(probe, "L2FW offload is not supported with XDP\n"); 10725 return ERR_PTR(-EINVAL); 10726 } 10727 10728 /* The hardware supported by ixgbe only filters on the destination MAC 10729 * address. In order to avoid issues we only support offloading modes 10730 * where the hardware can actually provide the functionality. 10731 */ 10732 if (!macvlan_supports_dest_filter(vdev)) 10733 return ERR_PTR(-EMEDIUMTYPE); 10734 10735 /* We need to lock down the macvlan to be a single queue device so that 10736 * we can reuse the tc_to_txq field in the macvlan netdev to represent 10737 * the queue mapping to our netdev. 10738 */ 10739 if (netif_is_multiqueue(vdev)) 10740 return ERR_PTR(-ERANGE); 10741 10742 pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools); 10743 if (pool == adapter->num_rx_pools) { 10744 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools; 10745 u16 reserved_pools; 10746 10747 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && 10748 adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) || 10749 adapter->num_rx_pools > IXGBE_MAX_MACVLANS) 10750 return ERR_PTR(-EBUSY); 10751 10752 /* Hardware has a limited number of available pools. Each VF, 10753 * and the PF require a pool. Check to ensure we don't 10754 * attempt to use more then the available number of pools. 10755 */ 10756 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS) 10757 return ERR_PTR(-EBUSY); 10758 10759 /* Enable VMDq flag so device will be set in VM mode */ 10760 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | 10761 IXGBE_FLAG_SRIOV_ENABLED; 10762 10763 /* Try to reserve as many queues per pool as possible, 10764 * we start with the configurations that support 4 queues 10765 * per pools, followed by 2, and then by just 1 per pool. 10766 */ 10767 if (used_pools < 32 && adapter->num_rx_pools < 16) 10768 reserved_pools = min_t(u16, 10769 32 - used_pools, 10770 16 - adapter->num_rx_pools); 10771 else if (adapter->num_rx_pools < 32) 10772 reserved_pools = min_t(u16, 10773 64 - used_pools, 10774 32 - adapter->num_rx_pools); 10775 else 10776 reserved_pools = 64 - used_pools; 10777 10778 10779 if (!reserved_pools) 10780 return ERR_PTR(-EBUSY); 10781 10782 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools; 10783 10784 /* Force reinit of ring allocation with VMDQ enabled */ 10785 err = ixgbe_setup_tc(pdev, adapter->hw_tcs); 10786 if (err) 10787 return ERR_PTR(err); 10788 10789 if (pool >= adapter->num_rx_pools) 10790 return ERR_PTR(-ENOMEM); 10791 } 10792 10793 accel = kzalloc(sizeof(*accel), GFP_KERNEL); 10794 if (!accel) 10795 return ERR_PTR(-ENOMEM); 10796 10797 set_bit(pool, adapter->fwd_bitmask); 10798 netdev_set_sb_channel(vdev, pool); 10799 accel->pool = pool; 10800 accel->netdev = vdev; 10801 10802 if (!netif_running(pdev)) 10803 return accel; 10804 10805 err = ixgbe_fwd_ring_up(adapter, accel); 10806 if (err) 10807 return ERR_PTR(err); 10808 10809 return accel; 10810 } 10811 10812 static void ixgbe_fwd_del(struct net_device *pdev, void *priv) 10813 { 10814 struct ixgbe_fwd_adapter *accel = priv; 10815 struct ixgbe_adapter *adapter = ixgbe_from_netdev(pdev); 10816 unsigned int rxbase = accel->rx_base_queue; 10817 unsigned int i; 10818 10819 /* delete unicast filter associated with offloaded interface */ 10820 ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr, 10821 VMDQ_P(accel->pool)); 10822 10823 /* Allow remaining Rx packets to get flushed out of the 10824 * Rx FIFO before we drop the netdev for the ring. 10825 */ 10826 usleep_range(10000, 20000); 10827 10828 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) { 10829 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i]; 10830 struct ixgbe_q_vector *qv = ring->q_vector; 10831 10832 /* Make sure we aren't processing any packets and clear 10833 * netdev to shut down the ring. 10834 */ 10835 if (netif_running(adapter->netdev)) 10836 napi_synchronize(&qv->napi); 10837 ring->netdev = NULL; 10838 } 10839 10840 /* unbind the queues and drop the subordinate channel config */ 10841 netdev_unbind_sb_channel(pdev, accel->netdev); 10842 netdev_set_sb_channel(accel->netdev, 0); 10843 10844 clear_bit(accel->pool, adapter->fwd_bitmask); 10845 kfree(accel); 10846 } 10847 10848 #define IXGBE_MAX_MAC_HDR_LEN 127 10849 #define IXGBE_MAX_NETWORK_HDR_LEN 511 10850 10851 static netdev_features_t 10852 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev, 10853 netdev_features_t features) 10854 { 10855 unsigned int network_hdr_len, mac_hdr_len; 10856 10857 /* Make certain the headers can be described by a context descriptor */ 10858 mac_hdr_len = skb_network_offset(skb); 10859 if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN)) 10860 return features & ~(NETIF_F_HW_CSUM | 10861 NETIF_F_SCTP_CRC | 10862 NETIF_F_GSO_UDP_L4 | 10863 NETIF_F_HW_VLAN_CTAG_TX | 10864 NETIF_F_TSO | 10865 NETIF_F_TSO6); 10866 10867 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb); 10868 if (unlikely(network_hdr_len > IXGBE_MAX_NETWORK_HDR_LEN)) 10869 return features & ~(NETIF_F_HW_CSUM | 10870 NETIF_F_SCTP_CRC | 10871 NETIF_F_GSO_UDP_L4 | 10872 NETIF_F_TSO | 10873 NETIF_F_TSO6); 10874 10875 /* We can only support IPV4 TSO in tunnels if we can mangle the 10876 * inner IP ID field, so strip TSO if MANGLEID is not supported. 10877 * IPsec offoad sets skb->encapsulation but still can handle 10878 * the TSO, so it's the exception. 10879 */ 10880 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) { 10881 #ifdef CONFIG_IXGBE_IPSEC 10882 if (!secpath_exists(skb)) 10883 #endif 10884 features &= ~NETIF_F_TSO; 10885 } 10886 10887 return features; 10888 } 10889 10890 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog) 10891 { 10892 int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 10893 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10894 struct bpf_prog *old_prog; 10895 bool need_reset; 10896 int num_queues; 10897 10898 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 10899 return -EINVAL; 10900 10901 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) 10902 return -EINVAL; 10903 10904 /* verify ixgbe ring attributes are sufficient for XDP */ 10905 for (i = 0; i < adapter->num_rx_queues; i++) { 10906 struct ixgbe_ring *ring = adapter->rx_ring[i]; 10907 10908 if (ring_is_rsc_enabled(ring)) 10909 return -EINVAL; 10910 10911 if (frame_size > ixgbe_rx_bufsz(ring)) 10912 return -EINVAL; 10913 } 10914 10915 /* if the number of cpus is much larger than the maximum of queues, 10916 * we should stop it and then return with ENOMEM like before. 10917 */ 10918 if (nr_cpu_ids > IXGBE_MAX_XDP_QS * 2) 10919 return -ENOMEM; 10920 10921 old_prog = xchg(&adapter->xdp_prog, prog); 10922 need_reset = (!!prog != !!old_prog); 10923 10924 /* If transitioning XDP modes reconfigure rings */ 10925 if (need_reset) { 10926 int err; 10927 10928 if (!prog) 10929 /* Wait until ndo_xsk_wakeup completes. */ 10930 synchronize_rcu(); 10931 err = ixgbe_setup_tc(dev, adapter->hw_tcs); 10932 10933 if (err) 10934 return -EINVAL; 10935 if (!prog) 10936 xdp_features_clear_redirect_target(dev); 10937 } else { 10938 for (i = 0; i < adapter->num_rx_queues; i++) { 10939 WRITE_ONCE(adapter->rx_ring[i]->xdp_prog, 10940 adapter->xdp_prog); 10941 } 10942 } 10943 10944 if (old_prog) 10945 bpf_prog_put(old_prog); 10946 10947 /* Kick start the NAPI context if there is an AF_XDP socket open 10948 * on that queue id. This so that receiving will start. 10949 */ 10950 if (need_reset && prog) { 10951 num_queues = min_t(int, adapter->num_rx_queues, 10952 adapter->num_xdp_queues); 10953 for (i = 0; i < num_queues; i++) 10954 if (adapter->xdp_ring[i]->xsk_pool) 10955 (void)ixgbe_xsk_wakeup(adapter->netdev, i, 10956 XDP_WAKEUP_RX); 10957 xdp_features_set_redirect_target(dev, true); 10958 } 10959 10960 return 0; 10961 } 10962 10963 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp) 10964 { 10965 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 10966 10967 switch (xdp->command) { 10968 case XDP_SETUP_PROG: 10969 return ixgbe_xdp_setup(dev, xdp->prog); 10970 case XDP_SETUP_XSK_POOL: 10971 return ixgbe_xsk_pool_setup(adapter, xdp->xsk.pool, 10972 xdp->xsk.queue_id); 10973 10974 default: 10975 return -EINVAL; 10976 } 10977 } 10978 10979 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring) 10980 { 10981 /* Force memory writes to complete before letting h/w know there 10982 * are new descriptors to fetch. 10983 */ 10984 wmb(); 10985 writel(ring->next_to_use, ring->tail); 10986 } 10987 10988 void ixgbe_xdp_ring_update_tail_locked(struct ixgbe_ring *ring) 10989 { 10990 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 10991 spin_lock(&ring->tx_lock); 10992 ixgbe_xdp_ring_update_tail(ring); 10993 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 10994 spin_unlock(&ring->tx_lock); 10995 } 10996 10997 static int ixgbe_xdp_xmit(struct net_device *dev, int n, 10998 struct xdp_frame **frames, u32 flags) 10999 { 11000 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 11001 struct ixgbe_ring *ring; 11002 int nxmit = 0; 11003 int i; 11004 11005 if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state))) 11006 return -ENETDOWN; 11007 11008 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) 11009 return -EINVAL; 11010 11011 /* During program transitions its possible adapter->xdp_prog is assigned 11012 * but ring has not been configured yet. In this case simply abort xmit. 11013 */ 11014 ring = adapter->xdp_prog ? ixgbe_determine_xdp_ring(adapter) : NULL; 11015 if (unlikely(!ring)) 11016 return -ENXIO; 11017 11018 if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state))) 11019 return -ENXIO; 11020 11021 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 11022 spin_lock(&ring->tx_lock); 11023 11024 for (i = 0; i < n; i++) { 11025 struct xdp_frame *xdpf = frames[i]; 11026 int err; 11027 11028 err = ixgbe_xmit_xdp_ring(ring, xdpf); 11029 if (err != IXGBE_XDP_TX) 11030 break; 11031 nxmit++; 11032 } 11033 11034 if (unlikely(flags & XDP_XMIT_FLUSH)) 11035 ixgbe_xdp_ring_update_tail(ring); 11036 11037 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) 11038 spin_unlock(&ring->tx_lock); 11039 11040 return nxmit; 11041 } 11042 11043 static const struct net_device_ops ixgbe_netdev_ops = { 11044 .ndo_open = ixgbe_open, 11045 .ndo_stop = ixgbe_close, 11046 .ndo_start_xmit = ixgbe_xmit_frame, 11047 .ndo_set_rx_mode = ixgbe_set_rx_mode, 11048 .ndo_validate_addr = eth_validate_addr, 11049 .ndo_set_mac_address = ixgbe_set_mac, 11050 .ndo_change_mtu = ixgbe_change_mtu, 11051 .ndo_tx_timeout = ixgbe_tx_timeout, 11052 .ndo_set_tx_maxrate = ixgbe_tx_maxrate, 11053 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid, 11054 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid, 11055 .ndo_eth_ioctl = ixgbe_ioctl, 11056 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac, 11057 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan, 11058 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw, 11059 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk, 11060 .ndo_set_vf_link_state = ixgbe_ndo_set_vf_link_state, 11061 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en, 11062 .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust, 11063 .ndo_get_vf_config = ixgbe_ndo_get_vf_config, 11064 .ndo_get_vf_stats = ixgbe_ndo_get_vf_stats, 11065 .ndo_get_stats64 = ixgbe_get_stats64, 11066 .ndo_setup_tc = __ixgbe_setup_tc, 11067 #ifdef IXGBE_FCOE 11068 .ndo_select_queue = ixgbe_select_queue, 11069 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get, 11070 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target, 11071 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put, 11072 .ndo_fcoe_enable = ixgbe_fcoe_enable, 11073 .ndo_fcoe_disable = ixgbe_fcoe_disable, 11074 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn, 11075 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo, 11076 #endif /* IXGBE_FCOE */ 11077 .ndo_set_features = ixgbe_set_features, 11078 .ndo_fix_features = ixgbe_fix_features, 11079 .ndo_fdb_add = ixgbe_ndo_fdb_add, 11080 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink, 11081 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink, 11082 .ndo_dfwd_add_station = ixgbe_fwd_add, 11083 .ndo_dfwd_del_station = ixgbe_fwd_del, 11084 .ndo_features_check = ixgbe_features_check, 11085 .ndo_bpf = ixgbe_xdp, 11086 .ndo_xdp_xmit = ixgbe_xdp_xmit, 11087 .ndo_xsk_wakeup = ixgbe_xsk_wakeup, 11088 .ndo_hwtstamp_get = ixgbe_ptp_hwtstamp_get, 11089 .ndo_hwtstamp_set = ixgbe_ptp_hwtstamp_set, 11090 }; 11091 11092 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter, 11093 struct ixgbe_ring *tx_ring) 11094 { 11095 unsigned long wait_delay, delay_interval; 11096 struct ixgbe_hw *hw = &adapter->hw; 11097 u8 reg_idx = tx_ring->reg_idx; 11098 int wait_loop; 11099 u32 txdctl; 11100 11101 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); 11102 11103 /* delay mechanism from ixgbe_disable_tx */ 11104 delay_interval = ixgbe_get_completion_timeout(adapter) / 100; 11105 11106 wait_loop = IXGBE_MAX_RX_DESC_POLL; 11107 wait_delay = delay_interval; 11108 11109 while (wait_loop--) { 11110 usleep_range(wait_delay, wait_delay + 10); 11111 wait_delay += delay_interval * 2; 11112 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); 11113 11114 if (!(txdctl & IXGBE_TXDCTL_ENABLE)) 11115 return; 11116 } 11117 11118 e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n"); 11119 } 11120 11121 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter, 11122 struct ixgbe_ring *tx_ring) 11123 { 11124 set_bit(__IXGBE_TX_DISABLED, &tx_ring->state); 11125 ixgbe_disable_txr_hw(adapter, tx_ring); 11126 } 11127 11128 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter, 11129 struct ixgbe_ring *rx_ring) 11130 { 11131 unsigned long wait_delay, delay_interval; 11132 struct ixgbe_hw *hw = &adapter->hw; 11133 u8 reg_idx = rx_ring->reg_idx; 11134 int wait_loop; 11135 u32 rxdctl; 11136 11137 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 11138 rxdctl &= ~IXGBE_RXDCTL_ENABLE; 11139 rxdctl |= IXGBE_RXDCTL_SWFLSH; 11140 11141 /* write value back with RXDCTL.ENABLE bit cleared */ 11142 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); 11143 11144 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */ 11145 if (hw->mac.type == ixgbe_mac_82598EB && 11146 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) 11147 return; 11148 11149 /* delay mechanism from ixgbe_disable_rx */ 11150 delay_interval = ixgbe_get_completion_timeout(adapter) / 100; 11151 11152 wait_loop = IXGBE_MAX_RX_DESC_POLL; 11153 wait_delay = delay_interval; 11154 11155 while (wait_loop--) { 11156 usleep_range(wait_delay, wait_delay + 10); 11157 wait_delay += delay_interval * 2; 11158 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); 11159 11160 if (!(rxdctl & IXGBE_RXDCTL_ENABLE)) 11161 return; 11162 } 11163 11164 e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n"); 11165 } 11166 11167 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring) 11168 { 11169 memset(&tx_ring->stats, 0, sizeof(tx_ring->stats)); 11170 memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats)); 11171 } 11172 11173 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring) 11174 { 11175 memset(&rx_ring->stats, 0, sizeof(rx_ring->stats)); 11176 memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats)); 11177 } 11178 11179 /** 11180 * ixgbe_irq_disable_single - Disable single IRQ vector 11181 * @adapter: adapter structure 11182 * @ring: ring index 11183 **/ 11184 static void ixgbe_irq_disable_single(struct ixgbe_adapter *adapter, u32 ring) 11185 { 11186 struct ixgbe_hw *hw = &adapter->hw; 11187 u64 qmask = BIT_ULL(ring); 11188 u32 mask; 11189 11190 switch (adapter->hw.mac.type) { 11191 case ixgbe_mac_82598EB: 11192 mask = qmask & IXGBE_EIMC_RTX_QUEUE; 11193 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, mask); 11194 break; 11195 case ixgbe_mac_82599EB: 11196 case ixgbe_mac_X540: 11197 case ixgbe_mac_X550: 11198 case ixgbe_mac_X550EM_x: 11199 case ixgbe_mac_x550em_a: 11200 mask = (qmask & 0xFFFFFFFF); 11201 if (mask) 11202 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 11203 mask = (qmask >> 32); 11204 if (mask) 11205 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 11206 break; 11207 default: 11208 break; 11209 } 11210 IXGBE_WRITE_FLUSH(&adapter->hw); 11211 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) 11212 synchronize_irq(adapter->msix_entries[ring].vector); 11213 else 11214 synchronize_irq(adapter->pdev->irq); 11215 } 11216 11217 /** 11218 * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings 11219 * @adapter: adapter structure 11220 * @ring: ring index 11221 * 11222 * This function disables a certain Rx/Tx/XDP Tx ring. The function 11223 * assumes that the netdev is running. 11224 **/ 11225 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring) 11226 { 11227 struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring; 11228 11229 rx_ring = adapter->rx_ring[ring]; 11230 tx_ring = adapter->tx_ring[ring]; 11231 xdp_ring = adapter->xdp_ring[ring]; 11232 11233 ixgbe_irq_disable_single(adapter, ring); 11234 11235 /* Rx/Tx/XDP Tx share the same napi context. */ 11236 napi_disable(&rx_ring->q_vector->napi); 11237 11238 ixgbe_disable_txr(adapter, tx_ring); 11239 if (xdp_ring) 11240 ixgbe_disable_txr(adapter, xdp_ring); 11241 ixgbe_disable_rxr_hw(adapter, rx_ring); 11242 11243 if (xdp_ring) 11244 synchronize_rcu(); 11245 11246 ixgbe_clean_tx_ring(tx_ring); 11247 if (xdp_ring) 11248 ixgbe_clean_tx_ring(xdp_ring); 11249 ixgbe_clean_rx_ring(rx_ring); 11250 11251 ixgbe_reset_txr_stats(tx_ring); 11252 if (xdp_ring) 11253 ixgbe_reset_txr_stats(xdp_ring); 11254 ixgbe_reset_rxr_stats(rx_ring); 11255 } 11256 11257 /** 11258 * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings 11259 * @adapter: adapter structure 11260 * @ring: ring index 11261 * 11262 * This function enables a certain Rx/Tx/XDP Tx ring. The function 11263 * assumes that the netdev is running. 11264 **/ 11265 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring) 11266 { 11267 struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring; 11268 11269 rx_ring = adapter->rx_ring[ring]; 11270 tx_ring = adapter->tx_ring[ring]; 11271 xdp_ring = adapter->xdp_ring[ring]; 11272 11273 ixgbe_configure_tx_ring(adapter, tx_ring); 11274 if (xdp_ring) 11275 ixgbe_configure_tx_ring(adapter, xdp_ring); 11276 ixgbe_configure_rx_ring(adapter, rx_ring); 11277 11278 clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state); 11279 if (xdp_ring) 11280 clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state); 11281 11282 /* Rx/Tx/XDP Tx share the same napi context. */ 11283 napi_enable(&rx_ring->q_vector->napi); 11284 ixgbe_irq_enable_queues(adapter, BIT_ULL(ring)); 11285 IXGBE_WRITE_FLUSH(&adapter->hw); 11286 } 11287 11288 /** 11289 * ixgbe_enumerate_functions - Get the number of ports this device has 11290 * @adapter: adapter structure 11291 * 11292 * This function enumerates the physical functions co-located on a single slot, 11293 * in order to determine how many ports a device has. This is most useful in 11294 * determining the required GT/s of PCIe bandwidth necessary for optimal 11295 * performance. 11296 **/ 11297 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter) 11298 { 11299 struct pci_dev *entry, *pdev = adapter->pdev; 11300 int physfns = 0; 11301 11302 /* Some cards can not use the generic count PCIe functions method, 11303 * because they are behind a parent switch, so we hardcode these with 11304 * the correct number of functions. 11305 */ 11306 if (ixgbe_pcie_from_parent(&adapter->hw)) 11307 physfns = 4; 11308 11309 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) { 11310 /* don't count virtual functions */ 11311 if (entry->is_virtfn) 11312 continue; 11313 11314 /* When the devices on the bus don't all match our device ID, 11315 * we can't reliably determine the correct number of 11316 * functions. This can occur if a function has been direct 11317 * attached to a virtual machine using VT-d, for example. In 11318 * this case, simply return -1 to indicate this. 11319 */ 11320 if ((entry->vendor != pdev->vendor) || 11321 (entry->device != pdev->device)) 11322 return -1; 11323 11324 physfns++; 11325 } 11326 11327 return physfns; 11328 } 11329 11330 /** 11331 * ixgbe_wol_supported - Check whether device supports WoL 11332 * @adapter: the adapter private structure 11333 * @device_id: the device ID 11334 * @subdevice_id: the subsystem device ID 11335 * 11336 * This function is used by probe and ethtool to determine 11337 * which devices have WoL support 11338 * 11339 **/ 11340 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id, 11341 u16 subdevice_id) 11342 { 11343 struct ixgbe_hw *hw = &adapter->hw; 11344 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK; 11345 11346 /* WOL not supported on 82598 */ 11347 if (hw->mac.type == ixgbe_mac_82598EB) 11348 return false; 11349 11350 /* check eeprom to see if WOL is enabled for X540 and newer */ 11351 if (hw->mac.type >= ixgbe_mac_X540) { 11352 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 11353 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) && 11354 (hw->bus.func == 0))) 11355 return true; 11356 } 11357 11358 /* WOL is determined based on device IDs for 82599 MACs */ 11359 switch (device_id) { 11360 case IXGBE_DEV_ID_82599_SFP: 11361 /* Only these subdevices could supports WOL */ 11362 switch (subdevice_id) { 11363 case IXGBE_SUBDEV_ID_82599_560FLR: 11364 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6: 11365 case IXGBE_SUBDEV_ID_82599_SFP_WOL0: 11366 case IXGBE_SUBDEV_ID_82599_SFP_2OCP: 11367 /* only support first port */ 11368 if (hw->bus.func != 0) 11369 break; 11370 fallthrough; 11371 case IXGBE_SUBDEV_ID_82599_SP_560FLR: 11372 case IXGBE_SUBDEV_ID_82599_SFP: 11373 case IXGBE_SUBDEV_ID_82599_RNDC: 11374 case IXGBE_SUBDEV_ID_82599_ECNA_DP: 11375 case IXGBE_SUBDEV_ID_82599_SFP_1OCP: 11376 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1: 11377 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2: 11378 return true; 11379 } 11380 break; 11381 case IXGBE_DEV_ID_82599EN_SFP: 11382 /* Only these subdevices support WOL */ 11383 switch (subdevice_id) { 11384 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1: 11385 return true; 11386 } 11387 break; 11388 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: 11389 /* All except this subdevice support WOL */ 11390 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) 11391 return true; 11392 break; 11393 case IXGBE_DEV_ID_82599_KX4: 11394 return true; 11395 default: 11396 break; 11397 } 11398 11399 return false; 11400 } 11401 11402 /** 11403 * ixgbe_set_fw_version_e610 - Set FW version specifically on E610 adapters 11404 * @adapter: the adapter private structure 11405 * 11406 * This function is used by probe and ethtool to determine the FW version to 11407 * format to display. The FW version is taken from the EEPROM/NVM. 11408 * 11409 */ 11410 void ixgbe_set_fw_version_e610(struct ixgbe_adapter *adapter) 11411 { 11412 struct ixgbe_orom_info *orom = &adapter->hw.flash.orom; 11413 struct ixgbe_nvm_info *nvm = &adapter->hw.flash.nvm; 11414 11415 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), 11416 "%x.%02x 0x%x %d.%d.%d", nvm->major, nvm->minor, 11417 nvm->eetrack, orom->major, orom->build, orom->patch); 11418 } 11419 11420 /** 11421 * ixgbe_set_fw_version - Set FW version 11422 * @adapter: the adapter private structure 11423 * 11424 * This function is used by probe and ethtool to determine the FW version to 11425 * format to display. The FW version is taken from the EEPROM/NVM. 11426 */ 11427 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter) 11428 { 11429 struct ixgbe_hw *hw = &adapter->hw; 11430 struct ixgbe_nvm_version nvm_ver; 11431 11432 if (adapter->hw.mac.type == ixgbe_mac_e610) { 11433 ixgbe_set_fw_version_e610(adapter); 11434 return; 11435 } 11436 11437 ixgbe_get_oem_prod_version(hw, &nvm_ver); 11438 if (nvm_ver.oem_valid) { 11439 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), 11440 "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor, 11441 nvm_ver.oem_release); 11442 return; 11443 } 11444 11445 ixgbe_get_etk_id(hw, &nvm_ver); 11446 ixgbe_get_orom_version(hw, &nvm_ver); 11447 11448 if (nvm_ver.or_valid) { 11449 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), 11450 "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major, 11451 nvm_ver.or_build, nvm_ver.or_patch); 11452 return; 11453 } 11454 11455 /* Set ETrack ID format */ 11456 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), 11457 "0x%08x", nvm_ver.etk_id); 11458 } 11459 11460 /** 11461 * ixgbe_recovery_probe - Handle FW recovery mode during probe 11462 * @adapter: the adapter private structure 11463 * 11464 * Perform limited driver initialization when FW error is detected. 11465 * 11466 * Return: 0 on successful probe for E610, -EIO if recovery mode is detected 11467 * for non-E610 adapter, error status code on any other case. 11468 */ 11469 static int ixgbe_recovery_probe(struct ixgbe_adapter *adapter) 11470 { 11471 struct net_device *netdev = adapter->netdev; 11472 struct pci_dev *pdev = adapter->pdev; 11473 struct ixgbe_hw *hw = &adapter->hw; 11474 bool disable_dev; 11475 int err = -EIO; 11476 11477 if (hw->mac.type != ixgbe_mac_e610) 11478 goto clean_up_probe; 11479 11480 ixgbe_get_hw_control(adapter); 11481 mutex_init(&hw->aci.lock); 11482 err = ixgbe_get_flash_data(&adapter->hw); 11483 if (err) 11484 goto shutdown_aci; 11485 11486 timer_setup(&adapter->service_timer, ixgbe_service_timer, 0); 11487 INIT_WORK(&adapter->service_task, ixgbe_recovery_service_task); 11488 set_bit(__IXGBE_SERVICE_INITED, &adapter->state); 11489 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state); 11490 11491 if (hw->mac.ops.get_bus_info) 11492 hw->mac.ops.get_bus_info(hw); 11493 11494 pci_set_drvdata(pdev, adapter); 11495 /* We are creating devlink interface so NIC can be managed, 11496 * e.g. new NVM image loaded 11497 */ 11498 devl_lock(adapter->devlink); 11499 ixgbe_devlink_register_port(adapter); 11500 SET_NETDEV_DEVLINK_PORT(adapter->netdev, 11501 &adapter->devlink_port); 11502 ixgbe_devlink_init_regions(adapter); 11503 devl_register(adapter->devlink); 11504 devl_unlock(adapter->devlink); 11505 11506 return 0; 11507 shutdown_aci: 11508 mutex_destroy(&adapter->hw.aci.lock); 11509 ixgbe_release_hw_control(adapter); 11510 devlink_free(adapter->devlink); 11511 clean_up_probe: 11512 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state); 11513 free_netdev(netdev); 11514 pci_release_mem_regions(pdev); 11515 if (disable_dev) 11516 pci_disable_device(pdev); 11517 return err; 11518 } 11519 11520 /** 11521 * ixgbe_probe - Device Initialization Routine 11522 * @pdev: PCI device information struct 11523 * @ent: entry in ixgbe_pci_tbl 11524 * 11525 * Returns 0 on success, negative on failure 11526 * 11527 * ixgbe_probe initializes an adapter identified by a pci_dev structure. 11528 * The OS initialization, configuring of the adapter private structure, 11529 * and a hardware reset occur. 11530 **/ 11531 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 11532 { 11533 struct net_device *netdev; 11534 struct ixgbe_netdevice_priv *netdev_priv_wrapper; 11535 struct ixgbe_adapter *adapter = NULL; 11536 struct ixgbe_hw *hw; 11537 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data]; 11538 unsigned int indices = MAX_TX_QUEUES; 11539 u8 part_str[IXGBE_PBANUM_LENGTH]; 11540 int i, err, expected_gts; 11541 bool disable_dev = false; 11542 #ifdef IXGBE_FCOE 11543 u16 device_caps; 11544 #endif 11545 u32 eec; 11546 11547 /* Catch broken hardware that put the wrong VF device ID in 11548 * the PCIe SR-IOV capability. 11549 */ 11550 if (pdev->is_virtfn) { 11551 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n", 11552 pci_name(pdev), pdev->vendor, pdev->device); 11553 return -EINVAL; 11554 } 11555 11556 err = pci_enable_device_mem(pdev); 11557 if (err) 11558 return err; 11559 11560 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 11561 if (err) { 11562 dev_err(&pdev->dev, 11563 "No usable DMA configuration, aborting\n"); 11564 goto err_dma; 11565 } 11566 11567 err = pci_request_mem_regions(pdev, ixgbe_driver_name); 11568 if (err) { 11569 dev_err(&pdev->dev, 11570 "pci_request_selected_regions failed 0x%x\n", err); 11571 goto err_pci_reg; 11572 } 11573 11574 pci_set_master(pdev); 11575 pci_save_state(pdev); 11576 11577 if (ii->mac == ixgbe_mac_82598EB) { 11578 #ifdef CONFIG_IXGBE_DCB 11579 /* 8 TC w/ 4 queues per TC */ 11580 indices = 4 * MAX_TRAFFIC_CLASS; 11581 #else 11582 indices = IXGBE_MAX_RSS_INDICES; 11583 #endif 11584 } else if (ii->mac == ixgbe_mac_e610) { 11585 indices = IXGBE_MAX_RSS_INDICES_X550; 11586 } 11587 11588 adapter = ixgbe_allocate_devlink(&pdev->dev); 11589 if (IS_ERR(adapter)) { 11590 err = PTR_ERR(adapter); 11591 goto err_devlink; 11592 } 11593 11594 netdev = alloc_etherdev_mq(sizeof(*netdev_priv_wrapper), indices); 11595 if (!netdev) { 11596 err = -ENOMEM; 11597 goto err_alloc_etherdev; 11598 } 11599 11600 SET_NETDEV_DEV(netdev, &pdev->dev); 11601 11602 netdev_priv_wrapper = netdev_priv(netdev); 11603 netdev_priv_wrapper->adapter = adapter; 11604 11605 adapter->netdev = netdev; 11606 adapter->pdev = pdev; 11607 hw = &adapter->hw; 11608 hw->back = adapter; 11609 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 11610 11611 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), 11612 pci_resource_len(pdev, 0)); 11613 adapter->io_addr = hw->hw_addr; 11614 if (!hw->hw_addr) { 11615 err = -EIO; 11616 goto err_ioremap; 11617 } 11618 11619 /* Setup hw api */ 11620 hw->mac.ops = *ii->mac_ops; 11621 hw->mac.type = ii->mac; 11622 hw->mvals = ii->mvals; 11623 if (ii->link_ops) 11624 hw->link.ops = *ii->link_ops; 11625 11626 /* EEPROM */ 11627 hw->eeprom.ops = *ii->eeprom_ops; 11628 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); 11629 if (ixgbe_removed(hw->hw_addr)) { 11630 err = -EIO; 11631 goto err_ioremap; 11632 } 11633 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */ 11634 if (!(eec & BIT(8))) 11635 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic; 11636 11637 /* PHY */ 11638 hw->phy.ops = *ii->phy_ops; 11639 hw->phy.sfp_type = ixgbe_sfp_type_unknown; 11640 /* ixgbe_identify_phy_generic will set prtad and mmds properly */ 11641 hw->phy.mdio.prtad = MDIO_PRTAD_NONE; 11642 hw->phy.mdio.mmds = 0; 11643 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22; 11644 hw->phy.mdio.dev = netdev; 11645 hw->phy.mdio.mdio_read = ixgbe_mdio_read; 11646 hw->phy.mdio.mdio_write = ixgbe_mdio_write; 11647 11648 netdev->netdev_ops = &ixgbe_netdev_ops; 11649 ixgbe_set_ethtool_ops(netdev); 11650 netdev->watchdog_timeo = 5 * HZ; 11651 strscpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); 11652 11653 /* setup the private structure */ 11654 err = ixgbe_sw_init(adapter, ii); 11655 if (err) 11656 goto err_sw_init; 11657 11658 /* Make sure the SWFW semaphore is in a valid state */ 11659 if (hw->mac.ops.init_swfw_sync) 11660 hw->mac.ops.init_swfw_sync(hw); 11661 11662 if (ixgbe_check_fw_error(adapter)) 11663 return ixgbe_recovery_probe(adapter); 11664 11665 if (adapter->hw.mac.type == ixgbe_mac_e610) { 11666 err = ixgbe_get_caps(&adapter->hw); 11667 if (err) 11668 dev_err(&pdev->dev, "ixgbe_get_caps failed %d\n", err); 11669 11670 err = ixgbe_get_flash_data(&adapter->hw); 11671 if (err) 11672 goto err_sw_init; 11673 } 11674 11675 if (adapter->hw.mac.type == ixgbe_mac_82599EB) 11676 adapter->flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF; 11677 11678 switch (adapter->hw.mac.type) { 11679 case ixgbe_mac_X550: 11680 case ixgbe_mac_X550EM_x: 11681 case ixgbe_mac_e610: 11682 netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550; 11683 break; 11684 case ixgbe_mac_x550em_a: 11685 netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550em_a; 11686 break; 11687 default: 11688 break; 11689 } 11690 11691 /* Make it possible the adapter to be woken up via WOL */ 11692 switch (adapter->hw.mac.type) { 11693 case ixgbe_mac_82599EB: 11694 case ixgbe_mac_X540: 11695 case ixgbe_mac_X550: 11696 case ixgbe_mac_X550EM_x: 11697 case ixgbe_mac_x550em_a: 11698 case ixgbe_mac_e610: 11699 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); 11700 break; 11701 default: 11702 break; 11703 } 11704 11705 /* 11706 * If there is a fan on this device and it has failed log the 11707 * failure. 11708 */ 11709 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) { 11710 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 11711 if (esdp & IXGBE_ESDP_SDP1) 11712 e_crit(probe, "Fan has stopped, replace the adapter\n"); 11713 } 11714 11715 if (allow_unsupported_sfp) 11716 hw->allow_unsupported_sfp = allow_unsupported_sfp; 11717 11718 /* reset_hw fills in the perm_addr as well */ 11719 hw->phy.reset_if_overtemp = true; 11720 err = hw->mac.ops.reset_hw(hw); 11721 hw->phy.reset_if_overtemp = false; 11722 ixgbe_set_eee_capable(adapter); 11723 if (err == -ENOENT) { 11724 err = 0; 11725 } else if (err == -EOPNOTSUPP) { 11726 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n"); 11727 e_dev_err("Reload the driver after installing a supported module.\n"); 11728 goto err_sw_init; 11729 } else if (err) { 11730 e_dev_err("HW Init failed: %d\n", err); 11731 goto err_sw_init; 11732 } 11733 11734 #ifdef CONFIG_PCI_IOV 11735 /* SR-IOV not supported on the 82598 */ 11736 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 11737 goto skip_sriov; 11738 /* Mailbox */ 11739 ixgbe_init_mbx_params_pf(hw); 11740 hw->mbx.ops = ii->mbx_ops; 11741 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT); 11742 ixgbe_enable_sriov(adapter, max_vfs); 11743 skip_sriov: 11744 11745 #endif 11746 netdev->features = NETIF_F_SG | 11747 NETIF_F_TSO | 11748 NETIF_F_TSO6 | 11749 NETIF_F_RXHASH | 11750 NETIF_F_RXCSUM | 11751 NETIF_F_HW_CSUM; 11752 11753 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \ 11754 NETIF_F_GSO_GRE_CSUM | \ 11755 NETIF_F_GSO_IPXIP4 | \ 11756 NETIF_F_GSO_IPXIP6 | \ 11757 NETIF_F_GSO_UDP_TUNNEL | \ 11758 NETIF_F_GSO_UDP_TUNNEL_CSUM) 11759 11760 netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES; 11761 netdev->features |= NETIF_F_GSO_PARTIAL | 11762 IXGBE_GSO_PARTIAL_FEATURES; 11763 11764 if (hw->mac.type >= ixgbe_mac_82599EB) 11765 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4; 11766 11767 #ifdef CONFIG_IXGBE_IPSEC 11768 #define IXGBE_ESP_FEATURES (NETIF_F_HW_ESP | \ 11769 NETIF_F_HW_ESP_TX_CSUM | \ 11770 NETIF_F_GSO_ESP) 11771 11772 if (adapter->ipsec) 11773 netdev->features |= IXGBE_ESP_FEATURES; 11774 #endif 11775 /* copy netdev features into list of user selectable features */ 11776 netdev->hw_features |= netdev->features | 11777 NETIF_F_HW_VLAN_CTAG_FILTER | 11778 NETIF_F_HW_VLAN_CTAG_RX | 11779 NETIF_F_HW_VLAN_CTAG_TX | 11780 NETIF_F_RXALL | 11781 NETIF_F_HW_L2FW_DOFFLOAD; 11782 11783 if (hw->mac.type >= ixgbe_mac_82599EB) 11784 netdev->hw_features |= NETIF_F_NTUPLE | 11785 NETIF_F_HW_TC; 11786 11787 netdev->features |= NETIF_F_HIGHDMA; 11788 11789 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID; 11790 netdev->hw_enc_features |= netdev->vlan_features; 11791 netdev->mpls_features |= NETIF_F_SG | 11792 NETIF_F_TSO | 11793 NETIF_F_TSO6 | 11794 NETIF_F_HW_CSUM; 11795 netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES; 11796 11797 /* set this bit last since it cannot be part of vlan_features */ 11798 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | 11799 NETIF_F_HW_VLAN_CTAG_RX | 11800 NETIF_F_HW_VLAN_CTAG_TX; 11801 11802 netdev->priv_flags |= IFF_UNICAST_FLT; 11803 netdev->priv_flags |= IFF_SUPP_NOFCS; 11804 11805 netdev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT | 11806 NETDEV_XDP_ACT_XSK_ZEROCOPY; 11807 11808 /* MTU range: 68 - 9710 */ 11809 netdev->min_mtu = ETH_MIN_MTU; 11810 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN); 11811 11812 #ifdef CONFIG_IXGBE_DCB 11813 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE) 11814 netdev->dcbnl_ops = &ixgbe_dcbnl_ops; 11815 #endif 11816 11817 #ifdef IXGBE_FCOE 11818 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) { 11819 unsigned int fcoe_l; 11820 11821 if (hw->mac.ops.get_device_caps) { 11822 hw->mac.ops.get_device_caps(hw, &device_caps); 11823 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS) 11824 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE; 11825 } 11826 11827 11828 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus()); 11829 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l; 11830 11831 netdev->features |= NETIF_F_FSO | 11832 NETIF_F_FCOE_CRC; 11833 11834 netdev->vlan_features |= NETIF_F_FSO | 11835 NETIF_F_FCOE_CRC; 11836 } 11837 #endif /* IXGBE_FCOE */ 11838 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) 11839 netdev->hw_features |= NETIF_F_LRO; 11840 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) 11841 netdev->features |= NETIF_F_LRO; 11842 11843 /* make sure the EEPROM is good */ 11844 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) { 11845 e_dev_err("The EEPROM Checksum Is Not Valid\n"); 11846 err = -EIO; 11847 goto err_sw_init; 11848 } 11849 11850 eth_platform_get_mac_address(&adapter->pdev->dev, 11851 adapter->hw.mac.perm_addr); 11852 11853 eth_hw_addr_set(netdev, hw->mac.perm_addr); 11854 11855 if (!is_valid_ether_addr(netdev->dev_addr)) { 11856 e_dev_err("invalid MAC address\n"); 11857 err = -EIO; 11858 goto err_sw_init; 11859 } 11860 11861 /* Set hw->mac.addr to permanent MAC address */ 11862 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr); 11863 ixgbe_mac_set_default_filter(adapter); 11864 11865 if (hw->mac.type == ixgbe_mac_e610) 11866 mutex_init(&hw->aci.lock); 11867 timer_setup(&adapter->service_timer, ixgbe_service_timer, 0); 11868 11869 if (ixgbe_removed(hw->hw_addr)) { 11870 err = -EIO; 11871 goto err_sw_init; 11872 } 11873 INIT_WORK(&adapter->service_task, ixgbe_service_task); 11874 set_bit(__IXGBE_SERVICE_INITED, &adapter->state); 11875 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state); 11876 11877 err = ixgbe_init_interrupt_scheme(adapter); 11878 if (err) 11879 goto err_sw_init; 11880 11881 for (i = 0; i < adapter->num_rx_queues; i++) 11882 u64_stats_init(&adapter->rx_ring[i]->syncp); 11883 for (i = 0; i < adapter->num_tx_queues; i++) 11884 u64_stats_init(&adapter->tx_ring[i]->syncp); 11885 for (i = 0; i < adapter->num_xdp_queues; i++) 11886 u64_stats_init(&adapter->xdp_ring[i]->syncp); 11887 11888 /* WOL not supported for all devices */ 11889 adapter->wol = 0; 11890 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap); 11891 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device, 11892 pdev->subsystem_device); 11893 if (hw->wol_enabled) 11894 adapter->wol = IXGBE_WUFC_MAG; 11895 11896 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 11897 11898 /* save off EEPROM version number */ 11899 ixgbe_set_fw_version(adapter); 11900 11901 /* pick up the PCI bus settings for reporting later */ 11902 if (ixgbe_pcie_from_parent(hw)) 11903 ixgbe_get_parent_bus_info(adapter); 11904 else 11905 hw->mac.ops.get_bus_info(hw); 11906 11907 /* calculate the expected PCIe bandwidth required for optimal 11908 * performance. Note that some older parts will never have enough 11909 * bandwidth due to being older generation PCIe parts. We clamp these 11910 * parts to ensure no warning is displayed if it can't be fixed. 11911 */ 11912 switch (hw->mac.type) { 11913 case ixgbe_mac_82598EB: 11914 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16); 11915 break; 11916 default: 11917 expected_gts = ixgbe_enumerate_functions(adapter) * 10; 11918 break; 11919 } 11920 11921 /* don't check link if we failed to enumerate functions */ 11922 if (expected_gts > 0) 11923 ixgbe_check_minimum_link(adapter, expected_gts); 11924 11925 err = hw->eeprom.ops.read_pba_string(hw, part_str, sizeof(part_str)); 11926 if (err) 11927 strscpy(part_str, "Unknown", sizeof(part_str)); 11928 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present) 11929 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n", 11930 hw->mac.type, hw->phy.type, hw->phy.sfp_type, 11931 part_str); 11932 else 11933 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n", 11934 hw->mac.type, hw->phy.type, part_str); 11935 11936 e_dev_info("%pM\n", netdev->dev_addr); 11937 11938 /* reset the hardware with the new settings */ 11939 err = hw->mac.ops.start_hw(hw); 11940 if (err == -EACCES) { 11941 /* We are running on a pre-production device, log a warning */ 11942 e_dev_warn("This device is a pre-production adapter/LOM. " 11943 "Please be aware there may be issues associated " 11944 "with your hardware. If you are experiencing " 11945 "problems please contact your Intel or hardware " 11946 "representative who provided you with this " 11947 "hardware.\n"); 11948 } 11949 strcpy(netdev->name, "eth%d"); 11950 pci_set_drvdata(pdev, adapter); 11951 11952 devl_lock(adapter->devlink); 11953 ixgbe_devlink_register_port(adapter); 11954 SET_NETDEV_DEVLINK_PORT(adapter->netdev, &adapter->devlink_port); 11955 11956 err = register_netdev(netdev); 11957 if (err) 11958 goto err_register; 11959 11960 11961 /* power down the optics for 82599 SFP+ fiber */ 11962 if (hw->mac.ops.disable_tx_laser) 11963 hw->mac.ops.disable_tx_laser(hw); 11964 11965 /* carrier off reporting is important to ethtool even BEFORE open */ 11966 netif_carrier_off(netdev); 11967 11968 #ifdef CONFIG_IXGBE_DCA 11969 if (dca_add_requester(&pdev->dev) == 0) { 11970 adapter->flags |= IXGBE_FLAG_DCA_ENABLED; 11971 ixgbe_setup_dca(adapter); 11972 } 11973 #endif 11974 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 11975 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs); 11976 for (i = 0; i < adapter->num_vfs; i++) 11977 ixgbe_vf_configuration(pdev, (i | 0x10000000)); 11978 } 11979 11980 /* firmware requires driver version to be 0xFFFFFFFF 11981 * since os does not support feature 11982 */ 11983 if (hw->mac.ops.set_fw_drv_ver) 11984 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF, 11985 sizeof(UTS_RELEASE) - 1, 11986 UTS_RELEASE); 11987 11988 /* add san mac addr to netdev */ 11989 ixgbe_add_sanmac_netdev(netdev); 11990 11991 e_dev_info("%s\n", ixgbe_default_device_descr); 11992 11993 #ifdef CONFIG_IXGBE_HWMON 11994 if (ixgbe_sysfs_init(adapter)) 11995 e_err(probe, "failed to allocate sysfs resources\n"); 11996 #endif /* CONFIG_IXGBE_HWMON */ 11997 11998 ixgbe_dbg_adapter_init(adapter); 11999 12000 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */ 12001 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link) 12002 hw->mac.ops.setup_link(hw, 12003 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL, 12004 true); 12005 12006 err = ixgbe_mii_bus_init(hw); 12007 if (err) 12008 goto err_netdev; 12009 12010 ixgbe_devlink_init_regions(adapter); 12011 devl_register(adapter->devlink); 12012 devl_unlock(adapter->devlink); 12013 return 0; 12014 12015 err_netdev: 12016 unregister_netdev(netdev); 12017 err_register: 12018 devl_port_unregister(&adapter->devlink_port); 12019 devl_unlock(adapter->devlink); 12020 ixgbe_release_hw_control(adapter); 12021 ixgbe_clear_interrupt_scheme(adapter); 12022 if (hw->mac.type == ixgbe_mac_e610) 12023 mutex_destroy(&adapter->hw.aci.lock); 12024 err_sw_init: 12025 ixgbe_disable_sriov(adapter); 12026 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP; 12027 iounmap(adapter->io_addr); 12028 kfree(adapter->jump_tables[0]); 12029 kfree(adapter->mac_table); 12030 kfree(adapter->rss_key); 12031 bitmap_free(adapter->af_xdp_zc_qps); 12032 err_ioremap: 12033 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state); 12034 free_netdev(netdev); 12035 err_alloc_etherdev: 12036 devlink_free(adapter->devlink); 12037 pci_release_mem_regions(pdev); 12038 err_devlink: 12039 err_pci_reg: 12040 err_dma: 12041 if (!adapter || disable_dev) 12042 pci_disable_device(pdev); 12043 return err; 12044 } 12045 12046 /** 12047 * ixgbe_remove - Device Removal Routine 12048 * @pdev: PCI device information struct 12049 * 12050 * ixgbe_remove is called by the PCI subsystem to alert the driver 12051 * that it should release a PCI device. The could be caused by a 12052 * Hot-Plug event, or because the driver is going to be removed from 12053 * memory. 12054 **/ 12055 static void ixgbe_remove(struct pci_dev *pdev) 12056 { 12057 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 12058 struct net_device *netdev; 12059 bool disable_dev; 12060 int i; 12061 12062 /* if !adapter then we already cleaned up in probe */ 12063 if (!adapter) 12064 return; 12065 12066 netdev = adapter->netdev; 12067 devl_lock(adapter->devlink); 12068 devl_unregister(adapter->devlink); 12069 ixgbe_devlink_destroy_regions(adapter); 12070 ixgbe_dbg_adapter_exit(adapter); 12071 12072 set_bit(__IXGBE_REMOVING, &adapter->state); 12073 cancel_work_sync(&adapter->service_task); 12074 12075 if (adapter->hw.mac.type == ixgbe_mac_e610) { 12076 ixgbe_disable_link_status_events(adapter); 12077 mutex_destroy(&adapter->hw.aci.lock); 12078 } 12079 12080 if (adapter->mii_bus) 12081 mdiobus_unregister(adapter->mii_bus); 12082 12083 #ifdef CONFIG_IXGBE_DCA 12084 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { 12085 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED; 12086 dca_remove_requester(&pdev->dev); 12087 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 12088 IXGBE_DCA_CTRL_DCA_DISABLE); 12089 } 12090 12091 #endif 12092 #ifdef CONFIG_IXGBE_HWMON 12093 ixgbe_sysfs_exit(adapter); 12094 #endif /* CONFIG_IXGBE_HWMON */ 12095 12096 /* remove the added san mac */ 12097 ixgbe_del_sanmac_netdev(netdev); 12098 12099 #ifdef CONFIG_PCI_IOV 12100 ixgbe_disable_sriov(adapter); 12101 #endif 12102 if (netdev->reg_state == NETREG_REGISTERED) 12103 unregister_netdev(netdev); 12104 12105 devl_port_unregister(&adapter->devlink_port); 12106 devl_unlock(adapter->devlink); 12107 devlink_free(adapter->devlink); 12108 12109 ixgbe_stop_ipsec_offload(adapter); 12110 ixgbe_clear_interrupt_scheme(adapter); 12111 12112 ixgbe_release_hw_control(adapter); 12113 12114 #ifdef CONFIG_DCB 12115 kfree(adapter->ixgbe_ieee_pfc); 12116 kfree(adapter->ixgbe_ieee_ets); 12117 12118 #endif 12119 iounmap(adapter->io_addr); 12120 pci_release_mem_regions(pdev); 12121 12122 e_dev_info("complete\n"); 12123 12124 for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) { 12125 if (adapter->jump_tables[i]) { 12126 kfree(adapter->jump_tables[i]->input); 12127 kfree(adapter->jump_tables[i]->mask); 12128 } 12129 kfree(adapter->jump_tables[i]); 12130 } 12131 12132 kfree(adapter->mac_table); 12133 kfree(adapter->rss_key); 12134 bitmap_free(adapter->af_xdp_zc_qps); 12135 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state); 12136 free_netdev(netdev); 12137 12138 if (disable_dev) 12139 pci_disable_device(pdev); 12140 } 12141 12142 /** 12143 * ixgbe_io_error_detected - called when PCI error is detected 12144 * @pdev: Pointer to PCI device 12145 * @state: The current pci connection state 12146 * 12147 * This function is called after a PCI bus error affecting 12148 * this device has been detected. 12149 */ 12150 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev, 12151 pci_channel_state_t state) 12152 { 12153 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 12154 struct net_device *netdev = adapter->netdev; 12155 12156 #ifdef CONFIG_PCI_IOV 12157 struct ixgbe_hw *hw = &adapter->hw; 12158 struct pci_dev *bdev, *vfdev; 12159 u32 dw0, dw1, dw2, dw3; 12160 int vf, pos; 12161 u16 req_id, pf_func; 12162 12163 if (adapter->hw.mac.type == ixgbe_mac_82598EB || 12164 adapter->num_vfs == 0) 12165 goto skip_bad_vf_detection; 12166 12167 bdev = pdev->bus->self; 12168 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT)) 12169 bdev = bdev->bus->self; 12170 12171 if (!bdev) 12172 goto skip_bad_vf_detection; 12173 12174 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR); 12175 if (!pos) 12176 goto skip_bad_vf_detection; 12177 12178 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG); 12179 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4); 12180 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8); 12181 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12); 12182 if (ixgbe_removed(hw->hw_addr)) 12183 goto skip_bad_vf_detection; 12184 12185 req_id = dw1 >> 16; 12186 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */ 12187 if (!(req_id & 0x0080)) 12188 goto skip_bad_vf_detection; 12189 12190 pf_func = req_id & 0x01; 12191 if ((pf_func & 1) == (pdev->devfn & 1)) { 12192 unsigned int device_id; 12193 12194 vf = FIELD_GET(0x7F, req_id); 12195 e_dev_err("VF %d has caused a PCIe error\n", vf); 12196 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: " 12197 "%8.8x\tdw3: %8.8x\n", 12198 dw0, dw1, dw2, dw3); 12199 switch (adapter->hw.mac.type) { 12200 case ixgbe_mac_82599EB: 12201 device_id = IXGBE_82599_VF_DEVICE_ID; 12202 break; 12203 case ixgbe_mac_X540: 12204 device_id = IXGBE_X540_VF_DEVICE_ID; 12205 break; 12206 case ixgbe_mac_X550: 12207 device_id = IXGBE_DEV_ID_X550_VF; 12208 break; 12209 case ixgbe_mac_X550EM_x: 12210 device_id = IXGBE_DEV_ID_X550EM_X_VF; 12211 break; 12212 case ixgbe_mac_x550em_a: 12213 device_id = IXGBE_DEV_ID_X550EM_A_VF; 12214 break; 12215 case ixgbe_mac_e610: 12216 device_id = IXGBE_DEV_ID_E610_VF; 12217 break; 12218 default: 12219 device_id = 0; 12220 break; 12221 } 12222 12223 /* Find the pci device of the offending VF */ 12224 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL); 12225 while (vfdev) { 12226 if (vfdev->devfn == (req_id & 0xFF)) 12227 break; 12228 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, 12229 device_id, vfdev); 12230 } 12231 /* 12232 * There's a slim chance the VF could have been hot plugged, 12233 * so if it is no longer present we don't need to issue the 12234 * VFLR. Just clean up the AER in that case. 12235 */ 12236 if (vfdev) { 12237 pcie_flr(vfdev); 12238 /* Free device reference count */ 12239 pci_dev_put(vfdev); 12240 } 12241 } 12242 12243 /* 12244 * Even though the error may have occurred on the other port 12245 * we still need to increment the vf error reference count for 12246 * both ports because the I/O resume function will be called 12247 * for both of them. 12248 */ 12249 adapter->vferr_refcount++; 12250 12251 return PCI_ERS_RESULT_RECOVERED; 12252 12253 skip_bad_vf_detection: 12254 #endif /* CONFIG_PCI_IOV */ 12255 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state)) 12256 return PCI_ERS_RESULT_DISCONNECT; 12257 12258 if (!netif_device_present(netdev)) 12259 return PCI_ERS_RESULT_DISCONNECT; 12260 12261 rtnl_lock(); 12262 netif_device_detach(netdev); 12263 12264 if (netif_running(netdev)) 12265 ixgbe_close_suspend(adapter); 12266 12267 if (state == pci_channel_io_perm_failure) { 12268 rtnl_unlock(); 12269 return PCI_ERS_RESULT_DISCONNECT; 12270 } 12271 12272 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state)) 12273 pci_disable_device(pdev); 12274 rtnl_unlock(); 12275 12276 /* Request a slot reset. */ 12277 return PCI_ERS_RESULT_NEED_RESET; 12278 } 12279 12280 /** 12281 * ixgbe_io_slot_reset - called after the pci bus has been reset. 12282 * @pdev: Pointer to PCI device 12283 * 12284 * Restart the card from scratch, as if from a cold-boot. 12285 */ 12286 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev) 12287 { 12288 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 12289 pci_ers_result_t result; 12290 12291 if (pci_enable_device_mem(pdev)) { 12292 e_err(probe, "Cannot re-enable PCI device after reset.\n"); 12293 result = PCI_ERS_RESULT_DISCONNECT; 12294 } else { 12295 smp_mb__before_atomic(); 12296 clear_bit(__IXGBE_DISABLED, &adapter->state); 12297 adapter->hw.hw_addr = adapter->io_addr; 12298 pci_set_master(pdev); 12299 pci_restore_state(pdev); 12300 pci_save_state(pdev); 12301 12302 pci_wake_from_d3(pdev, false); 12303 12304 ixgbe_reset(adapter); 12305 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); 12306 result = PCI_ERS_RESULT_RECOVERED; 12307 } 12308 12309 return result; 12310 } 12311 12312 /** 12313 * ixgbe_io_resume - called when traffic can start flowing again. 12314 * @pdev: Pointer to PCI device 12315 * 12316 * This callback is called when the error recovery driver tells us that 12317 * its OK to resume normal operation. 12318 */ 12319 static void ixgbe_io_resume(struct pci_dev *pdev) 12320 { 12321 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); 12322 struct net_device *netdev = adapter->netdev; 12323 12324 #ifdef CONFIG_PCI_IOV 12325 if (adapter->vferr_refcount) { 12326 e_info(drv, "Resuming after VF err\n"); 12327 adapter->vferr_refcount--; 12328 return; 12329 } 12330 12331 #endif 12332 rtnl_lock(); 12333 if (netif_running(netdev)) 12334 ixgbe_open(netdev); 12335 12336 netif_device_attach(netdev); 12337 rtnl_unlock(); 12338 } 12339 12340 static const struct pci_error_handlers ixgbe_err_handler = { 12341 .error_detected = ixgbe_io_error_detected, 12342 .slot_reset = ixgbe_io_slot_reset, 12343 .resume = ixgbe_io_resume, 12344 }; 12345 12346 static DEFINE_SIMPLE_DEV_PM_OPS(ixgbe_pm_ops, ixgbe_suspend, ixgbe_resume); 12347 12348 static struct pci_driver ixgbe_driver = { 12349 .name = ixgbe_driver_name, 12350 .id_table = ixgbe_pci_tbl, 12351 .probe = ixgbe_probe, 12352 .remove = ixgbe_remove, 12353 .driver.pm = pm_sleep_ptr(&ixgbe_pm_ops), 12354 .shutdown = ixgbe_shutdown, 12355 .sriov_configure = ixgbe_pci_sriov_configure, 12356 .err_handler = &ixgbe_err_handler 12357 }; 12358 12359 /** 12360 * ixgbe_init_module - Driver Registration Routine 12361 * 12362 * ixgbe_init_module is the first routine called when the driver is 12363 * loaded. All it does is register with the PCI subsystem. 12364 **/ 12365 static int __init ixgbe_init_module(void) 12366 { 12367 int ret; 12368 pr_info("%s\n", ixgbe_driver_string); 12369 pr_info("%s\n", ixgbe_copyright); 12370 12371 ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name); 12372 if (!ixgbe_wq) { 12373 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name); 12374 return -ENOMEM; 12375 } 12376 12377 ixgbe_dbg_init(); 12378 12379 ret = pci_register_driver(&ixgbe_driver); 12380 if (ret) { 12381 destroy_workqueue(ixgbe_wq); 12382 ixgbe_dbg_exit(); 12383 return ret; 12384 } 12385 12386 #ifdef CONFIG_IXGBE_DCA 12387 dca_register_notify(&dca_notifier); 12388 #endif 12389 12390 return 0; 12391 } 12392 12393 module_init(ixgbe_init_module); 12394 12395 /** 12396 * ixgbe_exit_module - Driver Exit Cleanup Routine 12397 * 12398 * ixgbe_exit_module is called just before the driver is removed 12399 * from memory. 12400 **/ 12401 static void __exit ixgbe_exit_module(void) 12402 { 12403 #ifdef CONFIG_IXGBE_DCA 12404 dca_unregister_notify(&dca_notifier); 12405 #endif 12406 pci_unregister_driver(&ixgbe_driver); 12407 12408 ixgbe_dbg_exit(); 12409 if (ixgbe_wq) { 12410 destroy_workqueue(ixgbe_wq); 12411 ixgbe_wq = NULL; 12412 } 12413 } 12414 12415 #ifdef CONFIG_IXGBE_DCA 12416 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event, 12417 void *p) 12418 { 12419 int ret_val; 12420 12421 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event, 12422 __ixgbe_notify_dca); 12423 12424 return ret_val ? NOTIFY_BAD : NOTIFY_DONE; 12425 } 12426 12427 #endif /* CONFIG_IXGBE_DCA */ 12428 12429 module_exit(ixgbe_exit_module); 12430 12431 /* ixgbe_main.c */ 12432