1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2024 Intel Corporation. */ 3 4 /* ethtool support for ixgbe */ 5 6 #include <linux/interrupt.h> 7 #include <linux/types.h> 8 #include <linux/module.h> 9 #include <linux/slab.h> 10 #include <linux/pci.h> 11 #include <linux/netdevice.h> 12 #include <linux/ethtool.h> 13 #include <linux/vmalloc.h> 14 #include <linux/highmem.h> 15 #include <linux/uaccess.h> 16 17 #include "ixgbe.h" 18 #include "ixgbe_phy.h" 19 20 21 enum {NETDEV_STATS, IXGBE_STATS}; 22 23 struct ixgbe_stats { 24 char stat_string[ETH_GSTRING_LEN]; 25 int type; 26 int sizeof_stat; 27 int stat_offset; 28 }; 29 30 #define IXGBE_STAT(m) IXGBE_STATS, \ 31 sizeof(((struct ixgbe_adapter *)0)->m), \ 32 offsetof(struct ixgbe_adapter, m) 33 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \ 34 sizeof(((struct rtnl_link_stats64 *)0)->m), \ 35 offsetof(struct rtnl_link_stats64, m) 36 37 static const struct ixgbe_stats ixgbe_gstrings_stats[] = { 38 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)}, 39 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)}, 40 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)}, 41 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)}, 42 {"rx_pkts_nic", IXGBE_STAT(stats.gprc)}, 43 {"tx_pkts_nic", IXGBE_STAT(stats.gptc)}, 44 {"rx_bytes_nic", IXGBE_STAT(stats.gorc)}, 45 {"tx_bytes_nic", IXGBE_STAT(stats.gotc)}, 46 {"lsc_int", IXGBE_STAT(lsc_int)}, 47 {"tx_busy", IXGBE_STAT(tx_busy)}, 48 {"non_eop_descs", IXGBE_STAT(non_eop_descs)}, 49 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)}, 50 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)}, 51 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)}, 52 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)}, 53 {"multicast", IXGBE_NETDEV_STAT(multicast)}, 54 {"broadcast", IXGBE_STAT(stats.bprc)}, 55 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) }, 56 {"collisions", IXGBE_NETDEV_STAT(collisions)}, 57 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)}, 58 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)}, 59 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)}, 60 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)}, 61 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)}, 62 {"fdir_match", IXGBE_STAT(stats.fdirmatch)}, 63 {"fdir_miss", IXGBE_STAT(stats.fdirmiss)}, 64 {"fdir_overflow", IXGBE_STAT(fdir_overflow)}, 65 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)}, 66 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)}, 67 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)}, 68 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)}, 69 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)}, 70 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)}, 71 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)}, 72 {"tx_restart_queue", IXGBE_STAT(restart_queue)}, 73 {"rx_length_errors", IXGBE_STAT(stats.rlec)}, 74 {"rx_long_length_errors", IXGBE_STAT(stats.roc)}, 75 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)}, 76 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)}, 77 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)}, 78 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)}, 79 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)}, 80 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)}, 81 {"alloc_rx_page", IXGBE_STAT(alloc_rx_page)}, 82 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)}, 83 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)}, 84 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)}, 85 {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)}, 86 {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)}, 87 {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)}, 88 {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)}, 89 {"tx_hwtstamp_timeouts", IXGBE_STAT(tx_hwtstamp_timeouts)}, 90 {"tx_hwtstamp_skipped", IXGBE_STAT(tx_hwtstamp_skipped)}, 91 {"rx_hwtstamp_cleared", IXGBE_STAT(rx_hwtstamp_cleared)}, 92 {"tx_ipsec", IXGBE_STAT(tx_ipsec)}, 93 {"rx_ipsec", IXGBE_STAT(rx_ipsec)}, 94 #ifdef IXGBE_FCOE 95 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)}, 96 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)}, 97 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)}, 98 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)}, 99 {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)}, 100 {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)}, 101 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)}, 102 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)}, 103 #endif /* IXGBE_FCOE */ 104 }; 105 106 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so 107 * we set the num_rx_queues to evaluate to num_tx_queues. This is 108 * used because we do not have a good way to get the max number of 109 * rx queues with CONFIG_RPS disabled. 110 */ 111 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues 112 113 #define IXGBE_QUEUE_STATS_LEN ( \ 114 (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \ 115 (sizeof(struct ixgbe_queue_stats) / sizeof(u64))) 116 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats) 117 #define IXGBE_PB_STATS_LEN ( \ 118 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \ 119 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \ 120 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \ 121 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \ 122 / sizeof(u64)) 123 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \ 124 IXGBE_PB_STATS_LEN + \ 125 IXGBE_QUEUE_STATS_LEN) 126 127 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = { 128 "Register test (offline)", "Eeprom test (offline)", 129 "Interrupt test (offline)", "Loopback test (offline)", 130 "Link test (on/offline)" 131 }; 132 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN 133 134 static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = { 135 #define IXGBE_PRIV_FLAGS_LEGACY_RX BIT(0) 136 "legacy-rx", 137 #define IXGBE_PRIV_FLAGS_VF_IPSEC_EN BIT(1) 138 "vf-ipsec", 139 #define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF BIT(2) 140 "mdd-disable-vf", 141 }; 142 143 #define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings) 144 145 #define ixgbe_isbackplane(type) ((type) == ixgbe_media_type_backplane) 146 147 static void ixgbe_set_supported_10gtypes(struct ixgbe_hw *hw, 148 struct ethtool_link_ksettings *cmd) 149 { 150 if (!ixgbe_isbackplane(hw->phy.media_type)) { 151 ethtool_link_ksettings_add_link_mode(cmd, supported, 152 10000baseT_Full); 153 return; 154 } 155 156 switch (hw->device_id) { 157 case IXGBE_DEV_ID_82598: 158 case IXGBE_DEV_ID_82599_KX4: 159 case IXGBE_DEV_ID_82599_KX4_MEZZ: 160 case IXGBE_DEV_ID_X550EM_X_KX4: 161 ethtool_link_ksettings_add_link_mode 162 (cmd, supported, 10000baseKX4_Full); 163 break; 164 case IXGBE_DEV_ID_82598_BX: 165 case IXGBE_DEV_ID_82599_KR: 166 case IXGBE_DEV_ID_X550EM_X_KR: 167 case IXGBE_DEV_ID_X550EM_X_XFI: 168 ethtool_link_ksettings_add_link_mode 169 (cmd, supported, 10000baseKR_Full); 170 break; 171 default: 172 ethtool_link_ksettings_add_link_mode 173 (cmd, supported, 10000baseKX4_Full); 174 ethtool_link_ksettings_add_link_mode 175 (cmd, supported, 10000baseKR_Full); 176 break; 177 } 178 } 179 180 static void ixgbe_set_advertising_10gtypes(struct ixgbe_hw *hw, 181 struct ethtool_link_ksettings *cmd) 182 { 183 if (!ixgbe_isbackplane(hw->phy.media_type)) { 184 ethtool_link_ksettings_add_link_mode(cmd, advertising, 185 10000baseT_Full); 186 return; 187 } 188 189 switch (hw->device_id) { 190 case IXGBE_DEV_ID_82598: 191 case IXGBE_DEV_ID_82599_KX4: 192 case IXGBE_DEV_ID_82599_KX4_MEZZ: 193 case IXGBE_DEV_ID_X550EM_X_KX4: 194 ethtool_link_ksettings_add_link_mode 195 (cmd, advertising, 10000baseKX4_Full); 196 break; 197 case IXGBE_DEV_ID_82598_BX: 198 case IXGBE_DEV_ID_82599_KR: 199 case IXGBE_DEV_ID_X550EM_X_KR: 200 case IXGBE_DEV_ID_X550EM_X_XFI: 201 ethtool_link_ksettings_add_link_mode 202 (cmd, advertising, 10000baseKR_Full); 203 break; 204 default: 205 ethtool_link_ksettings_add_link_mode 206 (cmd, advertising, 10000baseKX4_Full); 207 ethtool_link_ksettings_add_link_mode 208 (cmd, advertising, 10000baseKR_Full); 209 break; 210 } 211 } 212 213 static int ixgbe_get_link_ksettings(struct net_device *netdev, 214 struct ethtool_link_ksettings *cmd) 215 { 216 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 217 struct ixgbe_hw *hw = &adapter->hw; 218 ixgbe_link_speed supported_link; 219 bool autoneg = false; 220 221 ethtool_link_ksettings_zero_link_mode(cmd, supported); 222 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 223 224 hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg); 225 226 /* set the supported link speeds */ 227 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) { 228 ixgbe_set_supported_10gtypes(hw, cmd); 229 ixgbe_set_advertising_10gtypes(hw, cmd); 230 } 231 if (supported_link & IXGBE_LINK_SPEED_5GB_FULL) 232 ethtool_link_ksettings_add_link_mode(cmd, supported, 233 5000baseT_Full); 234 235 if (supported_link & IXGBE_LINK_SPEED_2_5GB_FULL) 236 ethtool_link_ksettings_add_link_mode(cmd, supported, 237 2500baseT_Full); 238 239 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL) { 240 if (ixgbe_isbackplane(hw->phy.media_type)) { 241 ethtool_link_ksettings_add_link_mode(cmd, supported, 242 1000baseKX_Full); 243 ethtool_link_ksettings_add_link_mode(cmd, advertising, 244 1000baseKX_Full); 245 } else { 246 ethtool_link_ksettings_add_link_mode(cmd, supported, 247 1000baseT_Full); 248 ethtool_link_ksettings_add_link_mode(cmd, advertising, 249 1000baseT_Full); 250 } 251 } 252 if (supported_link & IXGBE_LINK_SPEED_100_FULL) { 253 ethtool_link_ksettings_add_link_mode(cmd, supported, 254 100baseT_Full); 255 ethtool_link_ksettings_add_link_mode(cmd, advertising, 256 100baseT_Full); 257 } 258 if (supported_link & IXGBE_LINK_SPEED_10_FULL) { 259 ethtool_link_ksettings_add_link_mode(cmd, supported, 260 10baseT_Full); 261 ethtool_link_ksettings_add_link_mode(cmd, advertising, 262 10baseT_Full); 263 } 264 265 /* set the advertised speeds */ 266 if (hw->phy.autoneg_advertised) { 267 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 268 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL) 269 ethtool_link_ksettings_add_link_mode(cmd, advertising, 270 10baseT_Full); 271 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) 272 ethtool_link_ksettings_add_link_mode(cmd, advertising, 273 100baseT_Full); 274 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) 275 ixgbe_set_advertising_10gtypes(hw, cmd); 276 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) { 277 if (ethtool_link_ksettings_test_link_mode 278 (cmd, supported, 1000baseKX_Full)) 279 ethtool_link_ksettings_add_link_mode 280 (cmd, advertising, 1000baseKX_Full); 281 else 282 ethtool_link_ksettings_add_link_mode 283 (cmd, advertising, 1000baseT_Full); 284 } 285 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) 286 ethtool_link_ksettings_add_link_mode(cmd, advertising, 287 5000baseT_Full); 288 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) 289 ethtool_link_ksettings_add_link_mode(cmd, advertising, 290 2500baseT_Full); 291 } else { 292 if (hw->phy.multispeed_fiber && !autoneg) { 293 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) 294 ethtool_link_ksettings_add_link_mode 295 (cmd, advertising, 10000baseT_Full); 296 } 297 } 298 299 if (autoneg) { 300 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 301 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 302 cmd->base.autoneg = AUTONEG_ENABLE; 303 } else 304 cmd->base.autoneg = AUTONEG_DISABLE; 305 306 /* Determine the remaining settings based on the PHY type. */ 307 switch (adapter->hw.phy.type) { 308 case ixgbe_phy_tn: 309 case ixgbe_phy_aq: 310 case ixgbe_phy_x550em_ext_t: 311 case ixgbe_phy_fw: 312 case ixgbe_phy_cu_unknown: 313 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 314 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 315 cmd->base.port = PORT_TP; 316 break; 317 case ixgbe_phy_qt: 318 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 319 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 320 cmd->base.port = PORT_FIBRE; 321 break; 322 case ixgbe_phy_nl: 323 case ixgbe_phy_sfp_passive_tyco: 324 case ixgbe_phy_sfp_passive_unknown: 325 case ixgbe_phy_sfp_ftl: 326 case ixgbe_phy_sfp_avago: 327 case ixgbe_phy_sfp_intel: 328 case ixgbe_phy_sfp_unknown: 329 case ixgbe_phy_qsfp_passive_unknown: 330 case ixgbe_phy_qsfp_active_unknown: 331 case ixgbe_phy_qsfp_intel: 332 case ixgbe_phy_qsfp_unknown: 333 /* SFP+ devices, further checking needed */ 334 switch (adapter->hw.phy.sfp_type) { 335 case ixgbe_sfp_type_da_cu: 336 case ixgbe_sfp_type_da_cu_core0: 337 case ixgbe_sfp_type_da_cu_core1: 338 ethtool_link_ksettings_add_link_mode(cmd, supported, 339 FIBRE); 340 ethtool_link_ksettings_add_link_mode(cmd, advertising, 341 FIBRE); 342 cmd->base.port = PORT_DA; 343 break; 344 case ixgbe_sfp_type_sr: 345 case ixgbe_sfp_type_lr: 346 case ixgbe_sfp_type_srlr_core0: 347 case ixgbe_sfp_type_srlr_core1: 348 case ixgbe_sfp_type_1g_sx_core0: 349 case ixgbe_sfp_type_1g_sx_core1: 350 case ixgbe_sfp_type_1g_lx_core0: 351 case ixgbe_sfp_type_1g_lx_core1: 352 case ixgbe_sfp_type_1g_bx_core0: 353 case ixgbe_sfp_type_1g_bx_core1: 354 ethtool_link_ksettings_add_link_mode(cmd, supported, 355 FIBRE); 356 ethtool_link_ksettings_add_link_mode(cmd, advertising, 357 FIBRE); 358 cmd->base.port = PORT_FIBRE; 359 break; 360 case ixgbe_sfp_type_not_present: 361 ethtool_link_ksettings_add_link_mode(cmd, supported, 362 FIBRE); 363 ethtool_link_ksettings_add_link_mode(cmd, advertising, 364 FIBRE); 365 cmd->base.port = PORT_NONE; 366 break; 367 case ixgbe_sfp_type_1g_cu_core0: 368 case ixgbe_sfp_type_1g_cu_core1: 369 ethtool_link_ksettings_add_link_mode(cmd, supported, 370 TP); 371 ethtool_link_ksettings_add_link_mode(cmd, advertising, 372 TP); 373 cmd->base.port = PORT_TP; 374 break; 375 case ixgbe_sfp_type_unknown: 376 default: 377 ethtool_link_ksettings_add_link_mode(cmd, supported, 378 FIBRE); 379 ethtool_link_ksettings_add_link_mode(cmd, advertising, 380 FIBRE); 381 cmd->base.port = PORT_OTHER; 382 break; 383 } 384 break; 385 case ixgbe_phy_xaui: 386 ethtool_link_ksettings_add_link_mode(cmd, supported, 387 FIBRE); 388 ethtool_link_ksettings_add_link_mode(cmd, advertising, 389 FIBRE); 390 cmd->base.port = PORT_NONE; 391 break; 392 case ixgbe_phy_unknown: 393 case ixgbe_phy_generic: 394 case ixgbe_phy_sfp_unsupported: 395 default: 396 ethtool_link_ksettings_add_link_mode(cmd, supported, 397 FIBRE); 398 ethtool_link_ksettings_add_link_mode(cmd, advertising, 399 FIBRE); 400 cmd->base.port = PORT_OTHER; 401 break; 402 } 403 404 /* Indicate pause support */ 405 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); 406 407 switch (hw->fc.requested_mode) { 408 case ixgbe_fc_full: 409 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); 410 break; 411 case ixgbe_fc_rx_pause: 412 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); 413 ethtool_link_ksettings_add_link_mode(cmd, advertising, 414 Asym_Pause); 415 break; 416 case ixgbe_fc_tx_pause: 417 ethtool_link_ksettings_add_link_mode(cmd, advertising, 418 Asym_Pause); 419 break; 420 default: 421 ethtool_link_ksettings_del_link_mode(cmd, advertising, Pause); 422 ethtool_link_ksettings_del_link_mode(cmd, advertising, 423 Asym_Pause); 424 } 425 426 if (netif_carrier_ok(netdev)) { 427 switch (adapter->link_speed) { 428 case IXGBE_LINK_SPEED_10GB_FULL: 429 cmd->base.speed = SPEED_10000; 430 break; 431 case IXGBE_LINK_SPEED_5GB_FULL: 432 cmd->base.speed = SPEED_5000; 433 break; 434 case IXGBE_LINK_SPEED_2_5GB_FULL: 435 cmd->base.speed = SPEED_2500; 436 break; 437 case IXGBE_LINK_SPEED_1GB_FULL: 438 cmd->base.speed = SPEED_1000; 439 break; 440 case IXGBE_LINK_SPEED_100_FULL: 441 cmd->base.speed = SPEED_100; 442 break; 443 case IXGBE_LINK_SPEED_10_FULL: 444 cmd->base.speed = SPEED_10; 445 break; 446 default: 447 break; 448 } 449 cmd->base.duplex = DUPLEX_FULL; 450 } else { 451 cmd->base.speed = SPEED_UNKNOWN; 452 cmd->base.duplex = DUPLEX_UNKNOWN; 453 } 454 455 return 0; 456 } 457 458 static int ixgbe_set_link_ksettings(struct net_device *netdev, 459 const struct ethtool_link_ksettings *cmd) 460 { 461 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 462 struct ixgbe_hw *hw = &adapter->hw; 463 u32 advertised, old; 464 int err = 0; 465 466 if ((hw->phy.media_type == ixgbe_media_type_copper) || 467 (hw->phy.multispeed_fiber)) { 468 /* 469 * this function does not support duplex forcing, but can 470 * limit the advertising of the adapter to the specified speed 471 */ 472 if (!linkmode_subset(cmd->link_modes.advertising, 473 cmd->link_modes.supported)) 474 return -EINVAL; 475 476 /* only allow one speed at a time if no autoneg */ 477 if (!cmd->base.autoneg && hw->phy.multispeed_fiber) { 478 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 479 10000baseT_Full) && 480 ethtool_link_ksettings_test_link_mode(cmd, advertising, 481 1000baseT_Full)) 482 return -EINVAL; 483 } 484 485 old = hw->phy.autoneg_advertised; 486 advertised = 0; 487 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 488 10000baseT_Full)) 489 advertised |= IXGBE_LINK_SPEED_10GB_FULL; 490 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 491 5000baseT_Full)) 492 advertised |= IXGBE_LINK_SPEED_5GB_FULL; 493 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 494 2500baseT_Full)) 495 advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; 496 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 497 1000baseT_Full)) 498 advertised |= IXGBE_LINK_SPEED_1GB_FULL; 499 500 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 501 100baseT_Full)) 502 advertised |= IXGBE_LINK_SPEED_100_FULL; 503 504 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 505 10baseT_Full)) 506 advertised |= IXGBE_LINK_SPEED_10_FULL; 507 508 if (old == advertised) 509 return err; 510 /* this sets the link speed and restarts auto-neg */ 511 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 512 usleep_range(1000, 2000); 513 514 hw->mac.autotry_restart = true; 515 err = hw->mac.ops.setup_link(hw, advertised, true); 516 if (err) { 517 e_info(probe, "setup link failed with code %d\n", err); 518 hw->mac.ops.setup_link(hw, old, true); 519 } 520 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 521 } else { 522 /* in this case we currently only support 10Gb/FULL */ 523 u32 speed = cmd->base.speed; 524 525 if ((cmd->base.autoneg == AUTONEG_ENABLE) || 526 (!ethtool_link_ksettings_test_link_mode(cmd, advertising, 527 10000baseT_Full)) || 528 (speed + cmd->base.duplex != SPEED_10000 + DUPLEX_FULL)) 529 return -EINVAL; 530 } 531 532 return err; 533 } 534 535 static void ixgbe_get_pause_stats(struct net_device *netdev, 536 struct ethtool_pause_stats *stats) 537 { 538 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 539 struct ixgbe_hw_stats *hwstats = &adapter->stats; 540 541 stats->tx_pause_frames = hwstats->lxontxc + hwstats->lxofftxc; 542 stats->rx_pause_frames = hwstats->lxonrxc + hwstats->lxoffrxc; 543 } 544 545 static void ixgbe_get_pauseparam(struct net_device *netdev, 546 struct ethtool_pauseparam *pause) 547 { 548 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 549 struct ixgbe_hw *hw = &adapter->hw; 550 551 if (ixgbe_device_supports_autoneg_fc(hw) && 552 !hw->fc.disable_fc_autoneg) 553 pause->autoneg = 1; 554 else 555 pause->autoneg = 0; 556 557 if (hw->fc.current_mode == ixgbe_fc_rx_pause) { 558 pause->rx_pause = 1; 559 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) { 560 pause->tx_pause = 1; 561 } else if (hw->fc.current_mode == ixgbe_fc_full) { 562 pause->rx_pause = 1; 563 pause->tx_pause = 1; 564 } 565 } 566 567 static void ixgbe_set_pauseparam_finalize(struct net_device *netdev, 568 struct ixgbe_fc_info *fc) 569 { 570 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 571 struct ixgbe_hw *hw = &adapter->hw; 572 573 /* If the thing changed then we'll update and use new autoneg. */ 574 if (memcmp(fc, &hw->fc, sizeof(*fc))) { 575 hw->fc = *fc; 576 if (netif_running(netdev)) 577 ixgbe_reinit_locked(adapter); 578 else 579 ixgbe_reset(adapter); 580 } 581 } 582 583 static int ixgbe_set_pauseparam(struct net_device *netdev, 584 struct ethtool_pauseparam *pause) 585 { 586 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 587 struct ixgbe_hw *hw = &adapter->hw; 588 struct ixgbe_fc_info fc = hw->fc; 589 590 /* 82598 does no support link flow control with DCB enabled */ 591 if ((hw->mac.type == ixgbe_mac_82598EB) && 592 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)) 593 return -EINVAL; 594 595 /* some devices do not support autoneg of link flow control */ 596 if ((pause->autoneg == AUTONEG_ENABLE) && 597 !ixgbe_device_supports_autoneg_fc(hw)) 598 return -EINVAL; 599 600 fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE); 601 602 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg) 603 fc.requested_mode = ixgbe_fc_full; 604 else if (pause->rx_pause && !pause->tx_pause) 605 fc.requested_mode = ixgbe_fc_rx_pause; 606 else if (!pause->rx_pause && pause->tx_pause) 607 fc.requested_mode = ixgbe_fc_tx_pause; 608 else 609 fc.requested_mode = ixgbe_fc_none; 610 611 ixgbe_set_pauseparam_finalize(netdev, &fc); 612 613 return 0; 614 } 615 616 static int ixgbe_set_pauseparam_e610(struct net_device *netdev, 617 struct ethtool_pauseparam *pause) 618 { 619 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 620 struct ixgbe_hw *hw = &adapter->hw; 621 struct ixgbe_fc_info fc = hw->fc; 622 623 if (!ixgbe_device_supports_autoneg_fc(hw)) 624 return -EOPNOTSUPP; 625 626 if (pause->autoneg == AUTONEG_DISABLE) { 627 netdev_info(netdev, 628 "Cannot disable autonegotiation on this device.\n"); 629 return -EOPNOTSUPP; 630 } 631 632 fc.disable_fc_autoneg = false; 633 634 if (pause->rx_pause && pause->tx_pause) 635 fc.requested_mode = ixgbe_fc_full; 636 else if (pause->rx_pause) 637 fc.requested_mode = ixgbe_fc_rx_pause; 638 else if (pause->tx_pause) 639 fc.requested_mode = ixgbe_fc_tx_pause; 640 else 641 fc.requested_mode = ixgbe_fc_none; 642 643 ixgbe_set_pauseparam_finalize(netdev, &fc); 644 645 return 0; 646 } 647 648 static u32 ixgbe_get_msglevel(struct net_device *netdev) 649 { 650 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 651 return adapter->msg_enable; 652 } 653 654 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data) 655 { 656 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 657 adapter->msg_enable = data; 658 } 659 660 static int ixgbe_get_regs_len(struct net_device *netdev) 661 { 662 #define IXGBE_REGS_LEN 1145 663 return IXGBE_REGS_LEN * sizeof(u32); 664 } 665 666 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_ 667 668 static void ixgbe_get_regs(struct net_device *netdev, 669 struct ethtool_regs *regs, void *p) 670 { 671 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 672 struct ixgbe_hw *hw = &adapter->hw; 673 u32 *regs_buff = p; 674 u8 i; 675 676 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32)); 677 678 regs->version = hw->mac.type << 24 | hw->revision_id << 16 | 679 hw->device_id; 680 681 /* General Registers */ 682 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL); 683 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS); 684 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 685 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP); 686 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP); 687 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 688 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER); 689 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER); 690 691 /* NVM Register */ 692 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); 693 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD); 694 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw)); 695 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL); 696 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA); 697 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL); 698 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA); 699 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT); 700 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP); 701 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw)); 702 703 /* Interrupt */ 704 /* don't read EICR because it can clear interrupt causes, instead 705 * read EICS which is a shadow but doesn't clear EICR */ 706 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS); 707 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS); 708 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS); 709 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC); 710 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC); 711 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM); 712 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0)); 713 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0)); 714 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT); 715 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA); 716 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0)); 717 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE); 718 719 /* Flow Control */ 720 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP); 721 for (i = 0; i < 4; i++) 722 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_FCTTV(i)); 723 for (i = 0; i < 8; i++) { 724 switch (hw->mac.type) { 725 case ixgbe_mac_82598EB: 726 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i)); 727 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i)); 728 break; 729 case ixgbe_mac_82599EB: 730 case ixgbe_mac_X540: 731 case ixgbe_mac_X550: 732 case ixgbe_mac_X550EM_x: 733 case ixgbe_mac_x550em_a: 734 case ixgbe_mac_e610: 735 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i)); 736 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i)); 737 break; 738 default: 739 break; 740 } 741 } 742 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV); 743 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS); 744 745 /* Receive DMA */ 746 for (i = 0; i < 64; i++) 747 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i)); 748 for (i = 0; i < 64; i++) 749 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i)); 750 for (i = 0; i < 64; i++) 751 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i)); 752 for (i = 0; i < 64; i++) 753 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i)); 754 for (i = 0; i < 64; i++) 755 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i)); 756 for (i = 0; i < 64; i++) 757 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); 758 for (i = 0; i < 16; i++) 759 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); 760 for (i = 0; i < 16; i++) 761 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); 762 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 763 for (i = 0; i < 8; i++) 764 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)); 765 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 766 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN); 767 768 /* Receive */ 769 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 770 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL); 771 for (i = 0; i < 16; i++) 772 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i)); 773 for (i = 0; i < 16; i++) 774 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i)); 775 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0)); 776 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL); 777 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 778 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL); 779 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC); 780 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); 781 for (i = 0; i < 8; i++) 782 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i)); 783 for (i = 0; i < 8; i++) 784 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i)); 785 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP); 786 787 /* Transmit */ 788 for (i = 0; i < 32; i++) 789 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i)); 790 for (i = 0; i < 32; i++) 791 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i)); 792 for (i = 0; i < 32; i++) 793 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i)); 794 for (i = 0; i < 32; i++) 795 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i)); 796 for (i = 0; i < 32; i++) 797 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i)); 798 for (i = 0; i < 32; i++) 799 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i)); 800 for (i = 0; i < 32; i++) 801 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i)); 802 for (i = 0; i < 32; i++) 803 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i)); 804 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL); 805 for (i = 0; i < 16; i++) 806 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); 807 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG); 808 for (i = 0; i < 8; i++) 809 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i)); 810 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP); 811 812 /* Wake Up */ 813 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC); 814 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC); 815 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS); 816 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV); 817 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT); 818 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT); 819 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL); 820 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM); 821 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0)); 822 823 /* DCB */ 824 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS); /* same as FCCFG */ 825 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */ 826 827 switch (hw->mac.type) { 828 case ixgbe_mac_82598EB: 829 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS); 830 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR); 831 for (i = 0; i < 8; i++) 832 regs_buff[833 + i] = 833 IXGBE_READ_REG(hw, IXGBE_RT2CR(i)); 834 for (i = 0; i < 8; i++) 835 regs_buff[841 + i] = 836 IXGBE_READ_REG(hw, IXGBE_RT2SR(i)); 837 for (i = 0; i < 8; i++) 838 regs_buff[849 + i] = 839 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i)); 840 for (i = 0; i < 8; i++) 841 regs_buff[857 + i] = 842 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i)); 843 break; 844 case ixgbe_mac_82599EB: 845 case ixgbe_mac_X540: 846 case ixgbe_mac_X550: 847 case ixgbe_mac_X550EM_x: 848 case ixgbe_mac_x550em_a: 849 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 850 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS); 851 for (i = 0; i < 8; i++) 852 regs_buff[833 + i] = 853 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i)); 854 for (i = 0; i < 8; i++) 855 regs_buff[841 + i] = 856 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i)); 857 for (i = 0; i < 8; i++) 858 regs_buff[849 + i] = 859 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i)); 860 for (i = 0; i < 8; i++) 861 regs_buff[857 + i] = 862 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i)); 863 break; 864 default: 865 break; 866 } 867 868 for (i = 0; i < 8; i++) 869 regs_buff[865 + i] = 870 IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */ 871 for (i = 0; i < 8; i++) 872 regs_buff[873 + i] = 873 IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */ 874 875 /* Statistics */ 876 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs); 877 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc); 878 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc); 879 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc); 880 for (i = 0; i < 8; i++) 881 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]); 882 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc); 883 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc); 884 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec); 885 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc); 886 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc); 887 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc); 888 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc); 889 for (i = 0; i < 8; i++) 890 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]); 891 for (i = 0; i < 8; i++) 892 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]); 893 for (i = 0; i < 8; i++) 894 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]); 895 for (i = 0; i < 8; i++) 896 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]); 897 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64); 898 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127); 899 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255); 900 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511); 901 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023); 902 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522); 903 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc); 904 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc); 905 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc); 906 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc); 907 regs_buff[942] = (u32)IXGBE_GET_STAT(adapter, gorc); 908 regs_buff[943] = (u32)(IXGBE_GET_STAT(adapter, gorc) >> 32); 909 regs_buff[944] = (u32)IXGBE_GET_STAT(adapter, gotc); 910 regs_buff[945] = (u32)(IXGBE_GET_STAT(adapter, gotc) >> 32); 911 for (i = 0; i < 8; i++) 912 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]); 913 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc); 914 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc); 915 regs_buff[956] = IXGBE_GET_STAT(adapter, roc); 916 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc); 917 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc); 918 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc); 919 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc); 920 regs_buff[961] = (u32)IXGBE_GET_STAT(adapter, tor); 921 regs_buff[962] = (u32)(IXGBE_GET_STAT(adapter, tor) >> 32); 922 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr); 923 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt); 924 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64); 925 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127); 926 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255); 927 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511); 928 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023); 929 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522); 930 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc); 931 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc); 932 regs_buff[973] = IXGBE_GET_STAT(adapter, xec); 933 for (i = 0; i < 16; i++) 934 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]); 935 for (i = 0; i < 16; i++) 936 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]); 937 for (i = 0; i < 16; i++) 938 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]); 939 for (i = 0; i < 16; i++) 940 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]); 941 942 /* MAC */ 943 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG); 944 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); 945 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA); 946 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0); 947 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1); 948 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); 949 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP); 950 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP); 951 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP); 952 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0); 953 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1); 954 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP); 955 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA); 956 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE); 957 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD); 958 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS); 959 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA); 960 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD); 961 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD); 962 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD); 963 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG); 964 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1); 965 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2); 966 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS); 967 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC); 968 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS); 969 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC); 970 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS); 971 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2); 972 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3); 973 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1); 974 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2); 975 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL); 976 977 /* Diagnostic */ 978 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL); 979 for (i = 0; i < 8; i++) 980 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i)); 981 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN); 982 for (i = 0; i < 4; i++) 983 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i)); 984 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE); 985 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL); 986 for (i = 0; i < 8; i++) 987 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i)); 988 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN); 989 for (i = 0; i < 4; i++) 990 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i)); 991 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE); 992 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL); 993 for (i = 0; i < 4; i++) 994 regs_buff[1102 + i] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA(i)); 995 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL); 996 for (i = 0; i < 4; i++) 997 regs_buff[1107 + i] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA(i)); 998 for (i = 0; i < 8; i++) 999 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i)); 1000 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL); 1001 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1); 1002 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2); 1003 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1); 1004 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2); 1005 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS); 1006 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL); 1007 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC); 1008 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC); 1009 1010 /* 82599 X540 specific registers */ 1011 regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN); 1012 1013 /* 82599 X540 specific DCB registers */ 1014 regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC); 1015 regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC); 1016 for (i = 0; i < 4; i++) 1017 regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i)); 1018 regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM); 1019 /* same as RTTQCNRM */ 1020 regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD); 1021 /* same as RTTQCNRR */ 1022 1023 /* X540 specific DCB registers */ 1024 regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR); 1025 regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG); 1026 1027 /* Security config registers */ 1028 regs_buff[1139] = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL); 1029 regs_buff[1140] = IXGBE_READ_REG(hw, IXGBE_SECTXSTAT); 1030 regs_buff[1141] = IXGBE_READ_REG(hw, IXGBE_SECTXBUFFAF); 1031 regs_buff[1142] = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); 1032 regs_buff[1143] = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL); 1033 regs_buff[1144] = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT); 1034 } 1035 1036 static int ixgbe_get_eeprom_len(struct net_device *netdev) 1037 { 1038 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1039 return adapter->hw.eeprom.word_size * 2; 1040 } 1041 1042 static int ixgbe_get_eeprom(struct net_device *netdev, 1043 struct ethtool_eeprom *eeprom, u8 *bytes) 1044 { 1045 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1046 struct ixgbe_hw *hw = &adapter->hw; 1047 u16 *eeprom_buff; 1048 int first_word, last_word, eeprom_len; 1049 int ret_val = 0; 1050 u16 i; 1051 1052 if (eeprom->len == 0) 1053 return -EINVAL; 1054 1055 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1056 1057 first_word = eeprom->offset >> 1; 1058 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1059 eeprom_len = last_word - first_word + 1; 1060 1061 eeprom_buff = kmalloc_array(eeprom_len, sizeof(u16), GFP_KERNEL); 1062 if (!eeprom_buff) 1063 return -ENOMEM; 1064 1065 ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len, 1066 eeprom_buff); 1067 1068 /* Device's eeprom is always little-endian, word addressable */ 1069 for (i = 0; i < eeprom_len; i++) 1070 le16_to_cpus(&eeprom_buff[i]); 1071 1072 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); 1073 kfree(eeprom_buff); 1074 1075 return ret_val; 1076 } 1077 1078 static int ixgbe_set_eeprom(struct net_device *netdev, 1079 struct ethtool_eeprom *eeprom, u8 *bytes) 1080 { 1081 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1082 struct ixgbe_hw *hw = &adapter->hw; 1083 u16 *eeprom_buff; 1084 void *ptr; 1085 int max_len, first_word, last_word, ret_val = 0; 1086 u16 i; 1087 1088 if (eeprom->len == 0) 1089 return -EINVAL; 1090 1091 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) 1092 return -EINVAL; 1093 1094 max_len = hw->eeprom.word_size * 2; 1095 1096 first_word = eeprom->offset >> 1; 1097 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1098 eeprom_buff = kmalloc(max_len, GFP_KERNEL); 1099 if (!eeprom_buff) 1100 return -ENOMEM; 1101 1102 ptr = eeprom_buff; 1103 1104 if (eeprom->offset & 1) { 1105 /* 1106 * need read/modify/write of first changed EEPROM word 1107 * only the second byte of the word is being modified 1108 */ 1109 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]); 1110 if (ret_val) 1111 goto err; 1112 1113 ptr++; 1114 } 1115 if ((eeprom->offset + eeprom->len) & 1) { 1116 /* 1117 * need read/modify/write of last changed EEPROM word 1118 * only the first byte of the word is being modified 1119 */ 1120 ret_val = hw->eeprom.ops.read(hw, last_word, 1121 &eeprom_buff[last_word - first_word]); 1122 if (ret_val) 1123 goto err; 1124 } 1125 1126 /* Device's eeprom is always little-endian, word addressable */ 1127 for (i = 0; i < last_word - first_word + 1; i++) 1128 le16_to_cpus(&eeprom_buff[i]); 1129 1130 memcpy(ptr, bytes, eeprom->len); 1131 1132 for (i = 0; i < last_word - first_word + 1; i++) 1133 cpu_to_le16s(&eeprom_buff[i]); 1134 1135 ret_val = hw->eeprom.ops.write_buffer(hw, first_word, 1136 last_word - first_word + 1, 1137 eeprom_buff); 1138 1139 /* Update the checksum */ 1140 if (ret_val == 0) 1141 hw->eeprom.ops.update_checksum(hw); 1142 1143 err: 1144 kfree(eeprom_buff); 1145 return ret_val; 1146 } 1147 1148 void ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter) 1149 { 1150 struct ixgbe_hw *hw = &adapter->hw; 1151 1152 ixgbe_get_flash_data(hw); 1153 ixgbe_set_fw_version_e610(adapter); 1154 } 1155 1156 static void ixgbe_get_drvinfo(struct net_device *netdev, 1157 struct ethtool_drvinfo *drvinfo) 1158 { 1159 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1160 1161 /* need to refresh info for e610 in case fw reloads in runtime */ 1162 if (adapter->hw.mac.type == ixgbe_mac_e610) 1163 ixgbe_refresh_fw_version(adapter); 1164 1165 strscpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver)); 1166 1167 strscpy(drvinfo->fw_version, adapter->eeprom_id, 1168 sizeof(drvinfo->fw_version)); 1169 1170 strscpy(drvinfo->bus_info, pci_name(adapter->pdev), 1171 sizeof(drvinfo->bus_info)); 1172 1173 drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN; 1174 } 1175 1176 static u32 ixgbe_get_max_rxd(struct ixgbe_adapter *adapter) 1177 { 1178 switch (adapter->hw.mac.type) { 1179 case ixgbe_mac_82598EB: 1180 return IXGBE_MAX_RXD_82598; 1181 case ixgbe_mac_82599EB: 1182 return IXGBE_MAX_RXD_82599; 1183 case ixgbe_mac_X540: 1184 return IXGBE_MAX_RXD_X540; 1185 case ixgbe_mac_X550: 1186 case ixgbe_mac_X550EM_x: 1187 case ixgbe_mac_x550em_a: 1188 return IXGBE_MAX_RXD_X550; 1189 default: 1190 return IXGBE_MAX_RXD_82598; 1191 } 1192 } 1193 1194 static u32 ixgbe_get_max_txd(struct ixgbe_adapter *adapter) 1195 { 1196 switch (adapter->hw.mac.type) { 1197 case ixgbe_mac_82598EB: 1198 return IXGBE_MAX_TXD_82598; 1199 case ixgbe_mac_82599EB: 1200 return IXGBE_MAX_TXD_82599; 1201 case ixgbe_mac_X540: 1202 return IXGBE_MAX_TXD_X540; 1203 case ixgbe_mac_X550: 1204 case ixgbe_mac_X550EM_x: 1205 case ixgbe_mac_x550em_a: 1206 return IXGBE_MAX_TXD_X550; 1207 default: 1208 return IXGBE_MAX_TXD_82598; 1209 } 1210 } 1211 1212 static void ixgbe_get_ringparam(struct net_device *netdev, 1213 struct ethtool_ringparam *ring, 1214 struct kernel_ethtool_ringparam *kernel_ring, 1215 struct netlink_ext_ack *extack) 1216 { 1217 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1218 struct ixgbe_ring *tx_ring = adapter->tx_ring[0]; 1219 struct ixgbe_ring *rx_ring = adapter->rx_ring[0]; 1220 1221 ring->rx_max_pending = ixgbe_get_max_rxd(adapter); 1222 ring->tx_max_pending = ixgbe_get_max_txd(adapter); 1223 ring->rx_pending = rx_ring->count; 1224 ring->tx_pending = tx_ring->count; 1225 } 1226 1227 static int ixgbe_set_ringparam(struct net_device *netdev, 1228 struct ethtool_ringparam *ring, 1229 struct kernel_ethtool_ringparam *kernel_ring, 1230 struct netlink_ext_ack *extack) 1231 { 1232 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1233 struct ixgbe_ring *temp_ring; 1234 int i, j, err = 0; 1235 u32 new_rx_count, new_tx_count; 1236 1237 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1238 return -EINVAL; 1239 1240 new_tx_count = clamp_t(u32, ring->tx_pending, 1241 IXGBE_MIN_TXD, ixgbe_get_max_txd(adapter)); 1242 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE); 1243 1244 new_rx_count = clamp_t(u32, ring->rx_pending, 1245 IXGBE_MIN_RXD, ixgbe_get_max_rxd(adapter)); 1246 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE); 1247 1248 if ((new_tx_count == adapter->tx_ring_count) && 1249 (new_rx_count == adapter->rx_ring_count)) { 1250 /* nothing to do */ 1251 return 0; 1252 } 1253 1254 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) 1255 usleep_range(1000, 2000); 1256 1257 if (!netif_running(adapter->netdev)) { 1258 for (i = 0; i < adapter->num_tx_queues; i++) 1259 adapter->tx_ring[i]->count = new_tx_count; 1260 for (i = 0; i < adapter->num_xdp_queues; i++) 1261 adapter->xdp_ring[i]->count = new_tx_count; 1262 for (i = 0; i < adapter->num_rx_queues; i++) 1263 adapter->rx_ring[i]->count = new_rx_count; 1264 adapter->tx_ring_count = new_tx_count; 1265 adapter->xdp_ring_count = new_tx_count; 1266 adapter->rx_ring_count = new_rx_count; 1267 goto clear_reset; 1268 } 1269 1270 /* allocate temporary buffer to store rings in */ 1271 i = max_t(int, adapter->num_tx_queues + adapter->num_xdp_queues, 1272 adapter->num_rx_queues); 1273 temp_ring = vmalloc(array_size(i, sizeof(struct ixgbe_ring))); 1274 1275 if (!temp_ring) { 1276 err = -ENOMEM; 1277 goto clear_reset; 1278 } 1279 1280 ixgbe_down(adapter); 1281 1282 /* 1283 * Setup new Tx resources and free the old Tx resources in that order. 1284 * We can then assign the new resources to the rings via a memcpy. 1285 * The advantage to this approach is that we are guaranteed to still 1286 * have resources even in the case of an allocation failure. 1287 */ 1288 if (new_tx_count != adapter->tx_ring_count) { 1289 for (i = 0; i < adapter->num_tx_queues; i++) { 1290 memcpy(&temp_ring[i], adapter->tx_ring[i], 1291 sizeof(struct ixgbe_ring)); 1292 1293 temp_ring[i].count = new_tx_count; 1294 err = ixgbe_setup_tx_resources(&temp_ring[i]); 1295 if (err) { 1296 while (i) { 1297 i--; 1298 ixgbe_free_tx_resources(&temp_ring[i]); 1299 } 1300 goto err_setup; 1301 } 1302 } 1303 1304 for (j = 0; j < adapter->num_xdp_queues; j++, i++) { 1305 memcpy(&temp_ring[i], adapter->xdp_ring[j], 1306 sizeof(struct ixgbe_ring)); 1307 1308 temp_ring[i].count = new_tx_count; 1309 err = ixgbe_setup_tx_resources(&temp_ring[i]); 1310 if (err) { 1311 while (i) { 1312 i--; 1313 ixgbe_free_tx_resources(&temp_ring[i]); 1314 } 1315 goto err_setup; 1316 } 1317 } 1318 1319 for (i = 0; i < adapter->num_tx_queues; i++) { 1320 ixgbe_free_tx_resources(adapter->tx_ring[i]); 1321 1322 memcpy(adapter->tx_ring[i], &temp_ring[i], 1323 sizeof(struct ixgbe_ring)); 1324 } 1325 for (j = 0; j < adapter->num_xdp_queues; j++, i++) { 1326 ixgbe_free_tx_resources(adapter->xdp_ring[j]); 1327 1328 memcpy(adapter->xdp_ring[j], &temp_ring[i], 1329 sizeof(struct ixgbe_ring)); 1330 } 1331 1332 adapter->tx_ring_count = new_tx_count; 1333 } 1334 1335 /* Repeat the process for the Rx rings if needed */ 1336 if (new_rx_count != adapter->rx_ring_count) { 1337 for (i = 0; i < adapter->num_rx_queues; i++) { 1338 memcpy(&temp_ring[i], adapter->rx_ring[i], 1339 sizeof(struct ixgbe_ring)); 1340 1341 /* Clear copied XDP RX-queue info */ 1342 memset(&temp_ring[i].xdp_rxq, 0, 1343 sizeof(temp_ring[i].xdp_rxq)); 1344 1345 temp_ring[i].count = new_rx_count; 1346 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]); 1347 if (err) { 1348 while (i) { 1349 i--; 1350 ixgbe_free_rx_resources(&temp_ring[i]); 1351 } 1352 goto err_setup; 1353 } 1354 1355 } 1356 1357 for (i = 0; i < adapter->num_rx_queues; i++) { 1358 ixgbe_free_rx_resources(adapter->rx_ring[i]); 1359 1360 memcpy(adapter->rx_ring[i], &temp_ring[i], 1361 sizeof(struct ixgbe_ring)); 1362 } 1363 1364 adapter->rx_ring_count = new_rx_count; 1365 } 1366 1367 err_setup: 1368 ixgbe_up(adapter); 1369 vfree(temp_ring); 1370 clear_reset: 1371 clear_bit(__IXGBE_RESETTING, &adapter->state); 1372 return err; 1373 } 1374 1375 static int ixgbe_get_sset_count(struct net_device *netdev, int sset) 1376 { 1377 switch (sset) { 1378 case ETH_SS_TEST: 1379 return IXGBE_TEST_LEN; 1380 case ETH_SS_STATS: 1381 return IXGBE_STATS_LEN; 1382 case ETH_SS_PRIV_FLAGS: 1383 return IXGBE_PRIV_FLAGS_STR_LEN; 1384 default: 1385 return -EOPNOTSUPP; 1386 } 1387 } 1388 1389 static void ixgbe_get_ethtool_stats(struct net_device *netdev, 1390 struct ethtool_stats *stats, u64 *data) 1391 { 1392 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1393 struct rtnl_link_stats64 temp; 1394 const struct rtnl_link_stats64 *net_stats; 1395 unsigned int start; 1396 struct ixgbe_ring *ring; 1397 int i, j; 1398 char *p = NULL; 1399 1400 ixgbe_update_stats(adapter); 1401 net_stats = dev_get_stats(netdev, &temp); 1402 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { 1403 switch (ixgbe_gstrings_stats[i].type) { 1404 case NETDEV_STATS: 1405 p = (char *) net_stats + 1406 ixgbe_gstrings_stats[i].stat_offset; 1407 break; 1408 case IXGBE_STATS: 1409 p = (char *) adapter + 1410 ixgbe_gstrings_stats[i].stat_offset; 1411 break; 1412 default: 1413 data[i] = 0; 1414 continue; 1415 } 1416 1417 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat == 1418 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1419 } 1420 for (j = 0; j < netdev->num_tx_queues; j++) { 1421 ring = adapter->tx_ring[j]; 1422 if (!ring) { 1423 data[i] = 0; 1424 data[i+1] = 0; 1425 i += 2; 1426 continue; 1427 } 1428 1429 do { 1430 start = u64_stats_fetch_begin(&ring->syncp); 1431 data[i] = ring->stats.packets; 1432 data[i+1] = ring->stats.bytes; 1433 } while (u64_stats_fetch_retry(&ring->syncp, start)); 1434 i += 2; 1435 } 1436 for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) { 1437 ring = adapter->rx_ring[j]; 1438 if (!ring) { 1439 data[i] = 0; 1440 data[i+1] = 0; 1441 i += 2; 1442 continue; 1443 } 1444 1445 do { 1446 start = u64_stats_fetch_begin(&ring->syncp); 1447 data[i] = ring->stats.packets; 1448 data[i+1] = ring->stats.bytes; 1449 } while (u64_stats_fetch_retry(&ring->syncp, start)); 1450 i += 2; 1451 } 1452 1453 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) { 1454 data[i++] = adapter->stats.pxontxc[j]; 1455 data[i++] = adapter->stats.pxofftxc[j]; 1456 } 1457 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) { 1458 data[i++] = adapter->stats.pxonrxc[j]; 1459 data[i++] = adapter->stats.pxoffrxc[j]; 1460 } 1461 } 1462 1463 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset, 1464 u8 *data) 1465 { 1466 unsigned int i; 1467 u8 *p = data; 1468 1469 switch (stringset) { 1470 case ETH_SS_TEST: 1471 for (i = 0; i < IXGBE_TEST_LEN; i++) 1472 ethtool_puts(&p, ixgbe_gstrings_test[i]); 1473 break; 1474 case ETH_SS_STATS: 1475 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) 1476 ethtool_puts(&p, ixgbe_gstrings_stats[i].stat_string); 1477 for (i = 0; i < netdev->num_tx_queues; i++) { 1478 ethtool_sprintf(&p, "tx_queue_%u_packets", i); 1479 ethtool_sprintf(&p, "tx_queue_%u_bytes", i); 1480 } 1481 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) { 1482 ethtool_sprintf(&p, "rx_queue_%u_packets", i); 1483 ethtool_sprintf(&p, "rx_queue_%u_bytes", i); 1484 } 1485 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { 1486 ethtool_sprintf(&p, "tx_pb_%u_pxon", i); 1487 ethtool_sprintf(&p, "tx_pb_%u_pxoff", i); 1488 } 1489 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { 1490 ethtool_sprintf(&p, "rx_pb_%u_pxon", i); 1491 ethtool_sprintf(&p, "rx_pb_%u_pxoff", i); 1492 } 1493 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */ 1494 break; 1495 case ETH_SS_PRIV_FLAGS: 1496 memcpy(data, ixgbe_priv_flags_strings, 1497 IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN); 1498 } 1499 } 1500 1501 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data) 1502 { 1503 struct ixgbe_hw *hw = &adapter->hw; 1504 bool link_up; 1505 u32 link_speed = 0; 1506 1507 if (ixgbe_removed(hw->hw_addr)) { 1508 *data = 1; 1509 return 1; 1510 } 1511 *data = 0; 1512 1513 hw->mac.ops.check_link(hw, &link_speed, &link_up, true); 1514 if (link_up) 1515 return *data; 1516 else 1517 *data = 1; 1518 return *data; 1519 } 1520 1521 /* ethtool register test data */ 1522 struct ixgbe_reg_test { 1523 u16 reg; 1524 u8 array_len; 1525 u8 test_type; 1526 u32 mask; 1527 u32 write; 1528 }; 1529 1530 /* In the hardware, registers are laid out either singly, in arrays 1531 * spaced 0x40 bytes apart, or in contiguous tables. We assume 1532 * most tests take place on arrays or single registers (handled 1533 * as a single-element array) and special-case the tables. 1534 * Table tests are always pattern tests. 1535 * 1536 * We also make provision for some required setup steps by specifying 1537 * registers to be written without any read-back testing. 1538 */ 1539 1540 #define PATTERN_TEST 1 1541 #define SET_READ_TEST 2 1542 #define WRITE_NO_TEST 3 1543 #define TABLE32_TEST 4 1544 #define TABLE64_TEST_LO 5 1545 #define TABLE64_TEST_HI 6 1546 1547 /* default 82599 register test */ 1548 static const struct ixgbe_reg_test reg_test_82599[] = { 1549 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1550 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1551 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1552 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, 1553 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 }, 1554 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1555 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1556 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, 1557 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, 1558 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, 1559 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1560 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1561 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1562 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1563 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 }, 1564 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 }, 1565 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, 1566 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF }, 1567 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1568 { .reg = 0 } 1569 }; 1570 1571 /* default 82598 register test */ 1572 static const struct ixgbe_reg_test reg_test_82598[] = { 1573 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1574 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1575 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1576 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, 1577 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1578 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1579 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1580 /* Enable all four RX queues before testing. */ 1581 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, 1582 /* RDH is read-only for 82598, only test RDT. */ 1583 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, 1584 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, 1585 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1586 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1587 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF }, 1588 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1589 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1590 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1591 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 }, 1592 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 }, 1593 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, 1594 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF }, 1595 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1596 { .reg = 0 } 1597 }; 1598 1599 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg, 1600 u32 mask, u32 write) 1601 { 1602 u32 pat, val, before; 1603 static const u32 test_pattern[] = { 1604 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; 1605 1606 if (ixgbe_removed(adapter->hw.hw_addr)) { 1607 *data = 1; 1608 return true; 1609 } 1610 for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) { 1611 before = ixgbe_read_reg(&adapter->hw, reg); 1612 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write); 1613 val = ixgbe_read_reg(&adapter->hw, reg); 1614 if (val != (test_pattern[pat] & write & mask)) { 1615 e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n", 1616 reg, val, (test_pattern[pat] & write & mask)); 1617 *data = reg; 1618 ixgbe_write_reg(&adapter->hw, reg, before); 1619 return true; 1620 } 1621 ixgbe_write_reg(&adapter->hw, reg, before); 1622 } 1623 return false; 1624 } 1625 1626 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg, 1627 u32 mask, u32 write) 1628 { 1629 u32 val, before; 1630 1631 if (ixgbe_removed(adapter->hw.hw_addr)) { 1632 *data = 1; 1633 return true; 1634 } 1635 before = ixgbe_read_reg(&adapter->hw, reg); 1636 ixgbe_write_reg(&adapter->hw, reg, write & mask); 1637 val = ixgbe_read_reg(&adapter->hw, reg); 1638 if ((write & mask) != (val & mask)) { 1639 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", 1640 reg, (val & mask), (write & mask)); 1641 *data = reg; 1642 ixgbe_write_reg(&adapter->hw, reg, before); 1643 return true; 1644 } 1645 ixgbe_write_reg(&adapter->hw, reg, before); 1646 return false; 1647 } 1648 1649 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) 1650 { 1651 const struct ixgbe_reg_test *test; 1652 u32 value, before, after; 1653 u32 i, toggle; 1654 1655 if (ixgbe_removed(adapter->hw.hw_addr)) { 1656 e_err(drv, "Adapter removed - register test blocked\n"); 1657 *data = 1; 1658 return 1; 1659 } 1660 switch (adapter->hw.mac.type) { 1661 case ixgbe_mac_82598EB: 1662 toggle = 0x7FFFF3FF; 1663 test = reg_test_82598; 1664 break; 1665 case ixgbe_mac_82599EB: 1666 case ixgbe_mac_X540: 1667 case ixgbe_mac_X550: 1668 case ixgbe_mac_X550EM_x: 1669 case ixgbe_mac_x550em_a: 1670 case ixgbe_mac_e610: 1671 toggle = 0x7FFFF30F; 1672 test = reg_test_82599; 1673 break; 1674 default: 1675 *data = 1; 1676 return 1; 1677 } 1678 1679 /* 1680 * Because the status register is such a special case, 1681 * we handle it separately from the rest of the register 1682 * tests. Some bits are read-only, some toggle, and some 1683 * are writeable on newer MACs. 1684 */ 1685 before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS); 1686 value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle); 1687 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle); 1688 after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle; 1689 if (value != after) { 1690 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n", 1691 after, value); 1692 *data = 1; 1693 return 1; 1694 } 1695 /* restore previous status */ 1696 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before); 1697 1698 /* 1699 * Perform the remainder of the register test, looping through 1700 * the test table until we either fail or reach the null entry. 1701 */ 1702 while (test->reg) { 1703 for (i = 0; i < test->array_len; i++) { 1704 bool b = false; 1705 1706 switch (test->test_type) { 1707 case PATTERN_TEST: 1708 b = reg_pattern_test(adapter, data, 1709 test->reg + (i * 0x40), 1710 test->mask, 1711 test->write); 1712 break; 1713 case SET_READ_TEST: 1714 b = reg_set_and_check(adapter, data, 1715 test->reg + (i * 0x40), 1716 test->mask, 1717 test->write); 1718 break; 1719 case WRITE_NO_TEST: 1720 ixgbe_write_reg(&adapter->hw, 1721 test->reg + (i * 0x40), 1722 test->write); 1723 break; 1724 case TABLE32_TEST: 1725 b = reg_pattern_test(adapter, data, 1726 test->reg + (i * 4), 1727 test->mask, 1728 test->write); 1729 break; 1730 case TABLE64_TEST_LO: 1731 b = reg_pattern_test(adapter, data, 1732 test->reg + (i * 8), 1733 test->mask, 1734 test->write); 1735 break; 1736 case TABLE64_TEST_HI: 1737 b = reg_pattern_test(adapter, data, 1738 (test->reg + 4) + (i * 8), 1739 test->mask, 1740 test->write); 1741 break; 1742 } 1743 if (b) 1744 return 1; 1745 } 1746 test++; 1747 } 1748 1749 *data = 0; 1750 return 0; 1751 } 1752 1753 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data) 1754 { 1755 struct ixgbe_hw *hw = &adapter->hw; 1756 if (hw->eeprom.ops.validate_checksum(hw, NULL)) 1757 *data = 1; 1758 else 1759 *data = 0; 1760 return *data; 1761 } 1762 1763 static irqreturn_t ixgbe_test_intr(int irq, void *data) 1764 { 1765 struct net_device *netdev = (struct net_device *) data; 1766 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1767 1768 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR); 1769 1770 return IRQ_HANDLED; 1771 } 1772 1773 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) 1774 { 1775 struct net_device *netdev = adapter->netdev; 1776 u32 mask, i = 0, shared_int = true; 1777 u32 irq = adapter->pdev->irq; 1778 1779 *data = 0; 1780 1781 /* Hook up test interrupt handler just for this test */ 1782 if (adapter->msix_entries) { 1783 /* NOTE: we don't test MSI-X interrupts here, yet */ 1784 return 0; 1785 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { 1786 shared_int = false; 1787 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name, 1788 netdev)) { 1789 *data = 1; 1790 return -1; 1791 } 1792 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED, 1793 netdev->name, netdev)) { 1794 shared_int = false; 1795 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED, 1796 netdev->name, netdev)) { 1797 *data = 1; 1798 return -1; 1799 } 1800 e_info(hw, "testing %s interrupt\n", shared_int ? 1801 "shared" : "unshared"); 1802 1803 /* Disable all the interrupts */ 1804 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); 1805 IXGBE_WRITE_FLUSH(&adapter->hw); 1806 usleep_range(10000, 20000); 1807 1808 /* Test each interrupt */ 1809 for (; i < 10; i++) { 1810 /* Interrupt to test */ 1811 mask = BIT(i); 1812 1813 if (!shared_int) { 1814 /* 1815 * Disable the interrupts to be reported in 1816 * the cause register and then force the same 1817 * interrupt and see if one gets posted. If 1818 * an interrupt was posted to the bus, the 1819 * test failed. 1820 */ 1821 adapter->test_icr = 0; 1822 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1823 ~mask & 0x00007FFF); 1824 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1825 ~mask & 0x00007FFF); 1826 IXGBE_WRITE_FLUSH(&adapter->hw); 1827 usleep_range(10000, 20000); 1828 1829 if (adapter->test_icr & mask) { 1830 *data = 3; 1831 break; 1832 } 1833 } 1834 1835 /* 1836 * Enable the interrupt to be reported in the cause 1837 * register and then force the same interrupt and see 1838 * if one gets posted. If an interrupt was not posted 1839 * to the bus, the test failed. 1840 */ 1841 adapter->test_icr = 0; 1842 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); 1843 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 1844 IXGBE_WRITE_FLUSH(&adapter->hw); 1845 usleep_range(10000, 20000); 1846 1847 if (!(adapter->test_icr & mask)) { 1848 *data = 4; 1849 break; 1850 } 1851 1852 if (!shared_int) { 1853 /* 1854 * Disable the other interrupts to be reported in 1855 * the cause register and then force the other 1856 * interrupts and see if any get posted. If 1857 * an interrupt was posted to the bus, the 1858 * test failed. 1859 */ 1860 adapter->test_icr = 0; 1861 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1862 ~mask & 0x00007FFF); 1863 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1864 ~mask & 0x00007FFF); 1865 IXGBE_WRITE_FLUSH(&adapter->hw); 1866 usleep_range(10000, 20000); 1867 1868 if (adapter->test_icr) { 1869 *data = 5; 1870 break; 1871 } 1872 } 1873 } 1874 1875 /* Disable all the interrupts */ 1876 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); 1877 IXGBE_WRITE_FLUSH(&adapter->hw); 1878 usleep_range(10000, 20000); 1879 1880 /* Unhook test interrupt handler */ 1881 free_irq(irq, netdev); 1882 1883 return *data; 1884 } 1885 1886 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter) 1887 { 1888 /* Shut down the DMA engines now so they can be reinitialized later, 1889 * since the test rings and normally used rings should overlap on 1890 * queue 0 we can just use the standard disable Rx/Tx calls and they 1891 * will take care of disabling the test rings for us. 1892 */ 1893 1894 /* first Rx */ 1895 ixgbe_disable_rx(adapter); 1896 1897 /* now Tx */ 1898 ixgbe_disable_tx(adapter); 1899 1900 ixgbe_reset(adapter); 1901 1902 ixgbe_free_tx_resources(&adapter->test_tx_ring); 1903 ixgbe_free_rx_resources(&adapter->test_rx_ring); 1904 } 1905 1906 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) 1907 { 1908 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; 1909 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; 1910 struct ixgbe_hw *hw = &adapter->hw; 1911 u32 rctl, reg_data; 1912 int ret_val; 1913 int err; 1914 1915 /* Setup Tx descriptor ring and Tx buffers */ 1916 tx_ring->count = IXGBE_DEFAULT_TXD; 1917 tx_ring->queue_index = 0; 1918 tx_ring->dev = &adapter->pdev->dev; 1919 tx_ring->netdev = adapter->netdev; 1920 tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx; 1921 1922 err = ixgbe_setup_tx_resources(tx_ring); 1923 if (err) 1924 return 1; 1925 1926 switch (adapter->hw.mac.type) { 1927 case ixgbe_mac_82599EB: 1928 case ixgbe_mac_X540: 1929 case ixgbe_mac_X550: 1930 case ixgbe_mac_X550EM_x: 1931 case ixgbe_mac_x550em_a: 1932 case ixgbe_mac_e610: 1933 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); 1934 reg_data |= IXGBE_DMATXCTL_TE; 1935 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); 1936 break; 1937 default: 1938 break; 1939 } 1940 1941 ixgbe_configure_tx_ring(adapter, tx_ring); 1942 1943 /* Setup Rx Descriptor ring and Rx buffers */ 1944 rx_ring->count = IXGBE_DEFAULT_RXD; 1945 rx_ring->queue_index = 0; 1946 rx_ring->dev = &adapter->pdev->dev; 1947 rx_ring->netdev = adapter->netdev; 1948 rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx; 1949 1950 err = ixgbe_setup_rx_resources(adapter, rx_ring); 1951 if (err) { 1952 ret_val = 4; 1953 goto err_nomem; 1954 } 1955 1956 hw->mac.ops.disable_rx(hw); 1957 1958 ixgbe_configure_rx_ring(adapter, rx_ring); 1959 1960 rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL); 1961 rctl |= IXGBE_RXCTRL_DMBYPS; 1962 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl); 1963 1964 hw->mac.ops.enable_rx(hw); 1965 1966 return 0; 1967 1968 err_nomem: 1969 ixgbe_free_desc_rings(adapter); 1970 return ret_val; 1971 } 1972 1973 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter) 1974 { 1975 struct ixgbe_hw *hw = &adapter->hw; 1976 u32 reg_data; 1977 1978 1979 /* Setup MAC loopback */ 1980 reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0); 1981 reg_data |= IXGBE_HLREG0_LPBK; 1982 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data); 1983 1984 reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL); 1985 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE; 1986 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data); 1987 1988 /* X540 and X550 needs to set the MACC.FLU bit to force link up */ 1989 switch (adapter->hw.mac.type) { 1990 case ixgbe_mac_X540: 1991 case ixgbe_mac_X550: 1992 case ixgbe_mac_X550EM_x: 1993 case ixgbe_mac_x550em_a: 1994 case ixgbe_mac_e610: 1995 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC); 1996 reg_data |= IXGBE_MACC_FLU; 1997 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data); 1998 break; 1999 default: 2000 if (hw->mac.orig_autoc) { 2001 reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU; 2002 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data); 2003 } else { 2004 return 10; 2005 } 2006 } 2007 IXGBE_WRITE_FLUSH(hw); 2008 usleep_range(10000, 20000); 2009 2010 /* Disable Atlas Tx lanes; re-enabled in reset path */ 2011 if (hw->mac.type == ixgbe_mac_82598EB) { 2012 u8 atlas; 2013 2014 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas); 2015 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN; 2016 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas); 2017 2018 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas); 2019 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL; 2020 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas); 2021 2022 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas); 2023 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL; 2024 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas); 2025 2026 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas); 2027 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL; 2028 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas); 2029 } 2030 2031 return 0; 2032 } 2033 2034 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter) 2035 { 2036 u32 reg_data; 2037 2038 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0); 2039 reg_data &= ~IXGBE_HLREG0_LPBK; 2040 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data); 2041 } 2042 2043 static void ixgbe_create_lbtest_frame(struct sk_buff *skb, 2044 unsigned int frame_size) 2045 { 2046 memset(skb->data, 0xFF, frame_size); 2047 frame_size >>= 1; 2048 memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1); 2049 skb->data[frame_size + 10] = 0xBE; 2050 skb->data[frame_size + 12] = 0xAF; 2051 } 2052 2053 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer, 2054 unsigned int frame_size) 2055 { 2056 unsigned char *data; 2057 2058 frame_size >>= 1; 2059 2060 data = page_address(rx_buffer->page) + rx_buffer->page_offset; 2061 2062 return data[3] == 0xFF && data[frame_size + 10] == 0xBE && 2063 data[frame_size + 12] == 0xAF; 2064 } 2065 2066 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, 2067 struct ixgbe_ring *tx_ring, 2068 unsigned int size) 2069 { 2070 union ixgbe_adv_rx_desc *rx_desc; 2071 u16 rx_ntc, tx_ntc, count = 0; 2072 2073 /* initialize next to clean and descriptor values */ 2074 rx_ntc = rx_ring->next_to_clean; 2075 tx_ntc = tx_ring->next_to_clean; 2076 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); 2077 2078 while (tx_ntc != tx_ring->next_to_use) { 2079 union ixgbe_adv_tx_desc *tx_desc; 2080 struct ixgbe_tx_buffer *tx_buffer; 2081 2082 tx_desc = IXGBE_TX_DESC(tx_ring, tx_ntc); 2083 2084 /* if DD is not set transmit has not completed */ 2085 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 2086 return count; 2087 2088 /* unmap buffer on Tx side */ 2089 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc]; 2090 2091 /* Free all the Tx ring sk_buffs */ 2092 dev_kfree_skb_any(tx_buffer->skb); 2093 2094 /* unmap skb header data */ 2095 dma_unmap_single(tx_ring->dev, 2096 dma_unmap_addr(tx_buffer, dma), 2097 dma_unmap_len(tx_buffer, len), 2098 DMA_TO_DEVICE); 2099 dma_unmap_len_set(tx_buffer, len, 0); 2100 2101 /* increment Tx next to clean counter */ 2102 tx_ntc++; 2103 if (tx_ntc == tx_ring->count) 2104 tx_ntc = 0; 2105 } 2106 2107 while (rx_desc->wb.upper.length) { 2108 struct ixgbe_rx_buffer *rx_buffer; 2109 2110 /* check Rx buffer */ 2111 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc]; 2112 2113 /* sync Rx buffer for CPU read */ 2114 dma_sync_single_for_cpu(rx_ring->dev, 2115 rx_buffer->dma, 2116 ixgbe_rx_bufsz(rx_ring), 2117 DMA_FROM_DEVICE); 2118 2119 /* verify contents of skb */ 2120 if (ixgbe_check_lbtest_frame(rx_buffer, size)) 2121 count++; 2122 else 2123 break; 2124 2125 /* sync Rx buffer for device write */ 2126 dma_sync_single_for_device(rx_ring->dev, 2127 rx_buffer->dma, 2128 ixgbe_rx_bufsz(rx_ring), 2129 DMA_FROM_DEVICE); 2130 2131 /* increment Rx next to clean counter */ 2132 rx_ntc++; 2133 if (rx_ntc == rx_ring->count) 2134 rx_ntc = 0; 2135 2136 /* fetch next descriptor */ 2137 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); 2138 } 2139 2140 netdev_tx_reset_queue(txring_txq(tx_ring)); 2141 2142 /* re-map buffers to ring, store next to clean values */ 2143 ixgbe_alloc_rx_buffers(rx_ring, count); 2144 rx_ring->next_to_clean = rx_ntc; 2145 tx_ring->next_to_clean = tx_ntc; 2146 2147 return count; 2148 } 2149 2150 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter) 2151 { 2152 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; 2153 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; 2154 int i, j, lc, good_cnt, ret_val = 0; 2155 unsigned int size = 1024; 2156 netdev_tx_t tx_ret_val; 2157 struct sk_buff *skb; 2158 u32 flags_orig = adapter->flags; 2159 2160 /* DCB can modify the frames on Tx */ 2161 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 2162 2163 /* allocate test skb */ 2164 skb = alloc_skb(size, GFP_KERNEL); 2165 if (!skb) 2166 return 11; 2167 2168 /* place data into test skb */ 2169 ixgbe_create_lbtest_frame(skb, size); 2170 skb_put(skb, size); 2171 2172 /* 2173 * Calculate the loop count based on the largest descriptor ring 2174 * The idea is to wrap the largest ring a number of times using 64 2175 * send/receive pairs during each loop 2176 */ 2177 2178 if (rx_ring->count <= tx_ring->count) 2179 lc = ((tx_ring->count / 64) * 2) + 1; 2180 else 2181 lc = ((rx_ring->count / 64) * 2) + 1; 2182 2183 for (j = 0; j <= lc; j++) { 2184 /* reset count of good packets */ 2185 good_cnt = 0; 2186 2187 /* place 64 packets on the transmit queue*/ 2188 for (i = 0; i < 64; i++) { 2189 skb_get(skb); 2190 tx_ret_val = ixgbe_xmit_frame_ring(skb, 2191 adapter, 2192 tx_ring); 2193 if (tx_ret_val == NETDEV_TX_OK) 2194 good_cnt++; 2195 } 2196 2197 if (good_cnt != 64) { 2198 ret_val = 12; 2199 break; 2200 } 2201 2202 /* allow 200 milliseconds for packets to go from Tx to Rx */ 2203 msleep(200); 2204 2205 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size); 2206 if (good_cnt != 64) { 2207 ret_val = 13; 2208 break; 2209 } 2210 } 2211 2212 /* free the original skb */ 2213 kfree_skb(skb); 2214 adapter->flags = flags_orig; 2215 2216 return ret_val; 2217 } 2218 2219 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data) 2220 { 2221 *data = ixgbe_setup_desc_rings(adapter); 2222 if (*data) 2223 goto out; 2224 *data = ixgbe_setup_loopback_test(adapter); 2225 if (*data) 2226 goto err_loopback; 2227 *data = ixgbe_run_loopback_test(adapter); 2228 ixgbe_loopback_cleanup(adapter); 2229 2230 err_loopback: 2231 ixgbe_free_desc_rings(adapter); 2232 out: 2233 return *data; 2234 } 2235 2236 static void ixgbe_diag_test(struct net_device *netdev, 2237 struct ethtool_test *eth_test, u64 *data) 2238 { 2239 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2240 bool if_running = netif_running(netdev); 2241 2242 if (ixgbe_removed(adapter->hw.hw_addr)) { 2243 e_err(hw, "Adapter removed - test blocked\n"); 2244 data[0] = 1; 2245 data[1] = 1; 2246 data[2] = 1; 2247 data[3] = 1; 2248 data[4] = 1; 2249 eth_test->flags |= ETH_TEST_FL_FAILED; 2250 return; 2251 } 2252 set_bit(__IXGBE_TESTING, &adapter->state); 2253 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2254 struct ixgbe_hw *hw = &adapter->hw; 2255 2256 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 2257 int i; 2258 for (i = 0; i < adapter->num_vfs; i++) { 2259 if (adapter->vfinfo[i].clear_to_send) { 2260 netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n"); 2261 data[0] = 1; 2262 data[1] = 1; 2263 data[2] = 1; 2264 data[3] = 1; 2265 data[4] = 1; 2266 eth_test->flags |= ETH_TEST_FL_FAILED; 2267 clear_bit(__IXGBE_TESTING, 2268 &adapter->state); 2269 return; 2270 } 2271 } 2272 } 2273 2274 /* Offline tests */ 2275 e_info(hw, "offline testing starting\n"); 2276 2277 /* Link test performed before hardware reset so autoneg doesn't 2278 * interfere with test result 2279 */ 2280 if (ixgbe_link_test(adapter, &data[4])) 2281 eth_test->flags |= ETH_TEST_FL_FAILED; 2282 2283 if (if_running) 2284 /* indicate we're in test mode */ 2285 ixgbe_close(netdev); 2286 else 2287 ixgbe_reset(adapter); 2288 2289 e_info(hw, "register testing starting\n"); 2290 if (ixgbe_reg_test(adapter, &data[0])) 2291 eth_test->flags |= ETH_TEST_FL_FAILED; 2292 2293 ixgbe_reset(adapter); 2294 e_info(hw, "eeprom testing starting\n"); 2295 if (ixgbe_eeprom_test(adapter, &data[1])) 2296 eth_test->flags |= ETH_TEST_FL_FAILED; 2297 2298 ixgbe_reset(adapter); 2299 e_info(hw, "interrupt testing starting\n"); 2300 if (ixgbe_intr_test(adapter, &data[2])) 2301 eth_test->flags |= ETH_TEST_FL_FAILED; 2302 2303 /* If SRIOV or VMDq is enabled then skip MAC 2304 * loopback diagnostic. */ 2305 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED | 2306 IXGBE_FLAG_VMDQ_ENABLED)) { 2307 e_info(hw, "Skip MAC loopback diagnostic in VT mode\n"); 2308 data[3] = 0; 2309 goto skip_loopback; 2310 } 2311 2312 ixgbe_reset(adapter); 2313 e_info(hw, "loopback testing starting\n"); 2314 if (ixgbe_loopback_test(adapter, &data[3])) 2315 eth_test->flags |= ETH_TEST_FL_FAILED; 2316 2317 skip_loopback: 2318 ixgbe_reset(adapter); 2319 2320 /* clear testing bit and return adapter to previous state */ 2321 clear_bit(__IXGBE_TESTING, &adapter->state); 2322 if (if_running) 2323 ixgbe_open(netdev); 2324 else if (hw->mac.ops.disable_tx_laser) 2325 hw->mac.ops.disable_tx_laser(hw); 2326 } else { 2327 e_info(hw, "online testing starting\n"); 2328 2329 /* Online tests */ 2330 if (ixgbe_link_test(adapter, &data[4])) 2331 eth_test->flags |= ETH_TEST_FL_FAILED; 2332 2333 /* Offline tests aren't run; pass by default */ 2334 data[0] = 0; 2335 data[1] = 0; 2336 data[2] = 0; 2337 data[3] = 0; 2338 2339 clear_bit(__IXGBE_TESTING, &adapter->state); 2340 } 2341 } 2342 2343 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter, 2344 struct ethtool_wolinfo *wol) 2345 { 2346 struct ixgbe_hw *hw = &adapter->hw; 2347 int retval = 0; 2348 2349 /* WOL not supported for all devices */ 2350 if (!ixgbe_wol_supported(adapter, hw->device_id, 2351 hw->subsystem_device_id)) { 2352 retval = 1; 2353 wol->supported = 0; 2354 } 2355 2356 return retval; 2357 } 2358 2359 static void ixgbe_get_wol(struct net_device *netdev, 2360 struct ethtool_wolinfo *wol) 2361 { 2362 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2363 2364 wol->supported = WAKE_UCAST | WAKE_MCAST | 2365 WAKE_BCAST | WAKE_MAGIC; 2366 wol->wolopts = 0; 2367 2368 if (ixgbe_wol_exclusion(adapter, wol) || 2369 !device_can_wakeup(&adapter->pdev->dev)) 2370 return; 2371 2372 if (adapter->wol & IXGBE_WUFC_EX) 2373 wol->wolopts |= WAKE_UCAST; 2374 if (adapter->wol & IXGBE_WUFC_MC) 2375 wol->wolopts |= WAKE_MCAST; 2376 if (adapter->wol & IXGBE_WUFC_BC) 2377 wol->wolopts |= WAKE_BCAST; 2378 if (adapter->wol & IXGBE_WUFC_MAG) 2379 wol->wolopts |= WAKE_MAGIC; 2380 } 2381 2382 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2383 { 2384 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2385 2386 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE | 2387 WAKE_FILTER)) 2388 return -EOPNOTSUPP; 2389 2390 if (ixgbe_wol_exclusion(adapter, wol)) 2391 return wol->wolopts ? -EOPNOTSUPP : 0; 2392 2393 adapter->wol = 0; 2394 2395 if (wol->wolopts & WAKE_UCAST) 2396 adapter->wol |= IXGBE_WUFC_EX; 2397 if (wol->wolopts & WAKE_MCAST) 2398 adapter->wol |= IXGBE_WUFC_MC; 2399 if (wol->wolopts & WAKE_BCAST) 2400 adapter->wol |= IXGBE_WUFC_BC; 2401 if (wol->wolopts & WAKE_MAGIC) 2402 adapter->wol |= IXGBE_WUFC_MAG; 2403 2404 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 2405 2406 return 0; 2407 } 2408 2409 static int ixgbe_set_wol_acpi(struct net_device *netdev, 2410 struct ethtool_wolinfo *wol) 2411 { 2412 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2413 struct ixgbe_hw *hw = &adapter->hw; 2414 u32 grc; 2415 2416 if (ixgbe_wol_exclusion(adapter, wol)) 2417 return wol->wolopts ? -EOPNOTSUPP : 0; 2418 2419 /* disable APM wakeup */ 2420 grc = IXGBE_READ_REG(hw, IXGBE_GRC_X550EM_a); 2421 grc &= ~IXGBE_GRC_APME; 2422 IXGBE_WRITE_REG(hw, IXGBE_GRC_X550EM_a, grc); 2423 2424 /* erase existing filters */ 2425 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 2426 adapter->wol = 0; 2427 2428 if (wol->wolopts & WAKE_UCAST) 2429 adapter->wol |= IXGBE_WUFC_EX; 2430 if (wol->wolopts & WAKE_MCAST) 2431 adapter->wol |= IXGBE_WUFC_MC; 2432 if (wol->wolopts & WAKE_BCAST) 2433 adapter->wol |= IXGBE_WUFC_BC; 2434 2435 IXGBE_WRITE_REG(hw, IXGBE_WUC, IXGBE_WUC_PME_EN); 2436 IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wol); 2437 2438 hw->wol_enabled = adapter->wol; 2439 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 2440 2441 return 0; 2442 } 2443 2444 static int ixgbe_set_wol_e610(struct net_device *netdev, 2445 struct ethtool_wolinfo *wol) 2446 { 2447 if (wol->wolopts & (WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)) 2448 return ixgbe_set_wol_acpi(netdev, wol); 2449 else 2450 return ixgbe_set_wol(netdev, wol); 2451 } 2452 2453 static int ixgbe_nway_reset(struct net_device *netdev) 2454 { 2455 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2456 2457 if (netif_running(netdev)) 2458 ixgbe_reinit_locked(adapter); 2459 2460 return 0; 2461 } 2462 2463 static int ixgbe_set_phys_id(struct net_device *netdev, 2464 enum ethtool_phys_id_state state) 2465 { 2466 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2467 struct ixgbe_hw *hw = &adapter->hw; 2468 2469 if (!hw->mac.ops.led_on || !hw->mac.ops.led_off) 2470 return -EOPNOTSUPP; 2471 2472 switch (state) { 2473 case ETHTOOL_ID_ACTIVE: 2474 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 2475 return 2; 2476 2477 case ETHTOOL_ID_ON: 2478 hw->mac.ops.led_on(hw, hw->mac.led_link_act); 2479 break; 2480 2481 case ETHTOOL_ID_OFF: 2482 hw->mac.ops.led_off(hw, hw->mac.led_link_act); 2483 break; 2484 2485 case ETHTOOL_ID_INACTIVE: 2486 /* Restore LED settings */ 2487 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg); 2488 break; 2489 } 2490 2491 return 0; 2492 } 2493 2494 static int ixgbe_set_phys_id_e610(struct net_device *netdev, 2495 enum ethtool_phys_id_state state) 2496 { 2497 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2498 bool led_active; 2499 2500 switch (state) { 2501 case ETHTOOL_ID_ACTIVE: 2502 led_active = true; 2503 break; 2504 case ETHTOOL_ID_INACTIVE: 2505 led_active = false; 2506 break; 2507 default: 2508 return -EOPNOTSUPP; 2509 } 2510 2511 return ixgbe_aci_set_port_id_led(&adapter->hw, !led_active); 2512 } 2513 2514 static int ixgbe_get_coalesce(struct net_device *netdev, 2515 struct ethtool_coalesce *ec, 2516 struct kernel_ethtool_coalesce *kernel_coal, 2517 struct netlink_ext_ack *extack) 2518 { 2519 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2520 2521 /* only valid if in constant ITR mode */ 2522 if (adapter->rx_itr_setting <= 1) 2523 ec->rx_coalesce_usecs = adapter->rx_itr_setting; 2524 else 2525 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2; 2526 2527 /* if in mixed tx/rx queues per vector mode, report only rx settings */ 2528 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2529 return 0; 2530 2531 /* only valid if in constant ITR mode */ 2532 if (adapter->tx_itr_setting <= 1) 2533 ec->tx_coalesce_usecs = adapter->tx_itr_setting; 2534 else 2535 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2; 2536 2537 return 0; 2538 } 2539 2540 /* 2541 * this function must be called before setting the new value of 2542 * rx_itr_setting 2543 */ 2544 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter) 2545 { 2546 struct net_device *netdev = adapter->netdev; 2547 2548 /* nothing to do if LRO or RSC are not enabled */ 2549 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) || 2550 !(netdev->features & NETIF_F_LRO)) 2551 return false; 2552 2553 /* check the feature flag value and enable RSC if necessary */ 2554 if (adapter->rx_itr_setting == 1 || 2555 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { 2556 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { 2557 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; 2558 e_info(probe, "rx-usecs value high enough to re-enable RSC\n"); 2559 return true; 2560 } 2561 /* if interrupt rate is too high then disable RSC */ 2562 } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { 2563 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; 2564 e_info(probe, "rx-usecs set too low, disabling RSC\n"); 2565 return true; 2566 } 2567 return false; 2568 } 2569 2570 static int ixgbe_set_coalesce(struct net_device *netdev, 2571 struct ethtool_coalesce *ec, 2572 struct kernel_ethtool_coalesce *kernel_coal, 2573 struct netlink_ext_ack *extack) 2574 { 2575 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2576 struct ixgbe_q_vector *q_vector; 2577 int i; 2578 u16 tx_itr_param, rx_itr_param, tx_itr_prev; 2579 bool need_reset = false; 2580 2581 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) { 2582 /* reject Tx specific changes in case of mixed RxTx vectors */ 2583 if (ec->tx_coalesce_usecs) 2584 return -EINVAL; 2585 tx_itr_prev = adapter->rx_itr_setting; 2586 } else { 2587 tx_itr_prev = adapter->tx_itr_setting; 2588 } 2589 2590 if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) || 2591 (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2))) 2592 return -EINVAL; 2593 2594 if (ec->rx_coalesce_usecs > 1) 2595 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2; 2596 else 2597 adapter->rx_itr_setting = ec->rx_coalesce_usecs; 2598 2599 if (adapter->rx_itr_setting == 1) 2600 rx_itr_param = IXGBE_20K_ITR; 2601 else 2602 rx_itr_param = adapter->rx_itr_setting; 2603 2604 if (ec->tx_coalesce_usecs > 1) 2605 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2; 2606 else 2607 adapter->tx_itr_setting = ec->tx_coalesce_usecs; 2608 2609 if (adapter->tx_itr_setting == 1) 2610 tx_itr_param = IXGBE_12K_ITR; 2611 else 2612 tx_itr_param = adapter->tx_itr_setting; 2613 2614 /* mixed Rx/Tx */ 2615 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2616 adapter->tx_itr_setting = adapter->rx_itr_setting; 2617 2618 /* detect ITR changes that require update of TXDCTL.WTHRESH */ 2619 if ((adapter->tx_itr_setting != 1) && 2620 (adapter->tx_itr_setting < IXGBE_100K_ITR)) { 2621 if ((tx_itr_prev == 1) || 2622 (tx_itr_prev >= IXGBE_100K_ITR)) 2623 need_reset = true; 2624 } else { 2625 if ((tx_itr_prev != 1) && 2626 (tx_itr_prev < IXGBE_100K_ITR)) 2627 need_reset = true; 2628 } 2629 2630 /* check the old value and enable RSC if necessary */ 2631 need_reset |= ixgbe_update_rsc(adapter); 2632 2633 for (i = 0; i < adapter->num_q_vectors; i++) { 2634 q_vector = adapter->q_vector[i]; 2635 if (q_vector->tx.count && !q_vector->rx.count) 2636 /* tx only */ 2637 q_vector->itr = tx_itr_param; 2638 else 2639 /* rx only or mixed */ 2640 q_vector->itr = rx_itr_param; 2641 ixgbe_write_eitr(q_vector); 2642 } 2643 2644 /* 2645 * do reset here at the end to make sure EITR==0 case is handled 2646 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings 2647 * also locks in RSC enable/disable which requires reset 2648 */ 2649 if (need_reset) 2650 ixgbe_do_reset(netdev); 2651 2652 return 0; 2653 } 2654 2655 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2656 struct ethtool_rxnfc *cmd) 2657 { 2658 union ixgbe_atr_input *mask = &adapter->fdir_mask; 2659 struct ethtool_rx_flow_spec *fsp = 2660 (struct ethtool_rx_flow_spec *)&cmd->fs; 2661 struct hlist_node *node2; 2662 struct ixgbe_fdir_filter *rule = NULL; 2663 2664 /* report total rule count */ 2665 cmd->data = (1024 << adapter->fdir_pballoc) - 2; 2666 2667 hlist_for_each_entry_safe(rule, node2, 2668 &adapter->fdir_filter_list, fdir_node) { 2669 if (fsp->location <= rule->sw_idx) 2670 break; 2671 } 2672 2673 if (!rule || fsp->location != rule->sw_idx) 2674 return -EINVAL; 2675 2676 /* fill out the flow spec entry */ 2677 2678 /* set flow type field */ 2679 switch (rule->filter.formatted.flow_type) { 2680 case IXGBE_ATR_FLOW_TYPE_TCPV4: 2681 fsp->flow_type = TCP_V4_FLOW; 2682 break; 2683 case IXGBE_ATR_FLOW_TYPE_UDPV4: 2684 fsp->flow_type = UDP_V4_FLOW; 2685 break; 2686 case IXGBE_ATR_FLOW_TYPE_SCTPV4: 2687 fsp->flow_type = SCTP_V4_FLOW; 2688 break; 2689 case IXGBE_ATR_FLOW_TYPE_IPV4: 2690 fsp->flow_type = IP_USER_FLOW; 2691 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2692 fsp->h_u.usr_ip4_spec.proto = 0; 2693 fsp->m_u.usr_ip4_spec.proto = 0; 2694 break; 2695 default: 2696 return -EINVAL; 2697 } 2698 2699 fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port; 2700 fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port; 2701 fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port; 2702 fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port; 2703 fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0]; 2704 fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0]; 2705 fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0]; 2706 fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0]; 2707 fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id; 2708 fsp->m_ext.vlan_tci = mask->formatted.vlan_id; 2709 fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes; 2710 fsp->m_ext.vlan_etype = mask->formatted.flex_bytes; 2711 fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool); 2712 fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool); 2713 fsp->flow_type |= FLOW_EXT; 2714 2715 /* record action */ 2716 if (rule->action == IXGBE_FDIR_DROP_QUEUE) 2717 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2718 else 2719 fsp->ring_cookie = rule->action; 2720 2721 return 0; 2722 } 2723 2724 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter, 2725 struct ethtool_rxnfc *cmd, 2726 u32 *rule_locs) 2727 { 2728 struct hlist_node *node2; 2729 struct ixgbe_fdir_filter *rule; 2730 int cnt = 0; 2731 2732 /* report total rule count */ 2733 cmd->data = (1024 << adapter->fdir_pballoc) - 2; 2734 2735 hlist_for_each_entry_safe(rule, node2, 2736 &adapter->fdir_filter_list, fdir_node) { 2737 if (cnt == cmd->rule_cnt) 2738 return -EMSGSIZE; 2739 rule_locs[cnt] = rule->sw_idx; 2740 cnt++; 2741 } 2742 2743 cmd->rule_cnt = cnt; 2744 2745 return 0; 2746 } 2747 2748 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter, 2749 struct ethtool_rxnfc *cmd) 2750 { 2751 cmd->data = 0; 2752 2753 /* Report default options for RSS on ixgbe */ 2754 switch (cmd->flow_type) { 2755 case TCP_V4_FLOW: 2756 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2757 fallthrough; 2758 case UDP_V4_FLOW: 2759 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 2760 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2761 fallthrough; 2762 case SCTP_V4_FLOW: 2763 case AH_ESP_V4_FLOW: 2764 case AH_V4_FLOW: 2765 case ESP_V4_FLOW: 2766 case IPV4_FLOW: 2767 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2768 break; 2769 case TCP_V6_FLOW: 2770 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2771 fallthrough; 2772 case UDP_V6_FLOW: 2773 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 2774 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2775 fallthrough; 2776 case SCTP_V6_FLOW: 2777 case AH_ESP_V6_FLOW: 2778 case AH_V6_FLOW: 2779 case ESP_V6_FLOW: 2780 case IPV6_FLOW: 2781 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2782 break; 2783 default: 2784 return -EINVAL; 2785 } 2786 2787 return 0; 2788 } 2789 2790 static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter) 2791 { 2792 if (adapter->hw.mac.type < ixgbe_mac_X550) 2793 return 16; 2794 else 2795 return 64; 2796 } 2797 2798 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 2799 u32 *rule_locs) 2800 { 2801 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2802 int ret = -EOPNOTSUPP; 2803 2804 switch (cmd->cmd) { 2805 case ETHTOOL_GRXRINGS: 2806 cmd->data = min_t(int, adapter->num_rx_queues, 2807 ixgbe_rss_indir_tbl_max(adapter)); 2808 ret = 0; 2809 break; 2810 case ETHTOOL_GRXCLSRLCNT: 2811 cmd->rule_cnt = adapter->fdir_filter_count; 2812 ret = 0; 2813 break; 2814 case ETHTOOL_GRXCLSRULE: 2815 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd); 2816 break; 2817 case ETHTOOL_GRXCLSRLALL: 2818 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs); 2819 break; 2820 case ETHTOOL_GRXFH: 2821 ret = ixgbe_get_rss_hash_opts(adapter, cmd); 2822 break; 2823 default: 2824 break; 2825 } 2826 2827 return ret; 2828 } 2829 2830 int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2831 struct ixgbe_fdir_filter *input, 2832 u16 sw_idx) 2833 { 2834 struct ixgbe_hw *hw = &adapter->hw; 2835 struct hlist_node *node2; 2836 struct ixgbe_fdir_filter *rule, *parent; 2837 int err = -EINVAL; 2838 2839 parent = NULL; 2840 rule = NULL; 2841 2842 hlist_for_each_entry_safe(rule, node2, 2843 &adapter->fdir_filter_list, fdir_node) { 2844 /* hash found, or no matching entry */ 2845 if (rule->sw_idx >= sw_idx) 2846 break; 2847 parent = rule; 2848 } 2849 2850 /* if there is an old rule occupying our place remove it */ 2851 if (rule && (rule->sw_idx == sw_idx)) { 2852 if (!input || (rule->filter.formatted.bkt_hash != 2853 input->filter.formatted.bkt_hash)) { 2854 err = ixgbe_fdir_erase_perfect_filter_82599(hw, 2855 &rule->filter, 2856 sw_idx); 2857 } 2858 2859 hlist_del(&rule->fdir_node); 2860 kfree(rule); 2861 adapter->fdir_filter_count--; 2862 } 2863 2864 /* 2865 * If no input this was a delete, err should be 0 if a rule was 2866 * successfully found and removed from the list else -EINVAL 2867 */ 2868 if (!input) 2869 return err; 2870 2871 /* initialize node and set software index */ 2872 INIT_HLIST_NODE(&input->fdir_node); 2873 2874 /* add filter to the list */ 2875 if (parent) 2876 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 2877 else 2878 hlist_add_head(&input->fdir_node, 2879 &adapter->fdir_filter_list); 2880 2881 /* update counts */ 2882 adapter->fdir_filter_count++; 2883 2884 return 0; 2885 } 2886 2887 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp, 2888 u8 *flow_type) 2889 { 2890 switch (fsp->flow_type & ~FLOW_EXT) { 2891 case TCP_V4_FLOW: 2892 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 2893 break; 2894 case UDP_V4_FLOW: 2895 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; 2896 break; 2897 case SCTP_V4_FLOW: 2898 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; 2899 break; 2900 case IP_USER_FLOW: 2901 switch (fsp->h_u.usr_ip4_spec.proto) { 2902 case IPPROTO_TCP: 2903 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 2904 break; 2905 case IPPROTO_UDP: 2906 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; 2907 break; 2908 case IPPROTO_SCTP: 2909 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; 2910 break; 2911 case 0: 2912 if (!fsp->m_u.usr_ip4_spec.proto) { 2913 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4; 2914 break; 2915 } 2916 fallthrough; 2917 default: 2918 return 0; 2919 } 2920 break; 2921 default: 2922 return 0; 2923 } 2924 2925 return 1; 2926 } 2927 2928 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2929 struct ethtool_rxnfc *cmd) 2930 { 2931 struct ethtool_rx_flow_spec *fsp = 2932 (struct ethtool_rx_flow_spec *)&cmd->fs; 2933 struct ixgbe_hw *hw = &adapter->hw; 2934 struct ixgbe_fdir_filter *input; 2935 union ixgbe_atr_input mask; 2936 u8 queue; 2937 int err; 2938 2939 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) 2940 return -EOPNOTSUPP; 2941 2942 /* ring_cookie is a masked into a set of queues and ixgbe pools or 2943 * we use the drop index. 2944 */ 2945 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 2946 queue = IXGBE_FDIR_DROP_QUEUE; 2947 } else { 2948 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 2949 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 2950 2951 if (!vf && (ring >= adapter->num_rx_queues)) 2952 return -EINVAL; 2953 else if (vf && 2954 ((vf > adapter->num_vfs) || 2955 ring >= adapter->num_rx_queues_per_pool)) 2956 return -EINVAL; 2957 2958 /* Map the ring onto the absolute queue index */ 2959 if (!vf) 2960 queue = adapter->rx_ring[ring]->reg_idx; 2961 else 2962 queue = ((vf - 1) * 2963 adapter->num_rx_queues_per_pool) + ring; 2964 } 2965 2966 /* Don't allow indexes to exist outside of available space */ 2967 if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) { 2968 e_err(drv, "Location out of range\n"); 2969 return -EINVAL; 2970 } 2971 2972 input = kzalloc(sizeof(*input), GFP_ATOMIC); 2973 if (!input) 2974 return -ENOMEM; 2975 2976 memset(&mask, 0, sizeof(union ixgbe_atr_input)); 2977 2978 /* set SW index */ 2979 input->sw_idx = fsp->location; 2980 2981 /* record flow type */ 2982 if (!ixgbe_flowspec_to_flow_type(fsp, 2983 &input->filter.formatted.flow_type)) { 2984 e_err(drv, "Unrecognized flow type\n"); 2985 goto err_out; 2986 } 2987 2988 mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | 2989 IXGBE_ATR_L4TYPE_MASK; 2990 2991 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4) 2992 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK; 2993 2994 /* Copy input into formatted structures */ 2995 input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src; 2996 mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src; 2997 input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst; 2998 mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst; 2999 input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc; 3000 mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc; 3001 input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst; 3002 mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst; 3003 3004 if (fsp->flow_type & FLOW_EXT) { 3005 input->filter.formatted.vm_pool = 3006 (unsigned char)ntohl(fsp->h_ext.data[1]); 3007 mask.formatted.vm_pool = 3008 (unsigned char)ntohl(fsp->m_ext.data[1]); 3009 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci; 3010 mask.formatted.vlan_id = fsp->m_ext.vlan_tci; 3011 input->filter.formatted.flex_bytes = 3012 fsp->h_ext.vlan_etype; 3013 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype; 3014 } 3015 3016 /* determine if we need to drop or route the packet */ 3017 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) 3018 input->action = IXGBE_FDIR_DROP_QUEUE; 3019 else 3020 input->action = fsp->ring_cookie; 3021 3022 spin_lock(&adapter->fdir_perfect_lock); 3023 3024 if (hlist_empty(&adapter->fdir_filter_list)) { 3025 /* save mask and program input mask into HW */ 3026 memcpy(&adapter->fdir_mask, &mask, sizeof(mask)); 3027 err = ixgbe_fdir_set_input_mask_82599(hw, &mask); 3028 if (err) { 3029 e_err(drv, "Error writing mask\n"); 3030 goto err_out_w_lock; 3031 } 3032 } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) { 3033 e_err(drv, "Only one mask supported per port\n"); 3034 goto err_out_w_lock; 3035 } 3036 3037 /* apply mask and compute/store hash */ 3038 ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask); 3039 3040 /* program filters to filter memory */ 3041 err = ixgbe_fdir_write_perfect_filter_82599(hw, 3042 &input->filter, input->sw_idx, queue); 3043 if (err) 3044 goto err_out_w_lock; 3045 3046 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx); 3047 3048 spin_unlock(&adapter->fdir_perfect_lock); 3049 3050 return err; 3051 err_out_w_lock: 3052 spin_unlock(&adapter->fdir_perfect_lock); 3053 err_out: 3054 kfree(input); 3055 return -EINVAL; 3056 } 3057 3058 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 3059 struct ethtool_rxnfc *cmd) 3060 { 3061 struct ethtool_rx_flow_spec *fsp = 3062 (struct ethtool_rx_flow_spec *)&cmd->fs; 3063 int err; 3064 3065 spin_lock(&adapter->fdir_perfect_lock); 3066 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location); 3067 spin_unlock(&adapter->fdir_perfect_lock); 3068 3069 return err; 3070 } 3071 3072 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \ 3073 IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 3074 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter, 3075 struct ethtool_rxnfc *nfc) 3076 { 3077 u32 flags2 = adapter->flags2; 3078 3079 /* 3080 * RSS does not support anything other than hashing 3081 * to queues on src and dst IPs and ports 3082 */ 3083 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3084 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3085 return -EINVAL; 3086 3087 switch (nfc->flow_type) { 3088 case TCP_V4_FLOW: 3089 case TCP_V6_FLOW: 3090 if (!(nfc->data & RXH_IP_SRC) || 3091 !(nfc->data & RXH_IP_DST) || 3092 !(nfc->data & RXH_L4_B_0_1) || 3093 !(nfc->data & RXH_L4_B_2_3)) 3094 return -EINVAL; 3095 break; 3096 case UDP_V4_FLOW: 3097 if (!(nfc->data & RXH_IP_SRC) || 3098 !(nfc->data & RXH_IP_DST)) 3099 return -EINVAL; 3100 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 3101 case 0: 3102 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; 3103 break; 3104 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 3105 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; 3106 break; 3107 default: 3108 return -EINVAL; 3109 } 3110 break; 3111 case UDP_V6_FLOW: 3112 if (!(nfc->data & RXH_IP_SRC) || 3113 !(nfc->data & RXH_IP_DST)) 3114 return -EINVAL; 3115 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 3116 case 0: 3117 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; 3118 break; 3119 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 3120 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; 3121 break; 3122 default: 3123 return -EINVAL; 3124 } 3125 break; 3126 case AH_ESP_V4_FLOW: 3127 case AH_V4_FLOW: 3128 case ESP_V4_FLOW: 3129 case SCTP_V4_FLOW: 3130 case AH_ESP_V6_FLOW: 3131 case AH_V6_FLOW: 3132 case ESP_V6_FLOW: 3133 case SCTP_V6_FLOW: 3134 if (!(nfc->data & RXH_IP_SRC) || 3135 !(nfc->data & RXH_IP_DST) || 3136 (nfc->data & RXH_L4_B_0_1) || 3137 (nfc->data & RXH_L4_B_2_3)) 3138 return -EINVAL; 3139 break; 3140 default: 3141 return -EINVAL; 3142 } 3143 3144 /* if we changed something we need to update flags */ 3145 if (flags2 != adapter->flags2) { 3146 struct ixgbe_hw *hw = &adapter->hw; 3147 u32 mrqc; 3148 unsigned int pf_pool = adapter->num_vfs; 3149 3150 if ((hw->mac.type >= ixgbe_mac_X550) && 3151 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 3152 mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool)); 3153 else 3154 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); 3155 3156 if ((flags2 & UDP_RSS_FLAGS) && 3157 !(adapter->flags2 & UDP_RSS_FLAGS)) 3158 e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n"); 3159 3160 adapter->flags2 = flags2; 3161 3162 /* Perform hash on these packet types */ 3163 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 3164 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP 3165 | IXGBE_MRQC_RSS_FIELD_IPV6 3166 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 3167 3168 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP | 3169 IXGBE_MRQC_RSS_FIELD_IPV6_UDP); 3170 3171 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 3172 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 3173 3174 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 3175 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 3176 3177 if ((hw->mac.type >= ixgbe_mac_X550) && 3178 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 3179 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc); 3180 else 3181 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 3182 } 3183 3184 return 0; 3185 } 3186 3187 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 3188 { 3189 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3190 int ret = -EOPNOTSUPP; 3191 3192 switch (cmd->cmd) { 3193 case ETHTOOL_SRXCLSRLINS: 3194 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd); 3195 break; 3196 case ETHTOOL_SRXCLSRLDEL: 3197 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd); 3198 break; 3199 case ETHTOOL_SRXFH: 3200 ret = ixgbe_set_rss_hash_opt(adapter, cmd); 3201 break; 3202 default: 3203 break; 3204 } 3205 3206 return ret; 3207 } 3208 3209 static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev) 3210 { 3211 return IXGBE_RSS_KEY_SIZE; 3212 } 3213 3214 static u32 ixgbe_rss_indir_size(struct net_device *netdev) 3215 { 3216 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3217 3218 return ixgbe_rss_indir_tbl_entries(adapter); 3219 } 3220 3221 static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir) 3222 { 3223 int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter); 3224 u16 rss_m = adapter->ring_feature[RING_F_RSS].mask; 3225 3226 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 3227 rss_m = adapter->ring_feature[RING_F_RSS].indices - 1; 3228 3229 for (i = 0; i < reta_size; i++) 3230 indir[i] = adapter->rss_indir_tbl[i] & rss_m; 3231 } 3232 3233 static int ixgbe_get_rxfh(struct net_device *netdev, 3234 struct ethtool_rxfh_param *rxfh) 3235 { 3236 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3237 3238 rxfh->hfunc = ETH_RSS_HASH_TOP; 3239 3240 if (rxfh->indir) 3241 ixgbe_get_reta(adapter, rxfh->indir); 3242 3243 if (rxfh->key) 3244 memcpy(rxfh->key, adapter->rss_key, 3245 ixgbe_get_rxfh_key_size(netdev)); 3246 3247 return 0; 3248 } 3249 3250 static int ixgbe_set_rxfh(struct net_device *netdev, 3251 struct ethtool_rxfh_param *rxfh, 3252 struct netlink_ext_ack *extack) 3253 { 3254 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3255 int i; 3256 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 3257 3258 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE && 3259 rxfh->hfunc != ETH_RSS_HASH_TOP) 3260 return -EOPNOTSUPP; 3261 3262 /* Fill out the redirection table */ 3263 if (rxfh->indir) { 3264 int max_queues = min_t(int, adapter->num_rx_queues, 3265 ixgbe_rss_indir_tbl_max(adapter)); 3266 3267 /*Allow at least 2 queues w/ SR-IOV.*/ 3268 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && 3269 (max_queues < 2)) 3270 max_queues = 2; 3271 3272 /* Verify user input. */ 3273 for (i = 0; i < reta_entries; i++) 3274 if (rxfh->indir[i] >= max_queues) 3275 return -EINVAL; 3276 3277 for (i = 0; i < reta_entries; i++) 3278 adapter->rss_indir_tbl[i] = rxfh->indir[i]; 3279 3280 ixgbe_store_reta(adapter); 3281 } 3282 3283 /* Fill out the rss hash key */ 3284 if (rxfh->key) { 3285 memcpy(adapter->rss_key, rxfh->key, 3286 ixgbe_get_rxfh_key_size(netdev)); 3287 ixgbe_store_key(adapter); 3288 } 3289 3290 return 0; 3291 } 3292 3293 static int ixgbe_get_ts_info(struct net_device *dev, 3294 struct kernel_ethtool_ts_info *info) 3295 { 3296 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3297 3298 /* we always support timestamping disabled */ 3299 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE); 3300 3301 switch (adapter->hw.mac.type) { 3302 case ixgbe_mac_X550: 3303 case ixgbe_mac_X550EM_x: 3304 case ixgbe_mac_x550em_a: 3305 case ixgbe_mac_e610: 3306 info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL); 3307 break; 3308 case ixgbe_mac_X540: 3309 case ixgbe_mac_82599EB: 3310 info->rx_filters |= 3311 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 3312 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 3313 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); 3314 break; 3315 default: 3316 return ethtool_op_get_ts_info(dev, info); 3317 } 3318 3319 info->so_timestamping = 3320 SOF_TIMESTAMPING_TX_SOFTWARE | 3321 SOF_TIMESTAMPING_TX_HARDWARE | 3322 SOF_TIMESTAMPING_RX_HARDWARE | 3323 SOF_TIMESTAMPING_RAW_HARDWARE; 3324 3325 if (adapter->ptp_clock) 3326 info->phc_index = ptp_clock_index(adapter->ptp_clock); 3327 3328 info->tx_types = 3329 BIT(HWTSTAMP_TX_OFF) | 3330 BIT(HWTSTAMP_TX_ON); 3331 3332 return 0; 3333 } 3334 3335 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter) 3336 { 3337 unsigned int max_combined; 3338 u8 tcs = adapter->hw_tcs; 3339 3340 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { 3341 /* We only support one q_vector without MSI-X */ 3342 max_combined = 1; 3343 } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 3344 /* Limit value based on the queue mask */ 3345 max_combined = adapter->ring_feature[RING_F_RSS].mask + 1; 3346 } else if (tcs > 1) { 3347 /* For DCB report channels per traffic class */ 3348 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3349 /* 8 TC w/ 4 queues per TC */ 3350 max_combined = 4; 3351 } else if (tcs > 4) { 3352 /* 8 TC w/ 8 queues per TC */ 3353 max_combined = 8; 3354 } else { 3355 /* 4 TC w/ 16 queues per TC */ 3356 max_combined = 16; 3357 } 3358 } else if (adapter->atr_sample_rate) { 3359 /* support up to 64 queues with ATR */ 3360 max_combined = IXGBE_MAX_FDIR_INDICES; 3361 } else { 3362 /* support up to 16 queues with RSS */ 3363 max_combined = ixgbe_max_rss_indices(adapter); 3364 } 3365 3366 return min_t(int, max_combined, num_online_cpus()); 3367 } 3368 3369 static void ixgbe_get_channels(struct net_device *dev, 3370 struct ethtool_channels *ch) 3371 { 3372 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3373 3374 /* report maximum channels */ 3375 ch->max_combined = ixgbe_max_channels(adapter); 3376 3377 /* report info for other vector */ 3378 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 3379 ch->max_other = NON_Q_VECTORS; 3380 ch->other_count = NON_Q_VECTORS; 3381 } 3382 3383 /* record RSS queues */ 3384 ch->combined_count = adapter->ring_feature[RING_F_RSS].indices; 3385 3386 /* nothing else to report if RSS is disabled */ 3387 if (ch->combined_count == 1) 3388 return; 3389 3390 /* we do not support ATR queueing if SR-IOV is enabled */ 3391 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 3392 return; 3393 3394 /* same thing goes for being DCB enabled */ 3395 if (adapter->hw_tcs > 1) 3396 return; 3397 3398 /* if ATR is disabled we can exit */ 3399 if (!adapter->atr_sample_rate) 3400 return; 3401 3402 /* report flow director queues as maximum channels */ 3403 ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices; 3404 } 3405 3406 static int ixgbe_set_channels(struct net_device *dev, 3407 struct ethtool_channels *ch) 3408 { 3409 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3410 unsigned int count = ch->combined_count; 3411 u8 max_rss_indices = ixgbe_max_rss_indices(adapter); 3412 3413 /* verify they are not requesting separate vectors */ 3414 if (!count || ch->rx_count || ch->tx_count) 3415 return -EINVAL; 3416 3417 /* verify other_count has not changed */ 3418 if (ch->other_count != NON_Q_VECTORS) 3419 return -EINVAL; 3420 3421 /* verify the number of channels does not exceed hardware limits */ 3422 if (count > ixgbe_max_channels(adapter)) 3423 return -EINVAL; 3424 3425 /* update feature limits from largest to smallest supported values */ 3426 adapter->ring_feature[RING_F_FDIR].limit = count; 3427 3428 /* cap RSS limit */ 3429 if (count > max_rss_indices) 3430 count = max_rss_indices; 3431 adapter->ring_feature[RING_F_RSS].limit = count; 3432 3433 #ifdef IXGBE_FCOE 3434 /* cap FCoE limit at 8 */ 3435 if (count > IXGBE_FCRETA_SIZE) 3436 count = IXGBE_FCRETA_SIZE; 3437 adapter->ring_feature[RING_F_FCOE].limit = count; 3438 3439 #endif 3440 /* use setup TC to update any traffic class queue mapping */ 3441 return ixgbe_setup_tc(dev, adapter->hw_tcs); 3442 } 3443 3444 static int ixgbe_get_module_info(struct net_device *dev, 3445 struct ethtool_modinfo *modinfo) 3446 { 3447 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3448 struct ixgbe_hw *hw = &adapter->hw; 3449 u8 sff8472_rev, addr_mode; 3450 bool page_swap = false; 3451 int status; 3452 3453 if (hw->phy.type == ixgbe_phy_fw) 3454 return -ENXIO; 3455 3456 /* Check whether we support SFF-8472 or not */ 3457 status = hw->phy.ops.read_i2c_eeprom(hw, 3458 IXGBE_SFF_SFF_8472_COMP, 3459 &sff8472_rev); 3460 if (status) 3461 return -EIO; 3462 3463 /* addressing mode is not supported */ 3464 status = hw->phy.ops.read_i2c_eeprom(hw, 3465 IXGBE_SFF_SFF_8472_SWAP, 3466 &addr_mode); 3467 if (status) 3468 return -EIO; 3469 3470 if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) { 3471 e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n"); 3472 page_swap = true; 3473 } 3474 3475 if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap || 3476 !(addr_mode & IXGBE_SFF_DDM_IMPLEMENTED)) { 3477 /* We have a SFP, but it does not support SFF-8472 */ 3478 modinfo->type = ETH_MODULE_SFF_8079; 3479 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 3480 } else { 3481 /* We have a SFP which supports a revision of SFF-8472. */ 3482 modinfo->type = ETH_MODULE_SFF_8472; 3483 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 3484 } 3485 3486 return 0; 3487 } 3488 3489 static int ixgbe_get_module_eeprom(struct net_device *dev, 3490 struct ethtool_eeprom *ee, 3491 u8 *data) 3492 { 3493 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3494 struct ixgbe_hw *hw = &adapter->hw; 3495 int status = -EFAULT; 3496 u8 databyte = 0xFF; 3497 int i = 0; 3498 3499 if (ee->len == 0) 3500 return -EINVAL; 3501 3502 if (hw->phy.type == ixgbe_phy_fw) 3503 return -ENXIO; 3504 3505 for (i = ee->offset; i < ee->offset + ee->len; i++) { 3506 /* I2C reads can take long time */ 3507 if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 3508 return -EBUSY; 3509 3510 if (i < ETH_MODULE_SFF_8079_LEN) 3511 status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte); 3512 else 3513 status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte); 3514 3515 if (status) 3516 return -EIO; 3517 3518 data[i - ee->offset] = databyte; 3519 } 3520 3521 return 0; 3522 } 3523 3524 static const struct { 3525 ixgbe_link_speed mac_speed; 3526 u32 link_mode; 3527 } ixgbe_ls_map[] = { 3528 { IXGBE_LINK_SPEED_10_FULL, ETHTOOL_LINK_MODE_10baseT_Full_BIT }, 3529 { IXGBE_LINK_SPEED_100_FULL, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, 3530 { IXGBE_LINK_SPEED_1GB_FULL, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, 3531 { IXGBE_LINK_SPEED_2_5GB_FULL, ETHTOOL_LINK_MODE_2500baseX_Full_BIT }, 3532 { IXGBE_LINK_SPEED_10GB_FULL, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, 3533 }; 3534 3535 static const struct { 3536 u32 lp_advertised; 3537 u32 link_mode; 3538 } ixgbe_lp_map[] = { 3539 { FW_PHY_ACT_UD_2_100M_TX_EEE, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, 3540 { FW_PHY_ACT_UD_2_1G_T_EEE, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, 3541 { FW_PHY_ACT_UD_2_10G_T_EEE, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, 3542 { FW_PHY_ACT_UD_2_1G_KX_EEE, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT }, 3543 { FW_PHY_ACT_UD_2_10G_KX4_EEE, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT }, 3544 { FW_PHY_ACT_UD_2_10G_KR_EEE, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 3545 }; 3546 3547 static int 3548 ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_keee *edata) 3549 { 3550 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 3551 u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 }; 3552 struct ixgbe_hw *hw = &adapter->hw; 3553 int rc; 3554 u16 i; 3555 3556 rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info); 3557 if (rc) 3558 return rc; 3559 3560 for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) { 3561 if (info[0] & ixgbe_lp_map[i].lp_advertised) 3562 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3563 edata->lp_advertised); 3564 } 3565 3566 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { 3567 if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed) 3568 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3569 edata->supported); 3570 } 3571 3572 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { 3573 if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed) 3574 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3575 edata->advertised); 3576 } 3577 3578 edata->eee_enabled = !linkmode_empty(edata->advertised); 3579 edata->tx_lpi_enabled = edata->eee_enabled; 3580 3581 linkmode_and(common, edata->advertised, edata->lp_advertised); 3582 edata->eee_active = !linkmode_empty(common); 3583 3584 return 0; 3585 } 3586 3587 static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_keee *edata) 3588 { 3589 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3590 struct ixgbe_hw *hw = &adapter->hw; 3591 3592 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) 3593 return -EOPNOTSUPP; 3594 3595 if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw) 3596 return ixgbe_get_eee_fw(adapter, edata); 3597 3598 return -EOPNOTSUPP; 3599 } 3600 3601 static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_keee *edata) 3602 { 3603 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3604 struct ixgbe_hw *hw = &adapter->hw; 3605 struct ethtool_keee eee_data; 3606 int ret_val; 3607 3608 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) 3609 return -EOPNOTSUPP; 3610 3611 memset(&eee_data, 0, sizeof(struct ethtool_keee)); 3612 3613 ret_val = ixgbe_get_eee(netdev, &eee_data); 3614 if (ret_val) 3615 return ret_val; 3616 3617 if (eee_data.eee_enabled && !edata->eee_enabled) { 3618 if (eee_data.tx_lpi_enabled != edata->tx_lpi_enabled) { 3619 e_err(drv, "Setting EEE tx-lpi is not supported\n"); 3620 return -EINVAL; 3621 } 3622 3623 if (eee_data.tx_lpi_timer != edata->tx_lpi_timer) { 3624 e_err(drv, 3625 "Setting EEE Tx LPI timer is not supported\n"); 3626 return -EINVAL; 3627 } 3628 3629 if (!linkmode_equal(eee_data.advertised, edata->advertised)) { 3630 e_err(drv, 3631 "Setting EEE advertised speeds is not supported\n"); 3632 return -EINVAL; 3633 } 3634 } 3635 3636 if (eee_data.eee_enabled != edata->eee_enabled) { 3637 if (edata->eee_enabled) { 3638 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED; 3639 hw->phy.eee_speeds_advertised = 3640 hw->phy.eee_speeds_supported; 3641 } else { 3642 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED; 3643 hw->phy.eee_speeds_advertised = 0; 3644 } 3645 3646 /* reset link */ 3647 if (netif_running(netdev)) 3648 ixgbe_reinit_locked(adapter); 3649 else 3650 ixgbe_reset(adapter); 3651 } 3652 3653 return 0; 3654 } 3655 3656 static u32 ixgbe_get_priv_flags(struct net_device *netdev) 3657 { 3658 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3659 u32 priv_flags = 0; 3660 3661 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) 3662 priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX; 3663 3664 if (adapter->flags2 & IXGBE_FLAG2_VF_IPSEC_ENABLED) 3665 priv_flags |= IXGBE_PRIV_FLAGS_VF_IPSEC_EN; 3666 3667 if (adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF) 3668 priv_flags |= IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF; 3669 3670 return priv_flags; 3671 } 3672 3673 static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags) 3674 { 3675 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3676 unsigned int flags2 = adapter->flags2; 3677 unsigned int i; 3678 3679 flags2 &= ~IXGBE_FLAG2_RX_LEGACY; 3680 if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX) 3681 flags2 |= IXGBE_FLAG2_RX_LEGACY; 3682 3683 flags2 &= ~IXGBE_FLAG2_VF_IPSEC_ENABLED; 3684 if (priv_flags & IXGBE_PRIV_FLAGS_VF_IPSEC_EN) 3685 flags2 |= IXGBE_FLAG2_VF_IPSEC_ENABLED; 3686 3687 flags2 &= ~IXGBE_FLAG2_AUTO_DISABLE_VF; 3688 if (priv_flags & IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF) { 3689 if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 3690 /* Reset primary abort counter */ 3691 for (i = 0; i < adapter->num_vfs; i++) 3692 adapter->vfinfo[i].primary_abort_count = 0; 3693 3694 flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF; 3695 } else { 3696 e_info(probe, 3697 "Cannot set private flags: Operation not supported\n"); 3698 return -EOPNOTSUPP; 3699 } 3700 } 3701 3702 if (flags2 != adapter->flags2) { 3703 adapter->flags2 = flags2; 3704 3705 /* reset interface to repopulate queues */ 3706 if (netif_running(netdev)) 3707 ixgbe_reinit_locked(adapter); 3708 } 3709 3710 return 0; 3711 } 3712 3713 static const struct ethtool_ops ixgbe_ethtool_ops = { 3714 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 3715 .get_drvinfo = ixgbe_get_drvinfo, 3716 .get_regs_len = ixgbe_get_regs_len, 3717 .get_regs = ixgbe_get_regs, 3718 .get_wol = ixgbe_get_wol, 3719 .set_wol = ixgbe_set_wol, 3720 .nway_reset = ixgbe_nway_reset, 3721 .get_link = ethtool_op_get_link, 3722 .get_eeprom_len = ixgbe_get_eeprom_len, 3723 .get_eeprom = ixgbe_get_eeprom, 3724 .set_eeprom = ixgbe_set_eeprom, 3725 .get_ringparam = ixgbe_get_ringparam, 3726 .set_ringparam = ixgbe_set_ringparam, 3727 .get_pause_stats = ixgbe_get_pause_stats, 3728 .get_pauseparam = ixgbe_get_pauseparam, 3729 .set_pauseparam = ixgbe_set_pauseparam, 3730 .get_msglevel = ixgbe_get_msglevel, 3731 .set_msglevel = ixgbe_set_msglevel, 3732 .self_test = ixgbe_diag_test, 3733 .get_strings = ixgbe_get_strings, 3734 .set_phys_id = ixgbe_set_phys_id, 3735 .get_sset_count = ixgbe_get_sset_count, 3736 .get_ethtool_stats = ixgbe_get_ethtool_stats, 3737 .get_coalesce = ixgbe_get_coalesce, 3738 .set_coalesce = ixgbe_set_coalesce, 3739 .get_rxnfc = ixgbe_get_rxnfc, 3740 .set_rxnfc = ixgbe_set_rxnfc, 3741 .get_rxfh_indir_size = ixgbe_rss_indir_size, 3742 .get_rxfh_key_size = ixgbe_get_rxfh_key_size, 3743 .get_rxfh = ixgbe_get_rxfh, 3744 .set_rxfh = ixgbe_set_rxfh, 3745 .get_eee = ixgbe_get_eee, 3746 .set_eee = ixgbe_set_eee, 3747 .get_channels = ixgbe_get_channels, 3748 .set_channels = ixgbe_set_channels, 3749 .get_priv_flags = ixgbe_get_priv_flags, 3750 .set_priv_flags = ixgbe_set_priv_flags, 3751 .get_ts_info = ixgbe_get_ts_info, 3752 .get_module_info = ixgbe_get_module_info, 3753 .get_module_eeprom = ixgbe_get_module_eeprom, 3754 .get_link_ksettings = ixgbe_get_link_ksettings, 3755 .set_link_ksettings = ixgbe_set_link_ksettings, 3756 }; 3757 3758 static const struct ethtool_ops ixgbe_ethtool_ops_e610 = { 3759 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 3760 .get_drvinfo = ixgbe_get_drvinfo, 3761 .get_regs_len = ixgbe_get_regs_len, 3762 .get_regs = ixgbe_get_regs, 3763 .get_wol = ixgbe_get_wol, 3764 .set_wol = ixgbe_set_wol_e610, 3765 .nway_reset = ixgbe_nway_reset, 3766 .get_link = ethtool_op_get_link, 3767 .get_eeprom_len = ixgbe_get_eeprom_len, 3768 .get_eeprom = ixgbe_get_eeprom, 3769 .set_eeprom = ixgbe_set_eeprom, 3770 .get_ringparam = ixgbe_get_ringparam, 3771 .set_ringparam = ixgbe_set_ringparam, 3772 .get_pause_stats = ixgbe_get_pause_stats, 3773 .get_pauseparam = ixgbe_get_pauseparam, 3774 .set_pauseparam = ixgbe_set_pauseparam_e610, 3775 .get_msglevel = ixgbe_get_msglevel, 3776 .set_msglevel = ixgbe_set_msglevel, 3777 .self_test = ixgbe_diag_test, 3778 .get_strings = ixgbe_get_strings, 3779 .set_phys_id = ixgbe_set_phys_id_e610, 3780 .get_sset_count = ixgbe_get_sset_count, 3781 .get_ethtool_stats = ixgbe_get_ethtool_stats, 3782 .get_coalesce = ixgbe_get_coalesce, 3783 .set_coalesce = ixgbe_set_coalesce, 3784 .get_rxnfc = ixgbe_get_rxnfc, 3785 .set_rxnfc = ixgbe_set_rxnfc, 3786 .get_rxfh_indir_size = ixgbe_rss_indir_size, 3787 .get_rxfh_key_size = ixgbe_get_rxfh_key_size, 3788 .get_rxfh = ixgbe_get_rxfh, 3789 .set_rxfh = ixgbe_set_rxfh, 3790 .get_eee = ixgbe_get_eee, 3791 .set_eee = ixgbe_set_eee, 3792 .get_channels = ixgbe_get_channels, 3793 .set_channels = ixgbe_set_channels, 3794 .get_priv_flags = ixgbe_get_priv_flags, 3795 .set_priv_flags = ixgbe_set_priv_flags, 3796 .get_ts_info = ixgbe_get_ts_info, 3797 .get_module_info = ixgbe_get_module_info, 3798 .get_module_eeprom = ixgbe_get_module_eeprom, 3799 .get_link_ksettings = ixgbe_get_link_ksettings, 3800 .set_link_ksettings = ixgbe_set_link_ksettings, 3801 }; 3802 3803 void ixgbe_set_ethtool_ops(struct net_device *netdev) 3804 { 3805 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3806 3807 if (adapter->hw.mac.type == ixgbe_mac_e610) 3808 netdev->ethtool_ops = &ixgbe_ethtool_ops_e610; 3809 else 3810 netdev->ethtool_ops = &ixgbe_ethtool_ops; 3811 } 3812