1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2024 Intel Corporation. */ 3 4 /* ethtool support for ixgbe */ 5 6 #include <linux/interrupt.h> 7 #include <linux/types.h> 8 #include <linux/module.h> 9 #include <linux/slab.h> 10 #include <linux/pci.h> 11 #include <linux/netdevice.h> 12 #include <linux/ethtool.h> 13 #include <linux/vmalloc.h> 14 #include <linux/highmem.h> 15 #include <linux/uaccess.h> 16 17 #include "ixgbe.h" 18 #include "ixgbe_phy.h" 19 20 21 enum {NETDEV_STATS, IXGBE_STATS}; 22 23 struct ixgbe_stats { 24 char stat_string[ETH_GSTRING_LEN]; 25 int type; 26 int sizeof_stat; 27 int stat_offset; 28 }; 29 30 #define IXGBE_STAT(m) IXGBE_STATS, \ 31 sizeof(((struct ixgbe_adapter *)0)->m), \ 32 offsetof(struct ixgbe_adapter, m) 33 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \ 34 sizeof(((struct rtnl_link_stats64 *)0)->m), \ 35 offsetof(struct rtnl_link_stats64, m) 36 37 static const struct ixgbe_stats ixgbe_gstrings_stats[] = { 38 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)}, 39 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)}, 40 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)}, 41 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)}, 42 {"rx_pkts_nic", IXGBE_STAT(stats.gprc)}, 43 {"tx_pkts_nic", IXGBE_STAT(stats.gptc)}, 44 {"rx_bytes_nic", IXGBE_STAT(stats.gorc)}, 45 {"tx_bytes_nic", IXGBE_STAT(stats.gotc)}, 46 {"lsc_int", IXGBE_STAT(lsc_int)}, 47 {"tx_busy", IXGBE_STAT(tx_busy)}, 48 {"non_eop_descs", IXGBE_STAT(non_eop_descs)}, 49 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)}, 50 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)}, 51 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)}, 52 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)}, 53 {"multicast", IXGBE_NETDEV_STAT(multicast)}, 54 {"broadcast", IXGBE_STAT(stats.bprc)}, 55 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) }, 56 {"collisions", IXGBE_NETDEV_STAT(collisions)}, 57 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)}, 58 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)}, 59 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)}, 60 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)}, 61 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)}, 62 {"fdir_match", IXGBE_STAT(stats.fdirmatch)}, 63 {"fdir_miss", IXGBE_STAT(stats.fdirmiss)}, 64 {"fdir_overflow", IXGBE_STAT(fdir_overflow)}, 65 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)}, 66 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)}, 67 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)}, 68 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)}, 69 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)}, 70 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)}, 71 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)}, 72 {"tx_restart_queue", IXGBE_STAT(restart_queue)}, 73 {"rx_length_errors", IXGBE_STAT(stats.rlec)}, 74 {"rx_long_length_errors", IXGBE_STAT(stats.roc)}, 75 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)}, 76 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)}, 77 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)}, 78 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)}, 79 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)}, 80 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)}, 81 {"alloc_rx_page", IXGBE_STAT(alloc_rx_page)}, 82 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)}, 83 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)}, 84 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)}, 85 {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)}, 86 {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)}, 87 {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)}, 88 {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)}, 89 {"tx_hwtstamp_timeouts", IXGBE_STAT(tx_hwtstamp_timeouts)}, 90 {"tx_hwtstamp_skipped", IXGBE_STAT(tx_hwtstamp_skipped)}, 91 {"rx_hwtstamp_cleared", IXGBE_STAT(rx_hwtstamp_cleared)}, 92 {"tx_ipsec", IXGBE_STAT(tx_ipsec)}, 93 {"rx_ipsec", IXGBE_STAT(rx_ipsec)}, 94 #ifdef IXGBE_FCOE 95 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)}, 96 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)}, 97 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)}, 98 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)}, 99 {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)}, 100 {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)}, 101 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)}, 102 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)}, 103 #endif /* IXGBE_FCOE */ 104 }; 105 106 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so 107 * we set the num_rx_queues to evaluate to num_tx_queues. This is 108 * used because we do not have a good way to get the max number of 109 * rx queues with CONFIG_RPS disabled. 110 */ 111 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues 112 113 #define IXGBE_QUEUE_STATS_LEN ( \ 114 (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \ 115 (sizeof(struct ixgbe_queue_stats) / sizeof(u64))) 116 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats) 117 #define IXGBE_PB_STATS_LEN ( \ 118 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \ 119 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \ 120 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \ 121 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \ 122 / sizeof(u64)) 123 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \ 124 IXGBE_PB_STATS_LEN + \ 125 IXGBE_QUEUE_STATS_LEN) 126 127 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = { 128 "Register test (offline)", "Eeprom test (offline)", 129 "Interrupt test (offline)", "Loopback test (offline)", 130 "Link test (on/offline)" 131 }; 132 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN 133 134 static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = { 135 #define IXGBE_PRIV_FLAGS_LEGACY_RX BIT(0) 136 "legacy-rx", 137 #define IXGBE_PRIV_FLAGS_VF_IPSEC_EN BIT(1) 138 "vf-ipsec", 139 #define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF BIT(2) 140 "mdd-disable-vf", 141 }; 142 143 #define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings) 144 145 #define ixgbe_isbackplane(type) ((type) == ixgbe_media_type_backplane) 146 147 static void ixgbe_set_supported_10gtypes(struct ixgbe_hw *hw, 148 struct ethtool_link_ksettings *cmd) 149 { 150 if (!ixgbe_isbackplane(hw->phy.media_type)) { 151 ethtool_link_ksettings_add_link_mode(cmd, supported, 152 10000baseT_Full); 153 return; 154 } 155 156 switch (hw->device_id) { 157 case IXGBE_DEV_ID_82598: 158 case IXGBE_DEV_ID_82599_KX4: 159 case IXGBE_DEV_ID_82599_KX4_MEZZ: 160 case IXGBE_DEV_ID_X550EM_X_KX4: 161 ethtool_link_ksettings_add_link_mode 162 (cmd, supported, 10000baseKX4_Full); 163 break; 164 case IXGBE_DEV_ID_82598_BX: 165 case IXGBE_DEV_ID_82599_KR: 166 case IXGBE_DEV_ID_X550EM_X_KR: 167 case IXGBE_DEV_ID_X550EM_X_XFI: 168 ethtool_link_ksettings_add_link_mode 169 (cmd, supported, 10000baseKR_Full); 170 break; 171 default: 172 ethtool_link_ksettings_add_link_mode 173 (cmd, supported, 10000baseKX4_Full); 174 ethtool_link_ksettings_add_link_mode 175 (cmd, supported, 10000baseKR_Full); 176 break; 177 } 178 } 179 180 static void ixgbe_set_advertising_10gtypes(struct ixgbe_hw *hw, 181 struct ethtool_link_ksettings *cmd) 182 { 183 if (!ixgbe_isbackplane(hw->phy.media_type)) { 184 ethtool_link_ksettings_add_link_mode(cmd, advertising, 185 10000baseT_Full); 186 return; 187 } 188 189 switch (hw->device_id) { 190 case IXGBE_DEV_ID_82598: 191 case IXGBE_DEV_ID_82599_KX4: 192 case IXGBE_DEV_ID_82599_KX4_MEZZ: 193 case IXGBE_DEV_ID_X550EM_X_KX4: 194 ethtool_link_ksettings_add_link_mode 195 (cmd, advertising, 10000baseKX4_Full); 196 break; 197 case IXGBE_DEV_ID_82598_BX: 198 case IXGBE_DEV_ID_82599_KR: 199 case IXGBE_DEV_ID_X550EM_X_KR: 200 case IXGBE_DEV_ID_X550EM_X_XFI: 201 ethtool_link_ksettings_add_link_mode 202 (cmd, advertising, 10000baseKR_Full); 203 break; 204 default: 205 ethtool_link_ksettings_add_link_mode 206 (cmd, advertising, 10000baseKX4_Full); 207 ethtool_link_ksettings_add_link_mode 208 (cmd, advertising, 10000baseKR_Full); 209 break; 210 } 211 } 212 213 static int ixgbe_get_link_ksettings(struct net_device *netdev, 214 struct ethtool_link_ksettings *cmd) 215 { 216 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 217 struct ixgbe_hw *hw = &adapter->hw; 218 ixgbe_link_speed supported_link; 219 bool autoneg = false; 220 221 ethtool_link_ksettings_zero_link_mode(cmd, supported); 222 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 223 224 hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg); 225 226 /* set the supported link speeds */ 227 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) { 228 ixgbe_set_supported_10gtypes(hw, cmd); 229 ixgbe_set_advertising_10gtypes(hw, cmd); 230 } 231 if (supported_link & IXGBE_LINK_SPEED_5GB_FULL) 232 ethtool_link_ksettings_add_link_mode(cmd, supported, 233 5000baseT_Full); 234 235 if (supported_link & IXGBE_LINK_SPEED_2_5GB_FULL) 236 ethtool_link_ksettings_add_link_mode(cmd, supported, 237 2500baseT_Full); 238 239 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL) { 240 if (ixgbe_isbackplane(hw->phy.media_type)) { 241 ethtool_link_ksettings_add_link_mode(cmd, supported, 242 1000baseKX_Full); 243 ethtool_link_ksettings_add_link_mode(cmd, advertising, 244 1000baseKX_Full); 245 } else { 246 ethtool_link_ksettings_add_link_mode(cmd, supported, 247 1000baseT_Full); 248 ethtool_link_ksettings_add_link_mode(cmd, advertising, 249 1000baseT_Full); 250 } 251 } 252 if (supported_link & IXGBE_LINK_SPEED_100_FULL) { 253 ethtool_link_ksettings_add_link_mode(cmd, supported, 254 100baseT_Full); 255 ethtool_link_ksettings_add_link_mode(cmd, advertising, 256 100baseT_Full); 257 } 258 if (supported_link & IXGBE_LINK_SPEED_10_FULL) { 259 ethtool_link_ksettings_add_link_mode(cmd, supported, 260 10baseT_Full); 261 ethtool_link_ksettings_add_link_mode(cmd, advertising, 262 10baseT_Full); 263 } 264 265 /* set the advertised speeds */ 266 if (hw->phy.autoneg_advertised) { 267 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 268 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL) 269 ethtool_link_ksettings_add_link_mode(cmd, advertising, 270 10baseT_Full); 271 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) 272 ethtool_link_ksettings_add_link_mode(cmd, advertising, 273 100baseT_Full); 274 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) 275 ixgbe_set_advertising_10gtypes(hw, cmd); 276 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) { 277 if (ethtool_link_ksettings_test_link_mode 278 (cmd, supported, 1000baseKX_Full)) 279 ethtool_link_ksettings_add_link_mode 280 (cmd, advertising, 1000baseKX_Full); 281 else 282 ethtool_link_ksettings_add_link_mode 283 (cmd, advertising, 1000baseT_Full); 284 } 285 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) 286 ethtool_link_ksettings_add_link_mode(cmd, advertising, 287 5000baseT_Full); 288 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) 289 ethtool_link_ksettings_add_link_mode(cmd, advertising, 290 2500baseT_Full); 291 } else { 292 if (hw->phy.multispeed_fiber && !autoneg) { 293 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) 294 ethtool_link_ksettings_add_link_mode 295 (cmd, advertising, 10000baseT_Full); 296 } 297 } 298 299 if (autoneg) { 300 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 301 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 302 cmd->base.autoneg = AUTONEG_ENABLE; 303 } else 304 cmd->base.autoneg = AUTONEG_DISABLE; 305 306 /* Determine the remaining settings based on the PHY type. */ 307 switch (adapter->hw.phy.type) { 308 case ixgbe_phy_tn: 309 case ixgbe_phy_aq: 310 case ixgbe_phy_x550em_ext_t: 311 case ixgbe_phy_fw: 312 case ixgbe_phy_cu_unknown: 313 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 314 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 315 cmd->base.port = PORT_TP; 316 break; 317 case ixgbe_phy_qt: 318 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 319 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 320 cmd->base.port = PORT_FIBRE; 321 break; 322 case ixgbe_phy_nl: 323 case ixgbe_phy_sfp_passive_tyco: 324 case ixgbe_phy_sfp_passive_unknown: 325 case ixgbe_phy_sfp_ftl: 326 case ixgbe_phy_sfp_avago: 327 case ixgbe_phy_sfp_intel: 328 case ixgbe_phy_sfp_unknown: 329 case ixgbe_phy_qsfp_passive_unknown: 330 case ixgbe_phy_qsfp_active_unknown: 331 case ixgbe_phy_qsfp_intel: 332 case ixgbe_phy_qsfp_unknown: 333 /* SFP+ devices, further checking needed */ 334 switch (adapter->hw.phy.sfp_type) { 335 case ixgbe_sfp_type_da_cu: 336 case ixgbe_sfp_type_da_cu_core0: 337 case ixgbe_sfp_type_da_cu_core1: 338 ethtool_link_ksettings_add_link_mode(cmd, supported, 339 FIBRE); 340 ethtool_link_ksettings_add_link_mode(cmd, advertising, 341 FIBRE); 342 cmd->base.port = PORT_DA; 343 break; 344 case ixgbe_sfp_type_sr: 345 case ixgbe_sfp_type_lr: 346 case ixgbe_sfp_type_srlr_core0: 347 case ixgbe_sfp_type_srlr_core1: 348 case ixgbe_sfp_type_1g_sx_core0: 349 case ixgbe_sfp_type_1g_sx_core1: 350 case ixgbe_sfp_type_1g_lx_core0: 351 case ixgbe_sfp_type_1g_lx_core1: 352 case ixgbe_sfp_type_1g_bx_core0: 353 case ixgbe_sfp_type_1g_bx_core1: 354 case ixgbe_sfp_type_10g_bx_core0: 355 case ixgbe_sfp_type_10g_bx_core1: 356 ethtool_link_ksettings_add_link_mode(cmd, supported, 357 FIBRE); 358 ethtool_link_ksettings_add_link_mode(cmd, advertising, 359 FIBRE); 360 cmd->base.port = PORT_FIBRE; 361 break; 362 case ixgbe_sfp_type_not_present: 363 ethtool_link_ksettings_add_link_mode(cmd, supported, 364 FIBRE); 365 ethtool_link_ksettings_add_link_mode(cmd, advertising, 366 FIBRE); 367 cmd->base.port = PORT_NONE; 368 break; 369 case ixgbe_sfp_type_1g_cu_core0: 370 case ixgbe_sfp_type_1g_cu_core1: 371 ethtool_link_ksettings_add_link_mode(cmd, supported, 372 TP); 373 ethtool_link_ksettings_add_link_mode(cmd, advertising, 374 TP); 375 cmd->base.port = PORT_TP; 376 break; 377 case ixgbe_sfp_type_unknown: 378 default: 379 ethtool_link_ksettings_add_link_mode(cmd, supported, 380 FIBRE); 381 ethtool_link_ksettings_add_link_mode(cmd, advertising, 382 FIBRE); 383 cmd->base.port = PORT_OTHER; 384 break; 385 } 386 break; 387 case ixgbe_phy_xaui: 388 ethtool_link_ksettings_add_link_mode(cmd, supported, 389 FIBRE); 390 ethtool_link_ksettings_add_link_mode(cmd, advertising, 391 FIBRE); 392 cmd->base.port = PORT_NONE; 393 break; 394 case ixgbe_phy_unknown: 395 case ixgbe_phy_generic: 396 case ixgbe_phy_sfp_unsupported: 397 default: 398 ethtool_link_ksettings_add_link_mode(cmd, supported, 399 FIBRE); 400 ethtool_link_ksettings_add_link_mode(cmd, advertising, 401 FIBRE); 402 cmd->base.port = PORT_OTHER; 403 break; 404 } 405 406 /* Indicate pause support */ 407 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); 408 409 switch (hw->fc.requested_mode) { 410 case ixgbe_fc_full: 411 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); 412 break; 413 case ixgbe_fc_rx_pause: 414 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); 415 ethtool_link_ksettings_add_link_mode(cmd, advertising, 416 Asym_Pause); 417 break; 418 case ixgbe_fc_tx_pause: 419 ethtool_link_ksettings_add_link_mode(cmd, advertising, 420 Asym_Pause); 421 break; 422 default: 423 ethtool_link_ksettings_del_link_mode(cmd, advertising, Pause); 424 ethtool_link_ksettings_del_link_mode(cmd, advertising, 425 Asym_Pause); 426 } 427 428 if (netif_carrier_ok(netdev)) { 429 switch (adapter->link_speed) { 430 case IXGBE_LINK_SPEED_10GB_FULL: 431 cmd->base.speed = SPEED_10000; 432 break; 433 case IXGBE_LINK_SPEED_5GB_FULL: 434 cmd->base.speed = SPEED_5000; 435 break; 436 case IXGBE_LINK_SPEED_2_5GB_FULL: 437 cmd->base.speed = SPEED_2500; 438 break; 439 case IXGBE_LINK_SPEED_1GB_FULL: 440 cmd->base.speed = SPEED_1000; 441 break; 442 case IXGBE_LINK_SPEED_100_FULL: 443 cmd->base.speed = SPEED_100; 444 break; 445 case IXGBE_LINK_SPEED_10_FULL: 446 cmd->base.speed = SPEED_10; 447 break; 448 default: 449 break; 450 } 451 cmd->base.duplex = DUPLEX_FULL; 452 } else { 453 cmd->base.speed = SPEED_UNKNOWN; 454 cmd->base.duplex = DUPLEX_UNKNOWN; 455 } 456 457 return 0; 458 } 459 460 static int ixgbe_set_link_ksettings(struct net_device *netdev, 461 const struct ethtool_link_ksettings *cmd) 462 { 463 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 464 struct ixgbe_hw *hw = &adapter->hw; 465 u32 advertised, old; 466 int err = 0; 467 468 if ((hw->phy.media_type == ixgbe_media_type_copper) || 469 (hw->phy.multispeed_fiber)) { 470 /* 471 * this function does not support duplex forcing, but can 472 * limit the advertising of the adapter to the specified speed 473 */ 474 if (!linkmode_subset(cmd->link_modes.advertising, 475 cmd->link_modes.supported)) 476 return -EINVAL; 477 478 /* only allow one speed at a time if no autoneg */ 479 if (!cmd->base.autoneg && hw->phy.multispeed_fiber) { 480 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 481 10000baseT_Full) && 482 ethtool_link_ksettings_test_link_mode(cmd, advertising, 483 1000baseT_Full)) 484 return -EINVAL; 485 } 486 487 old = hw->phy.autoneg_advertised; 488 advertised = 0; 489 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 490 10000baseT_Full)) 491 advertised |= IXGBE_LINK_SPEED_10GB_FULL; 492 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 493 5000baseT_Full)) 494 advertised |= IXGBE_LINK_SPEED_5GB_FULL; 495 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 496 2500baseT_Full)) 497 advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; 498 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 499 1000baseT_Full)) 500 advertised |= IXGBE_LINK_SPEED_1GB_FULL; 501 502 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 503 100baseT_Full)) 504 advertised |= IXGBE_LINK_SPEED_100_FULL; 505 506 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 507 10baseT_Full)) 508 advertised |= IXGBE_LINK_SPEED_10_FULL; 509 510 if (old == advertised) 511 return err; 512 /* this sets the link speed and restarts auto-neg */ 513 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 514 usleep_range(1000, 2000); 515 516 hw->mac.autotry_restart = true; 517 err = hw->mac.ops.setup_link(hw, advertised, true); 518 if (err) { 519 e_info(probe, "setup link failed with code %d\n", err); 520 hw->mac.ops.setup_link(hw, old, true); 521 } 522 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 523 } else { 524 /* in this case we currently only support 10Gb/FULL */ 525 u32 speed = cmd->base.speed; 526 527 if ((cmd->base.autoneg == AUTONEG_ENABLE) || 528 (!ethtool_link_ksettings_test_link_mode(cmd, advertising, 529 10000baseT_Full)) || 530 (speed + cmd->base.duplex != SPEED_10000 + DUPLEX_FULL)) 531 return -EINVAL; 532 } 533 534 return err; 535 } 536 537 static void ixgbe_get_pause_stats(struct net_device *netdev, 538 struct ethtool_pause_stats *stats) 539 { 540 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 541 struct ixgbe_hw_stats *hwstats = &adapter->stats; 542 543 stats->tx_pause_frames = hwstats->lxontxc + hwstats->lxofftxc; 544 stats->rx_pause_frames = hwstats->lxonrxc + hwstats->lxoffrxc; 545 } 546 547 static void ixgbe_get_pauseparam(struct net_device *netdev, 548 struct ethtool_pauseparam *pause) 549 { 550 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 551 struct ixgbe_hw *hw = &adapter->hw; 552 553 if (ixgbe_device_supports_autoneg_fc(hw) && 554 !hw->fc.disable_fc_autoneg) 555 pause->autoneg = 1; 556 else 557 pause->autoneg = 0; 558 559 if (hw->fc.current_mode == ixgbe_fc_rx_pause) { 560 pause->rx_pause = 1; 561 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) { 562 pause->tx_pause = 1; 563 } else if (hw->fc.current_mode == ixgbe_fc_full) { 564 pause->rx_pause = 1; 565 pause->tx_pause = 1; 566 } 567 } 568 569 static void ixgbe_set_pauseparam_finalize(struct net_device *netdev, 570 struct ixgbe_fc_info *fc) 571 { 572 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 573 struct ixgbe_hw *hw = &adapter->hw; 574 575 /* If the thing changed then we'll update and use new autoneg. */ 576 if (memcmp(fc, &hw->fc, sizeof(*fc))) { 577 hw->fc = *fc; 578 if (netif_running(netdev)) 579 ixgbe_reinit_locked(adapter); 580 else 581 ixgbe_reset(adapter); 582 } 583 } 584 585 static int ixgbe_set_pauseparam(struct net_device *netdev, 586 struct ethtool_pauseparam *pause) 587 { 588 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 589 struct ixgbe_hw *hw = &adapter->hw; 590 struct ixgbe_fc_info fc = hw->fc; 591 592 /* 82598 does no support link flow control with DCB enabled */ 593 if ((hw->mac.type == ixgbe_mac_82598EB) && 594 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)) 595 return -EINVAL; 596 597 /* some devices do not support autoneg of link flow control */ 598 if ((pause->autoneg == AUTONEG_ENABLE) && 599 !ixgbe_device_supports_autoneg_fc(hw)) 600 return -EINVAL; 601 602 fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE); 603 604 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg) 605 fc.requested_mode = ixgbe_fc_full; 606 else if (pause->rx_pause && !pause->tx_pause) 607 fc.requested_mode = ixgbe_fc_rx_pause; 608 else if (!pause->rx_pause && pause->tx_pause) 609 fc.requested_mode = ixgbe_fc_tx_pause; 610 else 611 fc.requested_mode = ixgbe_fc_none; 612 613 ixgbe_set_pauseparam_finalize(netdev, &fc); 614 615 return 0; 616 } 617 618 static int ixgbe_set_pauseparam_e610(struct net_device *netdev, 619 struct ethtool_pauseparam *pause) 620 { 621 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 622 struct ixgbe_hw *hw = &adapter->hw; 623 struct ixgbe_fc_info fc = hw->fc; 624 625 if (!ixgbe_device_supports_autoneg_fc(hw)) 626 return -EOPNOTSUPP; 627 628 if (pause->autoneg == AUTONEG_DISABLE) { 629 netdev_info(netdev, 630 "Cannot disable autonegotiation on this device.\n"); 631 return -EOPNOTSUPP; 632 } 633 634 fc.disable_fc_autoneg = false; 635 636 if (pause->rx_pause && pause->tx_pause) 637 fc.requested_mode = ixgbe_fc_full; 638 else if (pause->rx_pause) 639 fc.requested_mode = ixgbe_fc_rx_pause; 640 else if (pause->tx_pause) 641 fc.requested_mode = ixgbe_fc_tx_pause; 642 else 643 fc.requested_mode = ixgbe_fc_none; 644 645 ixgbe_set_pauseparam_finalize(netdev, &fc); 646 647 return 0; 648 } 649 650 static u32 ixgbe_get_msglevel(struct net_device *netdev) 651 { 652 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 653 return adapter->msg_enable; 654 } 655 656 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data) 657 { 658 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 659 adapter->msg_enable = data; 660 } 661 662 static int ixgbe_get_regs_len(struct net_device *netdev) 663 { 664 #define IXGBE_REGS_LEN 1145 665 return IXGBE_REGS_LEN * sizeof(u32); 666 } 667 668 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_ 669 670 static void ixgbe_get_regs(struct net_device *netdev, 671 struct ethtool_regs *regs, void *p) 672 { 673 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 674 struct ixgbe_hw *hw = &adapter->hw; 675 u32 *regs_buff = p; 676 u8 i; 677 678 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32)); 679 680 regs->version = hw->mac.type << 24 | hw->revision_id << 16 | 681 hw->device_id; 682 683 /* General Registers */ 684 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL); 685 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS); 686 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 687 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP); 688 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP); 689 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 690 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER); 691 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER); 692 693 /* NVM Register */ 694 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); 695 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD); 696 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw)); 697 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL); 698 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA); 699 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL); 700 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA); 701 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT); 702 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP); 703 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw)); 704 705 /* Interrupt */ 706 /* don't read EICR because it can clear interrupt causes, instead 707 * read EICS which is a shadow but doesn't clear EICR */ 708 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS); 709 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS); 710 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS); 711 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC); 712 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC); 713 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM); 714 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0)); 715 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0)); 716 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT); 717 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA); 718 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0)); 719 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE); 720 721 /* Flow Control */ 722 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP); 723 for (i = 0; i < 4; i++) 724 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_FCTTV(i)); 725 for (i = 0; i < 8; i++) { 726 switch (hw->mac.type) { 727 case ixgbe_mac_82598EB: 728 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i)); 729 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i)); 730 break; 731 case ixgbe_mac_82599EB: 732 case ixgbe_mac_X540: 733 case ixgbe_mac_X550: 734 case ixgbe_mac_X550EM_x: 735 case ixgbe_mac_x550em_a: 736 case ixgbe_mac_e610: 737 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i)); 738 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i)); 739 break; 740 default: 741 break; 742 } 743 } 744 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV); 745 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS); 746 747 /* Receive DMA */ 748 for (i = 0; i < 64; i++) 749 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i)); 750 for (i = 0; i < 64; i++) 751 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i)); 752 for (i = 0; i < 64; i++) 753 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i)); 754 for (i = 0; i < 64; i++) 755 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i)); 756 for (i = 0; i < 64; i++) 757 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i)); 758 for (i = 0; i < 64; i++) 759 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); 760 for (i = 0; i < 16; i++) 761 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); 762 for (i = 0; i < 16; i++) 763 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); 764 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 765 for (i = 0; i < 8; i++) 766 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)); 767 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 768 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN); 769 770 /* Receive */ 771 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 772 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL); 773 for (i = 0; i < 16; i++) 774 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i)); 775 for (i = 0; i < 16; i++) 776 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i)); 777 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0)); 778 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL); 779 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 780 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL); 781 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC); 782 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); 783 for (i = 0; i < 8; i++) 784 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i)); 785 for (i = 0; i < 8; i++) 786 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i)); 787 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP); 788 789 /* Transmit */ 790 for (i = 0; i < 32; i++) 791 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i)); 792 for (i = 0; i < 32; i++) 793 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i)); 794 for (i = 0; i < 32; i++) 795 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i)); 796 for (i = 0; i < 32; i++) 797 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i)); 798 for (i = 0; i < 32; i++) 799 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i)); 800 for (i = 0; i < 32; i++) 801 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i)); 802 for (i = 0; i < 32; i++) 803 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i)); 804 for (i = 0; i < 32; i++) 805 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i)); 806 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL); 807 for (i = 0; i < 16; i++) 808 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); 809 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG); 810 for (i = 0; i < 8; i++) 811 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i)); 812 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP); 813 814 /* Wake Up */ 815 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC); 816 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC); 817 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS); 818 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV); 819 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT); 820 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT); 821 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL); 822 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM); 823 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0)); 824 825 /* DCB */ 826 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS); /* same as FCCFG */ 827 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */ 828 829 switch (hw->mac.type) { 830 case ixgbe_mac_82598EB: 831 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS); 832 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR); 833 for (i = 0; i < 8; i++) 834 regs_buff[833 + i] = 835 IXGBE_READ_REG(hw, IXGBE_RT2CR(i)); 836 for (i = 0; i < 8; i++) 837 regs_buff[841 + i] = 838 IXGBE_READ_REG(hw, IXGBE_RT2SR(i)); 839 for (i = 0; i < 8; i++) 840 regs_buff[849 + i] = 841 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i)); 842 for (i = 0; i < 8; i++) 843 regs_buff[857 + i] = 844 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i)); 845 break; 846 case ixgbe_mac_82599EB: 847 case ixgbe_mac_X540: 848 case ixgbe_mac_X550: 849 case ixgbe_mac_X550EM_x: 850 case ixgbe_mac_x550em_a: 851 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 852 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS); 853 for (i = 0; i < 8; i++) 854 regs_buff[833 + i] = 855 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i)); 856 for (i = 0; i < 8; i++) 857 regs_buff[841 + i] = 858 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i)); 859 for (i = 0; i < 8; i++) 860 regs_buff[849 + i] = 861 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i)); 862 for (i = 0; i < 8; i++) 863 regs_buff[857 + i] = 864 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i)); 865 break; 866 default: 867 break; 868 } 869 870 for (i = 0; i < 8; i++) 871 regs_buff[865 + i] = 872 IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */ 873 for (i = 0; i < 8; i++) 874 regs_buff[873 + i] = 875 IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */ 876 877 /* Statistics */ 878 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs); 879 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc); 880 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc); 881 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc); 882 for (i = 0; i < 8; i++) 883 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]); 884 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc); 885 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc); 886 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec); 887 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc); 888 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc); 889 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc); 890 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc); 891 for (i = 0; i < 8; i++) 892 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]); 893 for (i = 0; i < 8; i++) 894 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]); 895 for (i = 0; i < 8; i++) 896 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]); 897 for (i = 0; i < 8; i++) 898 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]); 899 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64); 900 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127); 901 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255); 902 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511); 903 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023); 904 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522); 905 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc); 906 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc); 907 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc); 908 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc); 909 regs_buff[942] = (u32)IXGBE_GET_STAT(adapter, gorc); 910 regs_buff[943] = (u32)(IXGBE_GET_STAT(adapter, gorc) >> 32); 911 regs_buff[944] = (u32)IXGBE_GET_STAT(adapter, gotc); 912 regs_buff[945] = (u32)(IXGBE_GET_STAT(adapter, gotc) >> 32); 913 for (i = 0; i < 8; i++) 914 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]); 915 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc); 916 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc); 917 regs_buff[956] = IXGBE_GET_STAT(adapter, roc); 918 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc); 919 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc); 920 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc); 921 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc); 922 regs_buff[961] = (u32)IXGBE_GET_STAT(adapter, tor); 923 regs_buff[962] = (u32)(IXGBE_GET_STAT(adapter, tor) >> 32); 924 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr); 925 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt); 926 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64); 927 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127); 928 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255); 929 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511); 930 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023); 931 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522); 932 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc); 933 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc); 934 regs_buff[973] = IXGBE_GET_STAT(adapter, xec); 935 for (i = 0; i < 16; i++) 936 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]); 937 for (i = 0; i < 16; i++) 938 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]); 939 for (i = 0; i < 16; i++) 940 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]); 941 for (i = 0; i < 16; i++) 942 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]); 943 944 /* MAC */ 945 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG); 946 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); 947 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA); 948 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0); 949 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1); 950 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); 951 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP); 952 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP); 953 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP); 954 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0); 955 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1); 956 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP); 957 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA); 958 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE); 959 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD); 960 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS); 961 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA); 962 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD); 963 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD); 964 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD); 965 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG); 966 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1); 967 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2); 968 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS); 969 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC); 970 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS); 971 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC); 972 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS); 973 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2); 974 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3); 975 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1); 976 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2); 977 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL); 978 979 /* Diagnostic */ 980 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL); 981 for (i = 0; i < 8; i++) 982 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i)); 983 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN); 984 for (i = 0; i < 4; i++) 985 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i)); 986 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE); 987 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL); 988 for (i = 0; i < 8; i++) 989 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i)); 990 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN); 991 for (i = 0; i < 4; i++) 992 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i)); 993 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE); 994 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL); 995 for (i = 0; i < 4; i++) 996 regs_buff[1102 + i] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA(i)); 997 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL); 998 for (i = 0; i < 4; i++) 999 regs_buff[1107 + i] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA(i)); 1000 for (i = 0; i < 8; i++) 1001 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i)); 1002 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL); 1003 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1); 1004 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2); 1005 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1); 1006 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2); 1007 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS); 1008 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL); 1009 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC); 1010 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC); 1011 1012 /* 82599 X540 specific registers */ 1013 regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN); 1014 1015 /* 82599 X540 specific DCB registers */ 1016 regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC); 1017 regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC); 1018 for (i = 0; i < 4; i++) 1019 regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i)); 1020 regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM); 1021 /* same as RTTQCNRM */ 1022 regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD); 1023 /* same as RTTQCNRR */ 1024 1025 /* X540 specific DCB registers */ 1026 regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR); 1027 regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG); 1028 1029 /* Security config registers */ 1030 regs_buff[1139] = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL); 1031 regs_buff[1140] = IXGBE_READ_REG(hw, IXGBE_SECTXSTAT); 1032 regs_buff[1141] = IXGBE_READ_REG(hw, IXGBE_SECTXBUFFAF); 1033 regs_buff[1142] = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); 1034 regs_buff[1143] = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL); 1035 regs_buff[1144] = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT); 1036 } 1037 1038 static void ixgbe_get_link_ext_stats(struct net_device *netdev, 1039 struct ethtool_link_ext_stats *stats) 1040 { 1041 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1042 1043 stats->link_down_events = adapter->link_down_events; 1044 } 1045 1046 static int ixgbe_get_eeprom_len(struct net_device *netdev) 1047 { 1048 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1049 return adapter->hw.eeprom.word_size * 2; 1050 } 1051 1052 static int ixgbe_get_eeprom(struct net_device *netdev, 1053 struct ethtool_eeprom *eeprom, u8 *bytes) 1054 { 1055 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1056 struct ixgbe_hw *hw = &adapter->hw; 1057 u16 *eeprom_buff; 1058 int first_word, last_word, eeprom_len; 1059 int ret_val = 0; 1060 u16 i; 1061 1062 if (eeprom->len == 0) 1063 return -EINVAL; 1064 1065 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1066 1067 first_word = eeprom->offset >> 1; 1068 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1069 eeprom_len = last_word - first_word + 1; 1070 1071 eeprom_buff = kmalloc_array(eeprom_len, sizeof(u16), GFP_KERNEL); 1072 if (!eeprom_buff) 1073 return -ENOMEM; 1074 1075 ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len, 1076 eeprom_buff); 1077 1078 /* Device's eeprom is always little-endian, word addressable */ 1079 for (i = 0; i < eeprom_len; i++) 1080 le16_to_cpus(&eeprom_buff[i]); 1081 1082 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); 1083 kfree(eeprom_buff); 1084 1085 return ret_val; 1086 } 1087 1088 static int ixgbe_set_eeprom(struct net_device *netdev, 1089 struct ethtool_eeprom *eeprom, u8 *bytes) 1090 { 1091 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1092 struct ixgbe_hw *hw = &adapter->hw; 1093 u16 *eeprom_buff; 1094 void *ptr; 1095 int max_len, first_word, last_word, ret_val = 0; 1096 u16 i; 1097 1098 if (eeprom->len == 0) 1099 return -EINVAL; 1100 1101 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) 1102 return -EINVAL; 1103 1104 max_len = hw->eeprom.word_size * 2; 1105 1106 first_word = eeprom->offset >> 1; 1107 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1108 eeprom_buff = kmalloc(max_len, GFP_KERNEL); 1109 if (!eeprom_buff) 1110 return -ENOMEM; 1111 1112 ptr = eeprom_buff; 1113 1114 if (eeprom->offset & 1) { 1115 /* 1116 * need read/modify/write of first changed EEPROM word 1117 * only the second byte of the word is being modified 1118 */ 1119 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]); 1120 if (ret_val) 1121 goto err; 1122 1123 ptr++; 1124 } 1125 if ((eeprom->offset + eeprom->len) & 1) { 1126 /* 1127 * need read/modify/write of last changed EEPROM word 1128 * only the first byte of the word is being modified 1129 */ 1130 ret_val = hw->eeprom.ops.read(hw, last_word, 1131 &eeprom_buff[last_word - first_word]); 1132 if (ret_val) 1133 goto err; 1134 } 1135 1136 /* Device's eeprom is always little-endian, word addressable */ 1137 for (i = 0; i < last_word - first_word + 1; i++) 1138 le16_to_cpus(&eeprom_buff[i]); 1139 1140 memcpy(ptr, bytes, eeprom->len); 1141 1142 for (i = 0; i < last_word - first_word + 1; i++) 1143 cpu_to_le16s(&eeprom_buff[i]); 1144 1145 ret_val = hw->eeprom.ops.write_buffer(hw, first_word, 1146 last_word - first_word + 1, 1147 eeprom_buff); 1148 1149 /* Update the checksum */ 1150 if (ret_val == 0) 1151 hw->eeprom.ops.update_checksum(hw); 1152 1153 err: 1154 kfree(eeprom_buff); 1155 return ret_val; 1156 } 1157 1158 void ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter) 1159 { 1160 struct ixgbe_hw *hw = &adapter->hw; 1161 1162 ixgbe_get_flash_data(hw); 1163 ixgbe_set_fw_version_e610(adapter); 1164 } 1165 1166 static void ixgbe_get_drvinfo(struct net_device *netdev, 1167 struct ethtool_drvinfo *drvinfo) 1168 { 1169 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1170 1171 /* need to refresh info for e610 in case fw reloads in runtime */ 1172 if (adapter->hw.mac.type == ixgbe_mac_e610) 1173 ixgbe_refresh_fw_version(adapter); 1174 1175 strscpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver)); 1176 1177 strscpy(drvinfo->fw_version, adapter->eeprom_id, 1178 sizeof(drvinfo->fw_version)); 1179 1180 strscpy(drvinfo->bus_info, pci_name(adapter->pdev), 1181 sizeof(drvinfo->bus_info)); 1182 1183 drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN; 1184 } 1185 1186 static u32 ixgbe_get_max_rxd(struct ixgbe_adapter *adapter) 1187 { 1188 switch (adapter->hw.mac.type) { 1189 case ixgbe_mac_82598EB: 1190 return IXGBE_MAX_RXD_82598; 1191 case ixgbe_mac_82599EB: 1192 return IXGBE_MAX_RXD_82599; 1193 case ixgbe_mac_X540: 1194 return IXGBE_MAX_RXD_X540; 1195 case ixgbe_mac_X550: 1196 case ixgbe_mac_X550EM_x: 1197 case ixgbe_mac_x550em_a: 1198 return IXGBE_MAX_RXD_X550; 1199 default: 1200 return IXGBE_MAX_RXD_82598; 1201 } 1202 } 1203 1204 static u32 ixgbe_get_max_txd(struct ixgbe_adapter *adapter) 1205 { 1206 switch (adapter->hw.mac.type) { 1207 case ixgbe_mac_82598EB: 1208 return IXGBE_MAX_TXD_82598; 1209 case ixgbe_mac_82599EB: 1210 return IXGBE_MAX_TXD_82599; 1211 case ixgbe_mac_X540: 1212 return IXGBE_MAX_TXD_X540; 1213 case ixgbe_mac_X550: 1214 case ixgbe_mac_X550EM_x: 1215 case ixgbe_mac_x550em_a: 1216 return IXGBE_MAX_TXD_X550; 1217 default: 1218 return IXGBE_MAX_TXD_82598; 1219 } 1220 } 1221 1222 static void ixgbe_get_ringparam(struct net_device *netdev, 1223 struct ethtool_ringparam *ring, 1224 struct kernel_ethtool_ringparam *kernel_ring, 1225 struct netlink_ext_ack *extack) 1226 { 1227 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1228 struct ixgbe_ring *tx_ring = adapter->tx_ring[0]; 1229 struct ixgbe_ring *rx_ring = adapter->rx_ring[0]; 1230 1231 ring->rx_max_pending = ixgbe_get_max_rxd(adapter); 1232 ring->tx_max_pending = ixgbe_get_max_txd(adapter); 1233 ring->rx_pending = rx_ring->count; 1234 ring->tx_pending = tx_ring->count; 1235 } 1236 1237 static int ixgbe_set_ringparam(struct net_device *netdev, 1238 struct ethtool_ringparam *ring, 1239 struct kernel_ethtool_ringparam *kernel_ring, 1240 struct netlink_ext_ack *extack) 1241 { 1242 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1243 struct ixgbe_ring *temp_ring; 1244 int i, j, err = 0; 1245 u32 new_rx_count, new_tx_count; 1246 1247 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1248 return -EINVAL; 1249 1250 new_tx_count = clamp_t(u32, ring->tx_pending, 1251 IXGBE_MIN_TXD, ixgbe_get_max_txd(adapter)); 1252 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE); 1253 1254 new_rx_count = clamp_t(u32, ring->rx_pending, 1255 IXGBE_MIN_RXD, ixgbe_get_max_rxd(adapter)); 1256 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE); 1257 1258 if ((new_tx_count == adapter->tx_ring_count) && 1259 (new_rx_count == adapter->rx_ring_count)) { 1260 /* nothing to do */ 1261 return 0; 1262 } 1263 1264 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) 1265 usleep_range(1000, 2000); 1266 1267 if (!netif_running(adapter->netdev)) { 1268 for (i = 0; i < adapter->num_tx_queues; i++) 1269 adapter->tx_ring[i]->count = new_tx_count; 1270 for (i = 0; i < adapter->num_xdp_queues; i++) 1271 adapter->xdp_ring[i]->count = new_tx_count; 1272 for (i = 0; i < adapter->num_rx_queues; i++) 1273 adapter->rx_ring[i]->count = new_rx_count; 1274 adapter->tx_ring_count = new_tx_count; 1275 adapter->xdp_ring_count = new_tx_count; 1276 adapter->rx_ring_count = new_rx_count; 1277 goto clear_reset; 1278 } 1279 1280 /* allocate temporary buffer to store rings in */ 1281 i = max_t(int, adapter->num_tx_queues + adapter->num_xdp_queues, 1282 adapter->num_rx_queues); 1283 temp_ring = vmalloc_array(i, sizeof(struct ixgbe_ring)); 1284 1285 if (!temp_ring) { 1286 err = -ENOMEM; 1287 goto clear_reset; 1288 } 1289 1290 ixgbe_down(adapter); 1291 1292 /* 1293 * Setup new Tx resources and free the old Tx resources in that order. 1294 * We can then assign the new resources to the rings via a memcpy. 1295 * The advantage to this approach is that we are guaranteed to still 1296 * have resources even in the case of an allocation failure. 1297 */ 1298 if (new_tx_count != adapter->tx_ring_count) { 1299 for (i = 0; i < adapter->num_tx_queues; i++) { 1300 memcpy(&temp_ring[i], adapter->tx_ring[i], 1301 sizeof(struct ixgbe_ring)); 1302 1303 temp_ring[i].count = new_tx_count; 1304 err = ixgbe_setup_tx_resources(&temp_ring[i]); 1305 if (err) { 1306 while (i) { 1307 i--; 1308 ixgbe_free_tx_resources(&temp_ring[i]); 1309 } 1310 goto err_setup; 1311 } 1312 } 1313 1314 for (j = 0; j < adapter->num_xdp_queues; j++, i++) { 1315 memcpy(&temp_ring[i], adapter->xdp_ring[j], 1316 sizeof(struct ixgbe_ring)); 1317 1318 temp_ring[i].count = new_tx_count; 1319 err = ixgbe_setup_tx_resources(&temp_ring[i]); 1320 if (err) { 1321 while (i) { 1322 i--; 1323 ixgbe_free_tx_resources(&temp_ring[i]); 1324 } 1325 goto err_setup; 1326 } 1327 } 1328 1329 for (i = 0; i < adapter->num_tx_queues; i++) { 1330 ixgbe_free_tx_resources(adapter->tx_ring[i]); 1331 1332 memcpy(adapter->tx_ring[i], &temp_ring[i], 1333 sizeof(struct ixgbe_ring)); 1334 } 1335 for (j = 0; j < adapter->num_xdp_queues; j++, i++) { 1336 ixgbe_free_tx_resources(adapter->xdp_ring[j]); 1337 1338 memcpy(adapter->xdp_ring[j], &temp_ring[i], 1339 sizeof(struct ixgbe_ring)); 1340 } 1341 1342 adapter->tx_ring_count = new_tx_count; 1343 } 1344 1345 /* Repeat the process for the Rx rings if needed */ 1346 if (new_rx_count != adapter->rx_ring_count) { 1347 for (i = 0; i < adapter->num_rx_queues; i++) { 1348 memcpy(&temp_ring[i], adapter->rx_ring[i], 1349 sizeof(struct ixgbe_ring)); 1350 1351 /* Clear copied XDP RX-queue info */ 1352 memset(&temp_ring[i].xdp_rxq, 0, 1353 sizeof(temp_ring[i].xdp_rxq)); 1354 1355 temp_ring[i].count = new_rx_count; 1356 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]); 1357 if (err) { 1358 while (i) { 1359 i--; 1360 ixgbe_free_rx_resources(&temp_ring[i]); 1361 } 1362 goto err_setup; 1363 } 1364 1365 } 1366 1367 for (i = 0; i < adapter->num_rx_queues; i++) { 1368 ixgbe_free_rx_resources(adapter->rx_ring[i]); 1369 1370 memcpy(adapter->rx_ring[i], &temp_ring[i], 1371 sizeof(struct ixgbe_ring)); 1372 } 1373 1374 adapter->rx_ring_count = new_rx_count; 1375 } 1376 1377 err_setup: 1378 ixgbe_up(adapter); 1379 vfree(temp_ring); 1380 clear_reset: 1381 clear_bit(__IXGBE_RESETTING, &adapter->state); 1382 return err; 1383 } 1384 1385 static int ixgbe_get_sset_count(struct net_device *netdev, int sset) 1386 { 1387 switch (sset) { 1388 case ETH_SS_TEST: 1389 return IXGBE_TEST_LEN; 1390 case ETH_SS_STATS: 1391 return IXGBE_STATS_LEN; 1392 case ETH_SS_PRIV_FLAGS: 1393 return IXGBE_PRIV_FLAGS_STR_LEN; 1394 default: 1395 return -EOPNOTSUPP; 1396 } 1397 } 1398 1399 static void ixgbe_get_ethtool_stats(struct net_device *netdev, 1400 struct ethtool_stats *stats, u64 *data) 1401 { 1402 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1403 struct rtnl_link_stats64 temp; 1404 const struct rtnl_link_stats64 *net_stats; 1405 unsigned int start; 1406 struct ixgbe_ring *ring; 1407 int i, j; 1408 char *p = NULL; 1409 1410 ixgbe_update_stats(adapter); 1411 net_stats = dev_get_stats(netdev, &temp); 1412 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { 1413 switch (ixgbe_gstrings_stats[i].type) { 1414 case NETDEV_STATS: 1415 p = (char *) net_stats + 1416 ixgbe_gstrings_stats[i].stat_offset; 1417 break; 1418 case IXGBE_STATS: 1419 p = (char *) adapter + 1420 ixgbe_gstrings_stats[i].stat_offset; 1421 break; 1422 default: 1423 data[i] = 0; 1424 continue; 1425 } 1426 1427 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat == 1428 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1429 } 1430 for (j = 0; j < netdev->num_tx_queues; j++) { 1431 ring = adapter->tx_ring[j]; 1432 if (!ring) { 1433 data[i] = 0; 1434 data[i+1] = 0; 1435 i += 2; 1436 continue; 1437 } 1438 1439 do { 1440 start = u64_stats_fetch_begin(&ring->syncp); 1441 data[i] = ring->stats.packets; 1442 data[i+1] = ring->stats.bytes; 1443 } while (u64_stats_fetch_retry(&ring->syncp, start)); 1444 i += 2; 1445 } 1446 for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) { 1447 ring = adapter->rx_ring[j]; 1448 if (!ring) { 1449 data[i] = 0; 1450 data[i+1] = 0; 1451 i += 2; 1452 continue; 1453 } 1454 1455 do { 1456 start = u64_stats_fetch_begin(&ring->syncp); 1457 data[i] = ring->stats.packets; 1458 data[i+1] = ring->stats.bytes; 1459 } while (u64_stats_fetch_retry(&ring->syncp, start)); 1460 i += 2; 1461 } 1462 1463 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) { 1464 data[i++] = adapter->stats.pxontxc[j]; 1465 data[i++] = adapter->stats.pxofftxc[j]; 1466 } 1467 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) { 1468 data[i++] = adapter->stats.pxonrxc[j]; 1469 data[i++] = adapter->stats.pxoffrxc[j]; 1470 } 1471 } 1472 1473 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset, 1474 u8 *data) 1475 { 1476 unsigned int i; 1477 u8 *p = data; 1478 1479 switch (stringset) { 1480 case ETH_SS_TEST: 1481 for (i = 0; i < IXGBE_TEST_LEN; i++) 1482 ethtool_puts(&p, ixgbe_gstrings_test[i]); 1483 break; 1484 case ETH_SS_STATS: 1485 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) 1486 ethtool_puts(&p, ixgbe_gstrings_stats[i].stat_string); 1487 for (i = 0; i < netdev->num_tx_queues; i++) { 1488 ethtool_sprintf(&p, "tx_queue_%u_packets", i); 1489 ethtool_sprintf(&p, "tx_queue_%u_bytes", i); 1490 } 1491 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) { 1492 ethtool_sprintf(&p, "rx_queue_%u_packets", i); 1493 ethtool_sprintf(&p, "rx_queue_%u_bytes", i); 1494 } 1495 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { 1496 ethtool_sprintf(&p, "tx_pb_%u_pxon", i); 1497 ethtool_sprintf(&p, "tx_pb_%u_pxoff", i); 1498 } 1499 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { 1500 ethtool_sprintf(&p, "rx_pb_%u_pxon", i); 1501 ethtool_sprintf(&p, "rx_pb_%u_pxoff", i); 1502 } 1503 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */ 1504 break; 1505 case ETH_SS_PRIV_FLAGS: 1506 memcpy(data, ixgbe_priv_flags_strings, 1507 IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN); 1508 } 1509 } 1510 1511 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data) 1512 { 1513 struct ixgbe_hw *hw = &adapter->hw; 1514 bool link_up; 1515 u32 link_speed = 0; 1516 1517 if (ixgbe_removed(hw->hw_addr)) { 1518 *data = 1; 1519 return 1; 1520 } 1521 *data = 0; 1522 1523 hw->mac.ops.check_link(hw, &link_speed, &link_up, true); 1524 if (link_up) 1525 return *data; 1526 else 1527 *data = 1; 1528 return *data; 1529 } 1530 1531 /* ethtool register test data */ 1532 struct ixgbe_reg_test { 1533 u16 reg; 1534 u8 array_len; 1535 u8 test_type; 1536 u32 mask; 1537 u32 write; 1538 }; 1539 1540 /* In the hardware, registers are laid out either singly, in arrays 1541 * spaced 0x40 bytes apart, or in contiguous tables. We assume 1542 * most tests take place on arrays or single registers (handled 1543 * as a single-element array) and special-case the tables. 1544 * Table tests are always pattern tests. 1545 * 1546 * We also make provision for some required setup steps by specifying 1547 * registers to be written without any read-back testing. 1548 */ 1549 1550 #define PATTERN_TEST 1 1551 #define SET_READ_TEST 2 1552 #define WRITE_NO_TEST 3 1553 #define TABLE32_TEST 4 1554 #define TABLE64_TEST_LO 5 1555 #define TABLE64_TEST_HI 6 1556 1557 /* default 82599 register test */ 1558 static const struct ixgbe_reg_test reg_test_82599[] = { 1559 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1560 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1561 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1562 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, 1563 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 }, 1564 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1565 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1566 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, 1567 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, 1568 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, 1569 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1570 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1571 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1572 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1573 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 }, 1574 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 }, 1575 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, 1576 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF }, 1577 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1578 { .reg = 0 } 1579 }; 1580 1581 /* default 82598 register test */ 1582 static const struct ixgbe_reg_test reg_test_82598[] = { 1583 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1584 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1585 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1586 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, 1587 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1588 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1589 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1590 /* Enable all four RX queues before testing. */ 1591 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, 1592 /* RDH is read-only for 82598, only test RDT. */ 1593 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, 1594 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, 1595 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1596 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1597 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF }, 1598 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1599 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1600 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1601 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 }, 1602 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 }, 1603 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, 1604 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF }, 1605 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1606 { .reg = 0 } 1607 }; 1608 1609 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg, 1610 u32 mask, u32 write) 1611 { 1612 u32 pat, val, before; 1613 static const u32 test_pattern[] = { 1614 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; 1615 1616 if (ixgbe_removed(adapter->hw.hw_addr)) { 1617 *data = 1; 1618 return true; 1619 } 1620 for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) { 1621 before = ixgbe_read_reg(&adapter->hw, reg); 1622 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write); 1623 val = ixgbe_read_reg(&adapter->hw, reg); 1624 if (val != (test_pattern[pat] & write & mask)) { 1625 e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n", 1626 reg, val, (test_pattern[pat] & write & mask)); 1627 *data = reg; 1628 ixgbe_write_reg(&adapter->hw, reg, before); 1629 return true; 1630 } 1631 ixgbe_write_reg(&adapter->hw, reg, before); 1632 } 1633 return false; 1634 } 1635 1636 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg, 1637 u32 mask, u32 write) 1638 { 1639 u32 val, before; 1640 1641 if (ixgbe_removed(adapter->hw.hw_addr)) { 1642 *data = 1; 1643 return true; 1644 } 1645 before = ixgbe_read_reg(&adapter->hw, reg); 1646 ixgbe_write_reg(&adapter->hw, reg, write & mask); 1647 val = ixgbe_read_reg(&adapter->hw, reg); 1648 if ((write & mask) != (val & mask)) { 1649 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", 1650 reg, (val & mask), (write & mask)); 1651 *data = reg; 1652 ixgbe_write_reg(&adapter->hw, reg, before); 1653 return true; 1654 } 1655 ixgbe_write_reg(&adapter->hw, reg, before); 1656 return false; 1657 } 1658 1659 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) 1660 { 1661 const struct ixgbe_reg_test *test; 1662 u32 value, before, after; 1663 u32 i, toggle; 1664 1665 if (ixgbe_removed(adapter->hw.hw_addr)) { 1666 e_err(drv, "Adapter removed - register test blocked\n"); 1667 *data = 1; 1668 return 1; 1669 } 1670 switch (adapter->hw.mac.type) { 1671 case ixgbe_mac_82598EB: 1672 toggle = 0x7FFFF3FF; 1673 test = reg_test_82598; 1674 break; 1675 case ixgbe_mac_82599EB: 1676 case ixgbe_mac_X540: 1677 case ixgbe_mac_X550: 1678 case ixgbe_mac_X550EM_x: 1679 case ixgbe_mac_x550em_a: 1680 case ixgbe_mac_e610: 1681 toggle = 0x7FFFF30F; 1682 test = reg_test_82599; 1683 break; 1684 default: 1685 *data = 1; 1686 return 1; 1687 } 1688 1689 /* 1690 * Because the status register is such a special case, 1691 * we handle it separately from the rest of the register 1692 * tests. Some bits are read-only, some toggle, and some 1693 * are writeable on newer MACs. 1694 */ 1695 before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS); 1696 value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle); 1697 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle); 1698 after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle; 1699 if (value != after) { 1700 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n", 1701 after, value); 1702 *data = 1; 1703 return 1; 1704 } 1705 /* restore previous status */ 1706 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before); 1707 1708 /* 1709 * Perform the remainder of the register test, looping through 1710 * the test table until we either fail or reach the null entry. 1711 */ 1712 while (test->reg) { 1713 for (i = 0; i < test->array_len; i++) { 1714 bool b = false; 1715 1716 switch (test->test_type) { 1717 case PATTERN_TEST: 1718 b = reg_pattern_test(adapter, data, 1719 test->reg + (i * 0x40), 1720 test->mask, 1721 test->write); 1722 break; 1723 case SET_READ_TEST: 1724 b = reg_set_and_check(adapter, data, 1725 test->reg + (i * 0x40), 1726 test->mask, 1727 test->write); 1728 break; 1729 case WRITE_NO_TEST: 1730 ixgbe_write_reg(&adapter->hw, 1731 test->reg + (i * 0x40), 1732 test->write); 1733 break; 1734 case TABLE32_TEST: 1735 b = reg_pattern_test(adapter, data, 1736 test->reg + (i * 4), 1737 test->mask, 1738 test->write); 1739 break; 1740 case TABLE64_TEST_LO: 1741 b = reg_pattern_test(adapter, data, 1742 test->reg + (i * 8), 1743 test->mask, 1744 test->write); 1745 break; 1746 case TABLE64_TEST_HI: 1747 b = reg_pattern_test(adapter, data, 1748 (test->reg + 4) + (i * 8), 1749 test->mask, 1750 test->write); 1751 break; 1752 } 1753 if (b) 1754 return 1; 1755 } 1756 test++; 1757 } 1758 1759 *data = 0; 1760 return 0; 1761 } 1762 1763 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data) 1764 { 1765 struct ixgbe_hw *hw = &adapter->hw; 1766 if (hw->eeprom.ops.validate_checksum(hw, NULL)) 1767 *data = 1; 1768 else 1769 *data = 0; 1770 return *data; 1771 } 1772 1773 static irqreturn_t ixgbe_test_intr(int irq, void *data) 1774 { 1775 struct net_device *netdev = (struct net_device *) data; 1776 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1777 1778 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR); 1779 1780 return IRQ_HANDLED; 1781 } 1782 1783 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) 1784 { 1785 struct net_device *netdev = adapter->netdev; 1786 u32 mask, i = 0, shared_int = true; 1787 u32 irq = adapter->pdev->irq; 1788 1789 *data = 0; 1790 1791 /* Hook up test interrupt handler just for this test */ 1792 if (adapter->msix_entries) { 1793 /* NOTE: we don't test MSI-X interrupts here, yet */ 1794 return 0; 1795 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { 1796 shared_int = false; 1797 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name, 1798 netdev)) { 1799 *data = 1; 1800 return -1; 1801 } 1802 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED, 1803 netdev->name, netdev)) { 1804 shared_int = false; 1805 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED, 1806 netdev->name, netdev)) { 1807 *data = 1; 1808 return -1; 1809 } 1810 e_info(hw, "testing %s interrupt\n", shared_int ? 1811 "shared" : "unshared"); 1812 1813 /* Disable all the interrupts */ 1814 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); 1815 IXGBE_WRITE_FLUSH(&adapter->hw); 1816 usleep_range(10000, 20000); 1817 1818 /* Test each interrupt */ 1819 for (; i < 10; i++) { 1820 /* Interrupt to test */ 1821 mask = BIT(i); 1822 1823 if (!shared_int) { 1824 /* 1825 * Disable the interrupts to be reported in 1826 * the cause register and then force the same 1827 * interrupt and see if one gets posted. If 1828 * an interrupt was posted to the bus, the 1829 * test failed. 1830 */ 1831 adapter->test_icr = 0; 1832 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1833 ~mask & 0x00007FFF); 1834 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1835 ~mask & 0x00007FFF); 1836 IXGBE_WRITE_FLUSH(&adapter->hw); 1837 usleep_range(10000, 20000); 1838 1839 if (adapter->test_icr & mask) { 1840 *data = 3; 1841 break; 1842 } 1843 } 1844 1845 /* 1846 * Enable the interrupt to be reported in the cause 1847 * register and then force the same interrupt and see 1848 * if one gets posted. If an interrupt was not posted 1849 * to the bus, the test failed. 1850 */ 1851 adapter->test_icr = 0; 1852 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); 1853 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 1854 IXGBE_WRITE_FLUSH(&adapter->hw); 1855 usleep_range(10000, 20000); 1856 1857 if (!(adapter->test_icr & mask)) { 1858 *data = 4; 1859 break; 1860 } 1861 1862 if (!shared_int) { 1863 /* 1864 * Disable the other interrupts to be reported in 1865 * the cause register and then force the other 1866 * interrupts and see if any get posted. If 1867 * an interrupt was posted to the bus, the 1868 * test failed. 1869 */ 1870 adapter->test_icr = 0; 1871 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1872 ~mask & 0x00007FFF); 1873 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1874 ~mask & 0x00007FFF); 1875 IXGBE_WRITE_FLUSH(&adapter->hw); 1876 usleep_range(10000, 20000); 1877 1878 if (adapter->test_icr) { 1879 *data = 5; 1880 break; 1881 } 1882 } 1883 } 1884 1885 /* Disable all the interrupts */ 1886 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); 1887 IXGBE_WRITE_FLUSH(&adapter->hw); 1888 usleep_range(10000, 20000); 1889 1890 /* Unhook test interrupt handler */ 1891 free_irq(irq, netdev); 1892 1893 return *data; 1894 } 1895 1896 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter) 1897 { 1898 /* Shut down the DMA engines now so they can be reinitialized later, 1899 * since the test rings and normally used rings should overlap on 1900 * queue 0 we can just use the standard disable Rx/Tx calls and they 1901 * will take care of disabling the test rings for us. 1902 */ 1903 1904 /* first Rx */ 1905 ixgbe_disable_rx(adapter); 1906 1907 /* now Tx */ 1908 ixgbe_disable_tx(adapter); 1909 1910 ixgbe_reset(adapter); 1911 1912 ixgbe_free_tx_resources(&adapter->test_tx_ring); 1913 ixgbe_free_rx_resources(&adapter->test_rx_ring); 1914 } 1915 1916 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) 1917 { 1918 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; 1919 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; 1920 struct ixgbe_hw *hw = &adapter->hw; 1921 u32 rctl, reg_data; 1922 int ret_val; 1923 int err; 1924 1925 /* Setup Tx descriptor ring and Tx buffers */ 1926 tx_ring->count = IXGBE_DEFAULT_TXD; 1927 tx_ring->queue_index = 0; 1928 tx_ring->dev = &adapter->pdev->dev; 1929 tx_ring->netdev = adapter->netdev; 1930 tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx; 1931 1932 err = ixgbe_setup_tx_resources(tx_ring); 1933 if (err) 1934 return 1; 1935 1936 switch (adapter->hw.mac.type) { 1937 case ixgbe_mac_82599EB: 1938 case ixgbe_mac_X540: 1939 case ixgbe_mac_X550: 1940 case ixgbe_mac_X550EM_x: 1941 case ixgbe_mac_x550em_a: 1942 case ixgbe_mac_e610: 1943 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); 1944 reg_data |= IXGBE_DMATXCTL_TE; 1945 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); 1946 break; 1947 default: 1948 break; 1949 } 1950 1951 ixgbe_configure_tx_ring(adapter, tx_ring); 1952 1953 /* Setup Rx Descriptor ring and Rx buffers */ 1954 rx_ring->count = IXGBE_DEFAULT_RXD; 1955 rx_ring->queue_index = 0; 1956 rx_ring->dev = &adapter->pdev->dev; 1957 rx_ring->netdev = adapter->netdev; 1958 rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx; 1959 1960 err = ixgbe_setup_rx_resources(adapter, rx_ring); 1961 if (err) { 1962 ret_val = 4; 1963 goto err_nomem; 1964 } 1965 1966 hw->mac.ops.disable_rx(hw); 1967 1968 ixgbe_configure_rx_ring(adapter, rx_ring); 1969 1970 rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL); 1971 rctl |= IXGBE_RXCTRL_DMBYPS; 1972 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl); 1973 1974 hw->mac.ops.enable_rx(hw); 1975 1976 return 0; 1977 1978 err_nomem: 1979 ixgbe_free_desc_rings(adapter); 1980 return ret_val; 1981 } 1982 1983 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter) 1984 { 1985 struct ixgbe_hw *hw = &adapter->hw; 1986 u32 reg_data; 1987 1988 1989 /* Setup MAC loopback */ 1990 reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0); 1991 reg_data |= IXGBE_HLREG0_LPBK; 1992 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data); 1993 1994 reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL); 1995 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE; 1996 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data); 1997 1998 /* X540 and X550 needs to set the MACC.FLU bit to force link up */ 1999 switch (adapter->hw.mac.type) { 2000 case ixgbe_mac_X540: 2001 case ixgbe_mac_X550: 2002 case ixgbe_mac_X550EM_x: 2003 case ixgbe_mac_x550em_a: 2004 case ixgbe_mac_e610: 2005 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC); 2006 reg_data |= IXGBE_MACC_FLU; 2007 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data); 2008 break; 2009 default: 2010 if (hw->mac.orig_autoc) { 2011 reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU; 2012 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data); 2013 } else { 2014 return 10; 2015 } 2016 } 2017 IXGBE_WRITE_FLUSH(hw); 2018 usleep_range(10000, 20000); 2019 2020 /* Disable Atlas Tx lanes; re-enabled in reset path */ 2021 if (hw->mac.type == ixgbe_mac_82598EB) { 2022 u8 atlas; 2023 2024 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas); 2025 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN; 2026 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas); 2027 2028 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas); 2029 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL; 2030 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas); 2031 2032 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas); 2033 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL; 2034 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas); 2035 2036 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas); 2037 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL; 2038 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas); 2039 } 2040 2041 return 0; 2042 } 2043 2044 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter) 2045 { 2046 u32 reg_data; 2047 2048 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0); 2049 reg_data &= ~IXGBE_HLREG0_LPBK; 2050 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data); 2051 } 2052 2053 static void ixgbe_create_lbtest_frame(struct sk_buff *skb, 2054 unsigned int frame_size) 2055 { 2056 memset(skb->data, 0xFF, frame_size); 2057 frame_size >>= 1; 2058 memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1); 2059 skb->data[frame_size + 10] = 0xBE; 2060 skb->data[frame_size + 12] = 0xAF; 2061 } 2062 2063 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer, 2064 unsigned int frame_size) 2065 { 2066 unsigned char *data; 2067 2068 frame_size >>= 1; 2069 2070 data = page_address(rx_buffer->page) + rx_buffer->page_offset; 2071 2072 return data[3] == 0xFF && data[frame_size + 10] == 0xBE && 2073 data[frame_size + 12] == 0xAF; 2074 } 2075 2076 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, 2077 struct ixgbe_ring *tx_ring, 2078 unsigned int size) 2079 { 2080 union ixgbe_adv_rx_desc *rx_desc; 2081 u16 rx_ntc, tx_ntc, count = 0; 2082 2083 /* initialize next to clean and descriptor values */ 2084 rx_ntc = rx_ring->next_to_clean; 2085 tx_ntc = tx_ring->next_to_clean; 2086 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); 2087 2088 while (tx_ntc != tx_ring->next_to_use) { 2089 union ixgbe_adv_tx_desc *tx_desc; 2090 struct ixgbe_tx_buffer *tx_buffer; 2091 2092 tx_desc = IXGBE_TX_DESC(tx_ring, tx_ntc); 2093 2094 /* if DD is not set transmit has not completed */ 2095 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 2096 return count; 2097 2098 /* unmap buffer on Tx side */ 2099 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc]; 2100 2101 /* Free all the Tx ring sk_buffs */ 2102 dev_kfree_skb_any(tx_buffer->skb); 2103 2104 /* unmap skb header data */ 2105 dma_unmap_single(tx_ring->dev, 2106 dma_unmap_addr(tx_buffer, dma), 2107 dma_unmap_len(tx_buffer, len), 2108 DMA_TO_DEVICE); 2109 dma_unmap_len_set(tx_buffer, len, 0); 2110 2111 /* increment Tx next to clean counter */ 2112 tx_ntc++; 2113 if (tx_ntc == tx_ring->count) 2114 tx_ntc = 0; 2115 } 2116 2117 while (rx_desc->wb.upper.length) { 2118 struct ixgbe_rx_buffer *rx_buffer; 2119 2120 /* check Rx buffer */ 2121 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc]; 2122 2123 /* sync Rx buffer for CPU read */ 2124 dma_sync_single_for_cpu(rx_ring->dev, 2125 rx_buffer->dma, 2126 ixgbe_rx_bufsz(rx_ring), 2127 DMA_FROM_DEVICE); 2128 2129 /* verify contents of skb */ 2130 if (ixgbe_check_lbtest_frame(rx_buffer, size)) 2131 count++; 2132 else 2133 break; 2134 2135 /* sync Rx buffer for device write */ 2136 dma_sync_single_for_device(rx_ring->dev, 2137 rx_buffer->dma, 2138 ixgbe_rx_bufsz(rx_ring), 2139 DMA_FROM_DEVICE); 2140 2141 /* increment Rx next to clean counter */ 2142 rx_ntc++; 2143 if (rx_ntc == rx_ring->count) 2144 rx_ntc = 0; 2145 2146 /* fetch next descriptor */ 2147 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); 2148 } 2149 2150 netdev_tx_reset_queue(txring_txq(tx_ring)); 2151 2152 /* re-map buffers to ring, store next to clean values */ 2153 ixgbe_alloc_rx_buffers(rx_ring, count); 2154 rx_ring->next_to_clean = rx_ntc; 2155 tx_ring->next_to_clean = tx_ntc; 2156 2157 return count; 2158 } 2159 2160 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter) 2161 { 2162 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; 2163 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; 2164 int i, j, lc, good_cnt, ret_val = 0; 2165 unsigned int size = 1024; 2166 netdev_tx_t tx_ret_val; 2167 struct sk_buff *skb; 2168 u32 flags_orig = adapter->flags; 2169 2170 /* DCB can modify the frames on Tx */ 2171 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 2172 2173 /* allocate test skb */ 2174 skb = alloc_skb(size, GFP_KERNEL); 2175 if (!skb) 2176 return 11; 2177 2178 /* place data into test skb */ 2179 ixgbe_create_lbtest_frame(skb, size); 2180 skb_put(skb, size); 2181 2182 /* 2183 * Calculate the loop count based on the largest descriptor ring 2184 * The idea is to wrap the largest ring a number of times using 64 2185 * send/receive pairs during each loop 2186 */ 2187 2188 if (rx_ring->count <= tx_ring->count) 2189 lc = ((tx_ring->count / 64) * 2) + 1; 2190 else 2191 lc = ((rx_ring->count / 64) * 2) + 1; 2192 2193 for (j = 0; j <= lc; j++) { 2194 /* reset count of good packets */ 2195 good_cnt = 0; 2196 2197 /* place 64 packets on the transmit queue*/ 2198 for (i = 0; i < 64; i++) { 2199 skb_get(skb); 2200 tx_ret_val = ixgbe_xmit_frame_ring(skb, 2201 adapter, 2202 tx_ring); 2203 if (tx_ret_val == NETDEV_TX_OK) 2204 good_cnt++; 2205 } 2206 2207 if (good_cnt != 64) { 2208 ret_val = 12; 2209 break; 2210 } 2211 2212 /* allow 200 milliseconds for packets to go from Tx to Rx */ 2213 msleep(200); 2214 2215 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size); 2216 if (good_cnt != 64) { 2217 ret_val = 13; 2218 break; 2219 } 2220 } 2221 2222 /* free the original skb */ 2223 kfree_skb(skb); 2224 adapter->flags = flags_orig; 2225 2226 return ret_val; 2227 } 2228 2229 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data) 2230 { 2231 *data = ixgbe_setup_desc_rings(adapter); 2232 if (*data) 2233 goto out; 2234 *data = ixgbe_setup_loopback_test(adapter); 2235 if (*data) 2236 goto err_loopback; 2237 *data = ixgbe_run_loopback_test(adapter); 2238 ixgbe_loopback_cleanup(adapter); 2239 2240 err_loopback: 2241 ixgbe_free_desc_rings(adapter); 2242 out: 2243 return *data; 2244 } 2245 2246 static void ixgbe_diag_test(struct net_device *netdev, 2247 struct ethtool_test *eth_test, u64 *data) 2248 { 2249 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2250 bool if_running = netif_running(netdev); 2251 2252 if (ixgbe_removed(adapter->hw.hw_addr)) { 2253 e_err(hw, "Adapter removed - test blocked\n"); 2254 data[0] = 1; 2255 data[1] = 1; 2256 data[2] = 1; 2257 data[3] = 1; 2258 data[4] = 1; 2259 eth_test->flags |= ETH_TEST_FL_FAILED; 2260 return; 2261 } 2262 set_bit(__IXGBE_TESTING, &adapter->state); 2263 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2264 struct ixgbe_hw *hw = &adapter->hw; 2265 2266 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 2267 int i; 2268 for (i = 0; i < adapter->num_vfs; i++) { 2269 if (adapter->vfinfo[i].clear_to_send) { 2270 netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n"); 2271 data[0] = 1; 2272 data[1] = 1; 2273 data[2] = 1; 2274 data[3] = 1; 2275 data[4] = 1; 2276 eth_test->flags |= ETH_TEST_FL_FAILED; 2277 clear_bit(__IXGBE_TESTING, 2278 &adapter->state); 2279 return; 2280 } 2281 } 2282 } 2283 2284 /* Offline tests */ 2285 e_info(hw, "offline testing starting\n"); 2286 2287 /* Link test performed before hardware reset so autoneg doesn't 2288 * interfere with test result 2289 */ 2290 if (ixgbe_link_test(adapter, &data[4])) 2291 eth_test->flags |= ETH_TEST_FL_FAILED; 2292 2293 if (if_running) 2294 /* indicate we're in test mode */ 2295 ixgbe_close(netdev); 2296 else 2297 ixgbe_reset(adapter); 2298 2299 e_info(hw, "register testing starting\n"); 2300 if (ixgbe_reg_test(adapter, &data[0])) 2301 eth_test->flags |= ETH_TEST_FL_FAILED; 2302 2303 ixgbe_reset(adapter); 2304 e_info(hw, "eeprom testing starting\n"); 2305 if (ixgbe_eeprom_test(adapter, &data[1])) 2306 eth_test->flags |= ETH_TEST_FL_FAILED; 2307 2308 ixgbe_reset(adapter); 2309 e_info(hw, "interrupt testing starting\n"); 2310 if (ixgbe_intr_test(adapter, &data[2])) 2311 eth_test->flags |= ETH_TEST_FL_FAILED; 2312 2313 /* If SRIOV or VMDq is enabled then skip MAC 2314 * loopback diagnostic. */ 2315 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED | 2316 IXGBE_FLAG_VMDQ_ENABLED)) { 2317 e_info(hw, "Skip MAC loopback diagnostic in VT mode\n"); 2318 data[3] = 0; 2319 goto skip_loopback; 2320 } 2321 2322 ixgbe_reset(adapter); 2323 e_info(hw, "loopback testing starting\n"); 2324 if (ixgbe_loopback_test(adapter, &data[3])) 2325 eth_test->flags |= ETH_TEST_FL_FAILED; 2326 2327 skip_loopback: 2328 ixgbe_reset(adapter); 2329 2330 /* clear testing bit and return adapter to previous state */ 2331 clear_bit(__IXGBE_TESTING, &adapter->state); 2332 if (if_running) 2333 ixgbe_open(netdev); 2334 else if (hw->mac.ops.disable_tx_laser) 2335 hw->mac.ops.disable_tx_laser(hw); 2336 } else { 2337 e_info(hw, "online testing starting\n"); 2338 2339 /* Online tests */ 2340 if (ixgbe_link_test(adapter, &data[4])) 2341 eth_test->flags |= ETH_TEST_FL_FAILED; 2342 2343 /* Offline tests aren't run; pass by default */ 2344 data[0] = 0; 2345 data[1] = 0; 2346 data[2] = 0; 2347 data[3] = 0; 2348 2349 clear_bit(__IXGBE_TESTING, &adapter->state); 2350 } 2351 } 2352 2353 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter, 2354 struct ethtool_wolinfo *wol) 2355 { 2356 struct ixgbe_hw *hw = &adapter->hw; 2357 int retval = 0; 2358 2359 /* WOL not supported for all devices */ 2360 if (!ixgbe_wol_supported(adapter, hw->device_id, 2361 hw->subsystem_device_id)) { 2362 retval = 1; 2363 wol->supported = 0; 2364 } 2365 2366 return retval; 2367 } 2368 2369 static void ixgbe_get_wol(struct net_device *netdev, 2370 struct ethtool_wolinfo *wol) 2371 { 2372 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2373 2374 wol->supported = WAKE_UCAST | WAKE_MCAST | 2375 WAKE_BCAST | WAKE_MAGIC; 2376 wol->wolopts = 0; 2377 2378 if (ixgbe_wol_exclusion(adapter, wol) || 2379 !device_can_wakeup(&adapter->pdev->dev)) 2380 return; 2381 2382 if (adapter->wol & IXGBE_WUFC_EX) 2383 wol->wolopts |= WAKE_UCAST; 2384 if (adapter->wol & IXGBE_WUFC_MC) 2385 wol->wolopts |= WAKE_MCAST; 2386 if (adapter->wol & IXGBE_WUFC_BC) 2387 wol->wolopts |= WAKE_BCAST; 2388 if (adapter->wol & IXGBE_WUFC_MAG) 2389 wol->wolopts |= WAKE_MAGIC; 2390 } 2391 2392 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2393 { 2394 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2395 2396 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE | 2397 WAKE_FILTER)) 2398 return -EOPNOTSUPP; 2399 2400 if (ixgbe_wol_exclusion(adapter, wol)) 2401 return wol->wolopts ? -EOPNOTSUPP : 0; 2402 2403 adapter->wol = 0; 2404 2405 if (wol->wolopts & WAKE_UCAST) 2406 adapter->wol |= IXGBE_WUFC_EX; 2407 if (wol->wolopts & WAKE_MCAST) 2408 adapter->wol |= IXGBE_WUFC_MC; 2409 if (wol->wolopts & WAKE_BCAST) 2410 adapter->wol |= IXGBE_WUFC_BC; 2411 if (wol->wolopts & WAKE_MAGIC) 2412 adapter->wol |= IXGBE_WUFC_MAG; 2413 2414 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 2415 2416 return 0; 2417 } 2418 2419 static int ixgbe_set_wol_acpi(struct net_device *netdev, 2420 struct ethtool_wolinfo *wol) 2421 { 2422 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2423 struct ixgbe_hw *hw = &adapter->hw; 2424 u32 grc; 2425 2426 if (ixgbe_wol_exclusion(adapter, wol)) 2427 return wol->wolopts ? -EOPNOTSUPP : 0; 2428 2429 /* disable APM wakeup */ 2430 grc = IXGBE_READ_REG(hw, IXGBE_GRC_X550EM_a); 2431 grc &= ~IXGBE_GRC_APME; 2432 IXGBE_WRITE_REG(hw, IXGBE_GRC_X550EM_a, grc); 2433 2434 /* erase existing filters */ 2435 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 2436 adapter->wol = 0; 2437 2438 if (wol->wolopts & WAKE_UCAST) 2439 adapter->wol |= IXGBE_WUFC_EX; 2440 if (wol->wolopts & WAKE_MCAST) 2441 adapter->wol |= IXGBE_WUFC_MC; 2442 if (wol->wolopts & WAKE_BCAST) 2443 adapter->wol |= IXGBE_WUFC_BC; 2444 2445 IXGBE_WRITE_REG(hw, IXGBE_WUC, IXGBE_WUC_PME_EN); 2446 IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wol); 2447 2448 hw->wol_enabled = adapter->wol; 2449 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 2450 2451 return 0; 2452 } 2453 2454 static int ixgbe_set_wol_e610(struct net_device *netdev, 2455 struct ethtool_wolinfo *wol) 2456 { 2457 if (wol->wolopts & (WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)) 2458 return ixgbe_set_wol_acpi(netdev, wol); 2459 else 2460 return ixgbe_set_wol(netdev, wol); 2461 } 2462 2463 static int ixgbe_nway_reset(struct net_device *netdev) 2464 { 2465 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2466 2467 if (netif_running(netdev)) 2468 ixgbe_reinit_locked(adapter); 2469 2470 return 0; 2471 } 2472 2473 static int ixgbe_set_phys_id(struct net_device *netdev, 2474 enum ethtool_phys_id_state state) 2475 { 2476 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2477 struct ixgbe_hw *hw = &adapter->hw; 2478 2479 if (!hw->mac.ops.led_on || !hw->mac.ops.led_off) 2480 return -EOPNOTSUPP; 2481 2482 switch (state) { 2483 case ETHTOOL_ID_ACTIVE: 2484 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 2485 return 2; 2486 2487 case ETHTOOL_ID_ON: 2488 hw->mac.ops.led_on(hw, hw->mac.led_link_act); 2489 break; 2490 2491 case ETHTOOL_ID_OFF: 2492 hw->mac.ops.led_off(hw, hw->mac.led_link_act); 2493 break; 2494 2495 case ETHTOOL_ID_INACTIVE: 2496 /* Restore LED settings */ 2497 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg); 2498 break; 2499 } 2500 2501 return 0; 2502 } 2503 2504 static int ixgbe_set_phys_id_e610(struct net_device *netdev, 2505 enum ethtool_phys_id_state state) 2506 { 2507 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2508 bool led_active; 2509 2510 switch (state) { 2511 case ETHTOOL_ID_ACTIVE: 2512 led_active = true; 2513 break; 2514 case ETHTOOL_ID_INACTIVE: 2515 led_active = false; 2516 break; 2517 default: 2518 return -EOPNOTSUPP; 2519 } 2520 2521 return ixgbe_aci_set_port_id_led(&adapter->hw, !led_active); 2522 } 2523 2524 static int ixgbe_get_coalesce(struct net_device *netdev, 2525 struct ethtool_coalesce *ec, 2526 struct kernel_ethtool_coalesce *kernel_coal, 2527 struct netlink_ext_ack *extack) 2528 { 2529 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2530 2531 /* only valid if in constant ITR mode */ 2532 if (adapter->rx_itr_setting <= 1) 2533 ec->rx_coalesce_usecs = adapter->rx_itr_setting; 2534 else 2535 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2; 2536 2537 /* if in mixed tx/rx queues per vector mode, report only rx settings */ 2538 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2539 return 0; 2540 2541 /* only valid if in constant ITR mode */ 2542 if (adapter->tx_itr_setting <= 1) 2543 ec->tx_coalesce_usecs = adapter->tx_itr_setting; 2544 else 2545 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2; 2546 2547 return 0; 2548 } 2549 2550 /* 2551 * this function must be called before setting the new value of 2552 * rx_itr_setting 2553 */ 2554 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter) 2555 { 2556 struct net_device *netdev = adapter->netdev; 2557 2558 /* nothing to do if LRO or RSC are not enabled */ 2559 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) || 2560 !(netdev->features & NETIF_F_LRO)) 2561 return false; 2562 2563 /* check the feature flag value and enable RSC if necessary */ 2564 if (adapter->rx_itr_setting == 1 || 2565 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { 2566 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { 2567 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; 2568 e_info(probe, "rx-usecs value high enough to re-enable RSC\n"); 2569 return true; 2570 } 2571 /* if interrupt rate is too high then disable RSC */ 2572 } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { 2573 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; 2574 e_info(probe, "rx-usecs set too low, disabling RSC\n"); 2575 return true; 2576 } 2577 return false; 2578 } 2579 2580 static int ixgbe_set_coalesce(struct net_device *netdev, 2581 struct ethtool_coalesce *ec, 2582 struct kernel_ethtool_coalesce *kernel_coal, 2583 struct netlink_ext_ack *extack) 2584 { 2585 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2586 struct ixgbe_q_vector *q_vector; 2587 int i; 2588 u16 tx_itr_param, rx_itr_param, tx_itr_prev; 2589 bool need_reset = false; 2590 2591 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) { 2592 /* reject Tx specific changes in case of mixed RxTx vectors */ 2593 if (ec->tx_coalesce_usecs) 2594 return -EINVAL; 2595 tx_itr_prev = adapter->rx_itr_setting; 2596 } else { 2597 tx_itr_prev = adapter->tx_itr_setting; 2598 } 2599 2600 if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) || 2601 (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2))) 2602 return -EINVAL; 2603 2604 if (ec->rx_coalesce_usecs > 1) 2605 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2; 2606 else 2607 adapter->rx_itr_setting = ec->rx_coalesce_usecs; 2608 2609 if (adapter->rx_itr_setting == 1) 2610 rx_itr_param = IXGBE_20K_ITR; 2611 else 2612 rx_itr_param = adapter->rx_itr_setting; 2613 2614 if (ec->tx_coalesce_usecs > 1) 2615 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2; 2616 else 2617 adapter->tx_itr_setting = ec->tx_coalesce_usecs; 2618 2619 if (adapter->tx_itr_setting == 1) 2620 tx_itr_param = IXGBE_12K_ITR; 2621 else 2622 tx_itr_param = adapter->tx_itr_setting; 2623 2624 /* mixed Rx/Tx */ 2625 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2626 adapter->tx_itr_setting = adapter->rx_itr_setting; 2627 2628 /* detect ITR changes that require update of TXDCTL.WTHRESH */ 2629 if ((adapter->tx_itr_setting != 1) && 2630 (adapter->tx_itr_setting < IXGBE_100K_ITR)) { 2631 if ((tx_itr_prev == 1) || 2632 (tx_itr_prev >= IXGBE_100K_ITR)) 2633 need_reset = true; 2634 } else { 2635 if ((tx_itr_prev != 1) && 2636 (tx_itr_prev < IXGBE_100K_ITR)) 2637 need_reset = true; 2638 } 2639 2640 /* check the old value and enable RSC if necessary */ 2641 need_reset |= ixgbe_update_rsc(adapter); 2642 2643 for (i = 0; i < adapter->num_q_vectors; i++) { 2644 q_vector = adapter->q_vector[i]; 2645 if (q_vector->tx.count && !q_vector->rx.count) 2646 /* tx only */ 2647 q_vector->itr = tx_itr_param; 2648 else 2649 /* rx only or mixed */ 2650 q_vector->itr = rx_itr_param; 2651 ixgbe_write_eitr(q_vector); 2652 } 2653 2654 /* 2655 * do reset here at the end to make sure EITR==0 case is handled 2656 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings 2657 * also locks in RSC enable/disable which requires reset 2658 */ 2659 if (need_reset) 2660 ixgbe_do_reset(netdev); 2661 2662 return 0; 2663 } 2664 2665 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2666 struct ethtool_rxnfc *cmd) 2667 { 2668 union ixgbe_atr_input *mask = &adapter->fdir_mask; 2669 struct ethtool_rx_flow_spec *fsp = 2670 (struct ethtool_rx_flow_spec *)&cmd->fs; 2671 struct hlist_node *node2; 2672 struct ixgbe_fdir_filter *rule = NULL; 2673 2674 /* report total rule count */ 2675 cmd->data = (1024 << adapter->fdir_pballoc) - 2; 2676 2677 hlist_for_each_entry_safe(rule, node2, 2678 &adapter->fdir_filter_list, fdir_node) { 2679 if (fsp->location <= rule->sw_idx) 2680 break; 2681 } 2682 2683 if (!rule || fsp->location != rule->sw_idx) 2684 return -EINVAL; 2685 2686 /* fill out the flow spec entry */ 2687 2688 /* set flow type field */ 2689 switch (rule->filter.formatted.flow_type) { 2690 case IXGBE_ATR_FLOW_TYPE_TCPV4: 2691 fsp->flow_type = TCP_V4_FLOW; 2692 break; 2693 case IXGBE_ATR_FLOW_TYPE_UDPV4: 2694 fsp->flow_type = UDP_V4_FLOW; 2695 break; 2696 case IXGBE_ATR_FLOW_TYPE_SCTPV4: 2697 fsp->flow_type = SCTP_V4_FLOW; 2698 break; 2699 case IXGBE_ATR_FLOW_TYPE_IPV4: 2700 fsp->flow_type = IP_USER_FLOW; 2701 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2702 fsp->h_u.usr_ip4_spec.proto = 0; 2703 fsp->m_u.usr_ip4_spec.proto = 0; 2704 break; 2705 default: 2706 return -EINVAL; 2707 } 2708 2709 fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port; 2710 fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port; 2711 fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port; 2712 fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port; 2713 fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0]; 2714 fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0]; 2715 fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0]; 2716 fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0]; 2717 fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id; 2718 fsp->m_ext.vlan_tci = mask->formatted.vlan_id; 2719 fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes; 2720 fsp->m_ext.vlan_etype = mask->formatted.flex_bytes; 2721 fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool); 2722 fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool); 2723 fsp->flow_type |= FLOW_EXT; 2724 2725 /* record action */ 2726 if (rule->action == IXGBE_FDIR_DROP_QUEUE) 2727 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2728 else 2729 fsp->ring_cookie = rule->action; 2730 2731 return 0; 2732 } 2733 2734 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter, 2735 struct ethtool_rxnfc *cmd, 2736 u32 *rule_locs) 2737 { 2738 struct hlist_node *node2; 2739 struct ixgbe_fdir_filter *rule; 2740 int cnt = 0; 2741 2742 /* report total rule count */ 2743 cmd->data = (1024 << adapter->fdir_pballoc) - 2; 2744 2745 hlist_for_each_entry_safe(rule, node2, 2746 &adapter->fdir_filter_list, fdir_node) { 2747 if (cnt == cmd->rule_cnt) 2748 return -EMSGSIZE; 2749 rule_locs[cnt] = rule->sw_idx; 2750 cnt++; 2751 } 2752 2753 cmd->rule_cnt = cnt; 2754 2755 return 0; 2756 } 2757 2758 static int ixgbe_get_rxfh_fields(struct net_device *dev, 2759 struct ethtool_rxfh_fields *cmd) 2760 { 2761 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2762 2763 cmd->data = 0; 2764 2765 /* Report default options for RSS on ixgbe */ 2766 switch (cmd->flow_type) { 2767 case TCP_V4_FLOW: 2768 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2769 fallthrough; 2770 case UDP_V4_FLOW: 2771 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 2772 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2773 fallthrough; 2774 case SCTP_V4_FLOW: 2775 case AH_ESP_V4_FLOW: 2776 case AH_V4_FLOW: 2777 case ESP_V4_FLOW: 2778 case IPV4_FLOW: 2779 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2780 break; 2781 case TCP_V6_FLOW: 2782 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2783 fallthrough; 2784 case UDP_V6_FLOW: 2785 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 2786 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2787 fallthrough; 2788 case SCTP_V6_FLOW: 2789 case AH_ESP_V6_FLOW: 2790 case AH_V6_FLOW: 2791 case ESP_V6_FLOW: 2792 case IPV6_FLOW: 2793 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2794 break; 2795 default: 2796 return -EINVAL; 2797 } 2798 2799 return 0; 2800 } 2801 2802 static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter) 2803 { 2804 if (adapter->hw.mac.type < ixgbe_mac_X550) 2805 return 16; 2806 else 2807 return 64; 2808 } 2809 2810 static u32 ixgbe_get_rx_ring_count(struct net_device *dev) 2811 { 2812 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2813 2814 return min_t(u32, adapter->num_rx_queues, 2815 ixgbe_rss_indir_tbl_max(adapter)); 2816 } 2817 2818 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 2819 u32 *rule_locs) 2820 { 2821 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2822 int ret = -EOPNOTSUPP; 2823 2824 switch (cmd->cmd) { 2825 case ETHTOOL_GRXCLSRLCNT: 2826 cmd->rule_cnt = adapter->fdir_filter_count; 2827 ret = 0; 2828 break; 2829 case ETHTOOL_GRXCLSRULE: 2830 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd); 2831 break; 2832 case ETHTOOL_GRXCLSRLALL: 2833 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs); 2834 break; 2835 default: 2836 break; 2837 } 2838 2839 return ret; 2840 } 2841 2842 int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2843 struct ixgbe_fdir_filter *input, 2844 u16 sw_idx) 2845 { 2846 struct ixgbe_hw *hw = &adapter->hw; 2847 struct hlist_node *node2; 2848 struct ixgbe_fdir_filter *rule, *parent; 2849 int err = -EINVAL; 2850 2851 parent = NULL; 2852 rule = NULL; 2853 2854 hlist_for_each_entry_safe(rule, node2, 2855 &adapter->fdir_filter_list, fdir_node) { 2856 /* hash found, or no matching entry */ 2857 if (rule->sw_idx >= sw_idx) 2858 break; 2859 parent = rule; 2860 } 2861 2862 /* if there is an old rule occupying our place remove it */ 2863 if (rule && (rule->sw_idx == sw_idx)) { 2864 if (!input || (rule->filter.formatted.bkt_hash != 2865 input->filter.formatted.bkt_hash)) { 2866 err = ixgbe_fdir_erase_perfect_filter_82599(hw, 2867 &rule->filter, 2868 sw_idx); 2869 } 2870 2871 hlist_del(&rule->fdir_node); 2872 kfree(rule); 2873 adapter->fdir_filter_count--; 2874 } 2875 2876 /* 2877 * If no input this was a delete, err should be 0 if a rule was 2878 * successfully found and removed from the list else -EINVAL 2879 */ 2880 if (!input) 2881 return err; 2882 2883 /* initialize node and set software index */ 2884 INIT_HLIST_NODE(&input->fdir_node); 2885 2886 /* add filter to the list */ 2887 if (parent) 2888 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 2889 else 2890 hlist_add_head(&input->fdir_node, 2891 &adapter->fdir_filter_list); 2892 2893 /* update counts */ 2894 adapter->fdir_filter_count++; 2895 2896 return 0; 2897 } 2898 2899 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp, 2900 u8 *flow_type) 2901 { 2902 switch (fsp->flow_type & ~FLOW_EXT) { 2903 case TCP_V4_FLOW: 2904 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 2905 break; 2906 case UDP_V4_FLOW: 2907 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; 2908 break; 2909 case SCTP_V4_FLOW: 2910 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; 2911 break; 2912 case IP_USER_FLOW: 2913 switch (fsp->h_u.usr_ip4_spec.proto) { 2914 case IPPROTO_TCP: 2915 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 2916 break; 2917 case IPPROTO_UDP: 2918 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; 2919 break; 2920 case IPPROTO_SCTP: 2921 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; 2922 break; 2923 case 0: 2924 if (!fsp->m_u.usr_ip4_spec.proto) { 2925 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4; 2926 break; 2927 } 2928 fallthrough; 2929 default: 2930 return 0; 2931 } 2932 break; 2933 default: 2934 return 0; 2935 } 2936 2937 return 1; 2938 } 2939 2940 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2941 struct ethtool_rxnfc *cmd) 2942 { 2943 struct ethtool_rx_flow_spec *fsp = 2944 (struct ethtool_rx_flow_spec *)&cmd->fs; 2945 struct ixgbe_hw *hw = &adapter->hw; 2946 struct ixgbe_fdir_filter *input; 2947 union ixgbe_atr_input mask; 2948 u8 queue; 2949 int err; 2950 2951 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) 2952 return -EOPNOTSUPP; 2953 2954 /* ring_cookie is a masked into a set of queues and ixgbe pools or 2955 * we use the drop index. 2956 */ 2957 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 2958 queue = IXGBE_FDIR_DROP_QUEUE; 2959 } else { 2960 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 2961 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 2962 2963 if (!vf && (ring >= adapter->num_rx_queues)) 2964 return -EINVAL; 2965 else if (vf && 2966 ((vf > adapter->num_vfs) || 2967 ring >= adapter->num_rx_queues_per_pool)) 2968 return -EINVAL; 2969 2970 /* Map the ring onto the absolute queue index */ 2971 if (!vf) 2972 queue = adapter->rx_ring[ring]->reg_idx; 2973 else 2974 queue = ((vf - 1) * 2975 adapter->num_rx_queues_per_pool) + ring; 2976 } 2977 2978 /* Don't allow indexes to exist outside of available space */ 2979 if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) { 2980 e_err(drv, "Location out of range\n"); 2981 return -EINVAL; 2982 } 2983 2984 input = kzalloc(sizeof(*input), GFP_ATOMIC); 2985 if (!input) 2986 return -ENOMEM; 2987 2988 memset(&mask, 0, sizeof(union ixgbe_atr_input)); 2989 2990 /* set SW index */ 2991 input->sw_idx = fsp->location; 2992 2993 /* record flow type */ 2994 if (!ixgbe_flowspec_to_flow_type(fsp, 2995 &input->filter.formatted.flow_type)) { 2996 e_err(drv, "Unrecognized flow type\n"); 2997 goto err_out; 2998 } 2999 3000 mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | 3001 IXGBE_ATR_L4TYPE_MASK; 3002 3003 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4) 3004 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK; 3005 3006 /* Copy input into formatted structures */ 3007 input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src; 3008 mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src; 3009 input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst; 3010 mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst; 3011 input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc; 3012 mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc; 3013 input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst; 3014 mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst; 3015 3016 if (fsp->flow_type & FLOW_EXT) { 3017 input->filter.formatted.vm_pool = 3018 (unsigned char)ntohl(fsp->h_ext.data[1]); 3019 mask.formatted.vm_pool = 3020 (unsigned char)ntohl(fsp->m_ext.data[1]); 3021 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci; 3022 mask.formatted.vlan_id = fsp->m_ext.vlan_tci; 3023 input->filter.formatted.flex_bytes = 3024 fsp->h_ext.vlan_etype; 3025 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype; 3026 } 3027 3028 /* determine if we need to drop or route the packet */ 3029 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) 3030 input->action = IXGBE_FDIR_DROP_QUEUE; 3031 else 3032 input->action = fsp->ring_cookie; 3033 3034 spin_lock(&adapter->fdir_perfect_lock); 3035 3036 if (hlist_empty(&adapter->fdir_filter_list)) { 3037 /* save mask and program input mask into HW */ 3038 memcpy(&adapter->fdir_mask, &mask, sizeof(mask)); 3039 err = ixgbe_fdir_set_input_mask_82599(hw, &mask); 3040 if (err) { 3041 e_err(drv, "Error writing mask\n"); 3042 goto err_out_w_lock; 3043 } 3044 } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) { 3045 e_err(drv, "Only one mask supported per port\n"); 3046 goto err_out_w_lock; 3047 } 3048 3049 /* apply mask and compute/store hash */ 3050 ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask); 3051 3052 /* program filters to filter memory */ 3053 err = ixgbe_fdir_write_perfect_filter_82599(hw, 3054 &input->filter, input->sw_idx, queue); 3055 if (err) 3056 goto err_out_w_lock; 3057 3058 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx); 3059 3060 spin_unlock(&adapter->fdir_perfect_lock); 3061 3062 return err; 3063 err_out_w_lock: 3064 spin_unlock(&adapter->fdir_perfect_lock); 3065 err_out: 3066 kfree(input); 3067 return -EINVAL; 3068 } 3069 3070 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 3071 struct ethtool_rxnfc *cmd) 3072 { 3073 struct ethtool_rx_flow_spec *fsp = 3074 (struct ethtool_rx_flow_spec *)&cmd->fs; 3075 int err; 3076 3077 spin_lock(&adapter->fdir_perfect_lock); 3078 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location); 3079 spin_unlock(&adapter->fdir_perfect_lock); 3080 3081 return err; 3082 } 3083 3084 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \ 3085 IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 3086 static int ixgbe_set_rxfh_fields(struct net_device *dev, 3087 const struct ethtool_rxfh_fields *nfc, 3088 struct netlink_ext_ack *extack) 3089 { 3090 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3091 u32 flags2 = adapter->flags2; 3092 3093 /* 3094 * RSS does not support anything other than hashing 3095 * to queues on src and dst IPs and ports 3096 */ 3097 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3098 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3099 return -EINVAL; 3100 3101 switch (nfc->flow_type) { 3102 case TCP_V4_FLOW: 3103 case TCP_V6_FLOW: 3104 if (!(nfc->data & RXH_IP_SRC) || 3105 !(nfc->data & RXH_IP_DST) || 3106 !(nfc->data & RXH_L4_B_0_1) || 3107 !(nfc->data & RXH_L4_B_2_3)) 3108 return -EINVAL; 3109 break; 3110 case UDP_V4_FLOW: 3111 if (!(nfc->data & RXH_IP_SRC) || 3112 !(nfc->data & RXH_IP_DST)) 3113 return -EINVAL; 3114 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 3115 case 0: 3116 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; 3117 break; 3118 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 3119 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; 3120 break; 3121 default: 3122 return -EINVAL; 3123 } 3124 break; 3125 case UDP_V6_FLOW: 3126 if (!(nfc->data & RXH_IP_SRC) || 3127 !(nfc->data & RXH_IP_DST)) 3128 return -EINVAL; 3129 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 3130 case 0: 3131 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; 3132 break; 3133 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 3134 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; 3135 break; 3136 default: 3137 return -EINVAL; 3138 } 3139 break; 3140 case AH_ESP_V4_FLOW: 3141 case AH_V4_FLOW: 3142 case ESP_V4_FLOW: 3143 case SCTP_V4_FLOW: 3144 case AH_ESP_V6_FLOW: 3145 case AH_V6_FLOW: 3146 case ESP_V6_FLOW: 3147 case SCTP_V6_FLOW: 3148 if (!(nfc->data & RXH_IP_SRC) || 3149 !(nfc->data & RXH_IP_DST) || 3150 (nfc->data & RXH_L4_B_0_1) || 3151 (nfc->data & RXH_L4_B_2_3)) 3152 return -EINVAL; 3153 break; 3154 default: 3155 return -EINVAL; 3156 } 3157 3158 /* if we changed something we need to update flags */ 3159 if (flags2 != adapter->flags2) { 3160 struct ixgbe_hw *hw = &adapter->hw; 3161 u32 mrqc; 3162 unsigned int pf_pool = adapter->num_vfs; 3163 3164 if ((hw->mac.type >= ixgbe_mac_X550) && 3165 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 3166 mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool)); 3167 else 3168 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); 3169 3170 if ((flags2 & UDP_RSS_FLAGS) && 3171 !(adapter->flags2 & UDP_RSS_FLAGS)) 3172 e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n"); 3173 3174 adapter->flags2 = flags2; 3175 3176 /* Perform hash on these packet types */ 3177 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 3178 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP 3179 | IXGBE_MRQC_RSS_FIELD_IPV6 3180 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 3181 3182 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP | 3183 IXGBE_MRQC_RSS_FIELD_IPV6_UDP); 3184 3185 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 3186 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 3187 3188 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 3189 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 3190 3191 if ((hw->mac.type >= ixgbe_mac_X550) && 3192 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 3193 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc); 3194 else 3195 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 3196 } 3197 3198 return 0; 3199 } 3200 3201 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 3202 { 3203 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3204 int ret = -EOPNOTSUPP; 3205 3206 switch (cmd->cmd) { 3207 case ETHTOOL_SRXCLSRLINS: 3208 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd); 3209 break; 3210 case ETHTOOL_SRXCLSRLDEL: 3211 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd); 3212 break; 3213 default: 3214 break; 3215 } 3216 3217 return ret; 3218 } 3219 3220 static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev) 3221 { 3222 return IXGBE_RSS_KEY_SIZE; 3223 } 3224 3225 static u32 ixgbe_rss_indir_size(struct net_device *netdev) 3226 { 3227 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3228 3229 return ixgbe_rss_indir_tbl_entries(adapter); 3230 } 3231 3232 static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir) 3233 { 3234 int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter); 3235 u16 rss_m = adapter->ring_feature[RING_F_RSS].mask; 3236 3237 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 3238 rss_m = adapter->ring_feature[RING_F_RSS].indices - 1; 3239 3240 for (i = 0; i < reta_size; i++) 3241 indir[i] = adapter->rss_indir_tbl[i] & rss_m; 3242 } 3243 3244 static int ixgbe_get_rxfh(struct net_device *netdev, 3245 struct ethtool_rxfh_param *rxfh) 3246 { 3247 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3248 3249 rxfh->hfunc = ETH_RSS_HASH_TOP; 3250 3251 if (rxfh->indir) 3252 ixgbe_get_reta(adapter, rxfh->indir); 3253 3254 if (rxfh->key) 3255 memcpy(rxfh->key, adapter->rss_key, 3256 ixgbe_get_rxfh_key_size(netdev)); 3257 3258 return 0; 3259 } 3260 3261 static int ixgbe_set_rxfh(struct net_device *netdev, 3262 struct ethtool_rxfh_param *rxfh, 3263 struct netlink_ext_ack *extack) 3264 { 3265 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3266 int i; 3267 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 3268 3269 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE && 3270 rxfh->hfunc != ETH_RSS_HASH_TOP) 3271 return -EOPNOTSUPP; 3272 3273 /* Fill out the redirection table */ 3274 if (rxfh->indir) { 3275 int max_queues = min_t(int, adapter->num_rx_queues, 3276 ixgbe_rss_indir_tbl_max(adapter)); 3277 3278 /*Allow at least 2 queues w/ SR-IOV.*/ 3279 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && 3280 (max_queues < 2)) 3281 max_queues = 2; 3282 3283 /* Verify user input. */ 3284 for (i = 0; i < reta_entries; i++) 3285 if (rxfh->indir[i] >= max_queues) 3286 return -EINVAL; 3287 3288 for (i = 0; i < reta_entries; i++) 3289 adapter->rss_indir_tbl[i] = rxfh->indir[i]; 3290 3291 ixgbe_store_reta(adapter); 3292 } 3293 3294 /* Fill out the rss hash key */ 3295 if (rxfh->key) { 3296 memcpy(adapter->rss_key, rxfh->key, 3297 ixgbe_get_rxfh_key_size(netdev)); 3298 ixgbe_store_key(adapter); 3299 } 3300 3301 return 0; 3302 } 3303 3304 static int ixgbe_get_ts_info(struct net_device *dev, 3305 struct kernel_ethtool_ts_info *info) 3306 { 3307 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3308 3309 /* we always support timestamping disabled */ 3310 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE); 3311 3312 switch (adapter->hw.mac.type) { 3313 case ixgbe_mac_X550: 3314 case ixgbe_mac_X550EM_x: 3315 case ixgbe_mac_x550em_a: 3316 case ixgbe_mac_e610: 3317 info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL); 3318 break; 3319 case ixgbe_mac_X540: 3320 case ixgbe_mac_82599EB: 3321 info->rx_filters |= 3322 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 3323 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 3324 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); 3325 break; 3326 default: 3327 return ethtool_op_get_ts_info(dev, info); 3328 } 3329 3330 info->so_timestamping = 3331 SOF_TIMESTAMPING_TX_SOFTWARE | 3332 SOF_TIMESTAMPING_TX_HARDWARE | 3333 SOF_TIMESTAMPING_RX_HARDWARE | 3334 SOF_TIMESTAMPING_RAW_HARDWARE; 3335 3336 if (adapter->ptp_clock) 3337 info->phc_index = ptp_clock_index(adapter->ptp_clock); 3338 3339 info->tx_types = 3340 BIT(HWTSTAMP_TX_OFF) | 3341 BIT(HWTSTAMP_TX_ON); 3342 3343 return 0; 3344 } 3345 3346 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter) 3347 { 3348 unsigned int max_combined; 3349 u8 tcs = adapter->hw_tcs; 3350 3351 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { 3352 /* We only support one q_vector without MSI-X */ 3353 max_combined = 1; 3354 } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 3355 /* Limit value based on the queue mask */ 3356 max_combined = adapter->ring_feature[RING_F_RSS].mask + 1; 3357 } else if (tcs > 1) { 3358 /* For DCB report channels per traffic class */ 3359 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3360 /* 8 TC w/ 4 queues per TC */ 3361 max_combined = 4; 3362 } else if (tcs > 4) { 3363 /* 8 TC w/ 8 queues per TC */ 3364 max_combined = 8; 3365 } else { 3366 /* 4 TC w/ 16 queues per TC */ 3367 max_combined = 16; 3368 } 3369 } else if (adapter->atr_sample_rate) { 3370 /* support up to 64 queues with ATR */ 3371 max_combined = IXGBE_MAX_FDIR_INDICES; 3372 } else { 3373 /* support up to 16 queues with RSS */ 3374 max_combined = ixgbe_max_rss_indices(adapter); 3375 } 3376 3377 return min_t(int, max_combined, num_online_cpus()); 3378 } 3379 3380 static void ixgbe_get_channels(struct net_device *dev, 3381 struct ethtool_channels *ch) 3382 { 3383 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3384 3385 /* report maximum channels */ 3386 ch->max_combined = ixgbe_max_channels(adapter); 3387 3388 /* report info for other vector */ 3389 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 3390 ch->max_other = NON_Q_VECTORS; 3391 ch->other_count = NON_Q_VECTORS; 3392 } 3393 3394 /* record RSS queues */ 3395 ch->combined_count = adapter->ring_feature[RING_F_RSS].indices; 3396 3397 /* nothing else to report if RSS is disabled */ 3398 if (ch->combined_count == 1) 3399 return; 3400 3401 /* we do not support ATR queueing if SR-IOV is enabled */ 3402 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 3403 return; 3404 3405 /* same thing goes for being DCB enabled */ 3406 if (adapter->hw_tcs > 1) 3407 return; 3408 3409 /* if ATR is disabled we can exit */ 3410 if (!adapter->atr_sample_rate) 3411 return; 3412 3413 /* report flow director queues as maximum channels */ 3414 ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices; 3415 } 3416 3417 static int ixgbe_set_channels(struct net_device *dev, 3418 struct ethtool_channels *ch) 3419 { 3420 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3421 unsigned int count = ch->combined_count; 3422 u8 max_rss_indices = ixgbe_max_rss_indices(adapter); 3423 3424 /* verify they are not requesting separate vectors */ 3425 if (!count || ch->rx_count || ch->tx_count) 3426 return -EINVAL; 3427 3428 /* verify other_count has not changed */ 3429 if (ch->other_count != NON_Q_VECTORS) 3430 return -EINVAL; 3431 3432 /* verify the number of channels does not exceed hardware limits */ 3433 if (count > ixgbe_max_channels(adapter)) 3434 return -EINVAL; 3435 3436 /* update feature limits from largest to smallest supported values */ 3437 adapter->ring_feature[RING_F_FDIR].limit = count; 3438 3439 /* cap RSS limit */ 3440 if (count > max_rss_indices) 3441 count = max_rss_indices; 3442 adapter->ring_feature[RING_F_RSS].limit = count; 3443 3444 #ifdef IXGBE_FCOE 3445 /* cap FCoE limit at 8 */ 3446 if (count > IXGBE_FCRETA_SIZE) 3447 count = IXGBE_FCRETA_SIZE; 3448 adapter->ring_feature[RING_F_FCOE].limit = count; 3449 3450 #endif 3451 /* use setup TC to update any traffic class queue mapping */ 3452 return ixgbe_setup_tc(dev, adapter->hw_tcs); 3453 } 3454 3455 static int ixgbe_get_module_info(struct net_device *dev, 3456 struct ethtool_modinfo *modinfo) 3457 { 3458 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3459 struct ixgbe_hw *hw = &adapter->hw; 3460 u8 sff8472_rev, addr_mode; 3461 bool page_swap = false; 3462 int status; 3463 3464 if (hw->phy.type == ixgbe_phy_fw) 3465 return -ENXIO; 3466 3467 /* Check whether we support SFF-8472 or not */ 3468 status = hw->phy.ops.read_i2c_eeprom(hw, 3469 IXGBE_SFF_SFF_8472_COMP, 3470 &sff8472_rev); 3471 if (status) 3472 return -EIO; 3473 3474 /* addressing mode is not supported */ 3475 status = hw->phy.ops.read_i2c_eeprom(hw, 3476 IXGBE_SFF_SFF_8472_SWAP, 3477 &addr_mode); 3478 if (status) 3479 return -EIO; 3480 3481 if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) { 3482 e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n"); 3483 page_swap = true; 3484 } 3485 3486 if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap || 3487 !(addr_mode & IXGBE_SFF_DDM_IMPLEMENTED)) { 3488 /* We have a SFP, but it does not support SFF-8472 */ 3489 modinfo->type = ETH_MODULE_SFF_8079; 3490 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 3491 } else { 3492 /* We have a SFP which supports a revision of SFF-8472. */ 3493 modinfo->type = ETH_MODULE_SFF_8472; 3494 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 3495 } 3496 3497 return 0; 3498 } 3499 3500 static int ixgbe_get_module_eeprom(struct net_device *dev, 3501 struct ethtool_eeprom *ee, 3502 u8 *data) 3503 { 3504 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3505 struct ixgbe_hw *hw = &adapter->hw; 3506 int status = -EFAULT; 3507 u8 databyte = 0xFF; 3508 int i = 0; 3509 3510 if (ee->len == 0) 3511 return -EINVAL; 3512 3513 if (hw->phy.type == ixgbe_phy_fw) 3514 return -ENXIO; 3515 3516 for (i = ee->offset; i < ee->offset + ee->len; i++) { 3517 /* I2C reads can take long time */ 3518 if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 3519 return -EBUSY; 3520 3521 if (i < ETH_MODULE_SFF_8079_LEN) 3522 status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte); 3523 else 3524 status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte); 3525 3526 if (status) 3527 return -EIO; 3528 3529 data[i - ee->offset] = databyte; 3530 } 3531 3532 return 0; 3533 } 3534 3535 static const struct { 3536 ixgbe_link_speed mac_speed; 3537 u32 link_mode; 3538 } ixgbe_ls_map[] = { 3539 { IXGBE_LINK_SPEED_10_FULL, ETHTOOL_LINK_MODE_10baseT_Full_BIT }, 3540 { IXGBE_LINK_SPEED_100_FULL, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, 3541 { IXGBE_LINK_SPEED_1GB_FULL, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, 3542 { IXGBE_LINK_SPEED_2_5GB_FULL, ETHTOOL_LINK_MODE_2500baseX_Full_BIT }, 3543 { IXGBE_LINK_SPEED_10GB_FULL, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, 3544 }; 3545 3546 static const struct { 3547 u32 lp_advertised; 3548 u32 link_mode; 3549 } ixgbe_lp_map[] = { 3550 { FW_PHY_ACT_UD_2_100M_TX_EEE, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, 3551 { FW_PHY_ACT_UD_2_1G_T_EEE, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, 3552 { FW_PHY_ACT_UD_2_10G_T_EEE, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, 3553 { FW_PHY_ACT_UD_2_1G_KX_EEE, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT }, 3554 { FW_PHY_ACT_UD_2_10G_KX4_EEE, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT }, 3555 { FW_PHY_ACT_UD_2_10G_KR_EEE, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 3556 }; 3557 3558 static int 3559 ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_keee *edata) 3560 { 3561 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 3562 u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 }; 3563 struct ixgbe_hw *hw = &adapter->hw; 3564 int rc; 3565 u16 i; 3566 3567 rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info); 3568 if (rc) 3569 return rc; 3570 3571 for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) { 3572 if (info[0] & ixgbe_lp_map[i].lp_advertised) 3573 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3574 edata->lp_advertised); 3575 } 3576 3577 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { 3578 if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed) 3579 linkmode_set_bit(ixgbe_ls_map[i].link_mode, 3580 edata->supported); 3581 } 3582 3583 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { 3584 if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed) 3585 linkmode_set_bit(ixgbe_ls_map[i].link_mode, 3586 edata->advertised); 3587 } 3588 3589 edata->eee_enabled = !linkmode_empty(edata->advertised); 3590 edata->tx_lpi_enabled = edata->eee_enabled; 3591 3592 linkmode_and(common, edata->advertised, edata->lp_advertised); 3593 edata->eee_active = !linkmode_empty(common); 3594 3595 return 0; 3596 } 3597 3598 static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_keee *edata) 3599 { 3600 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3601 struct ixgbe_hw *hw = &adapter->hw; 3602 3603 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) 3604 return -EOPNOTSUPP; 3605 3606 if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw) 3607 return ixgbe_get_eee_fw(adapter, edata); 3608 3609 return -EOPNOTSUPP; 3610 } 3611 3612 static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_keee *edata) 3613 { 3614 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3615 struct ixgbe_hw *hw = &adapter->hw; 3616 struct ethtool_keee eee_data; 3617 int ret_val; 3618 3619 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) 3620 return -EOPNOTSUPP; 3621 3622 memset(&eee_data, 0, sizeof(struct ethtool_keee)); 3623 3624 ret_val = ixgbe_get_eee(netdev, &eee_data); 3625 if (ret_val) 3626 return ret_val; 3627 3628 if (eee_data.eee_enabled && !edata->eee_enabled) { 3629 if (eee_data.tx_lpi_enabled != edata->tx_lpi_enabled) { 3630 e_err(drv, "Setting EEE tx-lpi is not supported\n"); 3631 return -EINVAL; 3632 } 3633 3634 if (eee_data.tx_lpi_timer != edata->tx_lpi_timer) { 3635 e_err(drv, 3636 "Setting EEE Tx LPI timer is not supported\n"); 3637 return -EINVAL; 3638 } 3639 3640 if (!linkmode_equal(eee_data.advertised, edata->advertised)) { 3641 e_err(drv, 3642 "Setting EEE advertised speeds is not supported\n"); 3643 return -EINVAL; 3644 } 3645 } 3646 3647 if (eee_data.eee_enabled != edata->eee_enabled) { 3648 if (edata->eee_enabled) { 3649 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED; 3650 hw->phy.eee_speeds_advertised = 3651 hw->phy.eee_speeds_supported; 3652 } else { 3653 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED; 3654 hw->phy.eee_speeds_advertised = 0; 3655 } 3656 3657 /* reset link */ 3658 if (netif_running(netdev)) 3659 ixgbe_reinit_locked(adapter); 3660 else 3661 ixgbe_reset(adapter); 3662 } 3663 3664 return 0; 3665 } 3666 3667 static u32 ixgbe_get_priv_flags(struct net_device *netdev) 3668 { 3669 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3670 u32 priv_flags = 0; 3671 3672 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) 3673 priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX; 3674 3675 if (adapter->flags2 & IXGBE_FLAG2_VF_IPSEC_ENABLED) 3676 priv_flags |= IXGBE_PRIV_FLAGS_VF_IPSEC_EN; 3677 3678 if (adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF) 3679 priv_flags |= IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF; 3680 3681 return priv_flags; 3682 } 3683 3684 static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags) 3685 { 3686 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3687 unsigned int flags2 = adapter->flags2; 3688 unsigned int i; 3689 3690 flags2 &= ~IXGBE_FLAG2_RX_LEGACY; 3691 if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX) 3692 flags2 |= IXGBE_FLAG2_RX_LEGACY; 3693 3694 flags2 &= ~IXGBE_FLAG2_VF_IPSEC_ENABLED; 3695 if (priv_flags & IXGBE_PRIV_FLAGS_VF_IPSEC_EN) 3696 flags2 |= IXGBE_FLAG2_VF_IPSEC_ENABLED; 3697 3698 flags2 &= ~IXGBE_FLAG2_AUTO_DISABLE_VF; 3699 if (priv_flags & IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF) { 3700 if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 3701 /* Reset primary abort counter */ 3702 for (i = 0; i < adapter->num_vfs; i++) 3703 adapter->vfinfo[i].primary_abort_count = 0; 3704 3705 flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF; 3706 } else { 3707 e_info(probe, 3708 "Cannot set private flags: Operation not supported\n"); 3709 return -EOPNOTSUPP; 3710 } 3711 } 3712 3713 if (flags2 != adapter->flags2) { 3714 adapter->flags2 = flags2; 3715 3716 /* reset interface to repopulate queues */ 3717 if (netif_running(netdev)) 3718 ixgbe_reinit_locked(adapter); 3719 } 3720 3721 return 0; 3722 } 3723 3724 static const struct ethtool_ops ixgbe_ethtool_ops = { 3725 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 3726 .get_drvinfo = ixgbe_get_drvinfo, 3727 .get_regs_len = ixgbe_get_regs_len, 3728 .get_regs = ixgbe_get_regs, 3729 .get_wol = ixgbe_get_wol, 3730 .set_wol = ixgbe_set_wol, 3731 .nway_reset = ixgbe_nway_reset, 3732 .get_link = ethtool_op_get_link, 3733 .get_link_ext_stats = ixgbe_get_link_ext_stats, 3734 .get_eeprom_len = ixgbe_get_eeprom_len, 3735 .get_eeprom = ixgbe_get_eeprom, 3736 .set_eeprom = ixgbe_set_eeprom, 3737 .get_ringparam = ixgbe_get_ringparam, 3738 .set_ringparam = ixgbe_set_ringparam, 3739 .get_pause_stats = ixgbe_get_pause_stats, 3740 .get_pauseparam = ixgbe_get_pauseparam, 3741 .set_pauseparam = ixgbe_set_pauseparam, 3742 .get_msglevel = ixgbe_get_msglevel, 3743 .set_msglevel = ixgbe_set_msglevel, 3744 .self_test = ixgbe_diag_test, 3745 .get_strings = ixgbe_get_strings, 3746 .set_phys_id = ixgbe_set_phys_id, 3747 .get_sset_count = ixgbe_get_sset_count, 3748 .get_ethtool_stats = ixgbe_get_ethtool_stats, 3749 .get_coalesce = ixgbe_get_coalesce, 3750 .set_coalesce = ixgbe_set_coalesce, 3751 .get_rx_ring_count = ixgbe_get_rx_ring_count, 3752 .get_rxnfc = ixgbe_get_rxnfc, 3753 .set_rxnfc = ixgbe_set_rxnfc, 3754 .get_rxfh_indir_size = ixgbe_rss_indir_size, 3755 .get_rxfh_key_size = ixgbe_get_rxfh_key_size, 3756 .get_rxfh = ixgbe_get_rxfh, 3757 .set_rxfh = ixgbe_set_rxfh, 3758 .get_rxfh_fields = ixgbe_get_rxfh_fields, 3759 .set_rxfh_fields = ixgbe_set_rxfh_fields, 3760 .get_eee = ixgbe_get_eee, 3761 .set_eee = ixgbe_set_eee, 3762 .get_channels = ixgbe_get_channels, 3763 .set_channels = ixgbe_set_channels, 3764 .get_priv_flags = ixgbe_get_priv_flags, 3765 .set_priv_flags = ixgbe_set_priv_flags, 3766 .get_ts_info = ixgbe_get_ts_info, 3767 .get_module_info = ixgbe_get_module_info, 3768 .get_module_eeprom = ixgbe_get_module_eeprom, 3769 .get_link_ksettings = ixgbe_get_link_ksettings, 3770 .set_link_ksettings = ixgbe_set_link_ksettings, 3771 }; 3772 3773 static const struct ethtool_ops ixgbe_ethtool_ops_e610 = { 3774 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 3775 .get_drvinfo = ixgbe_get_drvinfo, 3776 .get_regs_len = ixgbe_get_regs_len, 3777 .get_regs = ixgbe_get_regs, 3778 .get_wol = ixgbe_get_wol, 3779 .set_wol = ixgbe_set_wol_e610, 3780 .nway_reset = ixgbe_nway_reset, 3781 .get_link = ethtool_op_get_link, 3782 .get_link_ext_stats = ixgbe_get_link_ext_stats, 3783 .get_eeprom_len = ixgbe_get_eeprom_len, 3784 .get_eeprom = ixgbe_get_eeprom, 3785 .set_eeprom = ixgbe_set_eeprom, 3786 .get_ringparam = ixgbe_get_ringparam, 3787 .set_ringparam = ixgbe_set_ringparam, 3788 .get_pause_stats = ixgbe_get_pause_stats, 3789 .get_pauseparam = ixgbe_get_pauseparam, 3790 .set_pauseparam = ixgbe_set_pauseparam_e610, 3791 .get_msglevel = ixgbe_get_msglevel, 3792 .set_msglevel = ixgbe_set_msglevel, 3793 .self_test = ixgbe_diag_test, 3794 .get_strings = ixgbe_get_strings, 3795 .set_phys_id = ixgbe_set_phys_id_e610, 3796 .get_sset_count = ixgbe_get_sset_count, 3797 .get_ethtool_stats = ixgbe_get_ethtool_stats, 3798 .get_coalesce = ixgbe_get_coalesce, 3799 .set_coalesce = ixgbe_set_coalesce, 3800 .get_rx_ring_count = ixgbe_get_rx_ring_count, 3801 .get_rxnfc = ixgbe_get_rxnfc, 3802 .set_rxnfc = ixgbe_set_rxnfc, 3803 .get_rxfh_indir_size = ixgbe_rss_indir_size, 3804 .get_rxfh_key_size = ixgbe_get_rxfh_key_size, 3805 .get_rxfh = ixgbe_get_rxfh, 3806 .set_rxfh = ixgbe_set_rxfh, 3807 .get_rxfh_fields = ixgbe_get_rxfh_fields, 3808 .set_rxfh_fields = ixgbe_set_rxfh_fields, 3809 .get_eee = ixgbe_get_eee, 3810 .set_eee = ixgbe_set_eee, 3811 .get_channels = ixgbe_get_channels, 3812 .set_channels = ixgbe_set_channels, 3813 .get_priv_flags = ixgbe_get_priv_flags, 3814 .set_priv_flags = ixgbe_set_priv_flags, 3815 .get_ts_info = ixgbe_get_ts_info, 3816 .get_module_info = ixgbe_get_module_info, 3817 .get_module_eeprom = ixgbe_get_module_eeprom, 3818 .get_link_ksettings = ixgbe_get_link_ksettings, 3819 .set_link_ksettings = ixgbe_set_link_ksettings, 3820 }; 3821 3822 void ixgbe_set_ethtool_ops(struct net_device *netdev) 3823 { 3824 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3825 3826 if (adapter->hw.mac.type == ixgbe_mac_e610) 3827 netdev->ethtool_ops = &ixgbe_ethtool_ops_e610; 3828 else 3829 netdev->ethtool_ops = &ixgbe_ethtool_ops; 3830 } 3831