1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2024 Intel Corporation. */ 3 4 /* ethtool support for ixgbe */ 5 6 #include <linux/interrupt.h> 7 #include <linux/types.h> 8 #include <linux/module.h> 9 #include <linux/slab.h> 10 #include <linux/pci.h> 11 #include <linux/netdevice.h> 12 #include <linux/ethtool.h> 13 #include <linux/vmalloc.h> 14 #include <linux/highmem.h> 15 #include <linux/uaccess.h> 16 17 #include "ixgbe.h" 18 #include "ixgbe_phy.h" 19 20 21 enum {NETDEV_STATS, IXGBE_STATS}; 22 23 struct ixgbe_stats { 24 char stat_string[ETH_GSTRING_LEN]; 25 int type; 26 int sizeof_stat; 27 int stat_offset; 28 }; 29 30 #define IXGBE_STAT(m) IXGBE_STATS, \ 31 sizeof(((struct ixgbe_adapter *)0)->m), \ 32 offsetof(struct ixgbe_adapter, m) 33 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \ 34 sizeof(((struct rtnl_link_stats64 *)0)->m), \ 35 offsetof(struct rtnl_link_stats64, m) 36 37 static const struct ixgbe_stats ixgbe_gstrings_stats[] = { 38 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)}, 39 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)}, 40 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)}, 41 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)}, 42 {"rx_pkts_nic", IXGBE_STAT(stats.gprc)}, 43 {"tx_pkts_nic", IXGBE_STAT(stats.gptc)}, 44 {"rx_bytes_nic", IXGBE_STAT(stats.gorc)}, 45 {"tx_bytes_nic", IXGBE_STAT(stats.gotc)}, 46 {"lsc_int", IXGBE_STAT(lsc_int)}, 47 {"tx_busy", IXGBE_STAT(tx_busy)}, 48 {"non_eop_descs", IXGBE_STAT(non_eop_descs)}, 49 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)}, 50 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)}, 51 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)}, 52 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)}, 53 {"multicast", IXGBE_NETDEV_STAT(multicast)}, 54 {"broadcast", IXGBE_STAT(stats.bprc)}, 55 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) }, 56 {"collisions", IXGBE_NETDEV_STAT(collisions)}, 57 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)}, 58 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)}, 59 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)}, 60 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)}, 61 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)}, 62 {"fdir_match", IXGBE_STAT(stats.fdirmatch)}, 63 {"fdir_miss", IXGBE_STAT(stats.fdirmiss)}, 64 {"fdir_overflow", IXGBE_STAT(fdir_overflow)}, 65 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)}, 66 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)}, 67 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)}, 68 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)}, 69 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)}, 70 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)}, 71 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)}, 72 {"tx_restart_queue", IXGBE_STAT(restart_queue)}, 73 {"rx_length_errors", IXGBE_STAT(stats.rlec)}, 74 {"rx_long_length_errors", IXGBE_STAT(stats.roc)}, 75 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)}, 76 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)}, 77 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)}, 78 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)}, 79 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)}, 80 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)}, 81 {"alloc_rx_page", IXGBE_STAT(alloc_rx_page)}, 82 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)}, 83 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)}, 84 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)}, 85 {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)}, 86 {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)}, 87 {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)}, 88 {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)}, 89 {"tx_hwtstamp_timeouts", IXGBE_STAT(tx_hwtstamp_timeouts)}, 90 {"tx_hwtstamp_skipped", IXGBE_STAT(tx_hwtstamp_skipped)}, 91 {"rx_hwtstamp_cleared", IXGBE_STAT(rx_hwtstamp_cleared)}, 92 {"tx_ipsec", IXGBE_STAT(tx_ipsec)}, 93 {"rx_ipsec", IXGBE_STAT(rx_ipsec)}, 94 #ifdef IXGBE_FCOE 95 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)}, 96 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)}, 97 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)}, 98 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)}, 99 {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)}, 100 {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)}, 101 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)}, 102 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)}, 103 #endif /* IXGBE_FCOE */ 104 }; 105 106 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so 107 * we set the num_rx_queues to evaluate to num_tx_queues. This is 108 * used because we do not have a good way to get the max number of 109 * rx queues with CONFIG_RPS disabled. 110 */ 111 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues 112 113 #define IXGBE_QUEUE_STATS_LEN ( \ 114 (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \ 115 (sizeof(struct ixgbe_queue_stats) / sizeof(u64))) 116 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats) 117 #define IXGBE_PB_STATS_LEN ( \ 118 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \ 119 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \ 120 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \ 121 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \ 122 / sizeof(u64)) 123 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \ 124 IXGBE_PB_STATS_LEN + \ 125 IXGBE_QUEUE_STATS_LEN) 126 127 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = { 128 "Register test (offline)", "Eeprom test (offline)", 129 "Interrupt test (offline)", "Loopback test (offline)", 130 "Link test (on/offline)" 131 }; 132 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN 133 134 static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = { 135 #define IXGBE_PRIV_FLAGS_LEGACY_RX BIT(0) 136 "legacy-rx", 137 #define IXGBE_PRIV_FLAGS_VF_IPSEC_EN BIT(1) 138 "vf-ipsec", 139 #define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF BIT(2) 140 "mdd-disable-vf", 141 }; 142 143 #define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings) 144 145 #define ixgbe_isbackplane(type) ((type) == ixgbe_media_type_backplane) 146 147 static void ixgbe_set_supported_10gtypes(struct ixgbe_hw *hw, 148 struct ethtool_link_ksettings *cmd) 149 { 150 if (!ixgbe_isbackplane(hw->phy.media_type)) { 151 ethtool_link_ksettings_add_link_mode(cmd, supported, 152 10000baseT_Full); 153 return; 154 } 155 156 switch (hw->device_id) { 157 case IXGBE_DEV_ID_82598: 158 case IXGBE_DEV_ID_82599_KX4: 159 case IXGBE_DEV_ID_82599_KX4_MEZZ: 160 case IXGBE_DEV_ID_X550EM_X_KX4: 161 ethtool_link_ksettings_add_link_mode 162 (cmd, supported, 10000baseKX4_Full); 163 break; 164 case IXGBE_DEV_ID_82598_BX: 165 case IXGBE_DEV_ID_82599_KR: 166 case IXGBE_DEV_ID_X550EM_X_KR: 167 case IXGBE_DEV_ID_X550EM_X_XFI: 168 ethtool_link_ksettings_add_link_mode 169 (cmd, supported, 10000baseKR_Full); 170 break; 171 default: 172 ethtool_link_ksettings_add_link_mode 173 (cmd, supported, 10000baseKX4_Full); 174 ethtool_link_ksettings_add_link_mode 175 (cmd, supported, 10000baseKR_Full); 176 break; 177 } 178 } 179 180 static void ixgbe_set_advertising_10gtypes(struct ixgbe_hw *hw, 181 struct ethtool_link_ksettings *cmd) 182 { 183 if (!ixgbe_isbackplane(hw->phy.media_type)) { 184 ethtool_link_ksettings_add_link_mode(cmd, advertising, 185 10000baseT_Full); 186 return; 187 } 188 189 switch (hw->device_id) { 190 case IXGBE_DEV_ID_82598: 191 case IXGBE_DEV_ID_82599_KX4: 192 case IXGBE_DEV_ID_82599_KX4_MEZZ: 193 case IXGBE_DEV_ID_X550EM_X_KX4: 194 ethtool_link_ksettings_add_link_mode 195 (cmd, advertising, 10000baseKX4_Full); 196 break; 197 case IXGBE_DEV_ID_82598_BX: 198 case IXGBE_DEV_ID_82599_KR: 199 case IXGBE_DEV_ID_X550EM_X_KR: 200 case IXGBE_DEV_ID_X550EM_X_XFI: 201 ethtool_link_ksettings_add_link_mode 202 (cmd, advertising, 10000baseKR_Full); 203 break; 204 default: 205 ethtool_link_ksettings_add_link_mode 206 (cmd, advertising, 10000baseKX4_Full); 207 ethtool_link_ksettings_add_link_mode 208 (cmd, advertising, 10000baseKR_Full); 209 break; 210 } 211 } 212 213 static int ixgbe_get_link_ksettings(struct net_device *netdev, 214 struct ethtool_link_ksettings *cmd) 215 { 216 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 217 struct ixgbe_hw *hw = &adapter->hw; 218 ixgbe_link_speed supported_link; 219 bool autoneg = false; 220 221 ethtool_link_ksettings_zero_link_mode(cmd, supported); 222 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 223 224 hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg); 225 226 /* set the supported link speeds */ 227 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) { 228 ixgbe_set_supported_10gtypes(hw, cmd); 229 ixgbe_set_advertising_10gtypes(hw, cmd); 230 } 231 if (supported_link & IXGBE_LINK_SPEED_5GB_FULL) 232 ethtool_link_ksettings_add_link_mode(cmd, supported, 233 5000baseT_Full); 234 235 if (supported_link & IXGBE_LINK_SPEED_2_5GB_FULL) 236 ethtool_link_ksettings_add_link_mode(cmd, supported, 237 2500baseT_Full); 238 239 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL) { 240 if (ixgbe_isbackplane(hw->phy.media_type)) { 241 ethtool_link_ksettings_add_link_mode(cmd, supported, 242 1000baseKX_Full); 243 ethtool_link_ksettings_add_link_mode(cmd, advertising, 244 1000baseKX_Full); 245 } else { 246 ethtool_link_ksettings_add_link_mode(cmd, supported, 247 1000baseT_Full); 248 ethtool_link_ksettings_add_link_mode(cmd, advertising, 249 1000baseT_Full); 250 } 251 } 252 if (supported_link & IXGBE_LINK_SPEED_100_FULL) { 253 ethtool_link_ksettings_add_link_mode(cmd, supported, 254 100baseT_Full); 255 ethtool_link_ksettings_add_link_mode(cmd, advertising, 256 100baseT_Full); 257 } 258 if (supported_link & IXGBE_LINK_SPEED_10_FULL) { 259 ethtool_link_ksettings_add_link_mode(cmd, supported, 260 10baseT_Full); 261 ethtool_link_ksettings_add_link_mode(cmd, advertising, 262 10baseT_Full); 263 } 264 265 /* set the advertised speeds */ 266 if (hw->phy.autoneg_advertised) { 267 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 268 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL) 269 ethtool_link_ksettings_add_link_mode(cmd, advertising, 270 10baseT_Full); 271 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) 272 ethtool_link_ksettings_add_link_mode(cmd, advertising, 273 100baseT_Full); 274 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) 275 ixgbe_set_advertising_10gtypes(hw, cmd); 276 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) { 277 if (ethtool_link_ksettings_test_link_mode 278 (cmd, supported, 1000baseKX_Full)) 279 ethtool_link_ksettings_add_link_mode 280 (cmd, advertising, 1000baseKX_Full); 281 else 282 ethtool_link_ksettings_add_link_mode 283 (cmd, advertising, 1000baseT_Full); 284 } 285 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) 286 ethtool_link_ksettings_add_link_mode(cmd, advertising, 287 5000baseT_Full); 288 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) 289 ethtool_link_ksettings_add_link_mode(cmd, advertising, 290 2500baseT_Full); 291 } else { 292 if (hw->phy.multispeed_fiber && !autoneg) { 293 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) 294 ethtool_link_ksettings_add_link_mode 295 (cmd, advertising, 10000baseT_Full); 296 } 297 } 298 299 if (autoneg) { 300 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 301 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 302 cmd->base.autoneg = AUTONEG_ENABLE; 303 } else 304 cmd->base.autoneg = AUTONEG_DISABLE; 305 306 /* Determine the remaining settings based on the PHY type. */ 307 switch (adapter->hw.phy.type) { 308 case ixgbe_phy_tn: 309 case ixgbe_phy_aq: 310 case ixgbe_phy_x550em_ext_t: 311 case ixgbe_phy_fw: 312 case ixgbe_phy_cu_unknown: 313 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 314 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 315 cmd->base.port = PORT_TP; 316 break; 317 case ixgbe_phy_qt: 318 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 319 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 320 cmd->base.port = PORT_FIBRE; 321 break; 322 case ixgbe_phy_nl: 323 case ixgbe_phy_sfp_passive_tyco: 324 case ixgbe_phy_sfp_passive_unknown: 325 case ixgbe_phy_sfp_ftl: 326 case ixgbe_phy_sfp_avago: 327 case ixgbe_phy_sfp_intel: 328 case ixgbe_phy_sfp_unknown: 329 case ixgbe_phy_qsfp_passive_unknown: 330 case ixgbe_phy_qsfp_active_unknown: 331 case ixgbe_phy_qsfp_intel: 332 case ixgbe_phy_qsfp_unknown: 333 /* SFP+ devices, further checking needed */ 334 switch (adapter->hw.phy.sfp_type) { 335 case ixgbe_sfp_type_da_cu: 336 case ixgbe_sfp_type_da_cu_core0: 337 case ixgbe_sfp_type_da_cu_core1: 338 ethtool_link_ksettings_add_link_mode(cmd, supported, 339 FIBRE); 340 ethtool_link_ksettings_add_link_mode(cmd, advertising, 341 FIBRE); 342 cmd->base.port = PORT_DA; 343 break; 344 case ixgbe_sfp_type_sr: 345 case ixgbe_sfp_type_lr: 346 case ixgbe_sfp_type_srlr_core0: 347 case ixgbe_sfp_type_srlr_core1: 348 case ixgbe_sfp_type_1g_sx_core0: 349 case ixgbe_sfp_type_1g_sx_core1: 350 case ixgbe_sfp_type_1g_lx_core0: 351 case ixgbe_sfp_type_1g_lx_core1: 352 case ixgbe_sfp_type_1g_bx_core0: 353 case ixgbe_sfp_type_1g_bx_core1: 354 ethtool_link_ksettings_add_link_mode(cmd, supported, 355 FIBRE); 356 ethtool_link_ksettings_add_link_mode(cmd, advertising, 357 FIBRE); 358 cmd->base.port = PORT_FIBRE; 359 break; 360 case ixgbe_sfp_type_not_present: 361 ethtool_link_ksettings_add_link_mode(cmd, supported, 362 FIBRE); 363 ethtool_link_ksettings_add_link_mode(cmd, advertising, 364 FIBRE); 365 cmd->base.port = PORT_NONE; 366 break; 367 case ixgbe_sfp_type_1g_cu_core0: 368 case ixgbe_sfp_type_1g_cu_core1: 369 ethtool_link_ksettings_add_link_mode(cmd, supported, 370 TP); 371 ethtool_link_ksettings_add_link_mode(cmd, advertising, 372 TP); 373 cmd->base.port = PORT_TP; 374 break; 375 case ixgbe_sfp_type_unknown: 376 default: 377 ethtool_link_ksettings_add_link_mode(cmd, supported, 378 FIBRE); 379 ethtool_link_ksettings_add_link_mode(cmd, advertising, 380 FIBRE); 381 cmd->base.port = PORT_OTHER; 382 break; 383 } 384 break; 385 case ixgbe_phy_xaui: 386 ethtool_link_ksettings_add_link_mode(cmd, supported, 387 FIBRE); 388 ethtool_link_ksettings_add_link_mode(cmd, advertising, 389 FIBRE); 390 cmd->base.port = PORT_NONE; 391 break; 392 case ixgbe_phy_unknown: 393 case ixgbe_phy_generic: 394 case ixgbe_phy_sfp_unsupported: 395 default: 396 ethtool_link_ksettings_add_link_mode(cmd, supported, 397 FIBRE); 398 ethtool_link_ksettings_add_link_mode(cmd, advertising, 399 FIBRE); 400 cmd->base.port = PORT_OTHER; 401 break; 402 } 403 404 /* Indicate pause support */ 405 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); 406 407 switch (hw->fc.requested_mode) { 408 case ixgbe_fc_full: 409 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); 410 break; 411 case ixgbe_fc_rx_pause: 412 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); 413 ethtool_link_ksettings_add_link_mode(cmd, advertising, 414 Asym_Pause); 415 break; 416 case ixgbe_fc_tx_pause: 417 ethtool_link_ksettings_add_link_mode(cmd, advertising, 418 Asym_Pause); 419 break; 420 default: 421 ethtool_link_ksettings_del_link_mode(cmd, advertising, Pause); 422 ethtool_link_ksettings_del_link_mode(cmd, advertising, 423 Asym_Pause); 424 } 425 426 if (netif_carrier_ok(netdev)) { 427 switch (adapter->link_speed) { 428 case IXGBE_LINK_SPEED_10GB_FULL: 429 cmd->base.speed = SPEED_10000; 430 break; 431 case IXGBE_LINK_SPEED_5GB_FULL: 432 cmd->base.speed = SPEED_5000; 433 break; 434 case IXGBE_LINK_SPEED_2_5GB_FULL: 435 cmd->base.speed = SPEED_2500; 436 break; 437 case IXGBE_LINK_SPEED_1GB_FULL: 438 cmd->base.speed = SPEED_1000; 439 break; 440 case IXGBE_LINK_SPEED_100_FULL: 441 cmd->base.speed = SPEED_100; 442 break; 443 case IXGBE_LINK_SPEED_10_FULL: 444 cmd->base.speed = SPEED_10; 445 break; 446 default: 447 break; 448 } 449 cmd->base.duplex = DUPLEX_FULL; 450 } else { 451 cmd->base.speed = SPEED_UNKNOWN; 452 cmd->base.duplex = DUPLEX_UNKNOWN; 453 } 454 455 return 0; 456 } 457 458 static int ixgbe_set_link_ksettings(struct net_device *netdev, 459 const struct ethtool_link_ksettings *cmd) 460 { 461 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 462 struct ixgbe_hw *hw = &adapter->hw; 463 u32 advertised, old; 464 int err = 0; 465 466 if ((hw->phy.media_type == ixgbe_media_type_copper) || 467 (hw->phy.multispeed_fiber)) { 468 /* 469 * this function does not support duplex forcing, but can 470 * limit the advertising of the adapter to the specified speed 471 */ 472 if (!linkmode_subset(cmd->link_modes.advertising, 473 cmd->link_modes.supported)) 474 return -EINVAL; 475 476 /* only allow one speed at a time if no autoneg */ 477 if (!cmd->base.autoneg && hw->phy.multispeed_fiber) { 478 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 479 10000baseT_Full) && 480 ethtool_link_ksettings_test_link_mode(cmd, advertising, 481 1000baseT_Full)) 482 return -EINVAL; 483 } 484 485 old = hw->phy.autoneg_advertised; 486 advertised = 0; 487 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 488 10000baseT_Full)) 489 advertised |= IXGBE_LINK_SPEED_10GB_FULL; 490 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 491 5000baseT_Full)) 492 advertised |= IXGBE_LINK_SPEED_5GB_FULL; 493 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 494 2500baseT_Full)) 495 advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; 496 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 497 1000baseT_Full)) 498 advertised |= IXGBE_LINK_SPEED_1GB_FULL; 499 500 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 501 100baseT_Full)) 502 advertised |= IXGBE_LINK_SPEED_100_FULL; 503 504 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 505 10baseT_Full)) 506 advertised |= IXGBE_LINK_SPEED_10_FULL; 507 508 if (old == advertised) 509 return err; 510 /* this sets the link speed and restarts auto-neg */ 511 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 512 usleep_range(1000, 2000); 513 514 hw->mac.autotry_restart = true; 515 err = hw->mac.ops.setup_link(hw, advertised, true); 516 if (err) { 517 e_info(probe, "setup link failed with code %d\n", err); 518 hw->mac.ops.setup_link(hw, old, true); 519 } 520 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 521 } else { 522 /* in this case we currently only support 10Gb/FULL */ 523 u32 speed = cmd->base.speed; 524 525 if ((cmd->base.autoneg == AUTONEG_ENABLE) || 526 (!ethtool_link_ksettings_test_link_mode(cmd, advertising, 527 10000baseT_Full)) || 528 (speed + cmd->base.duplex != SPEED_10000 + DUPLEX_FULL)) 529 return -EINVAL; 530 } 531 532 return err; 533 } 534 535 static void ixgbe_get_pause_stats(struct net_device *netdev, 536 struct ethtool_pause_stats *stats) 537 { 538 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 539 struct ixgbe_hw_stats *hwstats = &adapter->stats; 540 541 stats->tx_pause_frames = hwstats->lxontxc + hwstats->lxofftxc; 542 stats->rx_pause_frames = hwstats->lxonrxc + hwstats->lxoffrxc; 543 } 544 545 static void ixgbe_get_pauseparam(struct net_device *netdev, 546 struct ethtool_pauseparam *pause) 547 { 548 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 549 struct ixgbe_hw *hw = &adapter->hw; 550 551 if (ixgbe_device_supports_autoneg_fc(hw) && 552 !hw->fc.disable_fc_autoneg) 553 pause->autoneg = 1; 554 else 555 pause->autoneg = 0; 556 557 if (hw->fc.current_mode == ixgbe_fc_rx_pause) { 558 pause->rx_pause = 1; 559 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) { 560 pause->tx_pause = 1; 561 } else if (hw->fc.current_mode == ixgbe_fc_full) { 562 pause->rx_pause = 1; 563 pause->tx_pause = 1; 564 } 565 } 566 567 static int ixgbe_set_pauseparam(struct net_device *netdev, 568 struct ethtool_pauseparam *pause) 569 { 570 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 571 struct ixgbe_hw *hw = &adapter->hw; 572 struct ixgbe_fc_info fc = hw->fc; 573 574 /* 82598 does no support link flow control with DCB enabled */ 575 if ((hw->mac.type == ixgbe_mac_82598EB) && 576 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)) 577 return -EINVAL; 578 579 /* some devices do not support autoneg of link flow control */ 580 if ((pause->autoneg == AUTONEG_ENABLE) && 581 !ixgbe_device_supports_autoneg_fc(hw)) 582 return -EINVAL; 583 584 fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE); 585 586 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg) 587 fc.requested_mode = ixgbe_fc_full; 588 else if (pause->rx_pause && !pause->tx_pause) 589 fc.requested_mode = ixgbe_fc_rx_pause; 590 else if (!pause->rx_pause && pause->tx_pause) 591 fc.requested_mode = ixgbe_fc_tx_pause; 592 else 593 fc.requested_mode = ixgbe_fc_none; 594 595 /* if the thing changed then we'll update and use new autoneg */ 596 if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) { 597 hw->fc = fc; 598 if (netif_running(netdev)) 599 ixgbe_reinit_locked(adapter); 600 else 601 ixgbe_reset(adapter); 602 } 603 604 return 0; 605 } 606 607 static u32 ixgbe_get_msglevel(struct net_device *netdev) 608 { 609 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 610 return adapter->msg_enable; 611 } 612 613 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data) 614 { 615 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 616 adapter->msg_enable = data; 617 } 618 619 static int ixgbe_get_regs_len(struct net_device *netdev) 620 { 621 #define IXGBE_REGS_LEN 1145 622 return IXGBE_REGS_LEN * sizeof(u32); 623 } 624 625 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_ 626 627 static void ixgbe_get_regs(struct net_device *netdev, 628 struct ethtool_regs *regs, void *p) 629 { 630 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 631 struct ixgbe_hw *hw = &adapter->hw; 632 u32 *regs_buff = p; 633 u8 i; 634 635 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32)); 636 637 regs->version = hw->mac.type << 24 | hw->revision_id << 16 | 638 hw->device_id; 639 640 /* General Registers */ 641 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL); 642 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS); 643 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 644 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP); 645 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP); 646 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 647 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER); 648 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER); 649 650 /* NVM Register */ 651 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); 652 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD); 653 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw)); 654 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL); 655 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA); 656 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL); 657 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA); 658 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT); 659 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP); 660 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw)); 661 662 /* Interrupt */ 663 /* don't read EICR because it can clear interrupt causes, instead 664 * read EICS which is a shadow but doesn't clear EICR */ 665 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS); 666 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS); 667 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS); 668 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC); 669 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC); 670 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM); 671 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0)); 672 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0)); 673 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT); 674 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA); 675 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0)); 676 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE); 677 678 /* Flow Control */ 679 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP); 680 for (i = 0; i < 4; i++) 681 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_FCTTV(i)); 682 for (i = 0; i < 8; i++) { 683 switch (hw->mac.type) { 684 case ixgbe_mac_82598EB: 685 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i)); 686 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i)); 687 break; 688 case ixgbe_mac_82599EB: 689 case ixgbe_mac_X540: 690 case ixgbe_mac_X550: 691 case ixgbe_mac_X550EM_x: 692 case ixgbe_mac_x550em_a: 693 case ixgbe_mac_e610: 694 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i)); 695 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i)); 696 break; 697 default: 698 break; 699 } 700 } 701 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV); 702 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS); 703 704 /* Receive DMA */ 705 for (i = 0; i < 64; i++) 706 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i)); 707 for (i = 0; i < 64; i++) 708 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i)); 709 for (i = 0; i < 64; i++) 710 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i)); 711 for (i = 0; i < 64; i++) 712 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i)); 713 for (i = 0; i < 64; i++) 714 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i)); 715 for (i = 0; i < 64; i++) 716 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); 717 for (i = 0; i < 16; i++) 718 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); 719 for (i = 0; i < 16; i++) 720 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); 721 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 722 for (i = 0; i < 8; i++) 723 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)); 724 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 725 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN); 726 727 /* Receive */ 728 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 729 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL); 730 for (i = 0; i < 16; i++) 731 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i)); 732 for (i = 0; i < 16; i++) 733 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i)); 734 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0)); 735 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL); 736 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 737 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL); 738 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC); 739 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); 740 for (i = 0; i < 8; i++) 741 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i)); 742 for (i = 0; i < 8; i++) 743 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i)); 744 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP); 745 746 /* Transmit */ 747 for (i = 0; i < 32; i++) 748 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i)); 749 for (i = 0; i < 32; i++) 750 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i)); 751 for (i = 0; i < 32; i++) 752 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i)); 753 for (i = 0; i < 32; i++) 754 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i)); 755 for (i = 0; i < 32; i++) 756 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i)); 757 for (i = 0; i < 32; i++) 758 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i)); 759 for (i = 0; i < 32; i++) 760 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i)); 761 for (i = 0; i < 32; i++) 762 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i)); 763 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL); 764 for (i = 0; i < 16; i++) 765 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); 766 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG); 767 for (i = 0; i < 8; i++) 768 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i)); 769 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP); 770 771 /* Wake Up */ 772 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC); 773 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC); 774 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS); 775 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV); 776 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT); 777 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT); 778 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL); 779 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM); 780 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0)); 781 782 /* DCB */ 783 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS); /* same as FCCFG */ 784 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */ 785 786 switch (hw->mac.type) { 787 case ixgbe_mac_82598EB: 788 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS); 789 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR); 790 for (i = 0; i < 8; i++) 791 regs_buff[833 + i] = 792 IXGBE_READ_REG(hw, IXGBE_RT2CR(i)); 793 for (i = 0; i < 8; i++) 794 regs_buff[841 + i] = 795 IXGBE_READ_REG(hw, IXGBE_RT2SR(i)); 796 for (i = 0; i < 8; i++) 797 regs_buff[849 + i] = 798 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i)); 799 for (i = 0; i < 8; i++) 800 regs_buff[857 + i] = 801 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i)); 802 break; 803 case ixgbe_mac_82599EB: 804 case ixgbe_mac_X540: 805 case ixgbe_mac_X550: 806 case ixgbe_mac_X550EM_x: 807 case ixgbe_mac_x550em_a: 808 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 809 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS); 810 for (i = 0; i < 8; i++) 811 regs_buff[833 + i] = 812 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i)); 813 for (i = 0; i < 8; i++) 814 regs_buff[841 + i] = 815 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i)); 816 for (i = 0; i < 8; i++) 817 regs_buff[849 + i] = 818 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i)); 819 for (i = 0; i < 8; i++) 820 regs_buff[857 + i] = 821 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i)); 822 break; 823 default: 824 break; 825 } 826 827 for (i = 0; i < 8; i++) 828 regs_buff[865 + i] = 829 IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */ 830 for (i = 0; i < 8; i++) 831 regs_buff[873 + i] = 832 IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */ 833 834 /* Statistics */ 835 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs); 836 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc); 837 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc); 838 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc); 839 for (i = 0; i < 8; i++) 840 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]); 841 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc); 842 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc); 843 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec); 844 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc); 845 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc); 846 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc); 847 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc); 848 for (i = 0; i < 8; i++) 849 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]); 850 for (i = 0; i < 8; i++) 851 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]); 852 for (i = 0; i < 8; i++) 853 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]); 854 for (i = 0; i < 8; i++) 855 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]); 856 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64); 857 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127); 858 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255); 859 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511); 860 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023); 861 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522); 862 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc); 863 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc); 864 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc); 865 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc); 866 regs_buff[942] = (u32)IXGBE_GET_STAT(adapter, gorc); 867 regs_buff[943] = (u32)(IXGBE_GET_STAT(adapter, gorc) >> 32); 868 regs_buff[944] = (u32)IXGBE_GET_STAT(adapter, gotc); 869 regs_buff[945] = (u32)(IXGBE_GET_STAT(adapter, gotc) >> 32); 870 for (i = 0; i < 8; i++) 871 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]); 872 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc); 873 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc); 874 regs_buff[956] = IXGBE_GET_STAT(adapter, roc); 875 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc); 876 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc); 877 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc); 878 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc); 879 regs_buff[961] = (u32)IXGBE_GET_STAT(adapter, tor); 880 regs_buff[962] = (u32)(IXGBE_GET_STAT(adapter, tor) >> 32); 881 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr); 882 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt); 883 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64); 884 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127); 885 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255); 886 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511); 887 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023); 888 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522); 889 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc); 890 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc); 891 regs_buff[973] = IXGBE_GET_STAT(adapter, xec); 892 for (i = 0; i < 16; i++) 893 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]); 894 for (i = 0; i < 16; i++) 895 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]); 896 for (i = 0; i < 16; i++) 897 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]); 898 for (i = 0; i < 16; i++) 899 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]); 900 901 /* MAC */ 902 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG); 903 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); 904 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA); 905 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0); 906 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1); 907 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); 908 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP); 909 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP); 910 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP); 911 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0); 912 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1); 913 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP); 914 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA); 915 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE); 916 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD); 917 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS); 918 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA); 919 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD); 920 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD); 921 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD); 922 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG); 923 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1); 924 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2); 925 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS); 926 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC); 927 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS); 928 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC); 929 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS); 930 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2); 931 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3); 932 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1); 933 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2); 934 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL); 935 936 /* Diagnostic */ 937 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL); 938 for (i = 0; i < 8; i++) 939 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i)); 940 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN); 941 for (i = 0; i < 4; i++) 942 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i)); 943 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE); 944 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL); 945 for (i = 0; i < 8; i++) 946 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i)); 947 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN); 948 for (i = 0; i < 4; i++) 949 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i)); 950 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE); 951 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL); 952 for (i = 0; i < 4; i++) 953 regs_buff[1102 + i] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA(i)); 954 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL); 955 for (i = 0; i < 4; i++) 956 regs_buff[1107 + i] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA(i)); 957 for (i = 0; i < 8; i++) 958 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i)); 959 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL); 960 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1); 961 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2); 962 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1); 963 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2); 964 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS); 965 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL); 966 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC); 967 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC); 968 969 /* 82599 X540 specific registers */ 970 regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN); 971 972 /* 82599 X540 specific DCB registers */ 973 regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC); 974 regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC); 975 for (i = 0; i < 4; i++) 976 regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i)); 977 regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM); 978 /* same as RTTQCNRM */ 979 regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD); 980 /* same as RTTQCNRR */ 981 982 /* X540 specific DCB registers */ 983 regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR); 984 regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG); 985 986 /* Security config registers */ 987 regs_buff[1139] = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL); 988 regs_buff[1140] = IXGBE_READ_REG(hw, IXGBE_SECTXSTAT); 989 regs_buff[1141] = IXGBE_READ_REG(hw, IXGBE_SECTXBUFFAF); 990 regs_buff[1142] = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); 991 regs_buff[1143] = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL); 992 regs_buff[1144] = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT); 993 } 994 995 static int ixgbe_get_eeprom_len(struct net_device *netdev) 996 { 997 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 998 return adapter->hw.eeprom.word_size * 2; 999 } 1000 1001 static int ixgbe_get_eeprom(struct net_device *netdev, 1002 struct ethtool_eeprom *eeprom, u8 *bytes) 1003 { 1004 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1005 struct ixgbe_hw *hw = &adapter->hw; 1006 u16 *eeprom_buff; 1007 int first_word, last_word, eeprom_len; 1008 int ret_val = 0; 1009 u16 i; 1010 1011 if (eeprom->len == 0) 1012 return -EINVAL; 1013 1014 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1015 1016 first_word = eeprom->offset >> 1; 1017 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1018 eeprom_len = last_word - first_word + 1; 1019 1020 eeprom_buff = kmalloc_array(eeprom_len, sizeof(u16), GFP_KERNEL); 1021 if (!eeprom_buff) 1022 return -ENOMEM; 1023 1024 ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len, 1025 eeprom_buff); 1026 1027 /* Device's eeprom is always little-endian, word addressable */ 1028 for (i = 0; i < eeprom_len; i++) 1029 le16_to_cpus(&eeprom_buff[i]); 1030 1031 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); 1032 kfree(eeprom_buff); 1033 1034 return ret_val; 1035 } 1036 1037 static int ixgbe_set_eeprom(struct net_device *netdev, 1038 struct ethtool_eeprom *eeprom, u8 *bytes) 1039 { 1040 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1041 struct ixgbe_hw *hw = &adapter->hw; 1042 u16 *eeprom_buff; 1043 void *ptr; 1044 int max_len, first_word, last_word, ret_val = 0; 1045 u16 i; 1046 1047 if (eeprom->len == 0) 1048 return -EINVAL; 1049 1050 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) 1051 return -EINVAL; 1052 1053 max_len = hw->eeprom.word_size * 2; 1054 1055 first_word = eeprom->offset >> 1; 1056 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1057 eeprom_buff = kmalloc(max_len, GFP_KERNEL); 1058 if (!eeprom_buff) 1059 return -ENOMEM; 1060 1061 ptr = eeprom_buff; 1062 1063 if (eeprom->offset & 1) { 1064 /* 1065 * need read/modify/write of first changed EEPROM word 1066 * only the second byte of the word is being modified 1067 */ 1068 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]); 1069 if (ret_val) 1070 goto err; 1071 1072 ptr++; 1073 } 1074 if ((eeprom->offset + eeprom->len) & 1) { 1075 /* 1076 * need read/modify/write of last changed EEPROM word 1077 * only the first byte of the word is being modified 1078 */ 1079 ret_val = hw->eeprom.ops.read(hw, last_word, 1080 &eeprom_buff[last_word - first_word]); 1081 if (ret_val) 1082 goto err; 1083 } 1084 1085 /* Device's eeprom is always little-endian, word addressable */ 1086 for (i = 0; i < last_word - first_word + 1; i++) 1087 le16_to_cpus(&eeprom_buff[i]); 1088 1089 memcpy(ptr, bytes, eeprom->len); 1090 1091 for (i = 0; i < last_word - first_word + 1; i++) 1092 cpu_to_le16s(&eeprom_buff[i]); 1093 1094 ret_val = hw->eeprom.ops.write_buffer(hw, first_word, 1095 last_word - first_word + 1, 1096 eeprom_buff); 1097 1098 /* Update the checksum */ 1099 if (ret_val == 0) 1100 hw->eeprom.ops.update_checksum(hw); 1101 1102 err: 1103 kfree(eeprom_buff); 1104 return ret_val; 1105 } 1106 1107 void ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter) 1108 { 1109 struct ixgbe_hw *hw = &adapter->hw; 1110 1111 ixgbe_get_flash_data(hw); 1112 ixgbe_set_fw_version_e610(adapter); 1113 } 1114 1115 static void ixgbe_get_drvinfo(struct net_device *netdev, 1116 struct ethtool_drvinfo *drvinfo) 1117 { 1118 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1119 1120 /* need to refresh info for e610 in case fw reloads in runtime */ 1121 if (adapter->hw.mac.type == ixgbe_mac_e610) 1122 ixgbe_refresh_fw_version(adapter); 1123 1124 strscpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver)); 1125 1126 strscpy(drvinfo->fw_version, adapter->eeprom_id, 1127 sizeof(drvinfo->fw_version)); 1128 1129 strscpy(drvinfo->bus_info, pci_name(adapter->pdev), 1130 sizeof(drvinfo->bus_info)); 1131 1132 drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN; 1133 } 1134 1135 static u32 ixgbe_get_max_rxd(struct ixgbe_adapter *adapter) 1136 { 1137 switch (adapter->hw.mac.type) { 1138 case ixgbe_mac_82598EB: 1139 return IXGBE_MAX_RXD_82598; 1140 case ixgbe_mac_82599EB: 1141 return IXGBE_MAX_RXD_82599; 1142 case ixgbe_mac_X540: 1143 return IXGBE_MAX_RXD_X540; 1144 case ixgbe_mac_X550: 1145 case ixgbe_mac_X550EM_x: 1146 case ixgbe_mac_x550em_a: 1147 return IXGBE_MAX_RXD_X550; 1148 default: 1149 return IXGBE_MAX_RXD_82598; 1150 } 1151 } 1152 1153 static u32 ixgbe_get_max_txd(struct ixgbe_adapter *adapter) 1154 { 1155 switch (adapter->hw.mac.type) { 1156 case ixgbe_mac_82598EB: 1157 return IXGBE_MAX_TXD_82598; 1158 case ixgbe_mac_82599EB: 1159 return IXGBE_MAX_TXD_82599; 1160 case ixgbe_mac_X540: 1161 return IXGBE_MAX_TXD_X540; 1162 case ixgbe_mac_X550: 1163 case ixgbe_mac_X550EM_x: 1164 case ixgbe_mac_x550em_a: 1165 return IXGBE_MAX_TXD_X550; 1166 default: 1167 return IXGBE_MAX_TXD_82598; 1168 } 1169 } 1170 1171 static void ixgbe_get_ringparam(struct net_device *netdev, 1172 struct ethtool_ringparam *ring, 1173 struct kernel_ethtool_ringparam *kernel_ring, 1174 struct netlink_ext_ack *extack) 1175 { 1176 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1177 struct ixgbe_ring *tx_ring = adapter->tx_ring[0]; 1178 struct ixgbe_ring *rx_ring = adapter->rx_ring[0]; 1179 1180 ring->rx_max_pending = ixgbe_get_max_rxd(adapter); 1181 ring->tx_max_pending = ixgbe_get_max_txd(adapter); 1182 ring->rx_pending = rx_ring->count; 1183 ring->tx_pending = tx_ring->count; 1184 } 1185 1186 static int ixgbe_set_ringparam(struct net_device *netdev, 1187 struct ethtool_ringparam *ring, 1188 struct kernel_ethtool_ringparam *kernel_ring, 1189 struct netlink_ext_ack *extack) 1190 { 1191 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1192 struct ixgbe_ring *temp_ring; 1193 int i, j, err = 0; 1194 u32 new_rx_count, new_tx_count; 1195 1196 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1197 return -EINVAL; 1198 1199 new_tx_count = clamp_t(u32, ring->tx_pending, 1200 IXGBE_MIN_TXD, ixgbe_get_max_txd(adapter)); 1201 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE); 1202 1203 new_rx_count = clamp_t(u32, ring->rx_pending, 1204 IXGBE_MIN_RXD, ixgbe_get_max_rxd(adapter)); 1205 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE); 1206 1207 if ((new_tx_count == adapter->tx_ring_count) && 1208 (new_rx_count == adapter->rx_ring_count)) { 1209 /* nothing to do */ 1210 return 0; 1211 } 1212 1213 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) 1214 usleep_range(1000, 2000); 1215 1216 if (!netif_running(adapter->netdev)) { 1217 for (i = 0; i < adapter->num_tx_queues; i++) 1218 adapter->tx_ring[i]->count = new_tx_count; 1219 for (i = 0; i < adapter->num_xdp_queues; i++) 1220 adapter->xdp_ring[i]->count = new_tx_count; 1221 for (i = 0; i < adapter->num_rx_queues; i++) 1222 adapter->rx_ring[i]->count = new_rx_count; 1223 adapter->tx_ring_count = new_tx_count; 1224 adapter->xdp_ring_count = new_tx_count; 1225 adapter->rx_ring_count = new_rx_count; 1226 goto clear_reset; 1227 } 1228 1229 /* allocate temporary buffer to store rings in */ 1230 i = max_t(int, adapter->num_tx_queues + adapter->num_xdp_queues, 1231 adapter->num_rx_queues); 1232 temp_ring = vmalloc(array_size(i, sizeof(struct ixgbe_ring))); 1233 1234 if (!temp_ring) { 1235 err = -ENOMEM; 1236 goto clear_reset; 1237 } 1238 1239 ixgbe_down(adapter); 1240 1241 /* 1242 * Setup new Tx resources and free the old Tx resources in that order. 1243 * We can then assign the new resources to the rings via a memcpy. 1244 * The advantage to this approach is that we are guaranteed to still 1245 * have resources even in the case of an allocation failure. 1246 */ 1247 if (new_tx_count != adapter->tx_ring_count) { 1248 for (i = 0; i < adapter->num_tx_queues; i++) { 1249 memcpy(&temp_ring[i], adapter->tx_ring[i], 1250 sizeof(struct ixgbe_ring)); 1251 1252 temp_ring[i].count = new_tx_count; 1253 err = ixgbe_setup_tx_resources(&temp_ring[i]); 1254 if (err) { 1255 while (i) { 1256 i--; 1257 ixgbe_free_tx_resources(&temp_ring[i]); 1258 } 1259 goto err_setup; 1260 } 1261 } 1262 1263 for (j = 0; j < adapter->num_xdp_queues; j++, i++) { 1264 memcpy(&temp_ring[i], adapter->xdp_ring[j], 1265 sizeof(struct ixgbe_ring)); 1266 1267 temp_ring[i].count = new_tx_count; 1268 err = ixgbe_setup_tx_resources(&temp_ring[i]); 1269 if (err) { 1270 while (i) { 1271 i--; 1272 ixgbe_free_tx_resources(&temp_ring[i]); 1273 } 1274 goto err_setup; 1275 } 1276 } 1277 1278 for (i = 0; i < adapter->num_tx_queues; i++) { 1279 ixgbe_free_tx_resources(adapter->tx_ring[i]); 1280 1281 memcpy(adapter->tx_ring[i], &temp_ring[i], 1282 sizeof(struct ixgbe_ring)); 1283 } 1284 for (j = 0; j < adapter->num_xdp_queues; j++, i++) { 1285 ixgbe_free_tx_resources(adapter->xdp_ring[j]); 1286 1287 memcpy(adapter->xdp_ring[j], &temp_ring[i], 1288 sizeof(struct ixgbe_ring)); 1289 } 1290 1291 adapter->tx_ring_count = new_tx_count; 1292 } 1293 1294 /* Repeat the process for the Rx rings if needed */ 1295 if (new_rx_count != adapter->rx_ring_count) { 1296 for (i = 0; i < adapter->num_rx_queues; i++) { 1297 memcpy(&temp_ring[i], adapter->rx_ring[i], 1298 sizeof(struct ixgbe_ring)); 1299 1300 /* Clear copied XDP RX-queue info */ 1301 memset(&temp_ring[i].xdp_rxq, 0, 1302 sizeof(temp_ring[i].xdp_rxq)); 1303 1304 temp_ring[i].count = new_rx_count; 1305 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]); 1306 if (err) { 1307 while (i) { 1308 i--; 1309 ixgbe_free_rx_resources(&temp_ring[i]); 1310 } 1311 goto err_setup; 1312 } 1313 1314 } 1315 1316 for (i = 0; i < adapter->num_rx_queues; i++) { 1317 ixgbe_free_rx_resources(adapter->rx_ring[i]); 1318 1319 memcpy(adapter->rx_ring[i], &temp_ring[i], 1320 sizeof(struct ixgbe_ring)); 1321 } 1322 1323 adapter->rx_ring_count = new_rx_count; 1324 } 1325 1326 err_setup: 1327 ixgbe_up(adapter); 1328 vfree(temp_ring); 1329 clear_reset: 1330 clear_bit(__IXGBE_RESETTING, &adapter->state); 1331 return err; 1332 } 1333 1334 static int ixgbe_get_sset_count(struct net_device *netdev, int sset) 1335 { 1336 switch (sset) { 1337 case ETH_SS_TEST: 1338 return IXGBE_TEST_LEN; 1339 case ETH_SS_STATS: 1340 return IXGBE_STATS_LEN; 1341 case ETH_SS_PRIV_FLAGS: 1342 return IXGBE_PRIV_FLAGS_STR_LEN; 1343 default: 1344 return -EOPNOTSUPP; 1345 } 1346 } 1347 1348 static void ixgbe_get_ethtool_stats(struct net_device *netdev, 1349 struct ethtool_stats *stats, u64 *data) 1350 { 1351 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1352 struct rtnl_link_stats64 temp; 1353 const struct rtnl_link_stats64 *net_stats; 1354 unsigned int start; 1355 struct ixgbe_ring *ring; 1356 int i, j; 1357 char *p = NULL; 1358 1359 ixgbe_update_stats(adapter); 1360 net_stats = dev_get_stats(netdev, &temp); 1361 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { 1362 switch (ixgbe_gstrings_stats[i].type) { 1363 case NETDEV_STATS: 1364 p = (char *) net_stats + 1365 ixgbe_gstrings_stats[i].stat_offset; 1366 break; 1367 case IXGBE_STATS: 1368 p = (char *) adapter + 1369 ixgbe_gstrings_stats[i].stat_offset; 1370 break; 1371 default: 1372 data[i] = 0; 1373 continue; 1374 } 1375 1376 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat == 1377 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1378 } 1379 for (j = 0; j < netdev->num_tx_queues; j++) { 1380 ring = adapter->tx_ring[j]; 1381 if (!ring) { 1382 data[i] = 0; 1383 data[i+1] = 0; 1384 i += 2; 1385 continue; 1386 } 1387 1388 do { 1389 start = u64_stats_fetch_begin(&ring->syncp); 1390 data[i] = ring->stats.packets; 1391 data[i+1] = ring->stats.bytes; 1392 } while (u64_stats_fetch_retry(&ring->syncp, start)); 1393 i += 2; 1394 } 1395 for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) { 1396 ring = adapter->rx_ring[j]; 1397 if (!ring) { 1398 data[i] = 0; 1399 data[i+1] = 0; 1400 i += 2; 1401 continue; 1402 } 1403 1404 do { 1405 start = u64_stats_fetch_begin(&ring->syncp); 1406 data[i] = ring->stats.packets; 1407 data[i+1] = ring->stats.bytes; 1408 } while (u64_stats_fetch_retry(&ring->syncp, start)); 1409 i += 2; 1410 } 1411 1412 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) { 1413 data[i++] = adapter->stats.pxontxc[j]; 1414 data[i++] = adapter->stats.pxofftxc[j]; 1415 } 1416 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) { 1417 data[i++] = adapter->stats.pxonrxc[j]; 1418 data[i++] = adapter->stats.pxoffrxc[j]; 1419 } 1420 } 1421 1422 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset, 1423 u8 *data) 1424 { 1425 unsigned int i; 1426 u8 *p = data; 1427 1428 switch (stringset) { 1429 case ETH_SS_TEST: 1430 for (i = 0; i < IXGBE_TEST_LEN; i++) 1431 ethtool_puts(&p, ixgbe_gstrings_test[i]); 1432 break; 1433 case ETH_SS_STATS: 1434 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) 1435 ethtool_puts(&p, ixgbe_gstrings_stats[i].stat_string); 1436 for (i = 0; i < netdev->num_tx_queues; i++) { 1437 ethtool_sprintf(&p, "tx_queue_%u_packets", i); 1438 ethtool_sprintf(&p, "tx_queue_%u_bytes", i); 1439 } 1440 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) { 1441 ethtool_sprintf(&p, "rx_queue_%u_packets", i); 1442 ethtool_sprintf(&p, "rx_queue_%u_bytes", i); 1443 } 1444 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { 1445 ethtool_sprintf(&p, "tx_pb_%u_pxon", i); 1446 ethtool_sprintf(&p, "tx_pb_%u_pxoff", i); 1447 } 1448 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { 1449 ethtool_sprintf(&p, "rx_pb_%u_pxon", i); 1450 ethtool_sprintf(&p, "rx_pb_%u_pxoff", i); 1451 } 1452 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */ 1453 break; 1454 case ETH_SS_PRIV_FLAGS: 1455 memcpy(data, ixgbe_priv_flags_strings, 1456 IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN); 1457 } 1458 } 1459 1460 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data) 1461 { 1462 struct ixgbe_hw *hw = &adapter->hw; 1463 bool link_up; 1464 u32 link_speed = 0; 1465 1466 if (ixgbe_removed(hw->hw_addr)) { 1467 *data = 1; 1468 return 1; 1469 } 1470 *data = 0; 1471 1472 hw->mac.ops.check_link(hw, &link_speed, &link_up, true); 1473 if (link_up) 1474 return *data; 1475 else 1476 *data = 1; 1477 return *data; 1478 } 1479 1480 /* ethtool register test data */ 1481 struct ixgbe_reg_test { 1482 u16 reg; 1483 u8 array_len; 1484 u8 test_type; 1485 u32 mask; 1486 u32 write; 1487 }; 1488 1489 /* In the hardware, registers are laid out either singly, in arrays 1490 * spaced 0x40 bytes apart, or in contiguous tables. We assume 1491 * most tests take place on arrays or single registers (handled 1492 * as a single-element array) and special-case the tables. 1493 * Table tests are always pattern tests. 1494 * 1495 * We also make provision for some required setup steps by specifying 1496 * registers to be written without any read-back testing. 1497 */ 1498 1499 #define PATTERN_TEST 1 1500 #define SET_READ_TEST 2 1501 #define WRITE_NO_TEST 3 1502 #define TABLE32_TEST 4 1503 #define TABLE64_TEST_LO 5 1504 #define TABLE64_TEST_HI 6 1505 1506 /* default 82599 register test */ 1507 static const struct ixgbe_reg_test reg_test_82599[] = { 1508 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1509 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1510 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1511 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, 1512 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 }, 1513 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1514 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1515 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, 1516 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, 1517 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, 1518 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1519 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1520 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1521 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1522 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 }, 1523 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 }, 1524 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, 1525 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF }, 1526 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1527 { .reg = 0 } 1528 }; 1529 1530 /* default 82598 register test */ 1531 static const struct ixgbe_reg_test reg_test_82598[] = { 1532 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1533 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1534 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1535 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, 1536 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1537 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1538 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1539 /* Enable all four RX queues before testing. */ 1540 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, 1541 /* RDH is read-only for 82598, only test RDT. */ 1542 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, 1543 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, 1544 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1545 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1546 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF }, 1547 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1548 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1549 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1550 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 }, 1551 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 }, 1552 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, 1553 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF }, 1554 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1555 { .reg = 0 } 1556 }; 1557 1558 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg, 1559 u32 mask, u32 write) 1560 { 1561 u32 pat, val, before; 1562 static const u32 test_pattern[] = { 1563 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; 1564 1565 if (ixgbe_removed(adapter->hw.hw_addr)) { 1566 *data = 1; 1567 return true; 1568 } 1569 for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) { 1570 before = ixgbe_read_reg(&adapter->hw, reg); 1571 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write); 1572 val = ixgbe_read_reg(&adapter->hw, reg); 1573 if (val != (test_pattern[pat] & write & mask)) { 1574 e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n", 1575 reg, val, (test_pattern[pat] & write & mask)); 1576 *data = reg; 1577 ixgbe_write_reg(&adapter->hw, reg, before); 1578 return true; 1579 } 1580 ixgbe_write_reg(&adapter->hw, reg, before); 1581 } 1582 return false; 1583 } 1584 1585 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg, 1586 u32 mask, u32 write) 1587 { 1588 u32 val, before; 1589 1590 if (ixgbe_removed(adapter->hw.hw_addr)) { 1591 *data = 1; 1592 return true; 1593 } 1594 before = ixgbe_read_reg(&adapter->hw, reg); 1595 ixgbe_write_reg(&adapter->hw, reg, write & mask); 1596 val = ixgbe_read_reg(&adapter->hw, reg); 1597 if ((write & mask) != (val & mask)) { 1598 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", 1599 reg, (val & mask), (write & mask)); 1600 *data = reg; 1601 ixgbe_write_reg(&adapter->hw, reg, before); 1602 return true; 1603 } 1604 ixgbe_write_reg(&adapter->hw, reg, before); 1605 return false; 1606 } 1607 1608 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) 1609 { 1610 const struct ixgbe_reg_test *test; 1611 u32 value, before, after; 1612 u32 i, toggle; 1613 1614 if (ixgbe_removed(adapter->hw.hw_addr)) { 1615 e_err(drv, "Adapter removed - register test blocked\n"); 1616 *data = 1; 1617 return 1; 1618 } 1619 switch (adapter->hw.mac.type) { 1620 case ixgbe_mac_82598EB: 1621 toggle = 0x7FFFF3FF; 1622 test = reg_test_82598; 1623 break; 1624 case ixgbe_mac_82599EB: 1625 case ixgbe_mac_X540: 1626 case ixgbe_mac_X550: 1627 case ixgbe_mac_X550EM_x: 1628 case ixgbe_mac_x550em_a: 1629 case ixgbe_mac_e610: 1630 toggle = 0x7FFFF30F; 1631 test = reg_test_82599; 1632 break; 1633 default: 1634 *data = 1; 1635 return 1; 1636 } 1637 1638 /* 1639 * Because the status register is such a special case, 1640 * we handle it separately from the rest of the register 1641 * tests. Some bits are read-only, some toggle, and some 1642 * are writeable on newer MACs. 1643 */ 1644 before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS); 1645 value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle); 1646 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle); 1647 after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle; 1648 if (value != after) { 1649 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n", 1650 after, value); 1651 *data = 1; 1652 return 1; 1653 } 1654 /* restore previous status */ 1655 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before); 1656 1657 /* 1658 * Perform the remainder of the register test, looping through 1659 * the test table until we either fail or reach the null entry. 1660 */ 1661 while (test->reg) { 1662 for (i = 0; i < test->array_len; i++) { 1663 bool b = false; 1664 1665 switch (test->test_type) { 1666 case PATTERN_TEST: 1667 b = reg_pattern_test(adapter, data, 1668 test->reg + (i * 0x40), 1669 test->mask, 1670 test->write); 1671 break; 1672 case SET_READ_TEST: 1673 b = reg_set_and_check(adapter, data, 1674 test->reg + (i * 0x40), 1675 test->mask, 1676 test->write); 1677 break; 1678 case WRITE_NO_TEST: 1679 ixgbe_write_reg(&adapter->hw, 1680 test->reg + (i * 0x40), 1681 test->write); 1682 break; 1683 case TABLE32_TEST: 1684 b = reg_pattern_test(adapter, data, 1685 test->reg + (i * 4), 1686 test->mask, 1687 test->write); 1688 break; 1689 case TABLE64_TEST_LO: 1690 b = reg_pattern_test(adapter, data, 1691 test->reg + (i * 8), 1692 test->mask, 1693 test->write); 1694 break; 1695 case TABLE64_TEST_HI: 1696 b = reg_pattern_test(adapter, data, 1697 (test->reg + 4) + (i * 8), 1698 test->mask, 1699 test->write); 1700 break; 1701 } 1702 if (b) 1703 return 1; 1704 } 1705 test++; 1706 } 1707 1708 *data = 0; 1709 return 0; 1710 } 1711 1712 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data) 1713 { 1714 struct ixgbe_hw *hw = &adapter->hw; 1715 if (hw->eeprom.ops.validate_checksum(hw, NULL)) 1716 *data = 1; 1717 else 1718 *data = 0; 1719 return *data; 1720 } 1721 1722 static irqreturn_t ixgbe_test_intr(int irq, void *data) 1723 { 1724 struct net_device *netdev = (struct net_device *) data; 1725 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1726 1727 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR); 1728 1729 return IRQ_HANDLED; 1730 } 1731 1732 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) 1733 { 1734 struct net_device *netdev = adapter->netdev; 1735 u32 mask, i = 0, shared_int = true; 1736 u32 irq = adapter->pdev->irq; 1737 1738 *data = 0; 1739 1740 /* Hook up test interrupt handler just for this test */ 1741 if (adapter->msix_entries) { 1742 /* NOTE: we don't test MSI-X interrupts here, yet */ 1743 return 0; 1744 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { 1745 shared_int = false; 1746 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name, 1747 netdev)) { 1748 *data = 1; 1749 return -1; 1750 } 1751 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED, 1752 netdev->name, netdev)) { 1753 shared_int = false; 1754 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED, 1755 netdev->name, netdev)) { 1756 *data = 1; 1757 return -1; 1758 } 1759 e_info(hw, "testing %s interrupt\n", shared_int ? 1760 "shared" : "unshared"); 1761 1762 /* Disable all the interrupts */ 1763 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); 1764 IXGBE_WRITE_FLUSH(&adapter->hw); 1765 usleep_range(10000, 20000); 1766 1767 /* Test each interrupt */ 1768 for (; i < 10; i++) { 1769 /* Interrupt to test */ 1770 mask = BIT(i); 1771 1772 if (!shared_int) { 1773 /* 1774 * Disable the interrupts to be reported in 1775 * the cause register and then force the same 1776 * interrupt and see if one gets posted. If 1777 * an interrupt was posted to the bus, the 1778 * test failed. 1779 */ 1780 adapter->test_icr = 0; 1781 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1782 ~mask & 0x00007FFF); 1783 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1784 ~mask & 0x00007FFF); 1785 IXGBE_WRITE_FLUSH(&adapter->hw); 1786 usleep_range(10000, 20000); 1787 1788 if (adapter->test_icr & mask) { 1789 *data = 3; 1790 break; 1791 } 1792 } 1793 1794 /* 1795 * Enable the interrupt to be reported in the cause 1796 * register and then force the same interrupt and see 1797 * if one gets posted. If an interrupt was not posted 1798 * to the bus, the test failed. 1799 */ 1800 adapter->test_icr = 0; 1801 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); 1802 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 1803 IXGBE_WRITE_FLUSH(&adapter->hw); 1804 usleep_range(10000, 20000); 1805 1806 if (!(adapter->test_icr & mask)) { 1807 *data = 4; 1808 break; 1809 } 1810 1811 if (!shared_int) { 1812 /* 1813 * Disable the other interrupts to be reported in 1814 * the cause register and then force the other 1815 * interrupts and see if any get posted. If 1816 * an interrupt was posted to the bus, the 1817 * test failed. 1818 */ 1819 adapter->test_icr = 0; 1820 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1821 ~mask & 0x00007FFF); 1822 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1823 ~mask & 0x00007FFF); 1824 IXGBE_WRITE_FLUSH(&adapter->hw); 1825 usleep_range(10000, 20000); 1826 1827 if (adapter->test_icr) { 1828 *data = 5; 1829 break; 1830 } 1831 } 1832 } 1833 1834 /* Disable all the interrupts */ 1835 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); 1836 IXGBE_WRITE_FLUSH(&adapter->hw); 1837 usleep_range(10000, 20000); 1838 1839 /* Unhook test interrupt handler */ 1840 free_irq(irq, netdev); 1841 1842 return *data; 1843 } 1844 1845 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter) 1846 { 1847 /* Shut down the DMA engines now so they can be reinitialized later, 1848 * since the test rings and normally used rings should overlap on 1849 * queue 0 we can just use the standard disable Rx/Tx calls and they 1850 * will take care of disabling the test rings for us. 1851 */ 1852 1853 /* first Rx */ 1854 ixgbe_disable_rx(adapter); 1855 1856 /* now Tx */ 1857 ixgbe_disable_tx(adapter); 1858 1859 ixgbe_reset(adapter); 1860 1861 ixgbe_free_tx_resources(&adapter->test_tx_ring); 1862 ixgbe_free_rx_resources(&adapter->test_rx_ring); 1863 } 1864 1865 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) 1866 { 1867 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; 1868 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; 1869 struct ixgbe_hw *hw = &adapter->hw; 1870 u32 rctl, reg_data; 1871 int ret_val; 1872 int err; 1873 1874 /* Setup Tx descriptor ring and Tx buffers */ 1875 tx_ring->count = IXGBE_DEFAULT_TXD; 1876 tx_ring->queue_index = 0; 1877 tx_ring->dev = &adapter->pdev->dev; 1878 tx_ring->netdev = adapter->netdev; 1879 tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx; 1880 1881 err = ixgbe_setup_tx_resources(tx_ring); 1882 if (err) 1883 return 1; 1884 1885 switch (adapter->hw.mac.type) { 1886 case ixgbe_mac_82599EB: 1887 case ixgbe_mac_X540: 1888 case ixgbe_mac_X550: 1889 case ixgbe_mac_X550EM_x: 1890 case ixgbe_mac_x550em_a: 1891 case ixgbe_mac_e610: 1892 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); 1893 reg_data |= IXGBE_DMATXCTL_TE; 1894 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); 1895 break; 1896 default: 1897 break; 1898 } 1899 1900 ixgbe_configure_tx_ring(adapter, tx_ring); 1901 1902 /* Setup Rx Descriptor ring and Rx buffers */ 1903 rx_ring->count = IXGBE_DEFAULT_RXD; 1904 rx_ring->queue_index = 0; 1905 rx_ring->dev = &adapter->pdev->dev; 1906 rx_ring->netdev = adapter->netdev; 1907 rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx; 1908 1909 err = ixgbe_setup_rx_resources(adapter, rx_ring); 1910 if (err) { 1911 ret_val = 4; 1912 goto err_nomem; 1913 } 1914 1915 hw->mac.ops.disable_rx(hw); 1916 1917 ixgbe_configure_rx_ring(adapter, rx_ring); 1918 1919 rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL); 1920 rctl |= IXGBE_RXCTRL_DMBYPS; 1921 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl); 1922 1923 hw->mac.ops.enable_rx(hw); 1924 1925 return 0; 1926 1927 err_nomem: 1928 ixgbe_free_desc_rings(adapter); 1929 return ret_val; 1930 } 1931 1932 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter) 1933 { 1934 struct ixgbe_hw *hw = &adapter->hw; 1935 u32 reg_data; 1936 1937 1938 /* Setup MAC loopback */ 1939 reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0); 1940 reg_data |= IXGBE_HLREG0_LPBK; 1941 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data); 1942 1943 reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL); 1944 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE; 1945 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data); 1946 1947 /* X540 and X550 needs to set the MACC.FLU bit to force link up */ 1948 switch (adapter->hw.mac.type) { 1949 case ixgbe_mac_X540: 1950 case ixgbe_mac_X550: 1951 case ixgbe_mac_X550EM_x: 1952 case ixgbe_mac_x550em_a: 1953 case ixgbe_mac_e610: 1954 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC); 1955 reg_data |= IXGBE_MACC_FLU; 1956 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data); 1957 break; 1958 default: 1959 if (hw->mac.orig_autoc) { 1960 reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU; 1961 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data); 1962 } else { 1963 return 10; 1964 } 1965 } 1966 IXGBE_WRITE_FLUSH(hw); 1967 usleep_range(10000, 20000); 1968 1969 /* Disable Atlas Tx lanes; re-enabled in reset path */ 1970 if (hw->mac.type == ixgbe_mac_82598EB) { 1971 u8 atlas; 1972 1973 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas); 1974 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN; 1975 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas); 1976 1977 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas); 1978 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL; 1979 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas); 1980 1981 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas); 1982 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL; 1983 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas); 1984 1985 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas); 1986 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL; 1987 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas); 1988 } 1989 1990 return 0; 1991 } 1992 1993 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter) 1994 { 1995 u32 reg_data; 1996 1997 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0); 1998 reg_data &= ~IXGBE_HLREG0_LPBK; 1999 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data); 2000 } 2001 2002 static void ixgbe_create_lbtest_frame(struct sk_buff *skb, 2003 unsigned int frame_size) 2004 { 2005 memset(skb->data, 0xFF, frame_size); 2006 frame_size >>= 1; 2007 memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1); 2008 skb->data[frame_size + 10] = 0xBE; 2009 skb->data[frame_size + 12] = 0xAF; 2010 } 2011 2012 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer, 2013 unsigned int frame_size) 2014 { 2015 unsigned char *data; 2016 2017 frame_size >>= 1; 2018 2019 data = page_address(rx_buffer->page) + rx_buffer->page_offset; 2020 2021 return data[3] == 0xFF && data[frame_size + 10] == 0xBE && 2022 data[frame_size + 12] == 0xAF; 2023 } 2024 2025 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, 2026 struct ixgbe_ring *tx_ring, 2027 unsigned int size) 2028 { 2029 union ixgbe_adv_rx_desc *rx_desc; 2030 u16 rx_ntc, tx_ntc, count = 0; 2031 2032 /* initialize next to clean and descriptor values */ 2033 rx_ntc = rx_ring->next_to_clean; 2034 tx_ntc = tx_ring->next_to_clean; 2035 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); 2036 2037 while (tx_ntc != tx_ring->next_to_use) { 2038 union ixgbe_adv_tx_desc *tx_desc; 2039 struct ixgbe_tx_buffer *tx_buffer; 2040 2041 tx_desc = IXGBE_TX_DESC(tx_ring, tx_ntc); 2042 2043 /* if DD is not set transmit has not completed */ 2044 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 2045 return count; 2046 2047 /* unmap buffer on Tx side */ 2048 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc]; 2049 2050 /* Free all the Tx ring sk_buffs */ 2051 dev_kfree_skb_any(tx_buffer->skb); 2052 2053 /* unmap skb header data */ 2054 dma_unmap_single(tx_ring->dev, 2055 dma_unmap_addr(tx_buffer, dma), 2056 dma_unmap_len(tx_buffer, len), 2057 DMA_TO_DEVICE); 2058 dma_unmap_len_set(tx_buffer, len, 0); 2059 2060 /* increment Tx next to clean counter */ 2061 tx_ntc++; 2062 if (tx_ntc == tx_ring->count) 2063 tx_ntc = 0; 2064 } 2065 2066 while (rx_desc->wb.upper.length) { 2067 struct ixgbe_rx_buffer *rx_buffer; 2068 2069 /* check Rx buffer */ 2070 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc]; 2071 2072 /* sync Rx buffer for CPU read */ 2073 dma_sync_single_for_cpu(rx_ring->dev, 2074 rx_buffer->dma, 2075 ixgbe_rx_bufsz(rx_ring), 2076 DMA_FROM_DEVICE); 2077 2078 /* verify contents of skb */ 2079 if (ixgbe_check_lbtest_frame(rx_buffer, size)) 2080 count++; 2081 else 2082 break; 2083 2084 /* sync Rx buffer for device write */ 2085 dma_sync_single_for_device(rx_ring->dev, 2086 rx_buffer->dma, 2087 ixgbe_rx_bufsz(rx_ring), 2088 DMA_FROM_DEVICE); 2089 2090 /* increment Rx next to clean counter */ 2091 rx_ntc++; 2092 if (rx_ntc == rx_ring->count) 2093 rx_ntc = 0; 2094 2095 /* fetch next descriptor */ 2096 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); 2097 } 2098 2099 netdev_tx_reset_queue(txring_txq(tx_ring)); 2100 2101 /* re-map buffers to ring, store next to clean values */ 2102 ixgbe_alloc_rx_buffers(rx_ring, count); 2103 rx_ring->next_to_clean = rx_ntc; 2104 tx_ring->next_to_clean = tx_ntc; 2105 2106 return count; 2107 } 2108 2109 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter) 2110 { 2111 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; 2112 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; 2113 int i, j, lc, good_cnt, ret_val = 0; 2114 unsigned int size = 1024; 2115 netdev_tx_t tx_ret_val; 2116 struct sk_buff *skb; 2117 u32 flags_orig = adapter->flags; 2118 2119 /* DCB can modify the frames on Tx */ 2120 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 2121 2122 /* allocate test skb */ 2123 skb = alloc_skb(size, GFP_KERNEL); 2124 if (!skb) 2125 return 11; 2126 2127 /* place data into test skb */ 2128 ixgbe_create_lbtest_frame(skb, size); 2129 skb_put(skb, size); 2130 2131 /* 2132 * Calculate the loop count based on the largest descriptor ring 2133 * The idea is to wrap the largest ring a number of times using 64 2134 * send/receive pairs during each loop 2135 */ 2136 2137 if (rx_ring->count <= tx_ring->count) 2138 lc = ((tx_ring->count / 64) * 2) + 1; 2139 else 2140 lc = ((rx_ring->count / 64) * 2) + 1; 2141 2142 for (j = 0; j <= lc; j++) { 2143 /* reset count of good packets */ 2144 good_cnt = 0; 2145 2146 /* place 64 packets on the transmit queue*/ 2147 for (i = 0; i < 64; i++) { 2148 skb_get(skb); 2149 tx_ret_val = ixgbe_xmit_frame_ring(skb, 2150 adapter, 2151 tx_ring); 2152 if (tx_ret_val == NETDEV_TX_OK) 2153 good_cnt++; 2154 } 2155 2156 if (good_cnt != 64) { 2157 ret_val = 12; 2158 break; 2159 } 2160 2161 /* allow 200 milliseconds for packets to go from Tx to Rx */ 2162 msleep(200); 2163 2164 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size); 2165 if (good_cnt != 64) { 2166 ret_val = 13; 2167 break; 2168 } 2169 } 2170 2171 /* free the original skb */ 2172 kfree_skb(skb); 2173 adapter->flags = flags_orig; 2174 2175 return ret_val; 2176 } 2177 2178 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data) 2179 { 2180 *data = ixgbe_setup_desc_rings(adapter); 2181 if (*data) 2182 goto out; 2183 *data = ixgbe_setup_loopback_test(adapter); 2184 if (*data) 2185 goto err_loopback; 2186 *data = ixgbe_run_loopback_test(adapter); 2187 ixgbe_loopback_cleanup(adapter); 2188 2189 err_loopback: 2190 ixgbe_free_desc_rings(adapter); 2191 out: 2192 return *data; 2193 } 2194 2195 static void ixgbe_diag_test(struct net_device *netdev, 2196 struct ethtool_test *eth_test, u64 *data) 2197 { 2198 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2199 bool if_running = netif_running(netdev); 2200 2201 if (ixgbe_removed(adapter->hw.hw_addr)) { 2202 e_err(hw, "Adapter removed - test blocked\n"); 2203 data[0] = 1; 2204 data[1] = 1; 2205 data[2] = 1; 2206 data[3] = 1; 2207 data[4] = 1; 2208 eth_test->flags |= ETH_TEST_FL_FAILED; 2209 return; 2210 } 2211 set_bit(__IXGBE_TESTING, &adapter->state); 2212 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2213 struct ixgbe_hw *hw = &adapter->hw; 2214 2215 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 2216 int i; 2217 for (i = 0; i < adapter->num_vfs; i++) { 2218 if (adapter->vfinfo[i].clear_to_send) { 2219 netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n"); 2220 data[0] = 1; 2221 data[1] = 1; 2222 data[2] = 1; 2223 data[3] = 1; 2224 data[4] = 1; 2225 eth_test->flags |= ETH_TEST_FL_FAILED; 2226 clear_bit(__IXGBE_TESTING, 2227 &adapter->state); 2228 return; 2229 } 2230 } 2231 } 2232 2233 /* Offline tests */ 2234 e_info(hw, "offline testing starting\n"); 2235 2236 /* Link test performed before hardware reset so autoneg doesn't 2237 * interfere with test result 2238 */ 2239 if (ixgbe_link_test(adapter, &data[4])) 2240 eth_test->flags |= ETH_TEST_FL_FAILED; 2241 2242 if (if_running) 2243 /* indicate we're in test mode */ 2244 ixgbe_close(netdev); 2245 else 2246 ixgbe_reset(adapter); 2247 2248 e_info(hw, "register testing starting\n"); 2249 if (ixgbe_reg_test(adapter, &data[0])) 2250 eth_test->flags |= ETH_TEST_FL_FAILED; 2251 2252 ixgbe_reset(adapter); 2253 e_info(hw, "eeprom testing starting\n"); 2254 if (ixgbe_eeprom_test(adapter, &data[1])) 2255 eth_test->flags |= ETH_TEST_FL_FAILED; 2256 2257 ixgbe_reset(adapter); 2258 e_info(hw, "interrupt testing starting\n"); 2259 if (ixgbe_intr_test(adapter, &data[2])) 2260 eth_test->flags |= ETH_TEST_FL_FAILED; 2261 2262 /* If SRIOV or VMDq is enabled then skip MAC 2263 * loopback diagnostic. */ 2264 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED | 2265 IXGBE_FLAG_VMDQ_ENABLED)) { 2266 e_info(hw, "Skip MAC loopback diagnostic in VT mode\n"); 2267 data[3] = 0; 2268 goto skip_loopback; 2269 } 2270 2271 ixgbe_reset(adapter); 2272 e_info(hw, "loopback testing starting\n"); 2273 if (ixgbe_loopback_test(adapter, &data[3])) 2274 eth_test->flags |= ETH_TEST_FL_FAILED; 2275 2276 skip_loopback: 2277 ixgbe_reset(adapter); 2278 2279 /* clear testing bit and return adapter to previous state */ 2280 clear_bit(__IXGBE_TESTING, &adapter->state); 2281 if (if_running) 2282 ixgbe_open(netdev); 2283 else if (hw->mac.ops.disable_tx_laser) 2284 hw->mac.ops.disable_tx_laser(hw); 2285 } else { 2286 e_info(hw, "online testing starting\n"); 2287 2288 /* Online tests */ 2289 if (ixgbe_link_test(adapter, &data[4])) 2290 eth_test->flags |= ETH_TEST_FL_FAILED; 2291 2292 /* Offline tests aren't run; pass by default */ 2293 data[0] = 0; 2294 data[1] = 0; 2295 data[2] = 0; 2296 data[3] = 0; 2297 2298 clear_bit(__IXGBE_TESTING, &adapter->state); 2299 } 2300 } 2301 2302 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter, 2303 struct ethtool_wolinfo *wol) 2304 { 2305 struct ixgbe_hw *hw = &adapter->hw; 2306 int retval = 0; 2307 2308 /* WOL not supported for all devices */ 2309 if (!ixgbe_wol_supported(adapter, hw->device_id, 2310 hw->subsystem_device_id)) { 2311 retval = 1; 2312 wol->supported = 0; 2313 } 2314 2315 return retval; 2316 } 2317 2318 static void ixgbe_get_wol(struct net_device *netdev, 2319 struct ethtool_wolinfo *wol) 2320 { 2321 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2322 2323 wol->supported = WAKE_UCAST | WAKE_MCAST | 2324 WAKE_BCAST | WAKE_MAGIC; 2325 wol->wolopts = 0; 2326 2327 if (ixgbe_wol_exclusion(adapter, wol) || 2328 !device_can_wakeup(&adapter->pdev->dev)) 2329 return; 2330 2331 if (adapter->wol & IXGBE_WUFC_EX) 2332 wol->wolopts |= WAKE_UCAST; 2333 if (adapter->wol & IXGBE_WUFC_MC) 2334 wol->wolopts |= WAKE_MCAST; 2335 if (adapter->wol & IXGBE_WUFC_BC) 2336 wol->wolopts |= WAKE_BCAST; 2337 if (adapter->wol & IXGBE_WUFC_MAG) 2338 wol->wolopts |= WAKE_MAGIC; 2339 } 2340 2341 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2342 { 2343 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2344 2345 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE | 2346 WAKE_FILTER)) 2347 return -EOPNOTSUPP; 2348 2349 if (ixgbe_wol_exclusion(adapter, wol)) 2350 return wol->wolopts ? -EOPNOTSUPP : 0; 2351 2352 adapter->wol = 0; 2353 2354 if (wol->wolopts & WAKE_UCAST) 2355 adapter->wol |= IXGBE_WUFC_EX; 2356 if (wol->wolopts & WAKE_MCAST) 2357 adapter->wol |= IXGBE_WUFC_MC; 2358 if (wol->wolopts & WAKE_BCAST) 2359 adapter->wol |= IXGBE_WUFC_BC; 2360 if (wol->wolopts & WAKE_MAGIC) 2361 adapter->wol |= IXGBE_WUFC_MAG; 2362 2363 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 2364 2365 return 0; 2366 } 2367 2368 static int ixgbe_nway_reset(struct net_device *netdev) 2369 { 2370 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2371 2372 if (netif_running(netdev)) 2373 ixgbe_reinit_locked(adapter); 2374 2375 return 0; 2376 } 2377 2378 static int ixgbe_set_phys_id(struct net_device *netdev, 2379 enum ethtool_phys_id_state state) 2380 { 2381 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2382 struct ixgbe_hw *hw = &adapter->hw; 2383 2384 if (!hw->mac.ops.led_on || !hw->mac.ops.led_off) 2385 return -EOPNOTSUPP; 2386 2387 switch (state) { 2388 case ETHTOOL_ID_ACTIVE: 2389 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 2390 return 2; 2391 2392 case ETHTOOL_ID_ON: 2393 hw->mac.ops.led_on(hw, hw->mac.led_link_act); 2394 break; 2395 2396 case ETHTOOL_ID_OFF: 2397 hw->mac.ops.led_off(hw, hw->mac.led_link_act); 2398 break; 2399 2400 case ETHTOOL_ID_INACTIVE: 2401 /* Restore LED settings */ 2402 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg); 2403 break; 2404 } 2405 2406 return 0; 2407 } 2408 2409 static int ixgbe_get_coalesce(struct net_device *netdev, 2410 struct ethtool_coalesce *ec, 2411 struct kernel_ethtool_coalesce *kernel_coal, 2412 struct netlink_ext_ack *extack) 2413 { 2414 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2415 2416 /* only valid if in constant ITR mode */ 2417 if (adapter->rx_itr_setting <= 1) 2418 ec->rx_coalesce_usecs = adapter->rx_itr_setting; 2419 else 2420 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2; 2421 2422 /* if in mixed tx/rx queues per vector mode, report only rx settings */ 2423 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2424 return 0; 2425 2426 /* only valid if in constant ITR mode */ 2427 if (adapter->tx_itr_setting <= 1) 2428 ec->tx_coalesce_usecs = adapter->tx_itr_setting; 2429 else 2430 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2; 2431 2432 return 0; 2433 } 2434 2435 /* 2436 * this function must be called before setting the new value of 2437 * rx_itr_setting 2438 */ 2439 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter) 2440 { 2441 struct net_device *netdev = adapter->netdev; 2442 2443 /* nothing to do if LRO or RSC are not enabled */ 2444 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) || 2445 !(netdev->features & NETIF_F_LRO)) 2446 return false; 2447 2448 /* check the feature flag value and enable RSC if necessary */ 2449 if (adapter->rx_itr_setting == 1 || 2450 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { 2451 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { 2452 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; 2453 e_info(probe, "rx-usecs value high enough to re-enable RSC\n"); 2454 return true; 2455 } 2456 /* if interrupt rate is too high then disable RSC */ 2457 } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { 2458 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; 2459 e_info(probe, "rx-usecs set too low, disabling RSC\n"); 2460 return true; 2461 } 2462 return false; 2463 } 2464 2465 static int ixgbe_set_coalesce(struct net_device *netdev, 2466 struct ethtool_coalesce *ec, 2467 struct kernel_ethtool_coalesce *kernel_coal, 2468 struct netlink_ext_ack *extack) 2469 { 2470 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2471 struct ixgbe_q_vector *q_vector; 2472 int i; 2473 u16 tx_itr_param, rx_itr_param, tx_itr_prev; 2474 bool need_reset = false; 2475 2476 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) { 2477 /* reject Tx specific changes in case of mixed RxTx vectors */ 2478 if (ec->tx_coalesce_usecs) 2479 return -EINVAL; 2480 tx_itr_prev = adapter->rx_itr_setting; 2481 } else { 2482 tx_itr_prev = adapter->tx_itr_setting; 2483 } 2484 2485 if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) || 2486 (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2))) 2487 return -EINVAL; 2488 2489 if (ec->rx_coalesce_usecs > 1) 2490 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2; 2491 else 2492 adapter->rx_itr_setting = ec->rx_coalesce_usecs; 2493 2494 if (adapter->rx_itr_setting == 1) 2495 rx_itr_param = IXGBE_20K_ITR; 2496 else 2497 rx_itr_param = adapter->rx_itr_setting; 2498 2499 if (ec->tx_coalesce_usecs > 1) 2500 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2; 2501 else 2502 adapter->tx_itr_setting = ec->tx_coalesce_usecs; 2503 2504 if (adapter->tx_itr_setting == 1) 2505 tx_itr_param = IXGBE_12K_ITR; 2506 else 2507 tx_itr_param = adapter->tx_itr_setting; 2508 2509 /* mixed Rx/Tx */ 2510 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2511 adapter->tx_itr_setting = adapter->rx_itr_setting; 2512 2513 /* detect ITR changes that require update of TXDCTL.WTHRESH */ 2514 if ((adapter->tx_itr_setting != 1) && 2515 (adapter->tx_itr_setting < IXGBE_100K_ITR)) { 2516 if ((tx_itr_prev == 1) || 2517 (tx_itr_prev >= IXGBE_100K_ITR)) 2518 need_reset = true; 2519 } else { 2520 if ((tx_itr_prev != 1) && 2521 (tx_itr_prev < IXGBE_100K_ITR)) 2522 need_reset = true; 2523 } 2524 2525 /* check the old value and enable RSC if necessary */ 2526 need_reset |= ixgbe_update_rsc(adapter); 2527 2528 for (i = 0; i < adapter->num_q_vectors; i++) { 2529 q_vector = adapter->q_vector[i]; 2530 if (q_vector->tx.count && !q_vector->rx.count) 2531 /* tx only */ 2532 q_vector->itr = tx_itr_param; 2533 else 2534 /* rx only or mixed */ 2535 q_vector->itr = rx_itr_param; 2536 ixgbe_write_eitr(q_vector); 2537 } 2538 2539 /* 2540 * do reset here at the end to make sure EITR==0 case is handled 2541 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings 2542 * also locks in RSC enable/disable which requires reset 2543 */ 2544 if (need_reset) 2545 ixgbe_do_reset(netdev); 2546 2547 return 0; 2548 } 2549 2550 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2551 struct ethtool_rxnfc *cmd) 2552 { 2553 union ixgbe_atr_input *mask = &adapter->fdir_mask; 2554 struct ethtool_rx_flow_spec *fsp = 2555 (struct ethtool_rx_flow_spec *)&cmd->fs; 2556 struct hlist_node *node2; 2557 struct ixgbe_fdir_filter *rule = NULL; 2558 2559 /* report total rule count */ 2560 cmd->data = (1024 << adapter->fdir_pballoc) - 2; 2561 2562 hlist_for_each_entry_safe(rule, node2, 2563 &adapter->fdir_filter_list, fdir_node) { 2564 if (fsp->location <= rule->sw_idx) 2565 break; 2566 } 2567 2568 if (!rule || fsp->location != rule->sw_idx) 2569 return -EINVAL; 2570 2571 /* fill out the flow spec entry */ 2572 2573 /* set flow type field */ 2574 switch (rule->filter.formatted.flow_type) { 2575 case IXGBE_ATR_FLOW_TYPE_TCPV4: 2576 fsp->flow_type = TCP_V4_FLOW; 2577 break; 2578 case IXGBE_ATR_FLOW_TYPE_UDPV4: 2579 fsp->flow_type = UDP_V4_FLOW; 2580 break; 2581 case IXGBE_ATR_FLOW_TYPE_SCTPV4: 2582 fsp->flow_type = SCTP_V4_FLOW; 2583 break; 2584 case IXGBE_ATR_FLOW_TYPE_IPV4: 2585 fsp->flow_type = IP_USER_FLOW; 2586 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2587 fsp->h_u.usr_ip4_spec.proto = 0; 2588 fsp->m_u.usr_ip4_spec.proto = 0; 2589 break; 2590 default: 2591 return -EINVAL; 2592 } 2593 2594 fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port; 2595 fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port; 2596 fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port; 2597 fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port; 2598 fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0]; 2599 fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0]; 2600 fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0]; 2601 fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0]; 2602 fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id; 2603 fsp->m_ext.vlan_tci = mask->formatted.vlan_id; 2604 fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes; 2605 fsp->m_ext.vlan_etype = mask->formatted.flex_bytes; 2606 fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool); 2607 fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool); 2608 fsp->flow_type |= FLOW_EXT; 2609 2610 /* record action */ 2611 if (rule->action == IXGBE_FDIR_DROP_QUEUE) 2612 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2613 else 2614 fsp->ring_cookie = rule->action; 2615 2616 return 0; 2617 } 2618 2619 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter, 2620 struct ethtool_rxnfc *cmd, 2621 u32 *rule_locs) 2622 { 2623 struct hlist_node *node2; 2624 struct ixgbe_fdir_filter *rule; 2625 int cnt = 0; 2626 2627 /* report total rule count */ 2628 cmd->data = (1024 << adapter->fdir_pballoc) - 2; 2629 2630 hlist_for_each_entry_safe(rule, node2, 2631 &adapter->fdir_filter_list, fdir_node) { 2632 if (cnt == cmd->rule_cnt) 2633 return -EMSGSIZE; 2634 rule_locs[cnt] = rule->sw_idx; 2635 cnt++; 2636 } 2637 2638 cmd->rule_cnt = cnt; 2639 2640 return 0; 2641 } 2642 2643 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter, 2644 struct ethtool_rxnfc *cmd) 2645 { 2646 cmd->data = 0; 2647 2648 /* Report default options for RSS on ixgbe */ 2649 switch (cmd->flow_type) { 2650 case TCP_V4_FLOW: 2651 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2652 fallthrough; 2653 case UDP_V4_FLOW: 2654 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 2655 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2656 fallthrough; 2657 case SCTP_V4_FLOW: 2658 case AH_ESP_V4_FLOW: 2659 case AH_V4_FLOW: 2660 case ESP_V4_FLOW: 2661 case IPV4_FLOW: 2662 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2663 break; 2664 case TCP_V6_FLOW: 2665 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2666 fallthrough; 2667 case UDP_V6_FLOW: 2668 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 2669 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2670 fallthrough; 2671 case SCTP_V6_FLOW: 2672 case AH_ESP_V6_FLOW: 2673 case AH_V6_FLOW: 2674 case ESP_V6_FLOW: 2675 case IPV6_FLOW: 2676 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2677 break; 2678 default: 2679 return -EINVAL; 2680 } 2681 2682 return 0; 2683 } 2684 2685 static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter) 2686 { 2687 if (adapter->hw.mac.type < ixgbe_mac_X550) 2688 return 16; 2689 else 2690 return 64; 2691 } 2692 2693 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 2694 u32 *rule_locs) 2695 { 2696 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2697 int ret = -EOPNOTSUPP; 2698 2699 switch (cmd->cmd) { 2700 case ETHTOOL_GRXRINGS: 2701 cmd->data = min_t(int, adapter->num_rx_queues, 2702 ixgbe_rss_indir_tbl_max(adapter)); 2703 ret = 0; 2704 break; 2705 case ETHTOOL_GRXCLSRLCNT: 2706 cmd->rule_cnt = adapter->fdir_filter_count; 2707 ret = 0; 2708 break; 2709 case ETHTOOL_GRXCLSRULE: 2710 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd); 2711 break; 2712 case ETHTOOL_GRXCLSRLALL: 2713 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs); 2714 break; 2715 case ETHTOOL_GRXFH: 2716 ret = ixgbe_get_rss_hash_opts(adapter, cmd); 2717 break; 2718 default: 2719 break; 2720 } 2721 2722 return ret; 2723 } 2724 2725 int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2726 struct ixgbe_fdir_filter *input, 2727 u16 sw_idx) 2728 { 2729 struct ixgbe_hw *hw = &adapter->hw; 2730 struct hlist_node *node2; 2731 struct ixgbe_fdir_filter *rule, *parent; 2732 int err = -EINVAL; 2733 2734 parent = NULL; 2735 rule = NULL; 2736 2737 hlist_for_each_entry_safe(rule, node2, 2738 &adapter->fdir_filter_list, fdir_node) { 2739 /* hash found, or no matching entry */ 2740 if (rule->sw_idx >= sw_idx) 2741 break; 2742 parent = rule; 2743 } 2744 2745 /* if there is an old rule occupying our place remove it */ 2746 if (rule && (rule->sw_idx == sw_idx)) { 2747 if (!input || (rule->filter.formatted.bkt_hash != 2748 input->filter.formatted.bkt_hash)) { 2749 err = ixgbe_fdir_erase_perfect_filter_82599(hw, 2750 &rule->filter, 2751 sw_idx); 2752 } 2753 2754 hlist_del(&rule->fdir_node); 2755 kfree(rule); 2756 adapter->fdir_filter_count--; 2757 } 2758 2759 /* 2760 * If no input this was a delete, err should be 0 if a rule was 2761 * successfully found and removed from the list else -EINVAL 2762 */ 2763 if (!input) 2764 return err; 2765 2766 /* initialize node and set software index */ 2767 INIT_HLIST_NODE(&input->fdir_node); 2768 2769 /* add filter to the list */ 2770 if (parent) 2771 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 2772 else 2773 hlist_add_head(&input->fdir_node, 2774 &adapter->fdir_filter_list); 2775 2776 /* update counts */ 2777 adapter->fdir_filter_count++; 2778 2779 return 0; 2780 } 2781 2782 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp, 2783 u8 *flow_type) 2784 { 2785 switch (fsp->flow_type & ~FLOW_EXT) { 2786 case TCP_V4_FLOW: 2787 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 2788 break; 2789 case UDP_V4_FLOW: 2790 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; 2791 break; 2792 case SCTP_V4_FLOW: 2793 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; 2794 break; 2795 case IP_USER_FLOW: 2796 switch (fsp->h_u.usr_ip4_spec.proto) { 2797 case IPPROTO_TCP: 2798 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 2799 break; 2800 case IPPROTO_UDP: 2801 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; 2802 break; 2803 case IPPROTO_SCTP: 2804 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; 2805 break; 2806 case 0: 2807 if (!fsp->m_u.usr_ip4_spec.proto) { 2808 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4; 2809 break; 2810 } 2811 fallthrough; 2812 default: 2813 return 0; 2814 } 2815 break; 2816 default: 2817 return 0; 2818 } 2819 2820 return 1; 2821 } 2822 2823 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2824 struct ethtool_rxnfc *cmd) 2825 { 2826 struct ethtool_rx_flow_spec *fsp = 2827 (struct ethtool_rx_flow_spec *)&cmd->fs; 2828 struct ixgbe_hw *hw = &adapter->hw; 2829 struct ixgbe_fdir_filter *input; 2830 union ixgbe_atr_input mask; 2831 u8 queue; 2832 int err; 2833 2834 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) 2835 return -EOPNOTSUPP; 2836 2837 /* ring_cookie is a masked into a set of queues and ixgbe pools or 2838 * we use the drop index. 2839 */ 2840 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 2841 queue = IXGBE_FDIR_DROP_QUEUE; 2842 } else { 2843 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 2844 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 2845 2846 if (!vf && (ring >= adapter->num_rx_queues)) 2847 return -EINVAL; 2848 else if (vf && 2849 ((vf > adapter->num_vfs) || 2850 ring >= adapter->num_rx_queues_per_pool)) 2851 return -EINVAL; 2852 2853 /* Map the ring onto the absolute queue index */ 2854 if (!vf) 2855 queue = adapter->rx_ring[ring]->reg_idx; 2856 else 2857 queue = ((vf - 1) * 2858 adapter->num_rx_queues_per_pool) + ring; 2859 } 2860 2861 /* Don't allow indexes to exist outside of available space */ 2862 if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) { 2863 e_err(drv, "Location out of range\n"); 2864 return -EINVAL; 2865 } 2866 2867 input = kzalloc(sizeof(*input), GFP_ATOMIC); 2868 if (!input) 2869 return -ENOMEM; 2870 2871 memset(&mask, 0, sizeof(union ixgbe_atr_input)); 2872 2873 /* set SW index */ 2874 input->sw_idx = fsp->location; 2875 2876 /* record flow type */ 2877 if (!ixgbe_flowspec_to_flow_type(fsp, 2878 &input->filter.formatted.flow_type)) { 2879 e_err(drv, "Unrecognized flow type\n"); 2880 goto err_out; 2881 } 2882 2883 mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | 2884 IXGBE_ATR_L4TYPE_MASK; 2885 2886 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4) 2887 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK; 2888 2889 /* Copy input into formatted structures */ 2890 input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src; 2891 mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src; 2892 input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst; 2893 mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst; 2894 input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc; 2895 mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc; 2896 input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst; 2897 mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst; 2898 2899 if (fsp->flow_type & FLOW_EXT) { 2900 input->filter.formatted.vm_pool = 2901 (unsigned char)ntohl(fsp->h_ext.data[1]); 2902 mask.formatted.vm_pool = 2903 (unsigned char)ntohl(fsp->m_ext.data[1]); 2904 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci; 2905 mask.formatted.vlan_id = fsp->m_ext.vlan_tci; 2906 input->filter.formatted.flex_bytes = 2907 fsp->h_ext.vlan_etype; 2908 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype; 2909 } 2910 2911 /* determine if we need to drop or route the packet */ 2912 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) 2913 input->action = IXGBE_FDIR_DROP_QUEUE; 2914 else 2915 input->action = fsp->ring_cookie; 2916 2917 spin_lock(&adapter->fdir_perfect_lock); 2918 2919 if (hlist_empty(&adapter->fdir_filter_list)) { 2920 /* save mask and program input mask into HW */ 2921 memcpy(&adapter->fdir_mask, &mask, sizeof(mask)); 2922 err = ixgbe_fdir_set_input_mask_82599(hw, &mask); 2923 if (err) { 2924 e_err(drv, "Error writing mask\n"); 2925 goto err_out_w_lock; 2926 } 2927 } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) { 2928 e_err(drv, "Only one mask supported per port\n"); 2929 goto err_out_w_lock; 2930 } 2931 2932 /* apply mask and compute/store hash */ 2933 ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask); 2934 2935 /* program filters to filter memory */ 2936 err = ixgbe_fdir_write_perfect_filter_82599(hw, 2937 &input->filter, input->sw_idx, queue); 2938 if (err) 2939 goto err_out_w_lock; 2940 2941 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx); 2942 2943 spin_unlock(&adapter->fdir_perfect_lock); 2944 2945 return err; 2946 err_out_w_lock: 2947 spin_unlock(&adapter->fdir_perfect_lock); 2948 err_out: 2949 kfree(input); 2950 return -EINVAL; 2951 } 2952 2953 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2954 struct ethtool_rxnfc *cmd) 2955 { 2956 struct ethtool_rx_flow_spec *fsp = 2957 (struct ethtool_rx_flow_spec *)&cmd->fs; 2958 int err; 2959 2960 spin_lock(&adapter->fdir_perfect_lock); 2961 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location); 2962 spin_unlock(&adapter->fdir_perfect_lock); 2963 2964 return err; 2965 } 2966 2967 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \ 2968 IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 2969 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter, 2970 struct ethtool_rxnfc *nfc) 2971 { 2972 u32 flags2 = adapter->flags2; 2973 2974 /* 2975 * RSS does not support anything other than hashing 2976 * to queues on src and dst IPs and ports 2977 */ 2978 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2979 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2980 return -EINVAL; 2981 2982 switch (nfc->flow_type) { 2983 case TCP_V4_FLOW: 2984 case TCP_V6_FLOW: 2985 if (!(nfc->data & RXH_IP_SRC) || 2986 !(nfc->data & RXH_IP_DST) || 2987 !(nfc->data & RXH_L4_B_0_1) || 2988 !(nfc->data & RXH_L4_B_2_3)) 2989 return -EINVAL; 2990 break; 2991 case UDP_V4_FLOW: 2992 if (!(nfc->data & RXH_IP_SRC) || 2993 !(nfc->data & RXH_IP_DST)) 2994 return -EINVAL; 2995 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 2996 case 0: 2997 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; 2998 break; 2999 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 3000 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; 3001 break; 3002 default: 3003 return -EINVAL; 3004 } 3005 break; 3006 case UDP_V6_FLOW: 3007 if (!(nfc->data & RXH_IP_SRC) || 3008 !(nfc->data & RXH_IP_DST)) 3009 return -EINVAL; 3010 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 3011 case 0: 3012 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; 3013 break; 3014 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 3015 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; 3016 break; 3017 default: 3018 return -EINVAL; 3019 } 3020 break; 3021 case AH_ESP_V4_FLOW: 3022 case AH_V4_FLOW: 3023 case ESP_V4_FLOW: 3024 case SCTP_V4_FLOW: 3025 case AH_ESP_V6_FLOW: 3026 case AH_V6_FLOW: 3027 case ESP_V6_FLOW: 3028 case SCTP_V6_FLOW: 3029 if (!(nfc->data & RXH_IP_SRC) || 3030 !(nfc->data & RXH_IP_DST) || 3031 (nfc->data & RXH_L4_B_0_1) || 3032 (nfc->data & RXH_L4_B_2_3)) 3033 return -EINVAL; 3034 break; 3035 default: 3036 return -EINVAL; 3037 } 3038 3039 /* if we changed something we need to update flags */ 3040 if (flags2 != adapter->flags2) { 3041 struct ixgbe_hw *hw = &adapter->hw; 3042 u32 mrqc; 3043 unsigned int pf_pool = adapter->num_vfs; 3044 3045 if ((hw->mac.type >= ixgbe_mac_X550) && 3046 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 3047 mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool)); 3048 else 3049 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); 3050 3051 if ((flags2 & UDP_RSS_FLAGS) && 3052 !(adapter->flags2 & UDP_RSS_FLAGS)) 3053 e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n"); 3054 3055 adapter->flags2 = flags2; 3056 3057 /* Perform hash on these packet types */ 3058 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 3059 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP 3060 | IXGBE_MRQC_RSS_FIELD_IPV6 3061 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 3062 3063 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP | 3064 IXGBE_MRQC_RSS_FIELD_IPV6_UDP); 3065 3066 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 3067 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 3068 3069 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 3070 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 3071 3072 if ((hw->mac.type >= ixgbe_mac_X550) && 3073 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 3074 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc); 3075 else 3076 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 3077 } 3078 3079 return 0; 3080 } 3081 3082 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 3083 { 3084 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3085 int ret = -EOPNOTSUPP; 3086 3087 switch (cmd->cmd) { 3088 case ETHTOOL_SRXCLSRLINS: 3089 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd); 3090 break; 3091 case ETHTOOL_SRXCLSRLDEL: 3092 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd); 3093 break; 3094 case ETHTOOL_SRXFH: 3095 ret = ixgbe_set_rss_hash_opt(adapter, cmd); 3096 break; 3097 default: 3098 break; 3099 } 3100 3101 return ret; 3102 } 3103 3104 static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev) 3105 { 3106 return IXGBE_RSS_KEY_SIZE; 3107 } 3108 3109 static u32 ixgbe_rss_indir_size(struct net_device *netdev) 3110 { 3111 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3112 3113 return ixgbe_rss_indir_tbl_entries(adapter); 3114 } 3115 3116 static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir) 3117 { 3118 int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter); 3119 u16 rss_m = adapter->ring_feature[RING_F_RSS].mask; 3120 3121 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 3122 rss_m = adapter->ring_feature[RING_F_RSS].indices - 1; 3123 3124 for (i = 0; i < reta_size; i++) 3125 indir[i] = adapter->rss_indir_tbl[i] & rss_m; 3126 } 3127 3128 static int ixgbe_get_rxfh(struct net_device *netdev, 3129 struct ethtool_rxfh_param *rxfh) 3130 { 3131 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3132 3133 rxfh->hfunc = ETH_RSS_HASH_TOP; 3134 3135 if (rxfh->indir) 3136 ixgbe_get_reta(adapter, rxfh->indir); 3137 3138 if (rxfh->key) 3139 memcpy(rxfh->key, adapter->rss_key, 3140 ixgbe_get_rxfh_key_size(netdev)); 3141 3142 return 0; 3143 } 3144 3145 static int ixgbe_set_rxfh(struct net_device *netdev, 3146 struct ethtool_rxfh_param *rxfh, 3147 struct netlink_ext_ack *extack) 3148 { 3149 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3150 int i; 3151 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 3152 3153 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE && 3154 rxfh->hfunc != ETH_RSS_HASH_TOP) 3155 return -EOPNOTSUPP; 3156 3157 /* Fill out the redirection table */ 3158 if (rxfh->indir) { 3159 int max_queues = min_t(int, adapter->num_rx_queues, 3160 ixgbe_rss_indir_tbl_max(adapter)); 3161 3162 /*Allow at least 2 queues w/ SR-IOV.*/ 3163 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && 3164 (max_queues < 2)) 3165 max_queues = 2; 3166 3167 /* Verify user input. */ 3168 for (i = 0; i < reta_entries; i++) 3169 if (rxfh->indir[i] >= max_queues) 3170 return -EINVAL; 3171 3172 for (i = 0; i < reta_entries; i++) 3173 adapter->rss_indir_tbl[i] = rxfh->indir[i]; 3174 3175 ixgbe_store_reta(adapter); 3176 } 3177 3178 /* Fill out the rss hash key */ 3179 if (rxfh->key) { 3180 memcpy(adapter->rss_key, rxfh->key, 3181 ixgbe_get_rxfh_key_size(netdev)); 3182 ixgbe_store_key(adapter); 3183 } 3184 3185 return 0; 3186 } 3187 3188 static int ixgbe_get_ts_info(struct net_device *dev, 3189 struct kernel_ethtool_ts_info *info) 3190 { 3191 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3192 3193 /* we always support timestamping disabled */ 3194 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE); 3195 3196 switch (adapter->hw.mac.type) { 3197 case ixgbe_mac_X550: 3198 case ixgbe_mac_X550EM_x: 3199 case ixgbe_mac_x550em_a: 3200 case ixgbe_mac_e610: 3201 info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL); 3202 break; 3203 case ixgbe_mac_X540: 3204 case ixgbe_mac_82599EB: 3205 info->rx_filters |= 3206 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 3207 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 3208 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); 3209 break; 3210 default: 3211 return ethtool_op_get_ts_info(dev, info); 3212 } 3213 3214 info->so_timestamping = 3215 SOF_TIMESTAMPING_TX_SOFTWARE | 3216 SOF_TIMESTAMPING_TX_HARDWARE | 3217 SOF_TIMESTAMPING_RX_HARDWARE | 3218 SOF_TIMESTAMPING_RAW_HARDWARE; 3219 3220 if (adapter->ptp_clock) 3221 info->phc_index = ptp_clock_index(adapter->ptp_clock); 3222 3223 info->tx_types = 3224 BIT(HWTSTAMP_TX_OFF) | 3225 BIT(HWTSTAMP_TX_ON); 3226 3227 return 0; 3228 } 3229 3230 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter) 3231 { 3232 unsigned int max_combined; 3233 u8 tcs = adapter->hw_tcs; 3234 3235 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { 3236 /* We only support one q_vector without MSI-X */ 3237 max_combined = 1; 3238 } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 3239 /* Limit value based on the queue mask */ 3240 max_combined = adapter->ring_feature[RING_F_RSS].mask + 1; 3241 } else if (tcs > 1) { 3242 /* For DCB report channels per traffic class */ 3243 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3244 /* 8 TC w/ 4 queues per TC */ 3245 max_combined = 4; 3246 } else if (tcs > 4) { 3247 /* 8 TC w/ 8 queues per TC */ 3248 max_combined = 8; 3249 } else { 3250 /* 4 TC w/ 16 queues per TC */ 3251 max_combined = 16; 3252 } 3253 } else if (adapter->atr_sample_rate) { 3254 /* support up to 64 queues with ATR */ 3255 max_combined = IXGBE_MAX_FDIR_INDICES; 3256 } else { 3257 /* support up to 16 queues with RSS */ 3258 max_combined = ixgbe_max_rss_indices(adapter); 3259 } 3260 3261 return min_t(int, max_combined, num_online_cpus()); 3262 } 3263 3264 static void ixgbe_get_channels(struct net_device *dev, 3265 struct ethtool_channels *ch) 3266 { 3267 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3268 3269 /* report maximum channels */ 3270 ch->max_combined = ixgbe_max_channels(adapter); 3271 3272 /* report info for other vector */ 3273 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 3274 ch->max_other = NON_Q_VECTORS; 3275 ch->other_count = NON_Q_VECTORS; 3276 } 3277 3278 /* record RSS queues */ 3279 ch->combined_count = adapter->ring_feature[RING_F_RSS].indices; 3280 3281 /* nothing else to report if RSS is disabled */ 3282 if (ch->combined_count == 1) 3283 return; 3284 3285 /* we do not support ATR queueing if SR-IOV is enabled */ 3286 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 3287 return; 3288 3289 /* same thing goes for being DCB enabled */ 3290 if (adapter->hw_tcs > 1) 3291 return; 3292 3293 /* if ATR is disabled we can exit */ 3294 if (!adapter->atr_sample_rate) 3295 return; 3296 3297 /* report flow director queues as maximum channels */ 3298 ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices; 3299 } 3300 3301 static int ixgbe_set_channels(struct net_device *dev, 3302 struct ethtool_channels *ch) 3303 { 3304 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3305 unsigned int count = ch->combined_count; 3306 u8 max_rss_indices = ixgbe_max_rss_indices(adapter); 3307 3308 /* verify they are not requesting separate vectors */ 3309 if (!count || ch->rx_count || ch->tx_count) 3310 return -EINVAL; 3311 3312 /* verify other_count has not changed */ 3313 if (ch->other_count != NON_Q_VECTORS) 3314 return -EINVAL; 3315 3316 /* verify the number of channels does not exceed hardware limits */ 3317 if (count > ixgbe_max_channels(adapter)) 3318 return -EINVAL; 3319 3320 /* update feature limits from largest to smallest supported values */ 3321 adapter->ring_feature[RING_F_FDIR].limit = count; 3322 3323 /* cap RSS limit */ 3324 if (count > max_rss_indices) 3325 count = max_rss_indices; 3326 adapter->ring_feature[RING_F_RSS].limit = count; 3327 3328 #ifdef IXGBE_FCOE 3329 /* cap FCoE limit at 8 */ 3330 if (count > IXGBE_FCRETA_SIZE) 3331 count = IXGBE_FCRETA_SIZE; 3332 adapter->ring_feature[RING_F_FCOE].limit = count; 3333 3334 #endif 3335 /* use setup TC to update any traffic class queue mapping */ 3336 return ixgbe_setup_tc(dev, adapter->hw_tcs); 3337 } 3338 3339 static int ixgbe_get_module_info(struct net_device *dev, 3340 struct ethtool_modinfo *modinfo) 3341 { 3342 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3343 struct ixgbe_hw *hw = &adapter->hw; 3344 u8 sff8472_rev, addr_mode; 3345 bool page_swap = false; 3346 int status; 3347 3348 if (hw->phy.type == ixgbe_phy_fw) 3349 return -ENXIO; 3350 3351 /* Check whether we support SFF-8472 or not */ 3352 status = hw->phy.ops.read_i2c_eeprom(hw, 3353 IXGBE_SFF_SFF_8472_COMP, 3354 &sff8472_rev); 3355 if (status) 3356 return -EIO; 3357 3358 /* addressing mode is not supported */ 3359 status = hw->phy.ops.read_i2c_eeprom(hw, 3360 IXGBE_SFF_SFF_8472_SWAP, 3361 &addr_mode); 3362 if (status) 3363 return -EIO; 3364 3365 if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) { 3366 e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n"); 3367 page_swap = true; 3368 } 3369 3370 if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap || 3371 !(addr_mode & IXGBE_SFF_DDM_IMPLEMENTED)) { 3372 /* We have a SFP, but it does not support SFF-8472 */ 3373 modinfo->type = ETH_MODULE_SFF_8079; 3374 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 3375 } else { 3376 /* We have a SFP which supports a revision of SFF-8472. */ 3377 modinfo->type = ETH_MODULE_SFF_8472; 3378 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 3379 } 3380 3381 return 0; 3382 } 3383 3384 static int ixgbe_get_module_eeprom(struct net_device *dev, 3385 struct ethtool_eeprom *ee, 3386 u8 *data) 3387 { 3388 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3389 struct ixgbe_hw *hw = &adapter->hw; 3390 int status = -EFAULT; 3391 u8 databyte = 0xFF; 3392 int i = 0; 3393 3394 if (ee->len == 0) 3395 return -EINVAL; 3396 3397 if (hw->phy.type == ixgbe_phy_fw) 3398 return -ENXIO; 3399 3400 for (i = ee->offset; i < ee->offset + ee->len; i++) { 3401 /* I2C reads can take long time */ 3402 if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 3403 return -EBUSY; 3404 3405 if (i < ETH_MODULE_SFF_8079_LEN) 3406 status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte); 3407 else 3408 status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte); 3409 3410 if (status) 3411 return -EIO; 3412 3413 data[i - ee->offset] = databyte; 3414 } 3415 3416 return 0; 3417 } 3418 3419 static const struct { 3420 ixgbe_link_speed mac_speed; 3421 u32 link_mode; 3422 } ixgbe_ls_map[] = { 3423 { IXGBE_LINK_SPEED_10_FULL, ETHTOOL_LINK_MODE_10baseT_Full_BIT }, 3424 { IXGBE_LINK_SPEED_100_FULL, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, 3425 { IXGBE_LINK_SPEED_1GB_FULL, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, 3426 { IXGBE_LINK_SPEED_2_5GB_FULL, ETHTOOL_LINK_MODE_2500baseX_Full_BIT }, 3427 { IXGBE_LINK_SPEED_10GB_FULL, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, 3428 }; 3429 3430 static const struct { 3431 u32 lp_advertised; 3432 u32 link_mode; 3433 } ixgbe_lp_map[] = { 3434 { FW_PHY_ACT_UD_2_100M_TX_EEE, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, 3435 { FW_PHY_ACT_UD_2_1G_T_EEE, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, 3436 { FW_PHY_ACT_UD_2_10G_T_EEE, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, 3437 { FW_PHY_ACT_UD_2_1G_KX_EEE, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT }, 3438 { FW_PHY_ACT_UD_2_10G_KX4_EEE, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT }, 3439 { FW_PHY_ACT_UD_2_10G_KR_EEE, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 3440 }; 3441 3442 static int 3443 ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_keee *edata) 3444 { 3445 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 3446 u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 }; 3447 struct ixgbe_hw *hw = &adapter->hw; 3448 int rc; 3449 u16 i; 3450 3451 rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info); 3452 if (rc) 3453 return rc; 3454 3455 for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) { 3456 if (info[0] & ixgbe_lp_map[i].lp_advertised) 3457 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3458 edata->lp_advertised); 3459 } 3460 3461 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { 3462 if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed) 3463 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3464 edata->supported); 3465 } 3466 3467 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { 3468 if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed) 3469 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3470 edata->advertised); 3471 } 3472 3473 edata->eee_enabled = !linkmode_empty(edata->advertised); 3474 edata->tx_lpi_enabled = edata->eee_enabled; 3475 3476 linkmode_and(common, edata->advertised, edata->lp_advertised); 3477 edata->eee_active = !linkmode_empty(common); 3478 3479 return 0; 3480 } 3481 3482 static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_keee *edata) 3483 { 3484 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3485 struct ixgbe_hw *hw = &adapter->hw; 3486 3487 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) 3488 return -EOPNOTSUPP; 3489 3490 if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw) 3491 return ixgbe_get_eee_fw(adapter, edata); 3492 3493 return -EOPNOTSUPP; 3494 } 3495 3496 static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_keee *edata) 3497 { 3498 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3499 struct ixgbe_hw *hw = &adapter->hw; 3500 struct ethtool_keee eee_data; 3501 int ret_val; 3502 3503 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) 3504 return -EOPNOTSUPP; 3505 3506 memset(&eee_data, 0, sizeof(struct ethtool_keee)); 3507 3508 ret_val = ixgbe_get_eee(netdev, &eee_data); 3509 if (ret_val) 3510 return ret_val; 3511 3512 if (eee_data.eee_enabled && !edata->eee_enabled) { 3513 if (eee_data.tx_lpi_enabled != edata->tx_lpi_enabled) { 3514 e_err(drv, "Setting EEE tx-lpi is not supported\n"); 3515 return -EINVAL; 3516 } 3517 3518 if (eee_data.tx_lpi_timer != edata->tx_lpi_timer) { 3519 e_err(drv, 3520 "Setting EEE Tx LPI timer is not supported\n"); 3521 return -EINVAL; 3522 } 3523 3524 if (!linkmode_equal(eee_data.advertised, edata->advertised)) { 3525 e_err(drv, 3526 "Setting EEE advertised speeds is not supported\n"); 3527 return -EINVAL; 3528 } 3529 } 3530 3531 if (eee_data.eee_enabled != edata->eee_enabled) { 3532 if (edata->eee_enabled) { 3533 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED; 3534 hw->phy.eee_speeds_advertised = 3535 hw->phy.eee_speeds_supported; 3536 } else { 3537 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED; 3538 hw->phy.eee_speeds_advertised = 0; 3539 } 3540 3541 /* reset link */ 3542 if (netif_running(netdev)) 3543 ixgbe_reinit_locked(adapter); 3544 else 3545 ixgbe_reset(adapter); 3546 } 3547 3548 return 0; 3549 } 3550 3551 static u32 ixgbe_get_priv_flags(struct net_device *netdev) 3552 { 3553 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3554 u32 priv_flags = 0; 3555 3556 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) 3557 priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX; 3558 3559 if (adapter->flags2 & IXGBE_FLAG2_VF_IPSEC_ENABLED) 3560 priv_flags |= IXGBE_PRIV_FLAGS_VF_IPSEC_EN; 3561 3562 if (adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF) 3563 priv_flags |= IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF; 3564 3565 return priv_flags; 3566 } 3567 3568 static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags) 3569 { 3570 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3571 unsigned int flags2 = adapter->flags2; 3572 unsigned int i; 3573 3574 flags2 &= ~IXGBE_FLAG2_RX_LEGACY; 3575 if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX) 3576 flags2 |= IXGBE_FLAG2_RX_LEGACY; 3577 3578 flags2 &= ~IXGBE_FLAG2_VF_IPSEC_ENABLED; 3579 if (priv_flags & IXGBE_PRIV_FLAGS_VF_IPSEC_EN) 3580 flags2 |= IXGBE_FLAG2_VF_IPSEC_ENABLED; 3581 3582 flags2 &= ~IXGBE_FLAG2_AUTO_DISABLE_VF; 3583 if (priv_flags & IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF) { 3584 if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 3585 /* Reset primary abort counter */ 3586 for (i = 0; i < adapter->num_vfs; i++) 3587 adapter->vfinfo[i].primary_abort_count = 0; 3588 3589 flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF; 3590 } else { 3591 e_info(probe, 3592 "Cannot set private flags: Operation not supported\n"); 3593 return -EOPNOTSUPP; 3594 } 3595 } 3596 3597 if (flags2 != adapter->flags2) { 3598 adapter->flags2 = flags2; 3599 3600 /* reset interface to repopulate queues */ 3601 if (netif_running(netdev)) 3602 ixgbe_reinit_locked(adapter); 3603 } 3604 3605 return 0; 3606 } 3607 3608 static const struct ethtool_ops ixgbe_ethtool_ops = { 3609 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 3610 .get_drvinfo = ixgbe_get_drvinfo, 3611 .get_regs_len = ixgbe_get_regs_len, 3612 .get_regs = ixgbe_get_regs, 3613 .get_wol = ixgbe_get_wol, 3614 .set_wol = ixgbe_set_wol, 3615 .nway_reset = ixgbe_nway_reset, 3616 .get_link = ethtool_op_get_link, 3617 .get_eeprom_len = ixgbe_get_eeprom_len, 3618 .get_eeprom = ixgbe_get_eeprom, 3619 .set_eeprom = ixgbe_set_eeprom, 3620 .get_ringparam = ixgbe_get_ringparam, 3621 .set_ringparam = ixgbe_set_ringparam, 3622 .get_pause_stats = ixgbe_get_pause_stats, 3623 .get_pauseparam = ixgbe_get_pauseparam, 3624 .set_pauseparam = ixgbe_set_pauseparam, 3625 .get_msglevel = ixgbe_get_msglevel, 3626 .set_msglevel = ixgbe_set_msglevel, 3627 .self_test = ixgbe_diag_test, 3628 .get_strings = ixgbe_get_strings, 3629 .set_phys_id = ixgbe_set_phys_id, 3630 .get_sset_count = ixgbe_get_sset_count, 3631 .get_ethtool_stats = ixgbe_get_ethtool_stats, 3632 .get_coalesce = ixgbe_get_coalesce, 3633 .set_coalesce = ixgbe_set_coalesce, 3634 .get_rxnfc = ixgbe_get_rxnfc, 3635 .set_rxnfc = ixgbe_set_rxnfc, 3636 .get_rxfh_indir_size = ixgbe_rss_indir_size, 3637 .get_rxfh_key_size = ixgbe_get_rxfh_key_size, 3638 .get_rxfh = ixgbe_get_rxfh, 3639 .set_rxfh = ixgbe_set_rxfh, 3640 .get_eee = ixgbe_get_eee, 3641 .set_eee = ixgbe_set_eee, 3642 .get_channels = ixgbe_get_channels, 3643 .set_channels = ixgbe_set_channels, 3644 .get_priv_flags = ixgbe_get_priv_flags, 3645 .set_priv_flags = ixgbe_set_priv_flags, 3646 .get_ts_info = ixgbe_get_ts_info, 3647 .get_module_info = ixgbe_get_module_info, 3648 .get_module_eeprom = ixgbe_get_module_eeprom, 3649 .get_link_ksettings = ixgbe_get_link_ksettings, 3650 .set_link_ksettings = ixgbe_set_link_ksettings, 3651 }; 3652 3653 void ixgbe_set_ethtool_ops(struct net_device *netdev) 3654 { 3655 netdev->ethtool_ops = &ixgbe_ethtool_ops; 3656 } 3657