1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2024 Intel Corporation. */ 3 4 /* ethtool support for ixgbe */ 5 6 #include <linux/interrupt.h> 7 #include <linux/types.h> 8 #include <linux/module.h> 9 #include <linux/slab.h> 10 #include <linux/pci.h> 11 #include <linux/netdevice.h> 12 #include <linux/ethtool.h> 13 #include <linux/vmalloc.h> 14 #include <linux/highmem.h> 15 #include <linux/uaccess.h> 16 17 #include "ixgbe.h" 18 #include "ixgbe_phy.h" 19 20 21 enum {NETDEV_STATS, IXGBE_STATS}; 22 23 struct ixgbe_stats { 24 char stat_string[ETH_GSTRING_LEN]; 25 int type; 26 int sizeof_stat; 27 int stat_offset; 28 }; 29 30 #define IXGBE_STAT(m) IXGBE_STATS, \ 31 sizeof(((struct ixgbe_adapter *)0)->m), \ 32 offsetof(struct ixgbe_adapter, m) 33 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \ 34 sizeof(((struct rtnl_link_stats64 *)0)->m), \ 35 offsetof(struct rtnl_link_stats64, m) 36 37 static const struct ixgbe_stats ixgbe_gstrings_stats[] = { 38 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)}, 39 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)}, 40 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)}, 41 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)}, 42 {"rx_pkts_nic", IXGBE_STAT(stats.gprc)}, 43 {"tx_pkts_nic", IXGBE_STAT(stats.gptc)}, 44 {"rx_bytes_nic", IXGBE_STAT(stats.gorc)}, 45 {"tx_bytes_nic", IXGBE_STAT(stats.gotc)}, 46 {"lsc_int", IXGBE_STAT(lsc_int)}, 47 {"tx_busy", IXGBE_STAT(tx_busy)}, 48 {"non_eop_descs", IXGBE_STAT(non_eop_descs)}, 49 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)}, 50 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)}, 51 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)}, 52 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)}, 53 {"multicast", IXGBE_NETDEV_STAT(multicast)}, 54 {"broadcast", IXGBE_STAT(stats.bprc)}, 55 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) }, 56 {"collisions", IXGBE_NETDEV_STAT(collisions)}, 57 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)}, 58 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)}, 59 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)}, 60 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)}, 61 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)}, 62 {"fdir_match", IXGBE_STAT(stats.fdirmatch)}, 63 {"fdir_miss", IXGBE_STAT(stats.fdirmiss)}, 64 {"fdir_overflow", IXGBE_STAT(fdir_overflow)}, 65 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)}, 66 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)}, 67 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)}, 68 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)}, 69 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)}, 70 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)}, 71 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)}, 72 {"tx_restart_queue", IXGBE_STAT(restart_queue)}, 73 {"rx_length_errors", IXGBE_STAT(stats.rlec)}, 74 {"rx_long_length_errors", IXGBE_STAT(stats.roc)}, 75 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)}, 76 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)}, 77 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)}, 78 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)}, 79 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)}, 80 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)}, 81 {"alloc_rx_page", IXGBE_STAT(alloc_rx_page)}, 82 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)}, 83 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)}, 84 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)}, 85 {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)}, 86 {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)}, 87 {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)}, 88 {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)}, 89 {"tx_hwtstamp_timeouts", IXGBE_STAT(tx_hwtstamp_timeouts)}, 90 {"tx_hwtstamp_skipped", IXGBE_STAT(tx_hwtstamp_skipped)}, 91 {"rx_hwtstamp_cleared", IXGBE_STAT(rx_hwtstamp_cleared)}, 92 {"tx_ipsec", IXGBE_STAT(tx_ipsec)}, 93 {"rx_ipsec", IXGBE_STAT(rx_ipsec)}, 94 #ifdef IXGBE_FCOE 95 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)}, 96 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)}, 97 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)}, 98 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)}, 99 {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)}, 100 {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)}, 101 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)}, 102 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)}, 103 #endif /* IXGBE_FCOE */ 104 }; 105 106 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so 107 * we set the num_rx_queues to evaluate to num_tx_queues. This is 108 * used because we do not have a good way to get the max number of 109 * rx queues with CONFIG_RPS disabled. 110 */ 111 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues 112 113 #define IXGBE_QUEUE_STATS_LEN ( \ 114 (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \ 115 (sizeof(struct ixgbe_queue_stats) / sizeof(u64))) 116 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats) 117 #define IXGBE_PB_STATS_LEN ( \ 118 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \ 119 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \ 120 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \ 121 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \ 122 / sizeof(u64)) 123 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \ 124 IXGBE_PB_STATS_LEN + \ 125 IXGBE_QUEUE_STATS_LEN) 126 127 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = { 128 "Register test (offline)", "Eeprom test (offline)", 129 "Interrupt test (offline)", "Loopback test (offline)", 130 "Link test (on/offline)" 131 }; 132 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN 133 134 static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = { 135 #define IXGBE_PRIV_FLAGS_LEGACY_RX BIT(0) 136 "legacy-rx", 137 #define IXGBE_PRIV_FLAGS_VF_IPSEC_EN BIT(1) 138 "vf-ipsec", 139 #define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF BIT(2) 140 "mdd-disable-vf", 141 }; 142 143 #define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings) 144 145 #define ixgbe_isbackplane(type) ((type) == ixgbe_media_type_backplane) 146 147 static void ixgbe_set_supported_10gtypes(struct ixgbe_hw *hw, 148 struct ethtool_link_ksettings *cmd) 149 { 150 if (!ixgbe_isbackplane(hw->phy.media_type)) { 151 ethtool_link_ksettings_add_link_mode(cmd, supported, 152 10000baseT_Full); 153 return; 154 } 155 156 switch (hw->device_id) { 157 case IXGBE_DEV_ID_82598: 158 case IXGBE_DEV_ID_82599_KX4: 159 case IXGBE_DEV_ID_82599_KX4_MEZZ: 160 case IXGBE_DEV_ID_X550EM_X_KX4: 161 ethtool_link_ksettings_add_link_mode 162 (cmd, supported, 10000baseKX4_Full); 163 break; 164 case IXGBE_DEV_ID_82598_BX: 165 case IXGBE_DEV_ID_82599_KR: 166 case IXGBE_DEV_ID_X550EM_X_KR: 167 case IXGBE_DEV_ID_X550EM_X_XFI: 168 ethtool_link_ksettings_add_link_mode 169 (cmd, supported, 10000baseKR_Full); 170 break; 171 default: 172 ethtool_link_ksettings_add_link_mode 173 (cmd, supported, 10000baseKX4_Full); 174 ethtool_link_ksettings_add_link_mode 175 (cmd, supported, 10000baseKR_Full); 176 break; 177 } 178 } 179 180 static void ixgbe_set_advertising_10gtypes(struct ixgbe_hw *hw, 181 struct ethtool_link_ksettings *cmd) 182 { 183 if (!ixgbe_isbackplane(hw->phy.media_type)) { 184 ethtool_link_ksettings_add_link_mode(cmd, advertising, 185 10000baseT_Full); 186 return; 187 } 188 189 switch (hw->device_id) { 190 case IXGBE_DEV_ID_82598: 191 case IXGBE_DEV_ID_82599_KX4: 192 case IXGBE_DEV_ID_82599_KX4_MEZZ: 193 case IXGBE_DEV_ID_X550EM_X_KX4: 194 ethtool_link_ksettings_add_link_mode 195 (cmd, advertising, 10000baseKX4_Full); 196 break; 197 case IXGBE_DEV_ID_82598_BX: 198 case IXGBE_DEV_ID_82599_KR: 199 case IXGBE_DEV_ID_X550EM_X_KR: 200 case IXGBE_DEV_ID_X550EM_X_XFI: 201 ethtool_link_ksettings_add_link_mode 202 (cmd, advertising, 10000baseKR_Full); 203 break; 204 default: 205 ethtool_link_ksettings_add_link_mode 206 (cmd, advertising, 10000baseKX4_Full); 207 ethtool_link_ksettings_add_link_mode 208 (cmd, advertising, 10000baseKR_Full); 209 break; 210 } 211 } 212 213 static int ixgbe_get_link_ksettings(struct net_device *netdev, 214 struct ethtool_link_ksettings *cmd) 215 { 216 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 217 struct ixgbe_hw *hw = &adapter->hw; 218 ixgbe_link_speed supported_link; 219 bool autoneg = false; 220 221 ethtool_link_ksettings_zero_link_mode(cmd, supported); 222 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 223 224 hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg); 225 226 /* set the supported link speeds */ 227 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) { 228 ixgbe_set_supported_10gtypes(hw, cmd); 229 ixgbe_set_advertising_10gtypes(hw, cmd); 230 } 231 if (supported_link & IXGBE_LINK_SPEED_5GB_FULL) 232 ethtool_link_ksettings_add_link_mode(cmd, supported, 233 5000baseT_Full); 234 235 if (supported_link & IXGBE_LINK_SPEED_2_5GB_FULL) 236 ethtool_link_ksettings_add_link_mode(cmd, supported, 237 2500baseT_Full); 238 239 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL) { 240 if (ixgbe_isbackplane(hw->phy.media_type)) { 241 ethtool_link_ksettings_add_link_mode(cmd, supported, 242 1000baseKX_Full); 243 ethtool_link_ksettings_add_link_mode(cmd, advertising, 244 1000baseKX_Full); 245 } else { 246 ethtool_link_ksettings_add_link_mode(cmd, supported, 247 1000baseT_Full); 248 ethtool_link_ksettings_add_link_mode(cmd, advertising, 249 1000baseT_Full); 250 } 251 } 252 if (supported_link & IXGBE_LINK_SPEED_100_FULL) { 253 ethtool_link_ksettings_add_link_mode(cmd, supported, 254 100baseT_Full); 255 ethtool_link_ksettings_add_link_mode(cmd, advertising, 256 100baseT_Full); 257 } 258 if (supported_link & IXGBE_LINK_SPEED_10_FULL) { 259 ethtool_link_ksettings_add_link_mode(cmd, supported, 260 10baseT_Full); 261 ethtool_link_ksettings_add_link_mode(cmd, advertising, 262 10baseT_Full); 263 } 264 265 /* set the advertised speeds */ 266 if (hw->phy.autoneg_advertised) { 267 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 268 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL) 269 ethtool_link_ksettings_add_link_mode(cmd, advertising, 270 10baseT_Full); 271 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) 272 ethtool_link_ksettings_add_link_mode(cmd, advertising, 273 100baseT_Full); 274 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) 275 ixgbe_set_advertising_10gtypes(hw, cmd); 276 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) { 277 if (ethtool_link_ksettings_test_link_mode 278 (cmd, supported, 1000baseKX_Full)) 279 ethtool_link_ksettings_add_link_mode 280 (cmd, advertising, 1000baseKX_Full); 281 else 282 ethtool_link_ksettings_add_link_mode 283 (cmd, advertising, 1000baseT_Full); 284 } 285 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) 286 ethtool_link_ksettings_add_link_mode(cmd, advertising, 287 5000baseT_Full); 288 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) 289 ethtool_link_ksettings_add_link_mode(cmd, advertising, 290 2500baseT_Full); 291 } else { 292 if (hw->phy.multispeed_fiber && !autoneg) { 293 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) 294 ethtool_link_ksettings_add_link_mode 295 (cmd, advertising, 10000baseT_Full); 296 } 297 } 298 299 if (autoneg) { 300 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 301 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 302 cmd->base.autoneg = AUTONEG_ENABLE; 303 } else 304 cmd->base.autoneg = AUTONEG_DISABLE; 305 306 /* Determine the remaining settings based on the PHY type. */ 307 switch (adapter->hw.phy.type) { 308 case ixgbe_phy_tn: 309 case ixgbe_phy_aq: 310 case ixgbe_phy_x550em_ext_t: 311 case ixgbe_phy_fw: 312 case ixgbe_phy_cu_unknown: 313 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 314 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 315 cmd->base.port = PORT_TP; 316 break; 317 case ixgbe_phy_qt: 318 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 319 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 320 cmd->base.port = PORT_FIBRE; 321 break; 322 case ixgbe_phy_nl: 323 case ixgbe_phy_sfp_passive_tyco: 324 case ixgbe_phy_sfp_passive_unknown: 325 case ixgbe_phy_sfp_ftl: 326 case ixgbe_phy_sfp_avago: 327 case ixgbe_phy_sfp_intel: 328 case ixgbe_phy_sfp_unknown: 329 case ixgbe_phy_qsfp_passive_unknown: 330 case ixgbe_phy_qsfp_active_unknown: 331 case ixgbe_phy_qsfp_intel: 332 case ixgbe_phy_qsfp_unknown: 333 /* SFP+ devices, further checking needed */ 334 switch (adapter->hw.phy.sfp_type) { 335 case ixgbe_sfp_type_da_cu: 336 case ixgbe_sfp_type_da_cu_core0: 337 case ixgbe_sfp_type_da_cu_core1: 338 ethtool_link_ksettings_add_link_mode(cmd, supported, 339 FIBRE); 340 ethtool_link_ksettings_add_link_mode(cmd, advertising, 341 FIBRE); 342 cmd->base.port = PORT_DA; 343 break; 344 case ixgbe_sfp_type_sr: 345 case ixgbe_sfp_type_lr: 346 case ixgbe_sfp_type_srlr_core0: 347 case ixgbe_sfp_type_srlr_core1: 348 case ixgbe_sfp_type_1g_sx_core0: 349 case ixgbe_sfp_type_1g_sx_core1: 350 case ixgbe_sfp_type_1g_lx_core0: 351 case ixgbe_sfp_type_1g_lx_core1: 352 case ixgbe_sfp_type_1g_bx_core0: 353 case ixgbe_sfp_type_1g_bx_core1: 354 case ixgbe_sfp_type_10g_bx_core0: 355 case ixgbe_sfp_type_10g_bx_core1: 356 ethtool_link_ksettings_add_link_mode(cmd, supported, 357 FIBRE); 358 ethtool_link_ksettings_add_link_mode(cmd, advertising, 359 FIBRE); 360 cmd->base.port = PORT_FIBRE; 361 break; 362 case ixgbe_sfp_type_not_present: 363 ethtool_link_ksettings_add_link_mode(cmd, supported, 364 FIBRE); 365 ethtool_link_ksettings_add_link_mode(cmd, advertising, 366 FIBRE); 367 cmd->base.port = PORT_NONE; 368 break; 369 case ixgbe_sfp_type_1g_cu_core0: 370 case ixgbe_sfp_type_1g_cu_core1: 371 ethtool_link_ksettings_add_link_mode(cmd, supported, 372 TP); 373 ethtool_link_ksettings_add_link_mode(cmd, advertising, 374 TP); 375 cmd->base.port = PORT_TP; 376 break; 377 case ixgbe_sfp_type_unknown: 378 default: 379 ethtool_link_ksettings_add_link_mode(cmd, supported, 380 FIBRE); 381 ethtool_link_ksettings_add_link_mode(cmd, advertising, 382 FIBRE); 383 cmd->base.port = PORT_OTHER; 384 break; 385 } 386 break; 387 case ixgbe_phy_xaui: 388 ethtool_link_ksettings_add_link_mode(cmd, supported, 389 FIBRE); 390 ethtool_link_ksettings_add_link_mode(cmd, advertising, 391 FIBRE); 392 cmd->base.port = PORT_NONE; 393 break; 394 case ixgbe_phy_unknown: 395 case ixgbe_phy_generic: 396 case ixgbe_phy_sfp_unsupported: 397 default: 398 ethtool_link_ksettings_add_link_mode(cmd, supported, 399 FIBRE); 400 ethtool_link_ksettings_add_link_mode(cmd, advertising, 401 FIBRE); 402 cmd->base.port = PORT_OTHER; 403 break; 404 } 405 406 /* Indicate pause support */ 407 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); 408 409 switch (hw->fc.requested_mode) { 410 case ixgbe_fc_full: 411 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); 412 break; 413 case ixgbe_fc_rx_pause: 414 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); 415 ethtool_link_ksettings_add_link_mode(cmd, advertising, 416 Asym_Pause); 417 break; 418 case ixgbe_fc_tx_pause: 419 ethtool_link_ksettings_add_link_mode(cmd, advertising, 420 Asym_Pause); 421 break; 422 default: 423 ethtool_link_ksettings_del_link_mode(cmd, advertising, Pause); 424 ethtool_link_ksettings_del_link_mode(cmd, advertising, 425 Asym_Pause); 426 } 427 428 if (netif_carrier_ok(netdev)) { 429 switch (adapter->link_speed) { 430 case IXGBE_LINK_SPEED_10GB_FULL: 431 cmd->base.speed = SPEED_10000; 432 break; 433 case IXGBE_LINK_SPEED_5GB_FULL: 434 cmd->base.speed = SPEED_5000; 435 break; 436 case IXGBE_LINK_SPEED_2_5GB_FULL: 437 cmd->base.speed = SPEED_2500; 438 break; 439 case IXGBE_LINK_SPEED_1GB_FULL: 440 cmd->base.speed = SPEED_1000; 441 break; 442 case IXGBE_LINK_SPEED_100_FULL: 443 cmd->base.speed = SPEED_100; 444 break; 445 case IXGBE_LINK_SPEED_10_FULL: 446 cmd->base.speed = SPEED_10; 447 break; 448 default: 449 break; 450 } 451 cmd->base.duplex = DUPLEX_FULL; 452 } else { 453 cmd->base.speed = SPEED_UNKNOWN; 454 cmd->base.duplex = DUPLEX_UNKNOWN; 455 } 456 457 return 0; 458 } 459 460 static int ixgbe_set_link_ksettings(struct net_device *netdev, 461 const struct ethtool_link_ksettings *cmd) 462 { 463 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 464 struct ixgbe_hw *hw = &adapter->hw; 465 u32 advertised, old; 466 int err = 0; 467 468 if ((hw->phy.media_type == ixgbe_media_type_copper) || 469 (hw->phy.multispeed_fiber)) { 470 /* 471 * this function does not support duplex forcing, but can 472 * limit the advertising of the adapter to the specified speed 473 */ 474 if (!linkmode_subset(cmd->link_modes.advertising, 475 cmd->link_modes.supported)) 476 return -EINVAL; 477 478 /* only allow one speed at a time if no autoneg */ 479 if (!cmd->base.autoneg && hw->phy.multispeed_fiber) { 480 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 481 10000baseT_Full) && 482 ethtool_link_ksettings_test_link_mode(cmd, advertising, 483 1000baseT_Full)) 484 return -EINVAL; 485 } 486 487 old = hw->phy.autoneg_advertised; 488 advertised = 0; 489 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 490 10000baseT_Full)) 491 advertised |= IXGBE_LINK_SPEED_10GB_FULL; 492 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 493 5000baseT_Full)) 494 advertised |= IXGBE_LINK_SPEED_5GB_FULL; 495 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 496 2500baseT_Full)) 497 advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; 498 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 499 1000baseT_Full)) 500 advertised |= IXGBE_LINK_SPEED_1GB_FULL; 501 502 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 503 100baseT_Full)) 504 advertised |= IXGBE_LINK_SPEED_100_FULL; 505 506 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 507 10baseT_Full)) 508 advertised |= IXGBE_LINK_SPEED_10_FULL; 509 510 if (old == advertised) 511 return err; 512 /* this sets the link speed and restarts auto-neg */ 513 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 514 usleep_range(1000, 2000); 515 516 hw->mac.autotry_restart = true; 517 err = hw->mac.ops.setup_link(hw, advertised, true); 518 if (err) { 519 e_info(probe, "setup link failed with code %d\n", err); 520 hw->mac.ops.setup_link(hw, old, true); 521 } 522 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 523 } else { 524 /* in this case we currently only support 10Gb/FULL */ 525 u32 speed = cmd->base.speed; 526 527 if ((cmd->base.autoneg == AUTONEG_ENABLE) || 528 (!ethtool_link_ksettings_test_link_mode(cmd, advertising, 529 10000baseT_Full)) || 530 (speed + cmd->base.duplex != SPEED_10000 + DUPLEX_FULL)) 531 return -EINVAL; 532 } 533 534 return err; 535 } 536 537 static void ixgbe_get_pause_stats(struct net_device *netdev, 538 struct ethtool_pause_stats *stats) 539 { 540 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 541 struct ixgbe_hw_stats *hwstats = &adapter->stats; 542 543 stats->tx_pause_frames = hwstats->lxontxc + hwstats->lxofftxc; 544 stats->rx_pause_frames = hwstats->lxonrxc + hwstats->lxoffrxc; 545 } 546 547 static void ixgbe_get_pauseparam(struct net_device *netdev, 548 struct ethtool_pauseparam *pause) 549 { 550 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 551 struct ixgbe_hw *hw = &adapter->hw; 552 553 if (ixgbe_device_supports_autoneg_fc(hw) && 554 !hw->fc.disable_fc_autoneg) 555 pause->autoneg = 1; 556 else 557 pause->autoneg = 0; 558 559 if (hw->fc.current_mode == ixgbe_fc_rx_pause) { 560 pause->rx_pause = 1; 561 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) { 562 pause->tx_pause = 1; 563 } else if (hw->fc.current_mode == ixgbe_fc_full) { 564 pause->rx_pause = 1; 565 pause->tx_pause = 1; 566 } 567 } 568 569 static void ixgbe_set_pauseparam_finalize(struct net_device *netdev, 570 struct ixgbe_fc_info *fc) 571 { 572 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 573 struct ixgbe_hw *hw = &adapter->hw; 574 575 /* If the thing changed then we'll update and use new autoneg. */ 576 if (memcmp(fc, &hw->fc, sizeof(*fc))) { 577 hw->fc = *fc; 578 if (netif_running(netdev)) 579 ixgbe_reinit_locked(adapter); 580 else 581 ixgbe_reset(adapter); 582 } 583 } 584 585 static int ixgbe_set_pauseparam(struct net_device *netdev, 586 struct ethtool_pauseparam *pause) 587 { 588 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 589 struct ixgbe_hw *hw = &adapter->hw; 590 struct ixgbe_fc_info fc = hw->fc; 591 592 /* 82598 does no support link flow control with DCB enabled */ 593 if ((hw->mac.type == ixgbe_mac_82598EB) && 594 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)) 595 return -EINVAL; 596 597 /* some devices do not support autoneg of link flow control */ 598 if ((pause->autoneg == AUTONEG_ENABLE) && 599 !ixgbe_device_supports_autoneg_fc(hw)) 600 return -EINVAL; 601 602 fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE); 603 604 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg) 605 fc.requested_mode = ixgbe_fc_full; 606 else if (pause->rx_pause && !pause->tx_pause) 607 fc.requested_mode = ixgbe_fc_rx_pause; 608 else if (!pause->rx_pause && pause->tx_pause) 609 fc.requested_mode = ixgbe_fc_tx_pause; 610 else 611 fc.requested_mode = ixgbe_fc_none; 612 613 ixgbe_set_pauseparam_finalize(netdev, &fc); 614 615 return 0; 616 } 617 618 static int ixgbe_set_pauseparam_e610(struct net_device *netdev, 619 struct ethtool_pauseparam *pause) 620 { 621 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 622 struct ixgbe_hw *hw = &adapter->hw; 623 struct ixgbe_fc_info fc = hw->fc; 624 625 if (!ixgbe_device_supports_autoneg_fc(hw)) 626 return -EOPNOTSUPP; 627 628 if (pause->autoneg == AUTONEG_DISABLE) { 629 netdev_info(netdev, 630 "Cannot disable autonegotiation on this device.\n"); 631 return -EOPNOTSUPP; 632 } 633 634 fc.disable_fc_autoneg = false; 635 636 if (pause->rx_pause && pause->tx_pause) 637 fc.requested_mode = ixgbe_fc_full; 638 else if (pause->rx_pause) 639 fc.requested_mode = ixgbe_fc_rx_pause; 640 else if (pause->tx_pause) 641 fc.requested_mode = ixgbe_fc_tx_pause; 642 else 643 fc.requested_mode = ixgbe_fc_none; 644 645 ixgbe_set_pauseparam_finalize(netdev, &fc); 646 647 return 0; 648 } 649 650 static u32 ixgbe_get_msglevel(struct net_device *netdev) 651 { 652 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 653 return adapter->msg_enable; 654 } 655 656 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data) 657 { 658 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 659 adapter->msg_enable = data; 660 } 661 662 static int ixgbe_get_regs_len(struct net_device *netdev) 663 { 664 #define IXGBE_REGS_LEN 1145 665 return IXGBE_REGS_LEN * sizeof(u32); 666 } 667 668 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_ 669 670 static void ixgbe_get_regs(struct net_device *netdev, 671 struct ethtool_regs *regs, void *p) 672 { 673 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 674 struct ixgbe_hw *hw = &adapter->hw; 675 u32 *regs_buff = p; 676 u8 i; 677 678 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32)); 679 680 regs->version = hw->mac.type << 24 | hw->revision_id << 16 | 681 hw->device_id; 682 683 /* General Registers */ 684 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL); 685 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS); 686 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 687 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP); 688 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP); 689 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 690 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER); 691 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER); 692 693 /* NVM Register */ 694 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); 695 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD); 696 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw)); 697 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL); 698 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA); 699 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL); 700 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA); 701 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT); 702 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP); 703 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw)); 704 705 /* Interrupt */ 706 /* don't read EICR because it can clear interrupt causes, instead 707 * read EICS which is a shadow but doesn't clear EICR */ 708 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS); 709 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS); 710 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS); 711 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC); 712 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC); 713 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM); 714 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0)); 715 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0)); 716 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT); 717 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA); 718 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0)); 719 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE); 720 721 /* Flow Control */ 722 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP); 723 for (i = 0; i < 4; i++) 724 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_FCTTV(i)); 725 for (i = 0; i < 8; i++) { 726 switch (hw->mac.type) { 727 case ixgbe_mac_82598EB: 728 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i)); 729 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i)); 730 break; 731 case ixgbe_mac_82599EB: 732 case ixgbe_mac_X540: 733 case ixgbe_mac_X550: 734 case ixgbe_mac_X550EM_x: 735 case ixgbe_mac_x550em_a: 736 case ixgbe_mac_e610: 737 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i)); 738 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i)); 739 break; 740 default: 741 break; 742 } 743 } 744 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV); 745 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS); 746 747 /* Receive DMA */ 748 for (i = 0; i < 64; i++) 749 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i)); 750 for (i = 0; i < 64; i++) 751 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i)); 752 for (i = 0; i < 64; i++) 753 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i)); 754 for (i = 0; i < 64; i++) 755 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i)); 756 for (i = 0; i < 64; i++) 757 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i)); 758 for (i = 0; i < 64; i++) 759 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); 760 for (i = 0; i < 16; i++) 761 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); 762 for (i = 0; i < 16; i++) 763 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); 764 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 765 for (i = 0; i < 8; i++) 766 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)); 767 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 768 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN); 769 770 /* Receive */ 771 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 772 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL); 773 for (i = 0; i < 16; i++) 774 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i)); 775 for (i = 0; i < 16; i++) 776 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i)); 777 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0)); 778 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL); 779 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 780 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL); 781 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC); 782 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); 783 for (i = 0; i < 8; i++) 784 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i)); 785 for (i = 0; i < 8; i++) 786 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i)); 787 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP); 788 789 /* Transmit */ 790 for (i = 0; i < 32; i++) 791 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i)); 792 for (i = 0; i < 32; i++) 793 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i)); 794 for (i = 0; i < 32; i++) 795 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i)); 796 for (i = 0; i < 32; i++) 797 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i)); 798 for (i = 0; i < 32; i++) 799 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i)); 800 for (i = 0; i < 32; i++) 801 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i)); 802 for (i = 0; i < 32; i++) 803 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i)); 804 for (i = 0; i < 32; i++) 805 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i)); 806 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL); 807 for (i = 0; i < 16; i++) 808 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); 809 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG); 810 for (i = 0; i < 8; i++) 811 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i)); 812 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP); 813 814 /* Wake Up */ 815 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC); 816 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC); 817 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS); 818 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV); 819 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT); 820 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT); 821 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL); 822 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM); 823 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0)); 824 825 /* DCB */ 826 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS); /* same as FCCFG */ 827 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */ 828 829 switch (hw->mac.type) { 830 case ixgbe_mac_82598EB: 831 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS); 832 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR); 833 for (i = 0; i < 8; i++) 834 regs_buff[833 + i] = 835 IXGBE_READ_REG(hw, IXGBE_RT2CR(i)); 836 for (i = 0; i < 8; i++) 837 regs_buff[841 + i] = 838 IXGBE_READ_REG(hw, IXGBE_RT2SR(i)); 839 for (i = 0; i < 8; i++) 840 regs_buff[849 + i] = 841 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i)); 842 for (i = 0; i < 8; i++) 843 regs_buff[857 + i] = 844 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i)); 845 break; 846 case ixgbe_mac_82599EB: 847 case ixgbe_mac_X540: 848 case ixgbe_mac_X550: 849 case ixgbe_mac_X550EM_x: 850 case ixgbe_mac_x550em_a: 851 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 852 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS); 853 for (i = 0; i < 8; i++) 854 regs_buff[833 + i] = 855 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i)); 856 for (i = 0; i < 8; i++) 857 regs_buff[841 + i] = 858 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i)); 859 for (i = 0; i < 8; i++) 860 regs_buff[849 + i] = 861 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i)); 862 for (i = 0; i < 8; i++) 863 regs_buff[857 + i] = 864 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i)); 865 break; 866 default: 867 break; 868 } 869 870 for (i = 0; i < 8; i++) 871 regs_buff[865 + i] = 872 IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */ 873 for (i = 0; i < 8; i++) 874 regs_buff[873 + i] = 875 IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */ 876 877 /* Statistics */ 878 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs); 879 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc); 880 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc); 881 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc); 882 for (i = 0; i < 8; i++) 883 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]); 884 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc); 885 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc); 886 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec); 887 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc); 888 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc); 889 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc); 890 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc); 891 for (i = 0; i < 8; i++) 892 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]); 893 for (i = 0; i < 8; i++) 894 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]); 895 for (i = 0; i < 8; i++) 896 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]); 897 for (i = 0; i < 8; i++) 898 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]); 899 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64); 900 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127); 901 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255); 902 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511); 903 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023); 904 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522); 905 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc); 906 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc); 907 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc); 908 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc); 909 regs_buff[942] = (u32)IXGBE_GET_STAT(adapter, gorc); 910 regs_buff[943] = (u32)(IXGBE_GET_STAT(adapter, gorc) >> 32); 911 regs_buff[944] = (u32)IXGBE_GET_STAT(adapter, gotc); 912 regs_buff[945] = (u32)(IXGBE_GET_STAT(adapter, gotc) >> 32); 913 for (i = 0; i < 8; i++) 914 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]); 915 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc); 916 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc); 917 regs_buff[956] = IXGBE_GET_STAT(adapter, roc); 918 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc); 919 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc); 920 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc); 921 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc); 922 regs_buff[961] = (u32)IXGBE_GET_STAT(adapter, tor); 923 regs_buff[962] = (u32)(IXGBE_GET_STAT(adapter, tor) >> 32); 924 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr); 925 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt); 926 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64); 927 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127); 928 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255); 929 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511); 930 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023); 931 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522); 932 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc); 933 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc); 934 regs_buff[973] = IXGBE_GET_STAT(adapter, xec); 935 for (i = 0; i < 16; i++) 936 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]); 937 for (i = 0; i < 16; i++) 938 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]); 939 for (i = 0; i < 16; i++) 940 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]); 941 for (i = 0; i < 16; i++) 942 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]); 943 944 /* MAC */ 945 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG); 946 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); 947 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA); 948 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0); 949 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1); 950 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); 951 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP); 952 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP); 953 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP); 954 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0); 955 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1); 956 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP); 957 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA); 958 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE); 959 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD); 960 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS); 961 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA); 962 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD); 963 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD); 964 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD); 965 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG); 966 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1); 967 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2); 968 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS); 969 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC); 970 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS); 971 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC); 972 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS); 973 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2); 974 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3); 975 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1); 976 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2); 977 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL); 978 979 /* Diagnostic */ 980 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL); 981 for (i = 0; i < 8; i++) 982 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i)); 983 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN); 984 for (i = 0; i < 4; i++) 985 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i)); 986 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE); 987 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL); 988 for (i = 0; i < 8; i++) 989 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i)); 990 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN); 991 for (i = 0; i < 4; i++) 992 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i)); 993 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE); 994 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL); 995 for (i = 0; i < 4; i++) 996 regs_buff[1102 + i] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA(i)); 997 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL); 998 for (i = 0; i < 4; i++) 999 regs_buff[1107 + i] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA(i)); 1000 for (i = 0; i < 8; i++) 1001 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i)); 1002 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL); 1003 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1); 1004 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2); 1005 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1); 1006 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2); 1007 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS); 1008 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL); 1009 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC); 1010 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC); 1011 1012 /* 82599 X540 specific registers */ 1013 regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN); 1014 1015 /* 82599 X540 specific DCB registers */ 1016 regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC); 1017 regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC); 1018 for (i = 0; i < 4; i++) 1019 regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i)); 1020 regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM); 1021 /* same as RTTQCNRM */ 1022 regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD); 1023 /* same as RTTQCNRR */ 1024 1025 /* X540 specific DCB registers */ 1026 regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR); 1027 regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG); 1028 1029 /* Security config registers */ 1030 regs_buff[1139] = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL); 1031 regs_buff[1140] = IXGBE_READ_REG(hw, IXGBE_SECTXSTAT); 1032 regs_buff[1141] = IXGBE_READ_REG(hw, IXGBE_SECTXBUFFAF); 1033 regs_buff[1142] = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); 1034 regs_buff[1143] = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL); 1035 regs_buff[1144] = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT); 1036 } 1037 1038 static void ixgbe_get_link_ext_stats(struct net_device *netdev, 1039 struct ethtool_link_ext_stats *stats) 1040 { 1041 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1042 1043 stats->link_down_events = adapter->link_down_events; 1044 } 1045 1046 static int ixgbe_get_eeprom_len(struct net_device *netdev) 1047 { 1048 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1049 return adapter->hw.eeprom.word_size * 2; 1050 } 1051 1052 static int ixgbe_get_eeprom(struct net_device *netdev, 1053 struct ethtool_eeprom *eeprom, u8 *bytes) 1054 { 1055 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1056 struct ixgbe_hw *hw = &adapter->hw; 1057 u16 *eeprom_buff; 1058 int first_word, last_word, eeprom_len; 1059 int ret_val = 0; 1060 u16 i; 1061 1062 if (eeprom->len == 0) 1063 return -EINVAL; 1064 1065 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1066 1067 first_word = eeprom->offset >> 1; 1068 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1069 eeprom_len = last_word - first_word + 1; 1070 1071 eeprom_buff = kmalloc_array(eeprom_len, sizeof(u16), GFP_KERNEL); 1072 if (!eeprom_buff) 1073 return -ENOMEM; 1074 1075 ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len, 1076 eeprom_buff); 1077 1078 /* Device's eeprom is always little-endian, word addressable */ 1079 for (i = 0; i < eeprom_len; i++) 1080 le16_to_cpus(&eeprom_buff[i]); 1081 1082 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); 1083 kfree(eeprom_buff); 1084 1085 return ret_val; 1086 } 1087 1088 static int ixgbe_set_eeprom(struct net_device *netdev, 1089 struct ethtool_eeprom *eeprom, u8 *bytes) 1090 { 1091 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1092 struct ixgbe_hw *hw = &adapter->hw; 1093 u16 *eeprom_buff; 1094 void *ptr; 1095 int max_len, first_word, last_word, ret_val = 0; 1096 u16 i; 1097 1098 if (eeprom->len == 0) 1099 return -EINVAL; 1100 1101 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) 1102 return -EINVAL; 1103 1104 max_len = hw->eeprom.word_size * 2; 1105 1106 first_word = eeprom->offset >> 1; 1107 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1108 eeprom_buff = kmalloc(max_len, GFP_KERNEL); 1109 if (!eeprom_buff) 1110 return -ENOMEM; 1111 1112 ptr = eeprom_buff; 1113 1114 if (eeprom->offset & 1) { 1115 /* 1116 * need read/modify/write of first changed EEPROM word 1117 * only the second byte of the word is being modified 1118 */ 1119 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]); 1120 if (ret_val) 1121 goto err; 1122 1123 ptr++; 1124 } 1125 if ((eeprom->offset + eeprom->len) & 1) { 1126 /* 1127 * need read/modify/write of last changed EEPROM word 1128 * only the first byte of the word is being modified 1129 */ 1130 ret_val = hw->eeprom.ops.read(hw, last_word, 1131 &eeprom_buff[last_word - first_word]); 1132 if (ret_val) 1133 goto err; 1134 } 1135 1136 /* Device's eeprom is always little-endian, word addressable */ 1137 for (i = 0; i < last_word - first_word + 1; i++) 1138 le16_to_cpus(&eeprom_buff[i]); 1139 1140 memcpy(ptr, bytes, eeprom->len); 1141 1142 for (i = 0; i < last_word - first_word + 1; i++) 1143 cpu_to_le16s(&eeprom_buff[i]); 1144 1145 ret_val = hw->eeprom.ops.write_buffer(hw, first_word, 1146 last_word - first_word + 1, 1147 eeprom_buff); 1148 1149 /* Update the checksum */ 1150 if (ret_val == 0) 1151 hw->eeprom.ops.update_checksum(hw); 1152 1153 err: 1154 kfree(eeprom_buff); 1155 return ret_val; 1156 } 1157 1158 int ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter) 1159 { 1160 struct ixgbe_hw *hw = &adapter->hw; 1161 int err; 1162 1163 err = ixgbe_get_flash_data(hw); 1164 if (err) 1165 return err; 1166 1167 ixgbe_set_fw_version_e610(adapter); 1168 return 0; 1169 } 1170 1171 static void ixgbe_get_drvinfo(struct net_device *netdev, 1172 struct ethtool_drvinfo *drvinfo) 1173 { 1174 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1175 1176 strscpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver)); 1177 1178 strscpy(drvinfo->fw_version, adapter->eeprom_id, 1179 sizeof(drvinfo->fw_version)); 1180 1181 strscpy(drvinfo->bus_info, pci_name(adapter->pdev), 1182 sizeof(drvinfo->bus_info)); 1183 1184 drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN; 1185 } 1186 1187 static u32 ixgbe_get_max_rxd(struct ixgbe_adapter *adapter) 1188 { 1189 switch (adapter->hw.mac.type) { 1190 case ixgbe_mac_82598EB: 1191 return IXGBE_MAX_RXD_82598; 1192 case ixgbe_mac_82599EB: 1193 return IXGBE_MAX_RXD_82599; 1194 case ixgbe_mac_X540: 1195 return IXGBE_MAX_RXD_X540; 1196 case ixgbe_mac_X550: 1197 case ixgbe_mac_X550EM_x: 1198 case ixgbe_mac_x550em_a: 1199 return IXGBE_MAX_RXD_X550; 1200 default: 1201 return IXGBE_MAX_RXD_82598; 1202 } 1203 } 1204 1205 static u32 ixgbe_get_max_txd(struct ixgbe_adapter *adapter) 1206 { 1207 switch (adapter->hw.mac.type) { 1208 case ixgbe_mac_82598EB: 1209 return IXGBE_MAX_TXD_82598; 1210 case ixgbe_mac_82599EB: 1211 return IXGBE_MAX_TXD_82599; 1212 case ixgbe_mac_X540: 1213 return IXGBE_MAX_TXD_X540; 1214 case ixgbe_mac_X550: 1215 case ixgbe_mac_X550EM_x: 1216 case ixgbe_mac_x550em_a: 1217 return IXGBE_MAX_TXD_X550; 1218 default: 1219 return IXGBE_MAX_TXD_82598; 1220 } 1221 } 1222 1223 static void ixgbe_get_ringparam(struct net_device *netdev, 1224 struct ethtool_ringparam *ring, 1225 struct kernel_ethtool_ringparam *kernel_ring, 1226 struct netlink_ext_ack *extack) 1227 { 1228 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1229 struct ixgbe_ring *tx_ring = adapter->tx_ring[0]; 1230 struct ixgbe_ring *rx_ring = adapter->rx_ring[0]; 1231 1232 ring->rx_max_pending = ixgbe_get_max_rxd(adapter); 1233 ring->tx_max_pending = ixgbe_get_max_txd(adapter); 1234 ring->rx_pending = rx_ring->count; 1235 ring->tx_pending = tx_ring->count; 1236 } 1237 1238 static int ixgbe_set_ringparam(struct net_device *netdev, 1239 struct ethtool_ringparam *ring, 1240 struct kernel_ethtool_ringparam *kernel_ring, 1241 struct netlink_ext_ack *extack) 1242 { 1243 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1244 struct ixgbe_ring *temp_ring; 1245 int i, j, err = 0; 1246 u32 new_rx_count, new_tx_count; 1247 1248 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1249 return -EINVAL; 1250 1251 new_tx_count = clamp_t(u32, ring->tx_pending, 1252 IXGBE_MIN_TXD, ixgbe_get_max_txd(adapter)); 1253 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE); 1254 1255 new_rx_count = clamp_t(u32, ring->rx_pending, 1256 IXGBE_MIN_RXD, ixgbe_get_max_rxd(adapter)); 1257 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE); 1258 1259 if ((new_tx_count == adapter->tx_ring_count) && 1260 (new_rx_count == adapter->rx_ring_count)) { 1261 /* nothing to do */ 1262 return 0; 1263 } 1264 1265 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) 1266 usleep_range(1000, 2000); 1267 1268 if (!netif_running(adapter->netdev)) { 1269 for (i = 0; i < adapter->num_tx_queues; i++) 1270 adapter->tx_ring[i]->count = new_tx_count; 1271 for (i = 0; i < adapter->num_xdp_queues; i++) 1272 adapter->xdp_ring[i]->count = new_tx_count; 1273 for (i = 0; i < adapter->num_rx_queues; i++) 1274 adapter->rx_ring[i]->count = new_rx_count; 1275 adapter->tx_ring_count = new_tx_count; 1276 adapter->xdp_ring_count = new_tx_count; 1277 adapter->rx_ring_count = new_rx_count; 1278 goto clear_reset; 1279 } 1280 1281 /* allocate temporary buffer to store rings in */ 1282 i = max_t(int, adapter->num_tx_queues + adapter->num_xdp_queues, 1283 adapter->num_rx_queues); 1284 temp_ring = vmalloc_array(i, sizeof(struct ixgbe_ring)); 1285 1286 if (!temp_ring) { 1287 err = -ENOMEM; 1288 goto clear_reset; 1289 } 1290 1291 ixgbe_down(adapter); 1292 1293 /* 1294 * Setup new Tx resources and free the old Tx resources in that order. 1295 * We can then assign the new resources to the rings via a memcpy. 1296 * The advantage to this approach is that we are guaranteed to still 1297 * have resources even in the case of an allocation failure. 1298 */ 1299 if (new_tx_count != adapter->tx_ring_count) { 1300 for (i = 0; i < adapter->num_tx_queues; i++) { 1301 memcpy(&temp_ring[i], adapter->tx_ring[i], 1302 sizeof(struct ixgbe_ring)); 1303 1304 temp_ring[i].count = new_tx_count; 1305 err = ixgbe_setup_tx_resources(&temp_ring[i]); 1306 if (err) { 1307 while (i) { 1308 i--; 1309 ixgbe_free_tx_resources(&temp_ring[i]); 1310 } 1311 goto err_setup; 1312 } 1313 } 1314 1315 for (j = 0; j < adapter->num_xdp_queues; j++, i++) { 1316 memcpy(&temp_ring[i], adapter->xdp_ring[j], 1317 sizeof(struct ixgbe_ring)); 1318 1319 temp_ring[i].count = new_tx_count; 1320 err = ixgbe_setup_tx_resources(&temp_ring[i]); 1321 if (err) { 1322 while (i) { 1323 i--; 1324 ixgbe_free_tx_resources(&temp_ring[i]); 1325 } 1326 goto err_setup; 1327 } 1328 } 1329 1330 for (i = 0; i < adapter->num_tx_queues; i++) { 1331 ixgbe_free_tx_resources(adapter->tx_ring[i]); 1332 1333 memcpy(adapter->tx_ring[i], &temp_ring[i], 1334 sizeof(struct ixgbe_ring)); 1335 } 1336 for (j = 0; j < adapter->num_xdp_queues; j++, i++) { 1337 ixgbe_free_tx_resources(adapter->xdp_ring[j]); 1338 1339 memcpy(adapter->xdp_ring[j], &temp_ring[i], 1340 sizeof(struct ixgbe_ring)); 1341 } 1342 1343 adapter->tx_ring_count = new_tx_count; 1344 } 1345 1346 /* Repeat the process for the Rx rings if needed */ 1347 if (new_rx_count != adapter->rx_ring_count) { 1348 for (i = 0; i < adapter->num_rx_queues; i++) { 1349 memcpy(&temp_ring[i], adapter->rx_ring[i], 1350 sizeof(struct ixgbe_ring)); 1351 1352 /* Clear copied XDP RX-queue info */ 1353 memset(&temp_ring[i].xdp_rxq, 0, 1354 sizeof(temp_ring[i].xdp_rxq)); 1355 1356 temp_ring[i].count = new_rx_count; 1357 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]); 1358 if (err) { 1359 while (i) { 1360 i--; 1361 ixgbe_free_rx_resources(&temp_ring[i]); 1362 } 1363 goto err_setup; 1364 } 1365 1366 } 1367 1368 for (i = 0; i < adapter->num_rx_queues; i++) { 1369 ixgbe_free_rx_resources(adapter->rx_ring[i]); 1370 1371 memcpy(adapter->rx_ring[i], &temp_ring[i], 1372 sizeof(struct ixgbe_ring)); 1373 } 1374 1375 adapter->rx_ring_count = new_rx_count; 1376 } 1377 1378 err_setup: 1379 ixgbe_up(adapter); 1380 vfree(temp_ring); 1381 clear_reset: 1382 clear_bit(__IXGBE_RESETTING, &adapter->state); 1383 return err; 1384 } 1385 1386 static int ixgbe_get_sset_count(struct net_device *netdev, int sset) 1387 { 1388 switch (sset) { 1389 case ETH_SS_TEST: 1390 return IXGBE_TEST_LEN; 1391 case ETH_SS_STATS: 1392 return IXGBE_STATS_LEN; 1393 case ETH_SS_PRIV_FLAGS: 1394 return IXGBE_PRIV_FLAGS_STR_LEN; 1395 default: 1396 return -EOPNOTSUPP; 1397 } 1398 } 1399 1400 static void ixgbe_get_ethtool_stats(struct net_device *netdev, 1401 struct ethtool_stats *stats, u64 *data) 1402 { 1403 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1404 struct rtnl_link_stats64 temp; 1405 const struct rtnl_link_stats64 *net_stats; 1406 unsigned int start; 1407 struct ixgbe_ring *ring; 1408 int i, j; 1409 char *p = NULL; 1410 1411 ixgbe_update_stats(adapter); 1412 net_stats = dev_get_stats(netdev, &temp); 1413 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { 1414 switch (ixgbe_gstrings_stats[i].type) { 1415 case NETDEV_STATS: 1416 p = (char *) net_stats + 1417 ixgbe_gstrings_stats[i].stat_offset; 1418 break; 1419 case IXGBE_STATS: 1420 p = (char *) adapter + 1421 ixgbe_gstrings_stats[i].stat_offset; 1422 break; 1423 default: 1424 data[i] = 0; 1425 continue; 1426 } 1427 1428 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat == 1429 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1430 } 1431 for (j = 0; j < netdev->num_tx_queues; j++) { 1432 ring = adapter->tx_ring[j]; 1433 if (!ring) { 1434 data[i] = 0; 1435 data[i+1] = 0; 1436 i += 2; 1437 continue; 1438 } 1439 1440 do { 1441 start = u64_stats_fetch_begin(&ring->syncp); 1442 data[i] = ring->stats.packets; 1443 data[i+1] = ring->stats.bytes; 1444 } while (u64_stats_fetch_retry(&ring->syncp, start)); 1445 i += 2; 1446 } 1447 for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) { 1448 ring = adapter->rx_ring[j]; 1449 if (!ring) { 1450 data[i] = 0; 1451 data[i+1] = 0; 1452 i += 2; 1453 continue; 1454 } 1455 1456 do { 1457 start = u64_stats_fetch_begin(&ring->syncp); 1458 data[i] = ring->stats.packets; 1459 data[i+1] = ring->stats.bytes; 1460 } while (u64_stats_fetch_retry(&ring->syncp, start)); 1461 i += 2; 1462 } 1463 1464 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) { 1465 data[i++] = adapter->stats.pxontxc[j]; 1466 data[i++] = adapter->stats.pxofftxc[j]; 1467 } 1468 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) { 1469 data[i++] = adapter->stats.pxonrxc[j]; 1470 data[i++] = adapter->stats.pxoffrxc[j]; 1471 } 1472 } 1473 1474 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset, 1475 u8 *data) 1476 { 1477 unsigned int i; 1478 u8 *p = data; 1479 1480 switch (stringset) { 1481 case ETH_SS_TEST: 1482 for (i = 0; i < IXGBE_TEST_LEN; i++) 1483 ethtool_puts(&p, ixgbe_gstrings_test[i]); 1484 break; 1485 case ETH_SS_STATS: 1486 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) 1487 ethtool_puts(&p, ixgbe_gstrings_stats[i].stat_string); 1488 for (i = 0; i < netdev->num_tx_queues; i++) { 1489 ethtool_sprintf(&p, "tx_queue_%u_packets", i); 1490 ethtool_sprintf(&p, "tx_queue_%u_bytes", i); 1491 } 1492 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) { 1493 ethtool_sprintf(&p, "rx_queue_%u_packets", i); 1494 ethtool_sprintf(&p, "rx_queue_%u_bytes", i); 1495 } 1496 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { 1497 ethtool_sprintf(&p, "tx_pb_%u_pxon", i); 1498 ethtool_sprintf(&p, "tx_pb_%u_pxoff", i); 1499 } 1500 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { 1501 ethtool_sprintf(&p, "rx_pb_%u_pxon", i); 1502 ethtool_sprintf(&p, "rx_pb_%u_pxoff", i); 1503 } 1504 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */ 1505 break; 1506 case ETH_SS_PRIV_FLAGS: 1507 memcpy(data, ixgbe_priv_flags_strings, 1508 IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN); 1509 } 1510 } 1511 1512 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data) 1513 { 1514 struct ixgbe_hw *hw = &adapter->hw; 1515 bool link_up; 1516 u32 link_speed = 0; 1517 1518 if (ixgbe_removed(hw->hw_addr)) { 1519 *data = 1; 1520 return 1; 1521 } 1522 *data = 0; 1523 1524 hw->mac.ops.check_link(hw, &link_speed, &link_up, true); 1525 if (link_up) 1526 return *data; 1527 else 1528 *data = 1; 1529 return *data; 1530 } 1531 1532 /* ethtool register test data */ 1533 struct ixgbe_reg_test { 1534 u16 reg; 1535 u8 array_len; 1536 u8 test_type; 1537 u32 mask; 1538 u32 write; 1539 }; 1540 1541 /* In the hardware, registers are laid out either singly, in arrays 1542 * spaced 0x40 bytes apart, or in contiguous tables. We assume 1543 * most tests take place on arrays or single registers (handled 1544 * as a single-element array) and special-case the tables. 1545 * Table tests are always pattern tests. 1546 * 1547 * We also make provision for some required setup steps by specifying 1548 * registers to be written without any read-back testing. 1549 */ 1550 1551 #define PATTERN_TEST 1 1552 #define SET_READ_TEST 2 1553 #define WRITE_NO_TEST 3 1554 #define TABLE32_TEST 4 1555 #define TABLE64_TEST_LO 5 1556 #define TABLE64_TEST_HI 6 1557 1558 /* default 82599 register test */ 1559 static const struct ixgbe_reg_test reg_test_82599[] = { 1560 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1561 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1562 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1563 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, 1564 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 }, 1565 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1566 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1567 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, 1568 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, 1569 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, 1570 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1571 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1572 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1573 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1574 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 }, 1575 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 }, 1576 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, 1577 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF }, 1578 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1579 { .reg = 0 } 1580 }; 1581 1582 /* default 82598 register test */ 1583 static const struct ixgbe_reg_test reg_test_82598[] = { 1584 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1585 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1586 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1587 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, 1588 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1589 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1590 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1591 /* Enable all four RX queues before testing. */ 1592 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, 1593 /* RDH is read-only for 82598, only test RDT. */ 1594 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, 1595 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, 1596 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1597 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1598 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF }, 1599 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1600 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1601 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1602 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 }, 1603 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 }, 1604 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, 1605 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF }, 1606 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1607 { .reg = 0 } 1608 }; 1609 1610 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg, 1611 u32 mask, u32 write) 1612 { 1613 u32 pat, val, before; 1614 static const u32 test_pattern[] = { 1615 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; 1616 1617 if (ixgbe_removed(adapter->hw.hw_addr)) { 1618 *data = 1; 1619 return true; 1620 } 1621 for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) { 1622 before = ixgbe_read_reg(&adapter->hw, reg); 1623 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write); 1624 val = ixgbe_read_reg(&adapter->hw, reg); 1625 if (val != (test_pattern[pat] & write & mask)) { 1626 e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n", 1627 reg, val, (test_pattern[pat] & write & mask)); 1628 *data = reg; 1629 ixgbe_write_reg(&adapter->hw, reg, before); 1630 return true; 1631 } 1632 ixgbe_write_reg(&adapter->hw, reg, before); 1633 } 1634 return false; 1635 } 1636 1637 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg, 1638 u32 mask, u32 write) 1639 { 1640 u32 val, before; 1641 1642 if (ixgbe_removed(adapter->hw.hw_addr)) { 1643 *data = 1; 1644 return true; 1645 } 1646 before = ixgbe_read_reg(&adapter->hw, reg); 1647 ixgbe_write_reg(&adapter->hw, reg, write & mask); 1648 val = ixgbe_read_reg(&adapter->hw, reg); 1649 if ((write & mask) != (val & mask)) { 1650 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", 1651 reg, (val & mask), (write & mask)); 1652 *data = reg; 1653 ixgbe_write_reg(&adapter->hw, reg, before); 1654 return true; 1655 } 1656 ixgbe_write_reg(&adapter->hw, reg, before); 1657 return false; 1658 } 1659 1660 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) 1661 { 1662 const struct ixgbe_reg_test *test; 1663 u32 value, before, after; 1664 u32 i, toggle; 1665 1666 if (ixgbe_removed(adapter->hw.hw_addr)) { 1667 e_err(drv, "Adapter removed - register test blocked\n"); 1668 *data = 1; 1669 return 1; 1670 } 1671 switch (adapter->hw.mac.type) { 1672 case ixgbe_mac_82598EB: 1673 toggle = 0x7FFFF3FF; 1674 test = reg_test_82598; 1675 break; 1676 case ixgbe_mac_82599EB: 1677 case ixgbe_mac_X540: 1678 case ixgbe_mac_X550: 1679 case ixgbe_mac_X550EM_x: 1680 case ixgbe_mac_x550em_a: 1681 case ixgbe_mac_e610: 1682 toggle = 0x7FFFF30F; 1683 test = reg_test_82599; 1684 break; 1685 default: 1686 *data = 1; 1687 return 1; 1688 } 1689 1690 /* 1691 * Because the status register is such a special case, 1692 * we handle it separately from the rest of the register 1693 * tests. Some bits are read-only, some toggle, and some 1694 * are writeable on newer MACs. 1695 */ 1696 before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS); 1697 value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle); 1698 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle); 1699 after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle; 1700 if (value != after) { 1701 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n", 1702 after, value); 1703 *data = 1; 1704 return 1; 1705 } 1706 /* restore previous status */ 1707 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before); 1708 1709 /* 1710 * Perform the remainder of the register test, looping through 1711 * the test table until we either fail or reach the null entry. 1712 */ 1713 while (test->reg) { 1714 for (i = 0; i < test->array_len; i++) { 1715 bool b = false; 1716 1717 switch (test->test_type) { 1718 case PATTERN_TEST: 1719 b = reg_pattern_test(adapter, data, 1720 test->reg + (i * 0x40), 1721 test->mask, 1722 test->write); 1723 break; 1724 case SET_READ_TEST: 1725 b = reg_set_and_check(adapter, data, 1726 test->reg + (i * 0x40), 1727 test->mask, 1728 test->write); 1729 break; 1730 case WRITE_NO_TEST: 1731 ixgbe_write_reg(&adapter->hw, 1732 test->reg + (i * 0x40), 1733 test->write); 1734 break; 1735 case TABLE32_TEST: 1736 b = reg_pattern_test(adapter, data, 1737 test->reg + (i * 4), 1738 test->mask, 1739 test->write); 1740 break; 1741 case TABLE64_TEST_LO: 1742 b = reg_pattern_test(adapter, data, 1743 test->reg + (i * 8), 1744 test->mask, 1745 test->write); 1746 break; 1747 case TABLE64_TEST_HI: 1748 b = reg_pattern_test(adapter, data, 1749 (test->reg + 4) + (i * 8), 1750 test->mask, 1751 test->write); 1752 break; 1753 } 1754 if (b) 1755 return 1; 1756 } 1757 test++; 1758 } 1759 1760 *data = 0; 1761 return 0; 1762 } 1763 1764 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data) 1765 { 1766 struct ixgbe_hw *hw = &adapter->hw; 1767 if (hw->eeprom.ops.validate_checksum(hw, NULL)) 1768 *data = 1; 1769 else 1770 *data = 0; 1771 return *data; 1772 } 1773 1774 static irqreturn_t ixgbe_test_intr(int irq, void *data) 1775 { 1776 struct net_device *netdev = (struct net_device *) data; 1777 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1778 1779 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR); 1780 1781 return IRQ_HANDLED; 1782 } 1783 1784 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) 1785 { 1786 struct net_device *netdev = adapter->netdev; 1787 u32 mask, i = 0, shared_int = true; 1788 u32 irq = adapter->pdev->irq; 1789 1790 *data = 0; 1791 1792 /* Hook up test interrupt handler just for this test */ 1793 if (adapter->msix_entries) { 1794 /* NOTE: we don't test MSI-X interrupts here, yet */ 1795 return 0; 1796 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { 1797 shared_int = false; 1798 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name, 1799 netdev)) { 1800 *data = 1; 1801 return -1; 1802 } 1803 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED, 1804 netdev->name, netdev)) { 1805 shared_int = false; 1806 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED, 1807 netdev->name, netdev)) { 1808 *data = 1; 1809 return -1; 1810 } 1811 e_info(hw, "testing %s interrupt\n", shared_int ? 1812 "shared" : "unshared"); 1813 1814 /* Disable all the interrupts */ 1815 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); 1816 IXGBE_WRITE_FLUSH(&adapter->hw); 1817 usleep_range(10000, 20000); 1818 1819 /* Test each interrupt */ 1820 for (; i < 10; i++) { 1821 /* Interrupt to test */ 1822 mask = BIT(i); 1823 1824 if (!shared_int) { 1825 /* 1826 * Disable the interrupts to be reported in 1827 * the cause register and then force the same 1828 * interrupt and see if one gets posted. If 1829 * an interrupt was posted to the bus, the 1830 * test failed. 1831 */ 1832 adapter->test_icr = 0; 1833 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1834 ~mask & 0x00007FFF); 1835 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1836 ~mask & 0x00007FFF); 1837 IXGBE_WRITE_FLUSH(&adapter->hw); 1838 usleep_range(10000, 20000); 1839 1840 if (adapter->test_icr & mask) { 1841 *data = 3; 1842 break; 1843 } 1844 } 1845 1846 /* 1847 * Enable the interrupt to be reported in the cause 1848 * register and then force the same interrupt and see 1849 * if one gets posted. If an interrupt was not posted 1850 * to the bus, the test failed. 1851 */ 1852 adapter->test_icr = 0; 1853 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); 1854 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 1855 IXGBE_WRITE_FLUSH(&adapter->hw); 1856 usleep_range(10000, 20000); 1857 1858 if (!(adapter->test_icr & mask)) { 1859 *data = 4; 1860 break; 1861 } 1862 1863 if (!shared_int) { 1864 /* 1865 * Disable the other interrupts to be reported in 1866 * the cause register and then force the other 1867 * interrupts and see if any get posted. If 1868 * an interrupt was posted to the bus, the 1869 * test failed. 1870 */ 1871 adapter->test_icr = 0; 1872 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1873 ~mask & 0x00007FFF); 1874 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1875 ~mask & 0x00007FFF); 1876 IXGBE_WRITE_FLUSH(&adapter->hw); 1877 usleep_range(10000, 20000); 1878 1879 if (adapter->test_icr) { 1880 *data = 5; 1881 break; 1882 } 1883 } 1884 } 1885 1886 /* Disable all the interrupts */ 1887 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); 1888 IXGBE_WRITE_FLUSH(&adapter->hw); 1889 usleep_range(10000, 20000); 1890 1891 /* Unhook test interrupt handler */ 1892 free_irq(irq, netdev); 1893 1894 return *data; 1895 } 1896 1897 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter) 1898 { 1899 /* Shut down the DMA engines now so they can be reinitialized later, 1900 * since the test rings and normally used rings should overlap on 1901 * queue 0 we can just use the standard disable Rx/Tx calls and they 1902 * will take care of disabling the test rings for us. 1903 */ 1904 1905 /* first Rx */ 1906 ixgbe_disable_rx(adapter); 1907 1908 /* now Tx */ 1909 ixgbe_disable_tx(adapter); 1910 1911 ixgbe_reset(adapter); 1912 1913 ixgbe_free_tx_resources(&adapter->test_tx_ring); 1914 ixgbe_free_rx_resources(&adapter->test_rx_ring); 1915 } 1916 1917 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) 1918 { 1919 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; 1920 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; 1921 struct ixgbe_hw *hw = &adapter->hw; 1922 u32 rctl, reg_data; 1923 int ret_val; 1924 int err; 1925 1926 /* Setup Tx descriptor ring and Tx buffers */ 1927 tx_ring->count = IXGBE_DEFAULT_TXD; 1928 tx_ring->queue_index = 0; 1929 tx_ring->dev = &adapter->pdev->dev; 1930 tx_ring->netdev = adapter->netdev; 1931 tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx; 1932 1933 err = ixgbe_setup_tx_resources(tx_ring); 1934 if (err) 1935 return 1; 1936 1937 switch (adapter->hw.mac.type) { 1938 case ixgbe_mac_82599EB: 1939 case ixgbe_mac_X540: 1940 case ixgbe_mac_X550: 1941 case ixgbe_mac_X550EM_x: 1942 case ixgbe_mac_x550em_a: 1943 case ixgbe_mac_e610: 1944 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); 1945 reg_data |= IXGBE_DMATXCTL_TE; 1946 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); 1947 break; 1948 default: 1949 break; 1950 } 1951 1952 ixgbe_configure_tx_ring(adapter, tx_ring); 1953 1954 /* Setup Rx Descriptor ring and Rx buffers */ 1955 rx_ring->count = IXGBE_DEFAULT_RXD; 1956 rx_ring->queue_index = 0; 1957 rx_ring->dev = &adapter->pdev->dev; 1958 rx_ring->netdev = adapter->netdev; 1959 rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx; 1960 1961 err = ixgbe_setup_rx_resources(adapter, rx_ring); 1962 if (err) { 1963 ret_val = 4; 1964 goto err_nomem; 1965 } 1966 1967 hw->mac.ops.disable_rx(hw); 1968 1969 ixgbe_configure_rx_ring(adapter, rx_ring); 1970 1971 rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL); 1972 rctl |= IXGBE_RXCTRL_DMBYPS; 1973 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl); 1974 1975 hw->mac.ops.enable_rx(hw); 1976 1977 return 0; 1978 1979 err_nomem: 1980 ixgbe_free_desc_rings(adapter); 1981 return ret_val; 1982 } 1983 1984 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter) 1985 { 1986 struct ixgbe_hw *hw = &adapter->hw; 1987 u32 reg_data; 1988 1989 1990 /* Setup MAC loopback */ 1991 reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0); 1992 reg_data |= IXGBE_HLREG0_LPBK; 1993 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data); 1994 1995 reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL); 1996 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE; 1997 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data); 1998 1999 /* X540 and X550 needs to set the MACC.FLU bit to force link up */ 2000 switch (adapter->hw.mac.type) { 2001 case ixgbe_mac_X540: 2002 case ixgbe_mac_X550: 2003 case ixgbe_mac_X550EM_x: 2004 case ixgbe_mac_x550em_a: 2005 case ixgbe_mac_e610: 2006 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC); 2007 reg_data |= IXGBE_MACC_FLU; 2008 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data); 2009 break; 2010 default: 2011 if (hw->mac.orig_autoc) { 2012 reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU; 2013 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data); 2014 } else { 2015 return 10; 2016 } 2017 } 2018 IXGBE_WRITE_FLUSH(hw); 2019 usleep_range(10000, 20000); 2020 2021 /* Disable Atlas Tx lanes; re-enabled in reset path */ 2022 if (hw->mac.type == ixgbe_mac_82598EB) { 2023 u8 atlas; 2024 2025 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas); 2026 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN; 2027 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas); 2028 2029 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas); 2030 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL; 2031 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas); 2032 2033 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas); 2034 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL; 2035 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas); 2036 2037 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas); 2038 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL; 2039 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas); 2040 } 2041 2042 return 0; 2043 } 2044 2045 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter) 2046 { 2047 u32 reg_data; 2048 2049 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0); 2050 reg_data &= ~IXGBE_HLREG0_LPBK; 2051 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data); 2052 } 2053 2054 static void ixgbe_create_lbtest_frame(struct sk_buff *skb, 2055 unsigned int frame_size) 2056 { 2057 memset(skb->data, 0xFF, frame_size); 2058 frame_size >>= 1; 2059 memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1); 2060 skb->data[frame_size + 10] = 0xBE; 2061 skb->data[frame_size + 12] = 0xAF; 2062 } 2063 2064 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer, 2065 unsigned int frame_size) 2066 { 2067 unsigned char *data; 2068 2069 frame_size >>= 1; 2070 2071 data = page_address(rx_buffer->page) + rx_buffer->page_offset; 2072 2073 return data[3] == 0xFF && data[frame_size + 10] == 0xBE && 2074 data[frame_size + 12] == 0xAF; 2075 } 2076 2077 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, 2078 struct ixgbe_ring *tx_ring, 2079 unsigned int size) 2080 { 2081 union ixgbe_adv_rx_desc *rx_desc; 2082 u16 rx_ntc, tx_ntc, count = 0; 2083 2084 /* initialize next to clean and descriptor values */ 2085 rx_ntc = rx_ring->next_to_clean; 2086 tx_ntc = tx_ring->next_to_clean; 2087 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); 2088 2089 while (tx_ntc != tx_ring->next_to_use) { 2090 union ixgbe_adv_tx_desc *tx_desc; 2091 struct ixgbe_tx_buffer *tx_buffer; 2092 2093 tx_desc = IXGBE_TX_DESC(tx_ring, tx_ntc); 2094 2095 /* if DD is not set transmit has not completed */ 2096 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 2097 return count; 2098 2099 /* unmap buffer on Tx side */ 2100 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc]; 2101 2102 /* Free all the Tx ring sk_buffs */ 2103 dev_kfree_skb_any(tx_buffer->skb); 2104 2105 /* unmap skb header data */ 2106 dma_unmap_single(tx_ring->dev, 2107 dma_unmap_addr(tx_buffer, dma), 2108 dma_unmap_len(tx_buffer, len), 2109 DMA_TO_DEVICE); 2110 dma_unmap_len_set(tx_buffer, len, 0); 2111 2112 /* increment Tx next to clean counter */ 2113 tx_ntc++; 2114 if (tx_ntc == tx_ring->count) 2115 tx_ntc = 0; 2116 } 2117 2118 while (rx_desc->wb.upper.length) { 2119 struct ixgbe_rx_buffer *rx_buffer; 2120 2121 /* check Rx buffer */ 2122 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc]; 2123 2124 /* sync Rx buffer for CPU read */ 2125 dma_sync_single_for_cpu(rx_ring->dev, 2126 rx_buffer->dma, 2127 ixgbe_rx_bufsz(rx_ring), 2128 DMA_FROM_DEVICE); 2129 2130 /* verify contents of skb */ 2131 if (ixgbe_check_lbtest_frame(rx_buffer, size)) 2132 count++; 2133 else 2134 break; 2135 2136 /* sync Rx buffer for device write */ 2137 dma_sync_single_for_device(rx_ring->dev, 2138 rx_buffer->dma, 2139 ixgbe_rx_bufsz(rx_ring), 2140 DMA_FROM_DEVICE); 2141 2142 /* increment Rx next to clean counter */ 2143 rx_ntc++; 2144 if (rx_ntc == rx_ring->count) 2145 rx_ntc = 0; 2146 2147 /* fetch next descriptor */ 2148 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); 2149 } 2150 2151 netdev_tx_reset_queue(txring_txq(tx_ring)); 2152 2153 /* re-map buffers to ring, store next to clean values */ 2154 ixgbe_alloc_rx_buffers(rx_ring, count); 2155 rx_ring->next_to_clean = rx_ntc; 2156 tx_ring->next_to_clean = tx_ntc; 2157 2158 return count; 2159 } 2160 2161 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter) 2162 { 2163 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; 2164 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; 2165 int i, j, lc, good_cnt, ret_val = 0; 2166 unsigned int size = 1024; 2167 netdev_tx_t tx_ret_val; 2168 struct sk_buff *skb; 2169 u32 flags_orig = adapter->flags; 2170 2171 /* DCB can modify the frames on Tx */ 2172 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 2173 2174 /* allocate test skb */ 2175 skb = alloc_skb(size, GFP_KERNEL); 2176 if (!skb) 2177 return 11; 2178 2179 /* place data into test skb */ 2180 ixgbe_create_lbtest_frame(skb, size); 2181 skb_put(skb, size); 2182 2183 /* 2184 * Calculate the loop count based on the largest descriptor ring 2185 * The idea is to wrap the largest ring a number of times using 64 2186 * send/receive pairs during each loop 2187 */ 2188 2189 if (rx_ring->count <= tx_ring->count) 2190 lc = ((tx_ring->count / 64) * 2) + 1; 2191 else 2192 lc = ((rx_ring->count / 64) * 2) + 1; 2193 2194 for (j = 0; j <= lc; j++) { 2195 /* reset count of good packets */ 2196 good_cnt = 0; 2197 2198 /* place 64 packets on the transmit queue*/ 2199 for (i = 0; i < 64; i++) { 2200 skb_get(skb); 2201 tx_ret_val = ixgbe_xmit_frame_ring(skb, 2202 adapter, 2203 tx_ring); 2204 if (tx_ret_val == NETDEV_TX_OK) 2205 good_cnt++; 2206 } 2207 2208 if (good_cnt != 64) { 2209 ret_val = 12; 2210 break; 2211 } 2212 2213 /* allow 200 milliseconds for packets to go from Tx to Rx */ 2214 msleep(200); 2215 2216 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size); 2217 if (good_cnt != 64) { 2218 ret_val = 13; 2219 break; 2220 } 2221 } 2222 2223 /* free the original skb */ 2224 kfree_skb(skb); 2225 adapter->flags = flags_orig; 2226 2227 return ret_val; 2228 } 2229 2230 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data) 2231 { 2232 *data = ixgbe_setup_desc_rings(adapter); 2233 if (*data) 2234 goto out; 2235 *data = ixgbe_setup_loopback_test(adapter); 2236 if (*data) 2237 goto err_loopback; 2238 *data = ixgbe_run_loopback_test(adapter); 2239 ixgbe_loopback_cleanup(adapter); 2240 2241 err_loopback: 2242 ixgbe_free_desc_rings(adapter); 2243 out: 2244 return *data; 2245 } 2246 2247 static void ixgbe_diag_test(struct net_device *netdev, 2248 struct ethtool_test *eth_test, u64 *data) 2249 { 2250 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2251 bool if_running = netif_running(netdev); 2252 2253 if (ixgbe_removed(adapter->hw.hw_addr)) { 2254 e_err(hw, "Adapter removed - test blocked\n"); 2255 data[0] = 1; 2256 data[1] = 1; 2257 data[2] = 1; 2258 data[3] = 1; 2259 data[4] = 1; 2260 eth_test->flags |= ETH_TEST_FL_FAILED; 2261 return; 2262 } 2263 set_bit(__IXGBE_TESTING, &adapter->state); 2264 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2265 struct ixgbe_hw *hw = &adapter->hw; 2266 2267 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 2268 int i; 2269 for (i = 0; i < adapter->num_vfs; i++) { 2270 if (adapter->vfinfo[i].clear_to_send) { 2271 netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n"); 2272 data[0] = 1; 2273 data[1] = 1; 2274 data[2] = 1; 2275 data[3] = 1; 2276 data[4] = 1; 2277 eth_test->flags |= ETH_TEST_FL_FAILED; 2278 clear_bit(__IXGBE_TESTING, 2279 &adapter->state); 2280 return; 2281 } 2282 } 2283 } 2284 2285 /* Offline tests */ 2286 e_info(hw, "offline testing starting\n"); 2287 2288 /* Link test performed before hardware reset so autoneg doesn't 2289 * interfere with test result 2290 */ 2291 if (ixgbe_link_test(adapter, &data[4])) 2292 eth_test->flags |= ETH_TEST_FL_FAILED; 2293 2294 if (if_running) 2295 /* indicate we're in test mode */ 2296 ixgbe_close(netdev); 2297 else 2298 ixgbe_reset(adapter); 2299 2300 e_info(hw, "register testing starting\n"); 2301 if (ixgbe_reg_test(adapter, &data[0])) 2302 eth_test->flags |= ETH_TEST_FL_FAILED; 2303 2304 ixgbe_reset(adapter); 2305 e_info(hw, "eeprom testing starting\n"); 2306 if (ixgbe_eeprom_test(adapter, &data[1])) 2307 eth_test->flags |= ETH_TEST_FL_FAILED; 2308 2309 ixgbe_reset(adapter); 2310 e_info(hw, "interrupt testing starting\n"); 2311 if (ixgbe_intr_test(adapter, &data[2])) 2312 eth_test->flags |= ETH_TEST_FL_FAILED; 2313 2314 /* If SRIOV or VMDq is enabled then skip MAC 2315 * loopback diagnostic. */ 2316 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED | 2317 IXGBE_FLAG_VMDQ_ENABLED)) { 2318 e_info(hw, "Skip MAC loopback diagnostic in VT mode\n"); 2319 data[3] = 0; 2320 goto skip_loopback; 2321 } 2322 2323 ixgbe_reset(adapter); 2324 e_info(hw, "loopback testing starting\n"); 2325 if (ixgbe_loopback_test(adapter, &data[3])) 2326 eth_test->flags |= ETH_TEST_FL_FAILED; 2327 2328 skip_loopback: 2329 ixgbe_reset(adapter); 2330 2331 /* clear testing bit and return adapter to previous state */ 2332 clear_bit(__IXGBE_TESTING, &adapter->state); 2333 if (if_running) 2334 ixgbe_open(netdev); 2335 else if (hw->mac.ops.disable_tx_laser) 2336 hw->mac.ops.disable_tx_laser(hw); 2337 } else { 2338 e_info(hw, "online testing starting\n"); 2339 2340 /* Online tests */ 2341 if (ixgbe_link_test(adapter, &data[4])) 2342 eth_test->flags |= ETH_TEST_FL_FAILED; 2343 2344 /* Offline tests aren't run; pass by default */ 2345 data[0] = 0; 2346 data[1] = 0; 2347 data[2] = 0; 2348 data[3] = 0; 2349 2350 clear_bit(__IXGBE_TESTING, &adapter->state); 2351 } 2352 } 2353 2354 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter, 2355 struct ethtool_wolinfo *wol) 2356 { 2357 struct ixgbe_hw *hw = &adapter->hw; 2358 int retval = 0; 2359 2360 /* WOL not supported for all devices */ 2361 if (!ixgbe_wol_supported(adapter, hw->device_id, 2362 hw->subsystem_device_id)) { 2363 retval = 1; 2364 wol->supported = 0; 2365 } 2366 2367 return retval; 2368 } 2369 2370 static void ixgbe_get_wol(struct net_device *netdev, 2371 struct ethtool_wolinfo *wol) 2372 { 2373 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2374 2375 wol->supported = WAKE_UCAST | WAKE_MCAST | 2376 WAKE_BCAST | WAKE_MAGIC; 2377 wol->wolopts = 0; 2378 2379 if (ixgbe_wol_exclusion(adapter, wol) || 2380 !device_can_wakeup(&adapter->pdev->dev)) 2381 return; 2382 2383 if (adapter->wol & IXGBE_WUFC_EX) 2384 wol->wolopts |= WAKE_UCAST; 2385 if (adapter->wol & IXGBE_WUFC_MC) 2386 wol->wolopts |= WAKE_MCAST; 2387 if (adapter->wol & IXGBE_WUFC_BC) 2388 wol->wolopts |= WAKE_BCAST; 2389 if (adapter->wol & IXGBE_WUFC_MAG) 2390 wol->wolopts |= WAKE_MAGIC; 2391 } 2392 2393 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2394 { 2395 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2396 2397 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE | 2398 WAKE_FILTER)) 2399 return -EOPNOTSUPP; 2400 2401 if (ixgbe_wol_exclusion(adapter, wol)) 2402 return wol->wolopts ? -EOPNOTSUPP : 0; 2403 2404 adapter->wol = 0; 2405 2406 if (wol->wolopts & WAKE_UCAST) 2407 adapter->wol |= IXGBE_WUFC_EX; 2408 if (wol->wolopts & WAKE_MCAST) 2409 adapter->wol |= IXGBE_WUFC_MC; 2410 if (wol->wolopts & WAKE_BCAST) 2411 adapter->wol |= IXGBE_WUFC_BC; 2412 if (wol->wolopts & WAKE_MAGIC) 2413 adapter->wol |= IXGBE_WUFC_MAG; 2414 2415 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 2416 2417 return 0; 2418 } 2419 2420 static int ixgbe_set_wol_acpi(struct net_device *netdev, 2421 struct ethtool_wolinfo *wol) 2422 { 2423 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2424 struct ixgbe_hw *hw = &adapter->hw; 2425 u32 grc; 2426 2427 if (ixgbe_wol_exclusion(adapter, wol)) 2428 return wol->wolopts ? -EOPNOTSUPP : 0; 2429 2430 /* disable APM wakeup */ 2431 grc = IXGBE_READ_REG(hw, IXGBE_GRC_X550EM_a); 2432 grc &= ~IXGBE_GRC_APME; 2433 IXGBE_WRITE_REG(hw, IXGBE_GRC_X550EM_a, grc); 2434 2435 /* erase existing filters */ 2436 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 2437 adapter->wol = 0; 2438 2439 if (wol->wolopts & WAKE_UCAST) 2440 adapter->wol |= IXGBE_WUFC_EX; 2441 if (wol->wolopts & WAKE_MCAST) 2442 adapter->wol |= IXGBE_WUFC_MC; 2443 if (wol->wolopts & WAKE_BCAST) 2444 adapter->wol |= IXGBE_WUFC_BC; 2445 2446 IXGBE_WRITE_REG(hw, IXGBE_WUC, IXGBE_WUC_PME_EN); 2447 IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wol); 2448 2449 hw->wol_enabled = adapter->wol; 2450 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 2451 2452 return 0; 2453 } 2454 2455 static int ixgbe_set_wol_e610(struct net_device *netdev, 2456 struct ethtool_wolinfo *wol) 2457 { 2458 if (wol->wolopts & (WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)) 2459 return ixgbe_set_wol_acpi(netdev, wol); 2460 else 2461 return ixgbe_set_wol(netdev, wol); 2462 } 2463 2464 static int ixgbe_nway_reset(struct net_device *netdev) 2465 { 2466 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2467 2468 if (netif_running(netdev)) 2469 ixgbe_reinit_locked(adapter); 2470 2471 return 0; 2472 } 2473 2474 static int ixgbe_set_phys_id(struct net_device *netdev, 2475 enum ethtool_phys_id_state state) 2476 { 2477 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2478 struct ixgbe_hw *hw = &adapter->hw; 2479 2480 if (!hw->mac.ops.led_on || !hw->mac.ops.led_off) 2481 return -EOPNOTSUPP; 2482 2483 switch (state) { 2484 case ETHTOOL_ID_ACTIVE: 2485 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 2486 return 2; 2487 2488 case ETHTOOL_ID_ON: 2489 hw->mac.ops.led_on(hw, hw->mac.led_link_act); 2490 break; 2491 2492 case ETHTOOL_ID_OFF: 2493 hw->mac.ops.led_off(hw, hw->mac.led_link_act); 2494 break; 2495 2496 case ETHTOOL_ID_INACTIVE: 2497 /* Restore LED settings */ 2498 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg); 2499 break; 2500 } 2501 2502 return 0; 2503 } 2504 2505 static int ixgbe_set_phys_id_e610(struct net_device *netdev, 2506 enum ethtool_phys_id_state state) 2507 { 2508 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2509 bool led_active; 2510 2511 switch (state) { 2512 case ETHTOOL_ID_ACTIVE: 2513 led_active = true; 2514 break; 2515 case ETHTOOL_ID_INACTIVE: 2516 led_active = false; 2517 break; 2518 default: 2519 return -EOPNOTSUPP; 2520 } 2521 2522 return ixgbe_aci_set_port_id_led(&adapter->hw, !led_active); 2523 } 2524 2525 static int ixgbe_get_coalesce(struct net_device *netdev, 2526 struct ethtool_coalesce *ec, 2527 struct kernel_ethtool_coalesce *kernel_coal, 2528 struct netlink_ext_ack *extack) 2529 { 2530 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2531 2532 /* only valid if in constant ITR mode */ 2533 if (adapter->rx_itr_setting <= 1) 2534 ec->rx_coalesce_usecs = adapter->rx_itr_setting; 2535 else 2536 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2; 2537 2538 /* if in mixed tx/rx queues per vector mode, report only rx settings */ 2539 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2540 return 0; 2541 2542 /* only valid if in constant ITR mode */ 2543 if (adapter->tx_itr_setting <= 1) 2544 ec->tx_coalesce_usecs = adapter->tx_itr_setting; 2545 else 2546 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2; 2547 2548 return 0; 2549 } 2550 2551 /* 2552 * this function must be called before setting the new value of 2553 * rx_itr_setting 2554 */ 2555 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter) 2556 { 2557 struct net_device *netdev = adapter->netdev; 2558 2559 /* nothing to do if LRO or RSC are not enabled */ 2560 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) || 2561 !(netdev->features & NETIF_F_LRO)) 2562 return false; 2563 2564 /* check the feature flag value and enable RSC if necessary */ 2565 if (adapter->rx_itr_setting == 1 || 2566 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { 2567 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { 2568 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; 2569 e_info(probe, "rx-usecs value high enough to re-enable RSC\n"); 2570 return true; 2571 } 2572 /* if interrupt rate is too high then disable RSC */ 2573 } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { 2574 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; 2575 e_info(probe, "rx-usecs set too low, disabling RSC\n"); 2576 return true; 2577 } 2578 return false; 2579 } 2580 2581 static int ixgbe_set_coalesce(struct net_device *netdev, 2582 struct ethtool_coalesce *ec, 2583 struct kernel_ethtool_coalesce *kernel_coal, 2584 struct netlink_ext_ack *extack) 2585 { 2586 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2587 struct ixgbe_q_vector *q_vector; 2588 int i; 2589 u16 tx_itr_param, rx_itr_param, tx_itr_prev; 2590 bool need_reset = false; 2591 2592 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) { 2593 /* reject Tx specific changes in case of mixed RxTx vectors */ 2594 if (ec->tx_coalesce_usecs) 2595 return -EINVAL; 2596 tx_itr_prev = adapter->rx_itr_setting; 2597 } else { 2598 tx_itr_prev = adapter->tx_itr_setting; 2599 } 2600 2601 if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) || 2602 (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2))) 2603 return -EINVAL; 2604 2605 if (ec->rx_coalesce_usecs > 1) 2606 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2; 2607 else 2608 adapter->rx_itr_setting = ec->rx_coalesce_usecs; 2609 2610 if (adapter->rx_itr_setting == 1) 2611 rx_itr_param = IXGBE_20K_ITR; 2612 else 2613 rx_itr_param = adapter->rx_itr_setting; 2614 2615 if (ec->tx_coalesce_usecs > 1) 2616 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2; 2617 else 2618 adapter->tx_itr_setting = ec->tx_coalesce_usecs; 2619 2620 if (adapter->tx_itr_setting == 1) 2621 tx_itr_param = IXGBE_12K_ITR; 2622 else 2623 tx_itr_param = adapter->tx_itr_setting; 2624 2625 /* mixed Rx/Tx */ 2626 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2627 adapter->tx_itr_setting = adapter->rx_itr_setting; 2628 2629 /* detect ITR changes that require update of TXDCTL.WTHRESH */ 2630 if ((adapter->tx_itr_setting != 1) && 2631 (adapter->tx_itr_setting < IXGBE_100K_ITR)) { 2632 if ((tx_itr_prev == 1) || 2633 (tx_itr_prev >= IXGBE_100K_ITR)) 2634 need_reset = true; 2635 } else { 2636 if ((tx_itr_prev != 1) && 2637 (tx_itr_prev < IXGBE_100K_ITR)) 2638 need_reset = true; 2639 } 2640 2641 /* check the old value and enable RSC if necessary */ 2642 need_reset |= ixgbe_update_rsc(adapter); 2643 2644 for (i = 0; i < adapter->num_q_vectors; i++) { 2645 q_vector = adapter->q_vector[i]; 2646 if (q_vector->tx.count && !q_vector->rx.count) 2647 /* tx only */ 2648 q_vector->itr = tx_itr_param; 2649 else 2650 /* rx only or mixed */ 2651 q_vector->itr = rx_itr_param; 2652 ixgbe_write_eitr(q_vector); 2653 } 2654 2655 /* 2656 * do reset here at the end to make sure EITR==0 case is handled 2657 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings 2658 * also locks in RSC enable/disable which requires reset 2659 */ 2660 if (need_reset) 2661 ixgbe_do_reset(netdev); 2662 2663 return 0; 2664 } 2665 2666 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2667 struct ethtool_rxnfc *cmd) 2668 { 2669 union ixgbe_atr_input *mask = &adapter->fdir_mask; 2670 struct ethtool_rx_flow_spec *fsp = 2671 (struct ethtool_rx_flow_spec *)&cmd->fs; 2672 struct hlist_node *node2; 2673 struct ixgbe_fdir_filter *rule = NULL; 2674 2675 /* report total rule count */ 2676 cmd->data = (1024 << adapter->fdir_pballoc) - 2; 2677 2678 hlist_for_each_entry_safe(rule, node2, 2679 &adapter->fdir_filter_list, fdir_node) { 2680 if (fsp->location <= rule->sw_idx) 2681 break; 2682 } 2683 2684 if (!rule || fsp->location != rule->sw_idx) 2685 return -EINVAL; 2686 2687 /* fill out the flow spec entry */ 2688 2689 /* set flow type field */ 2690 switch (rule->filter.formatted.flow_type) { 2691 case IXGBE_ATR_FLOW_TYPE_TCPV4: 2692 fsp->flow_type = TCP_V4_FLOW; 2693 break; 2694 case IXGBE_ATR_FLOW_TYPE_UDPV4: 2695 fsp->flow_type = UDP_V4_FLOW; 2696 break; 2697 case IXGBE_ATR_FLOW_TYPE_SCTPV4: 2698 fsp->flow_type = SCTP_V4_FLOW; 2699 break; 2700 case IXGBE_ATR_FLOW_TYPE_IPV4: 2701 fsp->flow_type = IP_USER_FLOW; 2702 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2703 fsp->h_u.usr_ip4_spec.proto = 0; 2704 fsp->m_u.usr_ip4_spec.proto = 0; 2705 break; 2706 default: 2707 return -EINVAL; 2708 } 2709 2710 fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port; 2711 fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port; 2712 fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port; 2713 fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port; 2714 fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0]; 2715 fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0]; 2716 fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0]; 2717 fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0]; 2718 fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id; 2719 fsp->m_ext.vlan_tci = mask->formatted.vlan_id; 2720 fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes; 2721 fsp->m_ext.vlan_etype = mask->formatted.flex_bytes; 2722 fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool); 2723 fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool); 2724 fsp->flow_type |= FLOW_EXT; 2725 2726 /* record action */ 2727 if (rule->action == IXGBE_FDIR_DROP_QUEUE) 2728 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2729 else 2730 fsp->ring_cookie = rule->action; 2731 2732 return 0; 2733 } 2734 2735 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter, 2736 struct ethtool_rxnfc *cmd, 2737 u32 *rule_locs) 2738 { 2739 struct hlist_node *node2; 2740 struct ixgbe_fdir_filter *rule; 2741 int cnt = 0; 2742 2743 /* report total rule count */ 2744 cmd->data = (1024 << adapter->fdir_pballoc) - 2; 2745 2746 hlist_for_each_entry_safe(rule, node2, 2747 &adapter->fdir_filter_list, fdir_node) { 2748 if (cnt == cmd->rule_cnt) 2749 return -EMSGSIZE; 2750 rule_locs[cnt] = rule->sw_idx; 2751 cnt++; 2752 } 2753 2754 cmd->rule_cnt = cnt; 2755 2756 return 0; 2757 } 2758 2759 static int ixgbe_get_rxfh_fields(struct net_device *dev, 2760 struct ethtool_rxfh_fields *cmd) 2761 { 2762 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2763 2764 cmd->data = 0; 2765 2766 /* Report default options for RSS on ixgbe */ 2767 switch (cmd->flow_type) { 2768 case TCP_V4_FLOW: 2769 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2770 fallthrough; 2771 case UDP_V4_FLOW: 2772 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 2773 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2774 fallthrough; 2775 case SCTP_V4_FLOW: 2776 case AH_ESP_V4_FLOW: 2777 case AH_V4_FLOW: 2778 case ESP_V4_FLOW: 2779 case IPV4_FLOW: 2780 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2781 break; 2782 case TCP_V6_FLOW: 2783 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2784 fallthrough; 2785 case UDP_V6_FLOW: 2786 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 2787 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2788 fallthrough; 2789 case SCTP_V6_FLOW: 2790 case AH_ESP_V6_FLOW: 2791 case AH_V6_FLOW: 2792 case ESP_V6_FLOW: 2793 case IPV6_FLOW: 2794 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2795 break; 2796 default: 2797 return -EINVAL; 2798 } 2799 2800 return 0; 2801 } 2802 2803 static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter) 2804 { 2805 if (adapter->hw.mac.type < ixgbe_mac_X550) 2806 return 16; 2807 else 2808 return 64; 2809 } 2810 2811 static u32 ixgbe_get_rx_ring_count(struct net_device *dev) 2812 { 2813 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2814 2815 return min_t(u32, adapter->num_rx_queues, 2816 ixgbe_rss_indir_tbl_max(adapter)); 2817 } 2818 2819 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 2820 u32 *rule_locs) 2821 { 2822 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2823 int ret = -EOPNOTSUPP; 2824 2825 switch (cmd->cmd) { 2826 case ETHTOOL_GRXCLSRLCNT: 2827 cmd->rule_cnt = adapter->fdir_filter_count; 2828 ret = 0; 2829 break; 2830 case ETHTOOL_GRXCLSRULE: 2831 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd); 2832 break; 2833 case ETHTOOL_GRXCLSRLALL: 2834 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs); 2835 break; 2836 default: 2837 break; 2838 } 2839 2840 return ret; 2841 } 2842 2843 int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2844 struct ixgbe_fdir_filter *input, 2845 u16 sw_idx) 2846 { 2847 struct ixgbe_hw *hw = &adapter->hw; 2848 struct hlist_node *node2; 2849 struct ixgbe_fdir_filter *rule, *parent; 2850 int err = -EINVAL; 2851 2852 parent = NULL; 2853 rule = NULL; 2854 2855 hlist_for_each_entry_safe(rule, node2, 2856 &adapter->fdir_filter_list, fdir_node) { 2857 /* hash found, or no matching entry */ 2858 if (rule->sw_idx >= sw_idx) 2859 break; 2860 parent = rule; 2861 } 2862 2863 /* if there is an old rule occupying our place remove it */ 2864 if (rule && (rule->sw_idx == sw_idx)) { 2865 if (!input || (rule->filter.formatted.bkt_hash != 2866 input->filter.formatted.bkt_hash)) { 2867 err = ixgbe_fdir_erase_perfect_filter_82599(hw, 2868 &rule->filter, 2869 sw_idx); 2870 } 2871 2872 hlist_del(&rule->fdir_node); 2873 kfree(rule); 2874 adapter->fdir_filter_count--; 2875 } 2876 2877 /* 2878 * If no input this was a delete, err should be 0 if a rule was 2879 * successfully found and removed from the list else -EINVAL 2880 */ 2881 if (!input) 2882 return err; 2883 2884 /* initialize node and set software index */ 2885 INIT_HLIST_NODE(&input->fdir_node); 2886 2887 /* add filter to the list */ 2888 if (parent) 2889 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 2890 else 2891 hlist_add_head(&input->fdir_node, 2892 &adapter->fdir_filter_list); 2893 2894 /* update counts */ 2895 adapter->fdir_filter_count++; 2896 2897 return 0; 2898 } 2899 2900 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp, 2901 u8 *flow_type) 2902 { 2903 switch (fsp->flow_type & ~FLOW_EXT) { 2904 case TCP_V4_FLOW: 2905 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 2906 break; 2907 case UDP_V4_FLOW: 2908 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; 2909 break; 2910 case SCTP_V4_FLOW: 2911 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; 2912 break; 2913 case IP_USER_FLOW: 2914 switch (fsp->h_u.usr_ip4_spec.proto) { 2915 case IPPROTO_TCP: 2916 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 2917 break; 2918 case IPPROTO_UDP: 2919 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; 2920 break; 2921 case IPPROTO_SCTP: 2922 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; 2923 break; 2924 case 0: 2925 if (!fsp->m_u.usr_ip4_spec.proto) { 2926 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4; 2927 break; 2928 } 2929 fallthrough; 2930 default: 2931 return 0; 2932 } 2933 break; 2934 default: 2935 return 0; 2936 } 2937 2938 return 1; 2939 } 2940 2941 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2942 struct ethtool_rxnfc *cmd) 2943 { 2944 struct ethtool_rx_flow_spec *fsp = 2945 (struct ethtool_rx_flow_spec *)&cmd->fs; 2946 struct ixgbe_hw *hw = &adapter->hw; 2947 struct ixgbe_fdir_filter *input; 2948 union ixgbe_atr_input mask; 2949 u8 queue; 2950 int err; 2951 2952 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) 2953 return -EOPNOTSUPP; 2954 2955 /* ring_cookie is a masked into a set of queues and ixgbe pools or 2956 * we use the drop index. 2957 */ 2958 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 2959 queue = IXGBE_FDIR_DROP_QUEUE; 2960 } else { 2961 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 2962 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 2963 2964 if (!vf && (ring >= adapter->num_rx_queues)) 2965 return -EINVAL; 2966 else if (vf && 2967 ((vf > adapter->num_vfs) || 2968 ring >= adapter->num_rx_queues_per_pool)) 2969 return -EINVAL; 2970 2971 /* Map the ring onto the absolute queue index */ 2972 if (!vf) 2973 queue = adapter->rx_ring[ring]->reg_idx; 2974 else 2975 queue = ((vf - 1) * 2976 adapter->num_rx_queues_per_pool) + ring; 2977 } 2978 2979 /* Don't allow indexes to exist outside of available space */ 2980 if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) { 2981 e_err(drv, "Location out of range\n"); 2982 return -EINVAL; 2983 } 2984 2985 input = kzalloc_obj(*input, GFP_ATOMIC); 2986 if (!input) 2987 return -ENOMEM; 2988 2989 memset(&mask, 0, sizeof(union ixgbe_atr_input)); 2990 2991 /* set SW index */ 2992 input->sw_idx = fsp->location; 2993 2994 /* record flow type */ 2995 if (!ixgbe_flowspec_to_flow_type(fsp, 2996 &input->filter.formatted.flow_type)) { 2997 e_err(drv, "Unrecognized flow type\n"); 2998 goto err_out; 2999 } 3000 3001 mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | 3002 IXGBE_ATR_L4TYPE_MASK; 3003 3004 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4) 3005 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK; 3006 3007 /* Copy input into formatted structures */ 3008 input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src; 3009 mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src; 3010 input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst; 3011 mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst; 3012 input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc; 3013 mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc; 3014 input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst; 3015 mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst; 3016 3017 if (fsp->flow_type & FLOW_EXT) { 3018 input->filter.formatted.vm_pool = 3019 (unsigned char)ntohl(fsp->h_ext.data[1]); 3020 mask.formatted.vm_pool = 3021 (unsigned char)ntohl(fsp->m_ext.data[1]); 3022 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci; 3023 mask.formatted.vlan_id = fsp->m_ext.vlan_tci; 3024 input->filter.formatted.flex_bytes = 3025 fsp->h_ext.vlan_etype; 3026 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype; 3027 } 3028 3029 /* determine if we need to drop or route the packet */ 3030 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) 3031 input->action = IXGBE_FDIR_DROP_QUEUE; 3032 else 3033 input->action = fsp->ring_cookie; 3034 3035 spin_lock(&adapter->fdir_perfect_lock); 3036 3037 if (hlist_empty(&adapter->fdir_filter_list)) { 3038 /* save mask and program input mask into HW */ 3039 memcpy(&adapter->fdir_mask, &mask, sizeof(mask)); 3040 err = ixgbe_fdir_set_input_mask_82599(hw, &mask); 3041 if (err) { 3042 e_err(drv, "Error writing mask\n"); 3043 goto err_out_w_lock; 3044 } 3045 } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) { 3046 e_err(drv, "Only one mask supported per port\n"); 3047 goto err_out_w_lock; 3048 } 3049 3050 /* apply mask and compute/store hash */ 3051 ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask); 3052 3053 /* program filters to filter memory */ 3054 err = ixgbe_fdir_write_perfect_filter_82599(hw, 3055 &input->filter, input->sw_idx, queue); 3056 if (err) 3057 goto err_out_w_lock; 3058 3059 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx); 3060 3061 spin_unlock(&adapter->fdir_perfect_lock); 3062 3063 return err; 3064 err_out_w_lock: 3065 spin_unlock(&adapter->fdir_perfect_lock); 3066 err_out: 3067 kfree(input); 3068 return -EINVAL; 3069 } 3070 3071 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 3072 struct ethtool_rxnfc *cmd) 3073 { 3074 struct ethtool_rx_flow_spec *fsp = 3075 (struct ethtool_rx_flow_spec *)&cmd->fs; 3076 int err; 3077 3078 spin_lock(&adapter->fdir_perfect_lock); 3079 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location); 3080 spin_unlock(&adapter->fdir_perfect_lock); 3081 3082 return err; 3083 } 3084 3085 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \ 3086 IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 3087 static int ixgbe_set_rxfh_fields(struct net_device *dev, 3088 const struct ethtool_rxfh_fields *nfc, 3089 struct netlink_ext_ack *extack) 3090 { 3091 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3092 u32 flags2 = adapter->flags2; 3093 3094 /* 3095 * RSS does not support anything other than hashing 3096 * to queues on src and dst IPs and ports 3097 */ 3098 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3099 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3100 return -EINVAL; 3101 3102 switch (nfc->flow_type) { 3103 case TCP_V4_FLOW: 3104 case TCP_V6_FLOW: 3105 if (!(nfc->data & RXH_IP_SRC) || 3106 !(nfc->data & RXH_IP_DST) || 3107 !(nfc->data & RXH_L4_B_0_1) || 3108 !(nfc->data & RXH_L4_B_2_3)) 3109 return -EINVAL; 3110 break; 3111 case UDP_V4_FLOW: 3112 if (!(nfc->data & RXH_IP_SRC) || 3113 !(nfc->data & RXH_IP_DST)) 3114 return -EINVAL; 3115 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 3116 case 0: 3117 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; 3118 break; 3119 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 3120 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; 3121 break; 3122 default: 3123 return -EINVAL; 3124 } 3125 break; 3126 case UDP_V6_FLOW: 3127 if (!(nfc->data & RXH_IP_SRC) || 3128 !(nfc->data & RXH_IP_DST)) 3129 return -EINVAL; 3130 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 3131 case 0: 3132 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; 3133 break; 3134 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 3135 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; 3136 break; 3137 default: 3138 return -EINVAL; 3139 } 3140 break; 3141 case AH_ESP_V4_FLOW: 3142 case AH_V4_FLOW: 3143 case ESP_V4_FLOW: 3144 case SCTP_V4_FLOW: 3145 case AH_ESP_V6_FLOW: 3146 case AH_V6_FLOW: 3147 case ESP_V6_FLOW: 3148 case SCTP_V6_FLOW: 3149 if (!(nfc->data & RXH_IP_SRC) || 3150 !(nfc->data & RXH_IP_DST) || 3151 (nfc->data & RXH_L4_B_0_1) || 3152 (nfc->data & RXH_L4_B_2_3)) 3153 return -EINVAL; 3154 break; 3155 default: 3156 return -EINVAL; 3157 } 3158 3159 /* if we changed something we need to update flags */ 3160 if (flags2 != adapter->flags2) { 3161 struct ixgbe_hw *hw = &adapter->hw; 3162 u32 mrqc; 3163 unsigned int pf_pool = adapter->num_vfs; 3164 3165 if ((hw->mac.type >= ixgbe_mac_X550) && 3166 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 3167 mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool)); 3168 else 3169 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); 3170 3171 if ((flags2 & UDP_RSS_FLAGS) && 3172 !(adapter->flags2 & UDP_RSS_FLAGS)) 3173 e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n"); 3174 3175 adapter->flags2 = flags2; 3176 3177 /* Perform hash on these packet types */ 3178 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 3179 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP 3180 | IXGBE_MRQC_RSS_FIELD_IPV6 3181 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 3182 3183 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP | 3184 IXGBE_MRQC_RSS_FIELD_IPV6_UDP); 3185 3186 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 3187 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 3188 3189 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 3190 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 3191 3192 if ((hw->mac.type >= ixgbe_mac_X550) && 3193 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 3194 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc); 3195 else 3196 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 3197 } 3198 3199 return 0; 3200 } 3201 3202 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 3203 { 3204 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3205 int ret = -EOPNOTSUPP; 3206 3207 switch (cmd->cmd) { 3208 case ETHTOOL_SRXCLSRLINS: 3209 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd); 3210 break; 3211 case ETHTOOL_SRXCLSRLDEL: 3212 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd); 3213 break; 3214 default: 3215 break; 3216 } 3217 3218 return ret; 3219 } 3220 3221 static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev) 3222 { 3223 return IXGBE_RSS_KEY_SIZE; 3224 } 3225 3226 static u32 ixgbe_rss_indir_size(struct net_device *netdev) 3227 { 3228 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3229 3230 return ixgbe_rss_indir_tbl_entries(adapter); 3231 } 3232 3233 static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir) 3234 { 3235 int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter); 3236 u16 rss_m = adapter->ring_feature[RING_F_RSS].mask; 3237 3238 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 3239 rss_m = adapter->ring_feature[RING_F_RSS].indices - 1; 3240 3241 for (i = 0; i < reta_size; i++) 3242 indir[i] = adapter->rss_indir_tbl[i] & rss_m; 3243 } 3244 3245 static int ixgbe_get_rxfh(struct net_device *netdev, 3246 struct ethtool_rxfh_param *rxfh) 3247 { 3248 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3249 3250 rxfh->hfunc = ETH_RSS_HASH_TOP; 3251 3252 if (rxfh->indir) 3253 ixgbe_get_reta(adapter, rxfh->indir); 3254 3255 if (rxfh->key) 3256 memcpy(rxfh->key, adapter->rss_key, 3257 ixgbe_get_rxfh_key_size(netdev)); 3258 3259 return 0; 3260 } 3261 3262 static int ixgbe_set_rxfh(struct net_device *netdev, 3263 struct ethtool_rxfh_param *rxfh, 3264 struct netlink_ext_ack *extack) 3265 { 3266 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3267 int i; 3268 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 3269 3270 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE && 3271 rxfh->hfunc != ETH_RSS_HASH_TOP) 3272 return -EOPNOTSUPP; 3273 3274 /* Fill out the redirection table */ 3275 if (rxfh->indir) { 3276 int max_queues = min_t(int, adapter->num_rx_queues, 3277 ixgbe_rss_indir_tbl_max(adapter)); 3278 3279 /*Allow at least 2 queues w/ SR-IOV.*/ 3280 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && 3281 (max_queues < 2)) 3282 max_queues = 2; 3283 3284 /* Verify user input. */ 3285 for (i = 0; i < reta_entries; i++) 3286 if (rxfh->indir[i] >= max_queues) 3287 return -EINVAL; 3288 3289 for (i = 0; i < reta_entries; i++) 3290 adapter->rss_indir_tbl[i] = rxfh->indir[i]; 3291 3292 ixgbe_store_reta(adapter); 3293 } 3294 3295 /* Fill out the rss hash key */ 3296 if (rxfh->key) { 3297 memcpy(adapter->rss_key, rxfh->key, 3298 ixgbe_get_rxfh_key_size(netdev)); 3299 ixgbe_store_key(adapter); 3300 } 3301 3302 return 0; 3303 } 3304 3305 static int ixgbe_get_ts_info(struct net_device *dev, 3306 struct kernel_ethtool_ts_info *info) 3307 { 3308 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3309 3310 /* we always support timestamping disabled */ 3311 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE); 3312 3313 switch (adapter->hw.mac.type) { 3314 case ixgbe_mac_X550: 3315 case ixgbe_mac_X550EM_x: 3316 case ixgbe_mac_x550em_a: 3317 case ixgbe_mac_e610: 3318 info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL); 3319 break; 3320 case ixgbe_mac_X540: 3321 case ixgbe_mac_82599EB: 3322 info->rx_filters |= 3323 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 3324 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 3325 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); 3326 break; 3327 default: 3328 return ethtool_op_get_ts_info(dev, info); 3329 } 3330 3331 info->so_timestamping = 3332 SOF_TIMESTAMPING_TX_SOFTWARE | 3333 SOF_TIMESTAMPING_TX_HARDWARE | 3334 SOF_TIMESTAMPING_RX_HARDWARE | 3335 SOF_TIMESTAMPING_RAW_HARDWARE; 3336 3337 if (adapter->ptp_clock) 3338 info->phc_index = ptp_clock_index(adapter->ptp_clock); 3339 3340 info->tx_types = 3341 BIT(HWTSTAMP_TX_OFF) | 3342 BIT(HWTSTAMP_TX_ON); 3343 3344 return 0; 3345 } 3346 3347 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter) 3348 { 3349 unsigned int max_combined; 3350 u8 tcs = adapter->hw_tcs; 3351 3352 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { 3353 /* We only support one q_vector without MSI-X */ 3354 max_combined = 1; 3355 } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 3356 /* Limit value based on the queue mask */ 3357 max_combined = adapter->ring_feature[RING_F_RSS].mask + 1; 3358 } else if (tcs > 1) { 3359 /* For DCB report channels per traffic class */ 3360 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3361 /* 8 TC w/ 4 queues per TC */ 3362 max_combined = 4; 3363 } else if (tcs > 4) { 3364 /* 8 TC w/ 8 queues per TC */ 3365 max_combined = 8; 3366 } else { 3367 /* 4 TC w/ 16 queues per TC */ 3368 max_combined = 16; 3369 } 3370 } else if (adapter->atr_sample_rate) { 3371 /* support up to 64 queues with ATR */ 3372 max_combined = IXGBE_MAX_FDIR_INDICES; 3373 } else { 3374 /* support up to 16 queues with RSS */ 3375 max_combined = ixgbe_max_rss_indices(adapter); 3376 } 3377 3378 return min_t(int, max_combined, num_online_cpus()); 3379 } 3380 3381 static void ixgbe_get_channels(struct net_device *dev, 3382 struct ethtool_channels *ch) 3383 { 3384 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3385 3386 /* report maximum channels */ 3387 ch->max_combined = ixgbe_max_channels(adapter); 3388 3389 /* report info for other vector */ 3390 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 3391 ch->max_other = NON_Q_VECTORS; 3392 ch->other_count = NON_Q_VECTORS; 3393 } 3394 3395 /* record RSS queues */ 3396 ch->combined_count = adapter->ring_feature[RING_F_RSS].indices; 3397 3398 /* nothing else to report if RSS is disabled */ 3399 if (ch->combined_count == 1) 3400 return; 3401 3402 /* we do not support ATR queueing if SR-IOV is enabled */ 3403 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 3404 return; 3405 3406 /* same thing goes for being DCB enabled */ 3407 if (adapter->hw_tcs > 1) 3408 return; 3409 3410 /* if ATR is disabled we can exit */ 3411 if (!adapter->atr_sample_rate) 3412 return; 3413 3414 /* report flow director queues as maximum channels */ 3415 ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices; 3416 } 3417 3418 static int ixgbe_set_channels(struct net_device *dev, 3419 struct ethtool_channels *ch) 3420 { 3421 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3422 unsigned int count = ch->combined_count; 3423 u8 max_rss_indices = ixgbe_max_rss_indices(adapter); 3424 3425 /* verify they are not requesting separate vectors */ 3426 if (!count || ch->rx_count || ch->tx_count) 3427 return -EINVAL; 3428 3429 /* verify other_count has not changed */ 3430 if (ch->other_count != NON_Q_VECTORS) 3431 return -EINVAL; 3432 3433 /* verify the number of channels does not exceed hardware limits */ 3434 if (count > ixgbe_max_channels(adapter)) 3435 return -EINVAL; 3436 3437 /* update feature limits from largest to smallest supported values */ 3438 adapter->ring_feature[RING_F_FDIR].limit = count; 3439 3440 /* cap RSS limit */ 3441 if (count > max_rss_indices) 3442 count = max_rss_indices; 3443 adapter->ring_feature[RING_F_RSS].limit = count; 3444 3445 #ifdef IXGBE_FCOE 3446 /* cap FCoE limit at 8 */ 3447 if (count > IXGBE_FCRETA_SIZE) 3448 count = IXGBE_FCRETA_SIZE; 3449 adapter->ring_feature[RING_F_FCOE].limit = count; 3450 3451 #endif 3452 /* use setup TC to update any traffic class queue mapping */ 3453 return ixgbe_setup_tc(dev, adapter->hw_tcs); 3454 } 3455 3456 static int ixgbe_get_module_info(struct net_device *dev, 3457 struct ethtool_modinfo *modinfo) 3458 { 3459 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3460 struct ixgbe_hw *hw = &adapter->hw; 3461 u8 sff8472_rev, addr_mode; 3462 bool page_swap = false; 3463 int status; 3464 3465 if (hw->phy.type == ixgbe_phy_fw) 3466 return -ENXIO; 3467 3468 /* Check whether we support SFF-8472 or not */ 3469 status = hw->phy.ops.read_i2c_eeprom(hw, 3470 IXGBE_SFF_SFF_8472_COMP, 3471 &sff8472_rev); 3472 if (status) 3473 return -EIO; 3474 3475 /* addressing mode is not supported */ 3476 status = hw->phy.ops.read_i2c_eeprom(hw, 3477 IXGBE_SFF_SFF_8472_SWAP, 3478 &addr_mode); 3479 if (status) 3480 return -EIO; 3481 3482 if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) { 3483 e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n"); 3484 page_swap = true; 3485 } 3486 3487 if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap || 3488 !(addr_mode & IXGBE_SFF_DDM_IMPLEMENTED)) { 3489 /* We have a SFP, but it does not support SFF-8472 */ 3490 modinfo->type = ETH_MODULE_SFF_8079; 3491 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 3492 } else { 3493 /* We have a SFP which supports a revision of SFF-8472. */ 3494 modinfo->type = ETH_MODULE_SFF_8472; 3495 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 3496 } 3497 3498 return 0; 3499 } 3500 3501 static int ixgbe_get_module_eeprom(struct net_device *dev, 3502 struct ethtool_eeprom *ee, 3503 u8 *data) 3504 { 3505 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3506 struct ixgbe_hw *hw = &adapter->hw; 3507 int status = -EFAULT; 3508 u8 databyte = 0xFF; 3509 int i = 0; 3510 3511 if (ee->len == 0) 3512 return -EINVAL; 3513 3514 if (hw->phy.type == ixgbe_phy_fw) 3515 return -ENXIO; 3516 3517 for (i = ee->offset; i < ee->offset + ee->len; i++) { 3518 /* I2C reads can take long time */ 3519 if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 3520 return -EBUSY; 3521 3522 if (i < ETH_MODULE_SFF_8079_LEN) 3523 status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte); 3524 else 3525 status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte); 3526 3527 if (status) 3528 return -EIO; 3529 3530 data[i - ee->offset] = databyte; 3531 } 3532 3533 return 0; 3534 } 3535 3536 static const struct { 3537 ixgbe_link_speed mac_speed; 3538 u32 link_mode; 3539 } ixgbe_ls_map[] = { 3540 { IXGBE_LINK_SPEED_10_FULL, ETHTOOL_LINK_MODE_10baseT_Full_BIT }, 3541 { IXGBE_LINK_SPEED_100_FULL, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, 3542 { IXGBE_LINK_SPEED_1GB_FULL, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, 3543 { IXGBE_LINK_SPEED_2_5GB_FULL, ETHTOOL_LINK_MODE_2500baseX_Full_BIT }, 3544 { IXGBE_LINK_SPEED_10GB_FULL, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, 3545 }; 3546 3547 static const struct { 3548 u32 lp_advertised; 3549 u32 link_mode; 3550 } ixgbe_lp_map[] = { 3551 { FW_PHY_ACT_UD_2_100M_TX_EEE, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, 3552 { FW_PHY_ACT_UD_2_1G_T_EEE, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, 3553 { FW_PHY_ACT_UD_2_10G_T_EEE, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, 3554 { FW_PHY_ACT_UD_2_1G_KX_EEE, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT }, 3555 { FW_PHY_ACT_UD_2_10G_KX4_EEE, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT }, 3556 { FW_PHY_ACT_UD_2_10G_KR_EEE, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 3557 }; 3558 3559 static int 3560 ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_keee *edata) 3561 { 3562 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 3563 u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 }; 3564 struct ixgbe_hw *hw = &adapter->hw; 3565 int rc; 3566 u16 i; 3567 3568 rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info); 3569 if (rc) 3570 return rc; 3571 3572 for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) { 3573 if (info[0] & ixgbe_lp_map[i].lp_advertised) 3574 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3575 edata->lp_advertised); 3576 } 3577 3578 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { 3579 if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed) 3580 linkmode_set_bit(ixgbe_ls_map[i].link_mode, 3581 edata->supported); 3582 } 3583 3584 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { 3585 if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed) 3586 linkmode_set_bit(ixgbe_ls_map[i].link_mode, 3587 edata->advertised); 3588 } 3589 3590 edata->eee_enabled = !linkmode_empty(edata->advertised); 3591 edata->tx_lpi_enabled = edata->eee_enabled; 3592 3593 linkmode_and(common, edata->advertised, edata->lp_advertised); 3594 edata->eee_active = !linkmode_empty(common); 3595 3596 return 0; 3597 } 3598 3599 static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_keee *edata) 3600 { 3601 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3602 struct ixgbe_hw *hw = &adapter->hw; 3603 3604 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) 3605 return -EOPNOTSUPP; 3606 3607 if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw) 3608 return ixgbe_get_eee_fw(adapter, edata); 3609 3610 return -EOPNOTSUPP; 3611 } 3612 3613 static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_keee *edata) 3614 { 3615 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3616 struct ixgbe_hw *hw = &adapter->hw; 3617 struct ethtool_keee eee_data; 3618 int ret_val; 3619 3620 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) 3621 return -EOPNOTSUPP; 3622 3623 memset(&eee_data, 0, sizeof(struct ethtool_keee)); 3624 3625 ret_val = ixgbe_get_eee(netdev, &eee_data); 3626 if (ret_val) 3627 return ret_val; 3628 3629 if (eee_data.eee_enabled && !edata->eee_enabled) { 3630 if (eee_data.tx_lpi_enabled != edata->tx_lpi_enabled) { 3631 e_err(drv, "Setting EEE tx-lpi is not supported\n"); 3632 return -EINVAL; 3633 } 3634 3635 if (eee_data.tx_lpi_timer != edata->tx_lpi_timer) { 3636 e_err(drv, 3637 "Setting EEE Tx LPI timer is not supported\n"); 3638 return -EINVAL; 3639 } 3640 3641 if (!linkmode_equal(eee_data.advertised, edata->advertised)) { 3642 e_err(drv, 3643 "Setting EEE advertised speeds is not supported\n"); 3644 return -EINVAL; 3645 } 3646 } 3647 3648 if (eee_data.eee_enabled != edata->eee_enabled) { 3649 if (edata->eee_enabled) { 3650 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED; 3651 hw->phy.eee_speeds_advertised = 3652 hw->phy.eee_speeds_supported; 3653 } else { 3654 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED; 3655 hw->phy.eee_speeds_advertised = 0; 3656 } 3657 3658 /* reset link */ 3659 if (netif_running(netdev)) 3660 ixgbe_reinit_locked(adapter); 3661 else 3662 ixgbe_reset(adapter); 3663 } 3664 3665 return 0; 3666 } 3667 3668 static u32 ixgbe_get_priv_flags(struct net_device *netdev) 3669 { 3670 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3671 u32 priv_flags = 0; 3672 3673 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) 3674 priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX; 3675 3676 if (adapter->flags2 & IXGBE_FLAG2_VF_IPSEC_ENABLED) 3677 priv_flags |= IXGBE_PRIV_FLAGS_VF_IPSEC_EN; 3678 3679 if (adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF) 3680 priv_flags |= IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF; 3681 3682 return priv_flags; 3683 } 3684 3685 static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags) 3686 { 3687 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3688 unsigned int flags2 = adapter->flags2; 3689 unsigned int i; 3690 3691 flags2 &= ~IXGBE_FLAG2_RX_LEGACY; 3692 if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX) 3693 flags2 |= IXGBE_FLAG2_RX_LEGACY; 3694 3695 flags2 &= ~IXGBE_FLAG2_VF_IPSEC_ENABLED; 3696 if (priv_flags & IXGBE_PRIV_FLAGS_VF_IPSEC_EN) 3697 flags2 |= IXGBE_FLAG2_VF_IPSEC_ENABLED; 3698 3699 flags2 &= ~IXGBE_FLAG2_AUTO_DISABLE_VF; 3700 if (priv_flags & IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF) { 3701 if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 3702 /* Reset primary abort counter */ 3703 for (i = 0; i < adapter->num_vfs; i++) 3704 adapter->vfinfo[i].primary_abort_count = 0; 3705 3706 flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF; 3707 } else { 3708 e_info(probe, 3709 "Cannot set private flags: Operation not supported\n"); 3710 return -EOPNOTSUPP; 3711 } 3712 } 3713 3714 if (flags2 != adapter->flags2) { 3715 adapter->flags2 = flags2; 3716 3717 /* reset interface to repopulate queues */ 3718 if (netif_running(netdev)) 3719 ixgbe_reinit_locked(adapter); 3720 } 3721 3722 return 0; 3723 } 3724 3725 static const struct ethtool_ops ixgbe_ethtool_ops = { 3726 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 3727 .get_drvinfo = ixgbe_get_drvinfo, 3728 .get_regs_len = ixgbe_get_regs_len, 3729 .get_regs = ixgbe_get_regs, 3730 .get_wol = ixgbe_get_wol, 3731 .set_wol = ixgbe_set_wol, 3732 .nway_reset = ixgbe_nway_reset, 3733 .get_link = ethtool_op_get_link, 3734 .get_link_ext_stats = ixgbe_get_link_ext_stats, 3735 .get_eeprom_len = ixgbe_get_eeprom_len, 3736 .get_eeprom = ixgbe_get_eeprom, 3737 .set_eeprom = ixgbe_set_eeprom, 3738 .get_ringparam = ixgbe_get_ringparam, 3739 .set_ringparam = ixgbe_set_ringparam, 3740 .get_pause_stats = ixgbe_get_pause_stats, 3741 .get_pauseparam = ixgbe_get_pauseparam, 3742 .set_pauseparam = ixgbe_set_pauseparam, 3743 .get_msglevel = ixgbe_get_msglevel, 3744 .set_msglevel = ixgbe_set_msglevel, 3745 .self_test = ixgbe_diag_test, 3746 .get_strings = ixgbe_get_strings, 3747 .set_phys_id = ixgbe_set_phys_id, 3748 .get_sset_count = ixgbe_get_sset_count, 3749 .get_ethtool_stats = ixgbe_get_ethtool_stats, 3750 .get_coalesce = ixgbe_get_coalesce, 3751 .set_coalesce = ixgbe_set_coalesce, 3752 .get_rx_ring_count = ixgbe_get_rx_ring_count, 3753 .get_rxnfc = ixgbe_get_rxnfc, 3754 .set_rxnfc = ixgbe_set_rxnfc, 3755 .get_rxfh_indir_size = ixgbe_rss_indir_size, 3756 .get_rxfh_key_size = ixgbe_get_rxfh_key_size, 3757 .get_rxfh = ixgbe_get_rxfh, 3758 .set_rxfh = ixgbe_set_rxfh, 3759 .get_rxfh_fields = ixgbe_get_rxfh_fields, 3760 .set_rxfh_fields = ixgbe_set_rxfh_fields, 3761 .get_eee = ixgbe_get_eee, 3762 .set_eee = ixgbe_set_eee, 3763 .get_channels = ixgbe_get_channels, 3764 .set_channels = ixgbe_set_channels, 3765 .get_priv_flags = ixgbe_get_priv_flags, 3766 .set_priv_flags = ixgbe_set_priv_flags, 3767 .get_ts_info = ixgbe_get_ts_info, 3768 .get_module_info = ixgbe_get_module_info, 3769 .get_module_eeprom = ixgbe_get_module_eeprom, 3770 .get_link_ksettings = ixgbe_get_link_ksettings, 3771 .set_link_ksettings = ixgbe_set_link_ksettings, 3772 }; 3773 3774 static const struct ethtool_ops ixgbe_ethtool_ops_e610 = { 3775 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 3776 .get_drvinfo = ixgbe_get_drvinfo, 3777 .get_regs_len = ixgbe_get_regs_len, 3778 .get_regs = ixgbe_get_regs, 3779 .get_wol = ixgbe_get_wol, 3780 .set_wol = ixgbe_set_wol_e610, 3781 .nway_reset = ixgbe_nway_reset, 3782 .get_link = ethtool_op_get_link, 3783 .get_link_ext_stats = ixgbe_get_link_ext_stats, 3784 .get_eeprom_len = ixgbe_get_eeprom_len, 3785 .get_eeprom = ixgbe_get_eeprom, 3786 .set_eeprom = ixgbe_set_eeprom, 3787 .get_ringparam = ixgbe_get_ringparam, 3788 .set_ringparam = ixgbe_set_ringparam, 3789 .get_pause_stats = ixgbe_get_pause_stats, 3790 .get_pauseparam = ixgbe_get_pauseparam, 3791 .set_pauseparam = ixgbe_set_pauseparam_e610, 3792 .get_msglevel = ixgbe_get_msglevel, 3793 .set_msglevel = ixgbe_set_msglevel, 3794 .self_test = ixgbe_diag_test, 3795 .get_strings = ixgbe_get_strings, 3796 .set_phys_id = ixgbe_set_phys_id_e610, 3797 .get_sset_count = ixgbe_get_sset_count, 3798 .get_ethtool_stats = ixgbe_get_ethtool_stats, 3799 .get_coalesce = ixgbe_get_coalesce, 3800 .set_coalesce = ixgbe_set_coalesce, 3801 .get_rx_ring_count = ixgbe_get_rx_ring_count, 3802 .get_rxnfc = ixgbe_get_rxnfc, 3803 .set_rxnfc = ixgbe_set_rxnfc, 3804 .get_rxfh_indir_size = ixgbe_rss_indir_size, 3805 .get_rxfh_key_size = ixgbe_get_rxfh_key_size, 3806 .get_rxfh = ixgbe_get_rxfh, 3807 .set_rxfh = ixgbe_set_rxfh, 3808 .get_rxfh_fields = ixgbe_get_rxfh_fields, 3809 .set_rxfh_fields = ixgbe_set_rxfh_fields, 3810 .get_eee = ixgbe_get_eee, 3811 .set_eee = ixgbe_set_eee, 3812 .get_channels = ixgbe_get_channels, 3813 .set_channels = ixgbe_set_channels, 3814 .get_priv_flags = ixgbe_get_priv_flags, 3815 .set_priv_flags = ixgbe_set_priv_flags, 3816 .get_ts_info = ixgbe_get_ts_info, 3817 .get_module_info = ixgbe_get_module_info, 3818 .get_module_eeprom = ixgbe_get_module_eeprom, 3819 .get_link_ksettings = ixgbe_get_link_ksettings, 3820 .set_link_ksettings = ixgbe_set_link_ksettings, 3821 }; 3822 3823 void ixgbe_set_ethtool_ops(struct net_device *netdev) 3824 { 3825 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3826 3827 if (adapter->hw.mac.type == ixgbe_mac_e610) 3828 netdev->ethtool_ops = &ixgbe_ethtool_ops_e610; 3829 else 3830 netdev->ethtool_ops = &ixgbe_ethtool_ops; 3831 } 3832