1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 1999 - 2018 Intel Corporation. */ 3 4 #ifndef _IXGBE_COMMON_H_ 5 #define _IXGBE_COMMON_H_ 6 7 #include "ixgbe_type.h" 8 #include "ixgbe.h" 9 10 u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); 11 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw); 12 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw); 13 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw); 14 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw); 15 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); 16 s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, 17 u32 pba_num_size); 18 s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); 19 enum ixgbe_bus_width ixgbe_convert_bus_width(u16 link_status); 20 enum ixgbe_bus_speed ixgbe_convert_bus_speed(u16 link_status); 21 s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); 22 void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); 23 s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); 24 25 s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index); 26 s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index); 27 s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw); 28 29 s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw); 30 s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 31 s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 32 u16 words, u16 *data); 33 s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data); 34 s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset, 35 u16 words, u16 *data); 36 s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 37 s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, 38 u16 words, u16 *data); 39 s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 40 u16 *data); 41 s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 42 u16 words, u16 *data); 43 s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); 44 s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, 45 u16 *checksum_val); 46 s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); 47 48 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 49 u32 enable_addr); 50 s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); 51 s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); 52 s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, 53 struct net_device *netdev); 54 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); 55 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); 56 s32 ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw); 57 s32 ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw); 58 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); 59 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw); 60 s32 ixgbe_setup_fc_generic(struct ixgbe_hw *); 61 bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); 62 void ixgbe_fc_autoneg(struct ixgbe_hw *hw); 63 64 s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask); 65 void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask); 66 s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); 67 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 68 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq); 69 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 70 s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); 71 s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, 72 u32 vind, bool vlan_on, bool vlvf_bypass); 73 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); 74 s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, 75 ixgbe_link_speed *speed, 76 bool *link_up, bool link_up_wait_to_complete); 77 s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, 78 u16 *wwpn_prefix); 79 80 s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val); 81 s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked); 82 83 s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); 84 s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); 85 void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); 86 void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); 87 s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps); 88 s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, 89 u8 build, u8 ver, u16 len, const char *str); 90 u8 ixgbe_calculate_checksum(u8 *buffer, u32 length); 91 s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, void *, u32 length, 92 u32 timeout, bool return_data); 93 s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 len, u32 timeout); 94 s32 ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity, 95 u32 (*data)[FW_PHY_ACT_DATA_COUNT]); 96 void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); 97 bool ixgbe_mng_present(struct ixgbe_hw *hw); 98 bool ixgbe_mng_enabled(struct ixgbe_hw *hw); 99 100 void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, 101 u32 headroom, int strategy); 102 103 extern const u32 ixgbe_mvals_8259X[IXGBE_MVALS_IDX_LIMIT]; 104 105 #define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8 106 #define IXGBE_EMC_INTERNAL_DATA 0x00 107 #define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20 108 #define IXGBE_EMC_DIODE1_DATA 0x01 109 #define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19 110 #define IXGBE_EMC_DIODE2_DATA 0x23 111 #define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A 112 #define IXGBE_EMC_DIODE3_DATA 0x2A 113 #define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30 114 115 s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw); 116 s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw); 117 void ixgbe_get_etk_id(struct ixgbe_hw *hw, 118 struct ixgbe_nvm_version *nvm_ver); 119 void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw, 120 struct ixgbe_nvm_version *nvm_ver); 121 void ixgbe_get_orom_version(struct ixgbe_hw *hw, 122 struct ixgbe_nvm_version *nvm_ver); 123 void ixgbe_disable_rx_generic(struct ixgbe_hw *hw); 124 void ixgbe_enable_rx_generic(struct ixgbe_hw *hw); 125 s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, 126 ixgbe_link_speed speed, 127 bool autoneg_wait_to_complete); 128 void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw, 129 ixgbe_link_speed speed); 130 131 #define IXGBE_FAILED_READ_RETRIES 5 132 #define IXGBE_FAILED_READ_REG 0xffffffffU 133 #define IXGBE_FAILED_READ_CFG_DWORD 0xffffffffU 134 #define IXGBE_FAILED_READ_CFG_WORD 0xffffU 135 136 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg); 137 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value); 138 139 static inline bool ixgbe_removed(void __iomem *addr) 140 { 141 return unlikely(!addr); 142 } 143 144 static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value) 145 { 146 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); 147 148 if (ixgbe_removed(reg_addr)) 149 return; 150 writel(value, reg_addr + reg); 151 } 152 #define IXGBE_WRITE_REG(a, reg, value) ixgbe_write_reg((a), (reg), (value)) 153 154 #ifndef writeq 155 #define writeq writeq 156 static inline void writeq(u64 val, void __iomem *addr) 157 { 158 writel((u32)val, addr); 159 writel((u32)(val >> 32), addr + 4); 160 } 161 #endif 162 163 static inline void ixgbe_write_reg64(struct ixgbe_hw *hw, u32 reg, u64 value) 164 { 165 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); 166 167 if (ixgbe_removed(reg_addr)) 168 return; 169 writeq(value, reg_addr + reg); 170 } 171 #define IXGBE_WRITE_REG64(a, reg, value) ixgbe_write_reg64((a), (reg), (value)) 172 173 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg); 174 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg((a), (reg)) 175 176 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) \ 177 ixgbe_write_reg((a), (reg) + ((offset) << 2), (value)) 178 179 #define IXGBE_READ_REG_ARRAY(a, reg, offset) \ 180 ixgbe_read_reg((a), (reg) + ((offset) << 2)) 181 182 #define IXGBE_WRITE_FLUSH(a) ixgbe_read_reg((a), IXGBE_STATUS) 183 184 #define ixgbe_hw_to_netdev(hw) (((struct ixgbe_adapter *)(hw)->back)->netdev) 185 186 #define hw_dbg(hw, format, arg...) \ 187 netdev_dbg(ixgbe_hw_to_netdev(hw), format, ## arg) 188 #define hw_err(hw, format, arg...) \ 189 netdev_err(ixgbe_hw_to_netdev(hw), format, ## arg) 190 #define e_dev_info(format, arg...) \ 191 dev_info(&adapter->pdev->dev, format, ## arg) 192 #define e_dev_warn(format, arg...) \ 193 dev_warn(&adapter->pdev->dev, format, ## arg) 194 #define e_dev_err(format, arg...) \ 195 dev_err(&adapter->pdev->dev, format, ## arg) 196 #define e_dev_notice(format, arg...) \ 197 dev_notice(&adapter->pdev->dev, format, ## arg) 198 #define e_info(msglvl, format, arg...) \ 199 netif_info(adapter, msglvl, adapter->netdev, format, ## arg) 200 #define e_err(msglvl, format, arg...) \ 201 netif_err(adapter, msglvl, adapter->netdev, format, ## arg) 202 #define e_warn(msglvl, format, arg...) \ 203 netif_warn(adapter, msglvl, adapter->netdev, format, ## arg) 204 #define e_crit(msglvl, format, arg...) \ 205 netif_crit(adapter, msglvl, adapter->netdev, format, ## arg) 206 #endif /* IXGBE_COMMON */ 207