1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2020 Intel Corporation */ 3 4 #ifndef _IGC_TSN_H_ 5 #define _IGC_TSN_H_ 6 7 #define IGC_RX_MIN_FRAG_SIZE 60 8 #define SMD_FRAME_SIZE 60 9 10 enum igc_txd_popts_type { 11 SMD_V = 0x01, 12 SMD_R = 0x02, 13 }; 14 15 DECLARE_STATIC_KEY_FALSE(igc_fpe_enabled); 16 17 void igc_fpe_init(struct igc_adapter *adapter); 18 u32 igc_fpe_get_supported_frag_size(u32 frag_size); 19 int igc_tsn_offload_apply(struct igc_adapter *adapter); 20 int igc_tsn_reset(struct igc_adapter *adapter); 21 void igc_tsn_adjust_txtime_offset(struct igc_adapter *adapter); 22 bool igc_tsn_is_taprio_activated_by_user(struct igc_adapter *adapter); 23 24 static inline bool igc_fpe_is_pmac_enabled(struct igc_adapter *adapter) 25 { 26 return static_branch_unlikely(&igc_fpe_enabled) && 27 adapter->fpe.mmsv.pmac_enabled; 28 } 29 30 static inline bool igc_fpe_handle_mpacket(struct igc_adapter *adapter, 31 union igc_adv_rx_desc *rx_desc, 32 unsigned int size, void *pktbuf) 33 { 34 u32 status_error = le32_to_cpu(rx_desc->wb.upper.status_error); 35 int smd; 36 37 smd = FIELD_GET(IGC_RXDADV_STAT_SMD_TYPE_MASK, status_error); 38 if (smd != IGC_RXD_STAT_SMD_TYPE_V && smd != IGC_RXD_STAT_SMD_TYPE_R) 39 return false; 40 41 if (size == SMD_FRAME_SIZE && mem_is_zero(pktbuf, SMD_FRAME_SIZE)) { 42 struct ethtool_mmsv *mmsv = &adapter->fpe.mmsv; 43 enum ethtool_mmsv_event event; 44 45 if (smd == IGC_RXD_STAT_SMD_TYPE_V) 46 event = ETHTOOL_MMSV_LP_SENT_VERIFY_MPACKET; 47 else 48 event = ETHTOOL_MMSV_LP_SENT_RESPONSE_MPACKET; 49 50 ethtool_mmsv_event_handle(mmsv, event); 51 } 52 53 return true; 54 } 55 56 static inline bool igc_fpe_transmitted_smd_v(union igc_adv_tx_desc *tx_desc) 57 { 58 u32 olinfo_status = le32_to_cpu(tx_desc->read.olinfo_status); 59 u8 smd = FIELD_GET(IGC_TXD_POPTS_SMD_MASK, olinfo_status); 60 61 return smd == SMD_V; 62 } 63 64 #endif /* _IGC_BASE_H */ 65