1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (C) 2023 Intel Corporation */ 3 4 #include "idpf.h" 5 #include "idpf_lan_vf_regs.h" 6 #include "idpf_virtchnl.h" 7 8 #define IDPF_VF_ITR_IDX_SPACING 0x40 9 10 /** 11 * idpf_vf_ctlq_reg_init - initialize default mailbox registers 12 * @adapter: adapter structure 13 * @cq: pointer to the array of create control queues 14 */ 15 static void idpf_vf_ctlq_reg_init(struct idpf_adapter *adapter, 16 struct idpf_ctlq_create_info *cq) 17 { 18 resource_size_t mbx_start = adapter->dev_ops.static_reg_info[0].start; 19 int i; 20 21 for (i = 0; i < IDPF_NUM_DFLT_MBX_Q; i++) { 22 struct idpf_ctlq_create_info *ccq = cq + i; 23 24 switch (ccq->type) { 25 case IDPF_CTLQ_TYPE_MAILBOX_TX: 26 /* set head and tail registers in our local struct */ 27 ccq->reg.head = VF_ATQH - mbx_start; 28 ccq->reg.tail = VF_ATQT - mbx_start; 29 ccq->reg.len = VF_ATQLEN - mbx_start; 30 ccq->reg.bah = VF_ATQBAH - mbx_start; 31 ccq->reg.bal = VF_ATQBAL - mbx_start; 32 ccq->reg.len_mask = VF_ATQLEN_ATQLEN_M; 33 ccq->reg.len_ena_mask = VF_ATQLEN_ATQENABLE_M; 34 ccq->reg.head_mask = VF_ATQH_ATQH_M; 35 break; 36 case IDPF_CTLQ_TYPE_MAILBOX_RX: 37 /* set head and tail registers in our local struct */ 38 ccq->reg.head = VF_ARQH - mbx_start; 39 ccq->reg.tail = VF_ARQT - mbx_start; 40 ccq->reg.len = VF_ARQLEN - mbx_start; 41 ccq->reg.bah = VF_ARQBAH - mbx_start; 42 ccq->reg.bal = VF_ARQBAL - mbx_start; 43 ccq->reg.len_mask = VF_ARQLEN_ARQLEN_M; 44 ccq->reg.len_ena_mask = VF_ARQLEN_ARQENABLE_M; 45 ccq->reg.head_mask = VF_ARQH_ARQH_M; 46 break; 47 default: 48 break; 49 } 50 } 51 } 52 53 /** 54 * idpf_vf_mb_intr_reg_init - Initialize the mailbox register 55 * @adapter: adapter structure 56 */ 57 static void idpf_vf_mb_intr_reg_init(struct idpf_adapter *adapter) 58 { 59 struct idpf_intr_reg *intr = &adapter->mb_vector.intr_reg; 60 u32 dyn_ctl = le32_to_cpu(adapter->caps.mailbox_dyn_ctl); 61 62 intr->dyn_ctl = idpf_get_reg_addr(adapter, dyn_ctl); 63 intr->dyn_ctl_intena_m = VF_INT_DYN_CTL0_INTENA_M; 64 intr->dyn_ctl_itridx_m = VF_INT_DYN_CTL0_ITR_INDX_M; 65 intr->icr_ena = idpf_get_reg_addr(adapter, VF_INT_ICR0_ENA1); 66 intr->icr_ena_ctlq_m = VF_INT_ICR0_ENA1_ADMINQ_M; 67 } 68 69 /** 70 * idpf_vf_intr_reg_init - Initialize interrupt registers 71 * @vport: virtual port structure 72 * @rsrc: pointer to queue and vector resources 73 */ 74 static int idpf_vf_intr_reg_init(struct idpf_vport *vport, 75 struct idpf_q_vec_rsrc *rsrc) 76 { 77 struct idpf_adapter *adapter = vport->adapter; 78 u16 num_vecs = rsrc->num_q_vectors; 79 struct idpf_vec_regs *reg_vals; 80 int num_regs, i, err = 0; 81 u32 rx_itr, tx_itr, val; 82 u16 total_vecs; 83 84 total_vecs = idpf_get_reserved_vecs(vport->adapter); 85 reg_vals = kcalloc(total_vecs, sizeof(struct idpf_vec_regs), 86 GFP_KERNEL); 87 if (!reg_vals) 88 return -ENOMEM; 89 90 num_regs = idpf_get_reg_intr_vecs(adapter, reg_vals); 91 if (num_regs < num_vecs) { 92 err = -EINVAL; 93 goto free_reg_vals; 94 } 95 96 for (i = 0; i < num_vecs; i++) { 97 struct idpf_q_vector *q_vector = &rsrc->q_vectors[i]; 98 u16 vec_id = rsrc->q_vector_idxs[i] - IDPF_MBX_Q_VEC; 99 struct idpf_intr_reg *intr = &q_vector->intr_reg; 100 u32 spacing; 101 102 intr->dyn_ctl = idpf_get_reg_addr(adapter, 103 reg_vals[vec_id].dyn_ctl_reg); 104 intr->dyn_ctl_intena_m = VF_INT_DYN_CTLN_INTENA_M; 105 intr->dyn_ctl_intena_msk_m = VF_INT_DYN_CTLN_INTENA_MSK_M; 106 intr->dyn_ctl_itridx_s = VF_INT_DYN_CTLN_ITR_INDX_S; 107 intr->dyn_ctl_intrvl_s = VF_INT_DYN_CTLN_INTERVAL_S; 108 intr->dyn_ctl_wb_on_itr_m = VF_INT_DYN_CTLN_WB_ON_ITR_M; 109 intr->dyn_ctl_swint_trig_m = VF_INT_DYN_CTLN_SWINT_TRIG_M; 110 intr->dyn_ctl_sw_itridx_ena_m = 111 VF_INT_DYN_CTLN_SW_ITR_INDX_ENA_M; 112 113 spacing = IDPF_ITR_IDX_SPACING(reg_vals[vec_id].itrn_index_spacing, 114 IDPF_VF_ITR_IDX_SPACING); 115 rx_itr = VF_INT_ITRN_ADDR(VIRTCHNL2_ITR_IDX_0, 116 reg_vals[vec_id].itrn_reg, 117 spacing); 118 tx_itr = VF_INT_ITRN_ADDR(VIRTCHNL2_ITR_IDX_1, 119 reg_vals[vec_id].itrn_reg, 120 spacing); 121 intr->rx_itr = idpf_get_reg_addr(adapter, rx_itr); 122 intr->tx_itr = idpf_get_reg_addr(adapter, tx_itr); 123 } 124 125 /* Data vector for NOIRQ queues */ 126 127 val = reg_vals[rsrc->q_vector_idxs[i] - IDPF_MBX_Q_VEC].dyn_ctl_reg; 128 rsrc->noirq_dyn_ctl = idpf_get_reg_addr(adapter, val); 129 130 val = VF_INT_DYN_CTLN_WB_ON_ITR_M | VF_INT_DYN_CTLN_INTENA_MSK_M | 131 FIELD_PREP(VF_INT_DYN_CTLN_ITR_INDX_M, IDPF_NO_ITR_UPDATE_IDX); 132 rsrc->noirq_dyn_ctl_ena = val; 133 134 free_reg_vals: 135 kfree(reg_vals); 136 137 return err; 138 } 139 140 /** 141 * idpf_vf_reset_reg_init - Initialize reset registers 142 * @adapter: Driver specific private structure 143 */ 144 static void idpf_vf_reset_reg_init(struct idpf_adapter *adapter) 145 { 146 adapter->reset_reg.rstat = idpf_get_rstat_reg_addr(adapter, VFGEN_RSTAT); 147 adapter->reset_reg.rstat_m = VFGEN_RSTAT_VFR_STATE_M; 148 } 149 150 /** 151 * idpf_vf_trigger_reset - trigger reset 152 * @adapter: Driver specific private structure 153 * @trig_cause: Reason to trigger a reset 154 */ 155 static void idpf_vf_trigger_reset(struct idpf_adapter *adapter, 156 enum idpf_flags trig_cause) 157 { 158 /* Do not send VIRTCHNL2_OP_RESET_VF message on driver unload */ 159 if (trig_cause == IDPF_HR_FUNC_RESET && 160 !test_bit(IDPF_REMOVE_IN_PROG, adapter->flags)) 161 idpf_send_mb_msg(adapter, adapter->hw.asq, 162 VIRTCHNL2_OP_RESET_VF, 0, NULL, 0); 163 } 164 165 /** 166 * idpf_idc_vf_register - register for IDC callbacks 167 * @adapter: Driver specific private structure 168 * 169 * Return: 0 on success or error code on failure. 170 */ 171 static int idpf_idc_vf_register(struct idpf_adapter *adapter) 172 { 173 return idpf_idc_init_aux_core_dev(adapter, IIDC_FUNCTION_TYPE_VF); 174 } 175 176 /** 177 * idpf_vf_reg_ops_init - Initialize register API function pointers 178 * @adapter: Driver specific private structure 179 */ 180 static void idpf_vf_reg_ops_init(struct idpf_adapter *adapter) 181 { 182 adapter->dev_ops.reg_ops.ctlq_reg_init = idpf_vf_ctlq_reg_init; 183 adapter->dev_ops.reg_ops.intr_reg_init = idpf_vf_intr_reg_init; 184 adapter->dev_ops.reg_ops.mb_intr_reg_init = idpf_vf_mb_intr_reg_init; 185 adapter->dev_ops.reg_ops.reset_reg_init = idpf_vf_reset_reg_init; 186 adapter->dev_ops.reg_ops.trigger_reset = idpf_vf_trigger_reset; 187 } 188 189 /** 190 * idpf_vf_dev_ops_init - Initialize device API function pointers 191 * @adapter: Driver specific private structure 192 */ 193 void idpf_vf_dev_ops_init(struct idpf_adapter *adapter) 194 { 195 idpf_vf_reg_ops_init(adapter); 196 197 adapter->dev_ops.idc_init = idpf_idc_vf_register; 198 199 resource_set_range(&adapter->dev_ops.static_reg_info[0], 200 VF_BASE, IDPF_VF_MBX_REGION_SZ); 201 resource_set_range(&adapter->dev_ops.static_reg_info[1], 202 VFGEN_RSTAT, IDPF_VF_RSTAT_REGION_SZ); 203 } 204