xref: /linux/drivers/net/ethernet/intel/idpf/idpf_txrx.c (revision e06c9d25159c0b12518c68ffe3e400d49d5284e0)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (C) 2023 Intel Corporation */
3 
4 #include <net/libeth/rx.h>
5 #include <net/libeth/tx.h>
6 
7 #include "idpf.h"
8 #include "idpf_ptp.h"
9 #include "idpf_virtchnl.h"
10 
11 struct idpf_tx_stash {
12 	struct hlist_node hlist;
13 	struct libeth_sqe buf;
14 };
15 
16 #define idpf_tx_buf_compl_tag(buf)	(*(u32 *)&(buf)->priv)
17 LIBETH_SQE_CHECK_PRIV(u32);
18 
19 static bool idpf_chk_linearize(struct sk_buff *skb, unsigned int max_bufs,
20 			       unsigned int count);
21 
22 /**
23  * idpf_buf_lifo_push - push a buffer pointer onto stack
24  * @stack: pointer to stack struct
25  * @buf: pointer to buf to push
26  *
27  * Returns 0 on success, negative on failure
28  **/
29 static int idpf_buf_lifo_push(struct idpf_buf_lifo *stack,
30 			      struct idpf_tx_stash *buf)
31 {
32 	if (unlikely(stack->top == stack->size))
33 		return -ENOSPC;
34 
35 	stack->bufs[stack->top++] = buf;
36 
37 	return 0;
38 }
39 
40 /**
41  * idpf_buf_lifo_pop - pop a buffer pointer from stack
42  * @stack: pointer to stack struct
43  **/
44 static struct idpf_tx_stash *idpf_buf_lifo_pop(struct idpf_buf_lifo *stack)
45 {
46 	if (unlikely(!stack->top))
47 		return NULL;
48 
49 	return stack->bufs[--stack->top];
50 }
51 
52 /**
53  * idpf_tx_timeout - Respond to a Tx Hang
54  * @netdev: network interface device structure
55  * @txqueue: TX queue
56  */
57 void idpf_tx_timeout(struct net_device *netdev, unsigned int txqueue)
58 {
59 	struct idpf_adapter *adapter = idpf_netdev_to_adapter(netdev);
60 
61 	adapter->tx_timeout_count++;
62 
63 	netdev_err(netdev, "Detected Tx timeout: Count %d, Queue %d\n",
64 		   adapter->tx_timeout_count, txqueue);
65 	if (!idpf_is_reset_in_prog(adapter)) {
66 		set_bit(IDPF_HR_FUNC_RESET, adapter->flags);
67 		queue_delayed_work(adapter->vc_event_wq,
68 				   &adapter->vc_event_task,
69 				   msecs_to_jiffies(10));
70 	}
71 }
72 
73 /**
74  * idpf_tx_buf_rel_all - Free any empty Tx buffers
75  * @txq: queue to be cleaned
76  */
77 static void idpf_tx_buf_rel_all(struct idpf_tx_queue *txq)
78 {
79 	struct libeth_sq_napi_stats ss = { };
80 	struct idpf_buf_lifo *buf_stack;
81 	struct idpf_tx_stash *stash;
82 	struct libeth_cq_pp cp = {
83 		.dev	= txq->dev,
84 		.ss	= &ss,
85 	};
86 	struct hlist_node *tmp;
87 	u32 i, tag;
88 
89 	/* Buffers already cleared, nothing to do */
90 	if (!txq->tx_buf)
91 		return;
92 
93 	/* Free all the Tx buffer sk_buffs */
94 	for (i = 0; i < txq->desc_count; i++)
95 		libeth_tx_complete(&txq->tx_buf[i], &cp);
96 
97 	kfree(txq->tx_buf);
98 	txq->tx_buf = NULL;
99 
100 	if (!idpf_queue_has(FLOW_SCH_EN, txq))
101 		return;
102 
103 	buf_stack = &txq->stash->buf_stack;
104 	if (!buf_stack->bufs)
105 		return;
106 
107 	/*
108 	 * If a Tx timeout occurred, there are potentially still bufs in the
109 	 * hash table, free them here.
110 	 */
111 	hash_for_each_safe(txq->stash->sched_buf_hash, tag, tmp, stash,
112 			   hlist) {
113 		if (!stash)
114 			continue;
115 
116 		libeth_tx_complete(&stash->buf, &cp);
117 		hash_del(&stash->hlist);
118 		idpf_buf_lifo_push(buf_stack, stash);
119 	}
120 
121 	for (i = 0; i < buf_stack->size; i++)
122 		kfree(buf_stack->bufs[i]);
123 
124 	kfree(buf_stack->bufs);
125 	buf_stack->bufs = NULL;
126 }
127 
128 /**
129  * idpf_tx_desc_rel - Free Tx resources per queue
130  * @txq: Tx descriptor ring for a specific queue
131  *
132  * Free all transmit software resources
133  */
134 static void idpf_tx_desc_rel(struct idpf_tx_queue *txq)
135 {
136 	idpf_tx_buf_rel_all(txq);
137 	netdev_tx_reset_subqueue(txq->netdev, txq->idx);
138 
139 	if (!txq->desc_ring)
140 		return;
141 
142 	dmam_free_coherent(txq->dev, txq->size, txq->desc_ring, txq->dma);
143 	txq->desc_ring = NULL;
144 	txq->next_to_use = 0;
145 	txq->next_to_clean = 0;
146 }
147 
148 /**
149  * idpf_compl_desc_rel - Free completion resources per queue
150  * @complq: completion queue
151  *
152  * Free all completion software resources.
153  */
154 static void idpf_compl_desc_rel(struct idpf_compl_queue *complq)
155 {
156 	if (!complq->comp)
157 		return;
158 
159 	dma_free_coherent(complq->netdev->dev.parent, complq->size,
160 			  complq->comp, complq->dma);
161 	complq->comp = NULL;
162 	complq->next_to_use = 0;
163 	complq->next_to_clean = 0;
164 }
165 
166 /**
167  * idpf_tx_desc_rel_all - Free Tx Resources for All Queues
168  * @vport: virtual port structure
169  *
170  * Free all transmit software resources
171  */
172 static void idpf_tx_desc_rel_all(struct idpf_vport *vport)
173 {
174 	int i, j;
175 
176 	if (!vport->txq_grps)
177 		return;
178 
179 	for (i = 0; i < vport->num_txq_grp; i++) {
180 		struct idpf_txq_group *txq_grp = &vport->txq_grps[i];
181 
182 		for (j = 0; j < txq_grp->num_txq; j++)
183 			idpf_tx_desc_rel(txq_grp->txqs[j]);
184 
185 		if (idpf_is_queue_model_split(vport->txq_model))
186 			idpf_compl_desc_rel(txq_grp->complq);
187 	}
188 }
189 
190 /**
191  * idpf_tx_buf_alloc_all - Allocate memory for all buffer resources
192  * @tx_q: queue for which the buffers are allocated
193  *
194  * Returns 0 on success, negative on failure
195  */
196 static int idpf_tx_buf_alloc_all(struct idpf_tx_queue *tx_q)
197 {
198 	struct idpf_buf_lifo *buf_stack;
199 	int buf_size;
200 	int i;
201 
202 	/* Allocate book keeping buffers only. Buffers to be supplied to HW
203 	 * are allocated by kernel network stack and received as part of skb
204 	 */
205 	buf_size = sizeof(struct idpf_tx_buf) * tx_q->desc_count;
206 	tx_q->tx_buf = kzalloc(buf_size, GFP_KERNEL);
207 	if (!tx_q->tx_buf)
208 		return -ENOMEM;
209 
210 	if (!idpf_queue_has(FLOW_SCH_EN, tx_q))
211 		return 0;
212 
213 	buf_stack = &tx_q->stash->buf_stack;
214 
215 	/* Initialize tx buf stack for out-of-order completions if
216 	 * flow scheduling offload is enabled
217 	 */
218 	buf_stack->bufs = kcalloc(tx_q->desc_count, sizeof(*buf_stack->bufs),
219 				  GFP_KERNEL);
220 	if (!buf_stack->bufs)
221 		return -ENOMEM;
222 
223 	buf_stack->size = tx_q->desc_count;
224 	buf_stack->top = tx_q->desc_count;
225 
226 	for (i = 0; i < tx_q->desc_count; i++) {
227 		buf_stack->bufs[i] = kzalloc(sizeof(*buf_stack->bufs[i]),
228 					     GFP_KERNEL);
229 		if (!buf_stack->bufs[i])
230 			return -ENOMEM;
231 	}
232 
233 	return 0;
234 }
235 
236 /**
237  * idpf_tx_desc_alloc - Allocate the Tx descriptors
238  * @vport: vport to allocate resources for
239  * @tx_q: the tx ring to set up
240  *
241  * Returns 0 on success, negative on failure
242  */
243 static int idpf_tx_desc_alloc(const struct idpf_vport *vport,
244 			      struct idpf_tx_queue *tx_q)
245 {
246 	struct device *dev = tx_q->dev;
247 	int err;
248 
249 	err = idpf_tx_buf_alloc_all(tx_q);
250 	if (err)
251 		goto err_alloc;
252 
253 	tx_q->size = tx_q->desc_count * sizeof(*tx_q->base_tx);
254 
255 	/* Allocate descriptors also round up to nearest 4K */
256 	tx_q->size = ALIGN(tx_q->size, 4096);
257 	tx_q->desc_ring = dmam_alloc_coherent(dev, tx_q->size, &tx_q->dma,
258 					      GFP_KERNEL);
259 	if (!tx_q->desc_ring) {
260 		dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
261 			tx_q->size);
262 		err = -ENOMEM;
263 		goto err_alloc;
264 	}
265 
266 	tx_q->next_to_use = 0;
267 	tx_q->next_to_clean = 0;
268 	idpf_queue_set(GEN_CHK, tx_q);
269 
270 	return 0;
271 
272 err_alloc:
273 	idpf_tx_desc_rel(tx_q);
274 
275 	return err;
276 }
277 
278 /**
279  * idpf_compl_desc_alloc - allocate completion descriptors
280  * @vport: vport to allocate resources for
281  * @complq: completion queue to set up
282  *
283  * Return: 0 on success, -errno on failure.
284  */
285 static int idpf_compl_desc_alloc(const struct idpf_vport *vport,
286 				 struct idpf_compl_queue *complq)
287 {
288 	complq->size = array_size(complq->desc_count, sizeof(*complq->comp));
289 
290 	complq->comp = dma_alloc_coherent(complq->netdev->dev.parent,
291 					  complq->size, &complq->dma,
292 					  GFP_KERNEL);
293 	if (!complq->comp)
294 		return -ENOMEM;
295 
296 	complq->next_to_use = 0;
297 	complq->next_to_clean = 0;
298 	idpf_queue_set(GEN_CHK, complq);
299 
300 	return 0;
301 }
302 
303 /**
304  * idpf_tx_desc_alloc_all - allocate all queues Tx resources
305  * @vport: virtual port private structure
306  *
307  * Returns 0 on success, negative on failure
308  */
309 static int idpf_tx_desc_alloc_all(struct idpf_vport *vport)
310 {
311 	int err = 0;
312 	int i, j;
313 
314 	/* Setup buffer queues. In single queue model buffer queues and
315 	 * completion queues will be same
316 	 */
317 	for (i = 0; i < vport->num_txq_grp; i++) {
318 		for (j = 0; j < vport->txq_grps[i].num_txq; j++) {
319 			struct idpf_tx_queue *txq = vport->txq_grps[i].txqs[j];
320 			u8 gen_bits = 0;
321 			u16 bufidx_mask;
322 
323 			err = idpf_tx_desc_alloc(vport, txq);
324 			if (err) {
325 				pci_err(vport->adapter->pdev,
326 					"Allocation for Tx Queue %u failed\n",
327 					i);
328 				goto err_out;
329 			}
330 
331 			if (!idpf_is_queue_model_split(vport->txq_model))
332 				continue;
333 
334 			txq->compl_tag_cur_gen = 0;
335 
336 			/* Determine the number of bits in the bufid
337 			 * mask and add one to get the start of the
338 			 * generation bits
339 			 */
340 			bufidx_mask = txq->desc_count - 1;
341 			while (bufidx_mask >> 1) {
342 				txq->compl_tag_gen_s++;
343 				bufidx_mask = bufidx_mask >> 1;
344 			}
345 			txq->compl_tag_gen_s++;
346 
347 			gen_bits = IDPF_TX_SPLITQ_COMPL_TAG_WIDTH -
348 							txq->compl_tag_gen_s;
349 			txq->compl_tag_gen_max = GETMAXVAL(gen_bits);
350 
351 			/* Set bufid mask based on location of first
352 			 * gen bit; it cannot simply be the descriptor
353 			 * ring size-1 since we can have size values
354 			 * where not all of those bits are set.
355 			 */
356 			txq->compl_tag_bufid_m =
357 				GETMAXVAL(txq->compl_tag_gen_s);
358 		}
359 
360 		if (!idpf_is_queue_model_split(vport->txq_model))
361 			continue;
362 
363 		/* Setup completion queues */
364 		err = idpf_compl_desc_alloc(vport, vport->txq_grps[i].complq);
365 		if (err) {
366 			pci_err(vport->adapter->pdev,
367 				"Allocation for Tx Completion Queue %u failed\n",
368 				i);
369 			goto err_out;
370 		}
371 	}
372 
373 err_out:
374 	if (err)
375 		idpf_tx_desc_rel_all(vport);
376 
377 	return err;
378 }
379 
380 /**
381  * idpf_rx_page_rel - Release an rx buffer page
382  * @rx_buf: the buffer to free
383  */
384 static void idpf_rx_page_rel(struct libeth_fqe *rx_buf)
385 {
386 	if (unlikely(!rx_buf->page))
387 		return;
388 
389 	page_pool_put_full_page(rx_buf->page->pp, rx_buf->page, false);
390 
391 	rx_buf->page = NULL;
392 	rx_buf->offset = 0;
393 }
394 
395 /**
396  * idpf_rx_hdr_buf_rel_all - Release header buffer memory
397  * @bufq: queue to use
398  */
399 static void idpf_rx_hdr_buf_rel_all(struct idpf_buf_queue *bufq)
400 {
401 	struct libeth_fq fq = {
402 		.fqes	= bufq->hdr_buf,
403 		.pp	= bufq->hdr_pp,
404 	};
405 
406 	for (u32 i = 0; i < bufq->desc_count; i++)
407 		idpf_rx_page_rel(&bufq->hdr_buf[i]);
408 
409 	libeth_rx_fq_destroy(&fq);
410 	bufq->hdr_buf = NULL;
411 	bufq->hdr_pp = NULL;
412 }
413 
414 /**
415  * idpf_rx_buf_rel_bufq - Free all Rx buffer resources for a buffer queue
416  * @bufq: queue to be cleaned
417  */
418 static void idpf_rx_buf_rel_bufq(struct idpf_buf_queue *bufq)
419 {
420 	struct libeth_fq fq = {
421 		.fqes	= bufq->buf,
422 		.pp	= bufq->pp,
423 	};
424 
425 	/* queue already cleared, nothing to do */
426 	if (!bufq->buf)
427 		return;
428 
429 	/* Free all the bufs allocated and given to hw on Rx queue */
430 	for (u32 i = 0; i < bufq->desc_count; i++)
431 		idpf_rx_page_rel(&bufq->buf[i]);
432 
433 	if (idpf_queue_has(HSPLIT_EN, bufq))
434 		idpf_rx_hdr_buf_rel_all(bufq);
435 
436 	libeth_rx_fq_destroy(&fq);
437 	bufq->buf = NULL;
438 	bufq->pp = NULL;
439 }
440 
441 /**
442  * idpf_rx_buf_rel_all - Free all Rx buffer resources for a receive queue
443  * @rxq: queue to be cleaned
444  */
445 static void idpf_rx_buf_rel_all(struct idpf_rx_queue *rxq)
446 {
447 	struct libeth_fq fq = {
448 		.fqes	= rxq->rx_buf,
449 		.pp	= rxq->pp,
450 	};
451 
452 	if (!rxq->rx_buf)
453 		return;
454 
455 	for (u32 i = 0; i < rxq->desc_count; i++)
456 		idpf_rx_page_rel(&rxq->rx_buf[i]);
457 
458 	libeth_rx_fq_destroy(&fq);
459 	rxq->rx_buf = NULL;
460 	rxq->pp = NULL;
461 }
462 
463 /**
464  * idpf_rx_desc_rel - Free a specific Rx q resources
465  * @rxq: queue to clean the resources from
466  * @dev: device to free DMA memory
467  * @model: single or split queue model
468  *
469  * Free a specific rx queue resources
470  */
471 static void idpf_rx_desc_rel(struct idpf_rx_queue *rxq, struct device *dev,
472 			     u32 model)
473 {
474 	if (!rxq)
475 		return;
476 
477 	if (rxq->skb) {
478 		dev_kfree_skb_any(rxq->skb);
479 		rxq->skb = NULL;
480 	}
481 
482 	if (!idpf_is_queue_model_split(model))
483 		idpf_rx_buf_rel_all(rxq);
484 
485 	rxq->next_to_alloc = 0;
486 	rxq->next_to_clean = 0;
487 	rxq->next_to_use = 0;
488 	if (!rxq->desc_ring)
489 		return;
490 
491 	dmam_free_coherent(dev, rxq->size, rxq->desc_ring, rxq->dma);
492 	rxq->desc_ring = NULL;
493 }
494 
495 /**
496  * idpf_rx_desc_rel_bufq - free buffer queue resources
497  * @bufq: buffer queue to clean the resources from
498  * @dev: device to free DMA memory
499  */
500 static void idpf_rx_desc_rel_bufq(struct idpf_buf_queue *bufq,
501 				  struct device *dev)
502 {
503 	if (!bufq)
504 		return;
505 
506 	idpf_rx_buf_rel_bufq(bufq);
507 
508 	bufq->next_to_alloc = 0;
509 	bufq->next_to_clean = 0;
510 	bufq->next_to_use = 0;
511 
512 	if (!bufq->split_buf)
513 		return;
514 
515 	dma_free_coherent(dev, bufq->size, bufq->split_buf, bufq->dma);
516 	bufq->split_buf = NULL;
517 }
518 
519 /**
520  * idpf_rx_desc_rel_all - Free Rx Resources for All Queues
521  * @vport: virtual port structure
522  *
523  * Free all rx queues resources
524  */
525 static void idpf_rx_desc_rel_all(struct idpf_vport *vport)
526 {
527 	struct device *dev = &vport->adapter->pdev->dev;
528 	struct idpf_rxq_group *rx_qgrp;
529 	u16 num_rxq;
530 	int i, j;
531 
532 	if (!vport->rxq_grps)
533 		return;
534 
535 	for (i = 0; i < vport->num_rxq_grp; i++) {
536 		rx_qgrp = &vport->rxq_grps[i];
537 
538 		if (!idpf_is_queue_model_split(vport->rxq_model)) {
539 			for (j = 0; j < rx_qgrp->singleq.num_rxq; j++)
540 				idpf_rx_desc_rel(rx_qgrp->singleq.rxqs[j], dev,
541 						 VIRTCHNL2_QUEUE_MODEL_SINGLE);
542 			continue;
543 		}
544 
545 		num_rxq = rx_qgrp->splitq.num_rxq_sets;
546 		for (j = 0; j < num_rxq; j++)
547 			idpf_rx_desc_rel(&rx_qgrp->splitq.rxq_sets[j]->rxq,
548 					 dev, VIRTCHNL2_QUEUE_MODEL_SPLIT);
549 
550 		if (!rx_qgrp->splitq.bufq_sets)
551 			continue;
552 
553 		for (j = 0; j < vport->num_bufqs_per_qgrp; j++) {
554 			struct idpf_bufq_set *bufq_set =
555 				&rx_qgrp->splitq.bufq_sets[j];
556 
557 			idpf_rx_desc_rel_bufq(&bufq_set->bufq, dev);
558 		}
559 	}
560 }
561 
562 /**
563  * idpf_rx_buf_hw_update - Store the new tail and head values
564  * @bufq: queue to bump
565  * @val: new head index
566  */
567 static void idpf_rx_buf_hw_update(struct idpf_buf_queue *bufq, u32 val)
568 {
569 	bufq->next_to_use = val;
570 
571 	if (unlikely(!bufq->tail))
572 		return;
573 
574 	/* writel has an implicit memory barrier */
575 	writel(val, bufq->tail);
576 }
577 
578 /**
579  * idpf_rx_hdr_buf_alloc_all - Allocate memory for header buffers
580  * @bufq: ring to use
581  *
582  * Returns 0 on success, negative on failure.
583  */
584 static int idpf_rx_hdr_buf_alloc_all(struct idpf_buf_queue *bufq)
585 {
586 	struct libeth_fq fq = {
587 		.count	= bufq->desc_count,
588 		.type	= LIBETH_FQE_HDR,
589 		.nid	= idpf_q_vector_to_mem(bufq->q_vector),
590 	};
591 	int ret;
592 
593 	ret = libeth_rx_fq_create(&fq, &bufq->q_vector->napi);
594 	if (ret)
595 		return ret;
596 
597 	bufq->hdr_pp = fq.pp;
598 	bufq->hdr_buf = fq.fqes;
599 	bufq->hdr_truesize = fq.truesize;
600 	bufq->rx_hbuf_size = fq.buf_len;
601 
602 	return 0;
603 }
604 
605 /**
606  * idpf_rx_post_buf_refill - Post buffer id to refill queue
607  * @refillq: refill queue to post to
608  * @buf_id: buffer id to post
609  */
610 static void idpf_rx_post_buf_refill(struct idpf_sw_queue *refillq, u16 buf_id)
611 {
612 	u32 nta = refillq->next_to_use;
613 
614 	/* store the buffer ID and the SW maintained GEN bit to the refillq */
615 	refillq->ring[nta] =
616 		FIELD_PREP(IDPF_RX_BI_BUFID_M, buf_id) |
617 		FIELD_PREP(IDPF_RX_BI_GEN_M,
618 			   idpf_queue_has(GEN_CHK, refillq));
619 
620 	if (unlikely(++nta == refillq->desc_count)) {
621 		nta = 0;
622 		idpf_queue_change(GEN_CHK, refillq);
623 	}
624 
625 	refillq->next_to_use = nta;
626 }
627 
628 /**
629  * idpf_rx_post_buf_desc - Post buffer to bufq descriptor ring
630  * @bufq: buffer queue to post to
631  * @buf_id: buffer id to post
632  *
633  * Returns false if buffer could not be allocated, true otherwise.
634  */
635 static bool idpf_rx_post_buf_desc(struct idpf_buf_queue *bufq, u16 buf_id)
636 {
637 	struct virtchnl2_splitq_rx_buf_desc *splitq_rx_desc = NULL;
638 	struct libeth_fq_fp fq = {
639 		.count	= bufq->desc_count,
640 	};
641 	u16 nta = bufq->next_to_alloc;
642 	dma_addr_t addr;
643 
644 	splitq_rx_desc = &bufq->split_buf[nta];
645 
646 	if (idpf_queue_has(HSPLIT_EN, bufq)) {
647 		fq.pp = bufq->hdr_pp;
648 		fq.fqes = bufq->hdr_buf;
649 		fq.truesize = bufq->hdr_truesize;
650 
651 		addr = libeth_rx_alloc(&fq, buf_id);
652 		if (addr == DMA_MAPPING_ERROR)
653 			return false;
654 
655 		splitq_rx_desc->hdr_addr = cpu_to_le64(addr);
656 	}
657 
658 	fq.pp = bufq->pp;
659 	fq.fqes = bufq->buf;
660 	fq.truesize = bufq->truesize;
661 
662 	addr = libeth_rx_alloc(&fq, buf_id);
663 	if (addr == DMA_MAPPING_ERROR)
664 		return false;
665 
666 	splitq_rx_desc->pkt_addr = cpu_to_le64(addr);
667 	splitq_rx_desc->qword0.buf_id = cpu_to_le16(buf_id);
668 
669 	nta++;
670 	if (unlikely(nta == bufq->desc_count))
671 		nta = 0;
672 	bufq->next_to_alloc = nta;
673 
674 	return true;
675 }
676 
677 /**
678  * idpf_rx_post_init_bufs - Post initial buffers to bufq
679  * @bufq: buffer queue to post working set to
680  * @working_set: number of buffers to put in working set
681  *
682  * Returns true if @working_set bufs were posted successfully, false otherwise.
683  */
684 static bool idpf_rx_post_init_bufs(struct idpf_buf_queue *bufq,
685 				   u16 working_set)
686 {
687 	int i;
688 
689 	for (i = 0; i < working_set; i++) {
690 		if (!idpf_rx_post_buf_desc(bufq, i))
691 			return false;
692 	}
693 
694 	idpf_rx_buf_hw_update(bufq, ALIGN_DOWN(bufq->next_to_alloc,
695 					       IDPF_RX_BUF_STRIDE));
696 
697 	return true;
698 }
699 
700 /**
701  * idpf_rx_buf_alloc_singleq - Allocate memory for all buffer resources
702  * @rxq: queue for which the buffers are allocated
703  *
704  * Return: 0 on success, -ENOMEM on failure.
705  */
706 static int idpf_rx_buf_alloc_singleq(struct idpf_rx_queue *rxq)
707 {
708 	if (idpf_rx_singleq_buf_hw_alloc_all(rxq, rxq->desc_count - 1))
709 		goto err;
710 
711 	return 0;
712 
713 err:
714 	idpf_rx_buf_rel_all(rxq);
715 
716 	return -ENOMEM;
717 }
718 
719 /**
720  * idpf_rx_bufs_init_singleq - Initialize page pool and allocate Rx bufs
721  * @rxq: buffer queue to create page pool for
722  *
723  * Return: 0 on success, -errno on failure.
724  */
725 static int idpf_rx_bufs_init_singleq(struct idpf_rx_queue *rxq)
726 {
727 	struct libeth_fq fq = {
728 		.count	= rxq->desc_count,
729 		.type	= LIBETH_FQE_MTU,
730 		.nid	= idpf_q_vector_to_mem(rxq->q_vector),
731 	};
732 	int ret;
733 
734 	ret = libeth_rx_fq_create(&fq, &rxq->q_vector->napi);
735 	if (ret)
736 		return ret;
737 
738 	rxq->pp = fq.pp;
739 	rxq->rx_buf = fq.fqes;
740 	rxq->truesize = fq.truesize;
741 	rxq->rx_buf_size = fq.buf_len;
742 
743 	return idpf_rx_buf_alloc_singleq(rxq);
744 }
745 
746 /**
747  * idpf_rx_buf_alloc_all - Allocate memory for all buffer resources
748  * @rxbufq: queue for which the buffers are allocated
749  *
750  * Returns 0 on success, negative on failure
751  */
752 static int idpf_rx_buf_alloc_all(struct idpf_buf_queue *rxbufq)
753 {
754 	int err = 0;
755 
756 	if (idpf_queue_has(HSPLIT_EN, rxbufq)) {
757 		err = idpf_rx_hdr_buf_alloc_all(rxbufq);
758 		if (err)
759 			goto rx_buf_alloc_all_out;
760 	}
761 
762 	/* Allocate buffers to be given to HW.	 */
763 	if (!idpf_rx_post_init_bufs(rxbufq, IDPF_RX_BUFQ_WORKING_SET(rxbufq)))
764 		err = -ENOMEM;
765 
766 rx_buf_alloc_all_out:
767 	if (err)
768 		idpf_rx_buf_rel_bufq(rxbufq);
769 
770 	return err;
771 }
772 
773 /**
774  * idpf_rx_bufs_init - Initialize page pool, allocate rx bufs, and post to HW
775  * @bufq: buffer queue to create page pool for
776  * @type: type of Rx buffers to allocate
777  *
778  * Returns 0 on success, negative on failure
779  */
780 static int idpf_rx_bufs_init(struct idpf_buf_queue *bufq,
781 			     enum libeth_fqe_type type)
782 {
783 	struct libeth_fq fq = {
784 		.truesize	= bufq->truesize,
785 		.count		= bufq->desc_count,
786 		.type		= type,
787 		.hsplit		= idpf_queue_has(HSPLIT_EN, bufq),
788 		.nid		= idpf_q_vector_to_mem(bufq->q_vector),
789 	};
790 	int ret;
791 
792 	ret = libeth_rx_fq_create(&fq, &bufq->q_vector->napi);
793 	if (ret)
794 		return ret;
795 
796 	bufq->pp = fq.pp;
797 	bufq->buf = fq.fqes;
798 	bufq->truesize = fq.truesize;
799 	bufq->rx_buf_size = fq.buf_len;
800 
801 	return idpf_rx_buf_alloc_all(bufq);
802 }
803 
804 /**
805  * idpf_rx_bufs_init_all - Initialize all RX bufs
806  * @vport: virtual port struct
807  *
808  * Returns 0 on success, negative on failure
809  */
810 int idpf_rx_bufs_init_all(struct idpf_vport *vport)
811 {
812 	bool split = idpf_is_queue_model_split(vport->rxq_model);
813 	int i, j, err;
814 
815 	for (i = 0; i < vport->num_rxq_grp; i++) {
816 		struct idpf_rxq_group *rx_qgrp = &vport->rxq_grps[i];
817 		u32 truesize = 0;
818 
819 		/* Allocate bufs for the rxq itself in singleq */
820 		if (!split) {
821 			int num_rxq = rx_qgrp->singleq.num_rxq;
822 
823 			for (j = 0; j < num_rxq; j++) {
824 				struct idpf_rx_queue *q;
825 
826 				q = rx_qgrp->singleq.rxqs[j];
827 				err = idpf_rx_bufs_init_singleq(q);
828 				if (err)
829 					return err;
830 			}
831 
832 			continue;
833 		}
834 
835 		/* Otherwise, allocate bufs for the buffer queues */
836 		for (j = 0; j < vport->num_bufqs_per_qgrp; j++) {
837 			enum libeth_fqe_type type;
838 			struct idpf_buf_queue *q;
839 
840 			q = &rx_qgrp->splitq.bufq_sets[j].bufq;
841 			q->truesize = truesize;
842 
843 			type = truesize ? LIBETH_FQE_SHORT : LIBETH_FQE_MTU;
844 
845 			err = idpf_rx_bufs_init(q, type);
846 			if (err)
847 				return err;
848 
849 			truesize = q->truesize >> 1;
850 		}
851 	}
852 
853 	return 0;
854 }
855 
856 /**
857  * idpf_rx_desc_alloc - Allocate queue Rx resources
858  * @vport: vport to allocate resources for
859  * @rxq: Rx queue for which the resources are setup
860  *
861  * Returns 0 on success, negative on failure
862  */
863 static int idpf_rx_desc_alloc(const struct idpf_vport *vport,
864 			      struct idpf_rx_queue *rxq)
865 {
866 	struct device *dev = &vport->adapter->pdev->dev;
867 
868 	rxq->size = rxq->desc_count * sizeof(union virtchnl2_rx_desc);
869 
870 	/* Allocate descriptors and also round up to nearest 4K */
871 	rxq->size = ALIGN(rxq->size, 4096);
872 	rxq->desc_ring = dmam_alloc_coherent(dev, rxq->size,
873 					     &rxq->dma, GFP_KERNEL);
874 	if (!rxq->desc_ring) {
875 		dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
876 			rxq->size);
877 		return -ENOMEM;
878 	}
879 
880 	rxq->next_to_alloc = 0;
881 	rxq->next_to_clean = 0;
882 	rxq->next_to_use = 0;
883 	idpf_queue_set(GEN_CHK, rxq);
884 
885 	return 0;
886 }
887 
888 /**
889  * idpf_bufq_desc_alloc - Allocate buffer queue descriptor ring
890  * @vport: vport to allocate resources for
891  * @bufq: buffer queue for which the resources are set up
892  *
893  * Return: 0 on success, -ENOMEM on failure.
894  */
895 static int idpf_bufq_desc_alloc(const struct idpf_vport *vport,
896 				struct idpf_buf_queue *bufq)
897 {
898 	struct device *dev = &vport->adapter->pdev->dev;
899 
900 	bufq->size = array_size(bufq->desc_count, sizeof(*bufq->split_buf));
901 
902 	bufq->split_buf = dma_alloc_coherent(dev, bufq->size, &bufq->dma,
903 					     GFP_KERNEL);
904 	if (!bufq->split_buf)
905 		return -ENOMEM;
906 
907 	bufq->next_to_alloc = 0;
908 	bufq->next_to_clean = 0;
909 	bufq->next_to_use = 0;
910 
911 	idpf_queue_set(GEN_CHK, bufq);
912 
913 	return 0;
914 }
915 
916 /**
917  * idpf_rx_desc_alloc_all - allocate all RX queues resources
918  * @vport: virtual port structure
919  *
920  * Returns 0 on success, negative on failure
921  */
922 static int idpf_rx_desc_alloc_all(struct idpf_vport *vport)
923 {
924 	struct idpf_rxq_group *rx_qgrp;
925 	int i, j, err;
926 	u16 num_rxq;
927 
928 	for (i = 0; i < vport->num_rxq_grp; i++) {
929 		rx_qgrp = &vport->rxq_grps[i];
930 		if (idpf_is_queue_model_split(vport->rxq_model))
931 			num_rxq = rx_qgrp->splitq.num_rxq_sets;
932 		else
933 			num_rxq = rx_qgrp->singleq.num_rxq;
934 
935 		for (j = 0; j < num_rxq; j++) {
936 			struct idpf_rx_queue *q;
937 
938 			if (idpf_is_queue_model_split(vport->rxq_model))
939 				q = &rx_qgrp->splitq.rxq_sets[j]->rxq;
940 			else
941 				q = rx_qgrp->singleq.rxqs[j];
942 
943 			err = idpf_rx_desc_alloc(vport, q);
944 			if (err) {
945 				pci_err(vport->adapter->pdev,
946 					"Memory allocation for Rx Queue %u failed\n",
947 					i);
948 				goto err_out;
949 			}
950 		}
951 
952 		if (!idpf_is_queue_model_split(vport->rxq_model))
953 			continue;
954 
955 		for (j = 0; j < vport->num_bufqs_per_qgrp; j++) {
956 			struct idpf_buf_queue *q;
957 
958 			q = &rx_qgrp->splitq.bufq_sets[j].bufq;
959 
960 			err = idpf_bufq_desc_alloc(vport, q);
961 			if (err) {
962 				pci_err(vport->adapter->pdev,
963 					"Memory allocation for Rx Buffer Queue %u failed\n",
964 					i);
965 				goto err_out;
966 			}
967 		}
968 	}
969 
970 	return 0;
971 
972 err_out:
973 	idpf_rx_desc_rel_all(vport);
974 
975 	return err;
976 }
977 
978 /**
979  * idpf_txq_group_rel - Release all resources for txq groups
980  * @vport: vport to release txq groups on
981  */
982 static void idpf_txq_group_rel(struct idpf_vport *vport)
983 {
984 	bool split, flow_sch_en;
985 	int i, j;
986 
987 	if (!vport->txq_grps)
988 		return;
989 
990 	split = idpf_is_queue_model_split(vport->txq_model);
991 	flow_sch_en = !idpf_is_cap_ena(vport->adapter, IDPF_OTHER_CAPS,
992 				       VIRTCHNL2_CAP_SPLITQ_QSCHED);
993 
994 	for (i = 0; i < vport->num_txq_grp; i++) {
995 		struct idpf_txq_group *txq_grp = &vport->txq_grps[i];
996 
997 		for (j = 0; j < txq_grp->num_txq; j++) {
998 			kfree(txq_grp->txqs[j]);
999 			txq_grp->txqs[j] = NULL;
1000 		}
1001 
1002 		if (!split)
1003 			continue;
1004 
1005 		kfree(txq_grp->complq);
1006 		txq_grp->complq = NULL;
1007 
1008 		if (flow_sch_en)
1009 			kfree(txq_grp->stashes);
1010 	}
1011 	kfree(vport->txq_grps);
1012 	vport->txq_grps = NULL;
1013 }
1014 
1015 /**
1016  * idpf_rxq_sw_queue_rel - Release software queue resources
1017  * @rx_qgrp: rx queue group with software queues
1018  */
1019 static void idpf_rxq_sw_queue_rel(struct idpf_rxq_group *rx_qgrp)
1020 {
1021 	int i, j;
1022 
1023 	for (i = 0; i < rx_qgrp->vport->num_bufqs_per_qgrp; i++) {
1024 		struct idpf_bufq_set *bufq_set = &rx_qgrp->splitq.bufq_sets[i];
1025 
1026 		for (j = 0; j < bufq_set->num_refillqs; j++) {
1027 			kfree(bufq_set->refillqs[j].ring);
1028 			bufq_set->refillqs[j].ring = NULL;
1029 		}
1030 		kfree(bufq_set->refillqs);
1031 		bufq_set->refillqs = NULL;
1032 	}
1033 }
1034 
1035 /**
1036  * idpf_rxq_group_rel - Release all resources for rxq groups
1037  * @vport: vport to release rxq groups on
1038  */
1039 static void idpf_rxq_group_rel(struct idpf_vport *vport)
1040 {
1041 	int i;
1042 
1043 	if (!vport->rxq_grps)
1044 		return;
1045 
1046 	for (i = 0; i < vport->num_rxq_grp; i++) {
1047 		struct idpf_rxq_group *rx_qgrp = &vport->rxq_grps[i];
1048 		u16 num_rxq;
1049 		int j;
1050 
1051 		if (idpf_is_queue_model_split(vport->rxq_model)) {
1052 			num_rxq = rx_qgrp->splitq.num_rxq_sets;
1053 			for (j = 0; j < num_rxq; j++) {
1054 				kfree(rx_qgrp->splitq.rxq_sets[j]);
1055 				rx_qgrp->splitq.rxq_sets[j] = NULL;
1056 			}
1057 
1058 			idpf_rxq_sw_queue_rel(rx_qgrp);
1059 			kfree(rx_qgrp->splitq.bufq_sets);
1060 			rx_qgrp->splitq.bufq_sets = NULL;
1061 		} else {
1062 			num_rxq = rx_qgrp->singleq.num_rxq;
1063 			for (j = 0; j < num_rxq; j++) {
1064 				kfree(rx_qgrp->singleq.rxqs[j]);
1065 				rx_qgrp->singleq.rxqs[j] = NULL;
1066 			}
1067 		}
1068 	}
1069 	kfree(vport->rxq_grps);
1070 	vport->rxq_grps = NULL;
1071 }
1072 
1073 /**
1074  * idpf_vport_queue_grp_rel_all - Release all queue groups
1075  * @vport: vport to release queue groups for
1076  */
1077 static void idpf_vport_queue_grp_rel_all(struct idpf_vport *vport)
1078 {
1079 	idpf_txq_group_rel(vport);
1080 	idpf_rxq_group_rel(vport);
1081 }
1082 
1083 /**
1084  * idpf_vport_queues_rel - Free memory for all queues
1085  * @vport: virtual port
1086  *
1087  * Free the memory allocated for queues associated to a vport
1088  */
1089 void idpf_vport_queues_rel(struct idpf_vport *vport)
1090 {
1091 	idpf_tx_desc_rel_all(vport);
1092 	idpf_rx_desc_rel_all(vport);
1093 	idpf_vport_queue_grp_rel_all(vport);
1094 
1095 	kfree(vport->txqs);
1096 	vport->txqs = NULL;
1097 }
1098 
1099 /**
1100  * idpf_vport_init_fast_path_txqs - Initialize fast path txq array
1101  * @vport: vport to init txqs on
1102  *
1103  * We get a queue index from skb->queue_mapping and we need a fast way to
1104  * dereference the queue from queue groups.  This allows us to quickly pull a
1105  * txq based on a queue index.
1106  *
1107  * Returns 0 on success, negative on failure
1108  */
1109 static int idpf_vport_init_fast_path_txqs(struct idpf_vport *vport)
1110 {
1111 	struct idpf_ptp_vport_tx_tstamp_caps *caps = vport->tx_tstamp_caps;
1112 	struct work_struct *tstamp_task = &vport->tstamp_task;
1113 	int i, j, k = 0;
1114 
1115 	vport->txqs = kcalloc(vport->num_txq, sizeof(*vport->txqs),
1116 			      GFP_KERNEL);
1117 
1118 	if (!vport->txqs)
1119 		return -ENOMEM;
1120 
1121 	for (i = 0; i < vport->num_txq_grp; i++) {
1122 		struct idpf_txq_group *tx_grp = &vport->txq_grps[i];
1123 
1124 		for (j = 0; j < tx_grp->num_txq; j++, k++) {
1125 			vport->txqs[k] = tx_grp->txqs[j];
1126 			vport->txqs[k]->idx = k;
1127 
1128 			if (!caps)
1129 				continue;
1130 
1131 			vport->txqs[k]->cached_tstamp_caps = caps;
1132 			vport->txqs[k]->tstamp_task = tstamp_task;
1133 		}
1134 	}
1135 
1136 	return 0;
1137 }
1138 
1139 /**
1140  * idpf_vport_init_num_qs - Initialize number of queues
1141  * @vport: vport to initialize queues
1142  * @vport_msg: data to be filled into vport
1143  */
1144 void idpf_vport_init_num_qs(struct idpf_vport *vport,
1145 			    struct virtchnl2_create_vport *vport_msg)
1146 {
1147 	struct idpf_vport_user_config_data *config_data;
1148 	u16 idx = vport->idx;
1149 
1150 	config_data = &vport->adapter->vport_config[idx]->user_config;
1151 	vport->num_txq = le16_to_cpu(vport_msg->num_tx_q);
1152 	vport->num_rxq = le16_to_cpu(vport_msg->num_rx_q);
1153 	/* number of txqs and rxqs in config data will be zeros only in the
1154 	 * driver load path and we dont update them there after
1155 	 */
1156 	if (!config_data->num_req_tx_qs && !config_data->num_req_rx_qs) {
1157 		config_data->num_req_tx_qs = le16_to_cpu(vport_msg->num_tx_q);
1158 		config_data->num_req_rx_qs = le16_to_cpu(vport_msg->num_rx_q);
1159 	}
1160 
1161 	if (idpf_is_queue_model_split(vport->txq_model))
1162 		vport->num_complq = le16_to_cpu(vport_msg->num_tx_complq);
1163 	if (idpf_is_queue_model_split(vport->rxq_model))
1164 		vport->num_bufq = le16_to_cpu(vport_msg->num_rx_bufq);
1165 
1166 	/* Adjust number of buffer queues per Rx queue group. */
1167 	if (!idpf_is_queue_model_split(vport->rxq_model)) {
1168 		vport->num_bufqs_per_qgrp = 0;
1169 
1170 		return;
1171 	}
1172 
1173 	vport->num_bufqs_per_qgrp = IDPF_MAX_BUFQS_PER_RXQ_GRP;
1174 }
1175 
1176 /**
1177  * idpf_vport_calc_num_q_desc - Calculate number of queue groups
1178  * @vport: vport to calculate q groups for
1179  */
1180 void idpf_vport_calc_num_q_desc(struct idpf_vport *vport)
1181 {
1182 	struct idpf_vport_user_config_data *config_data;
1183 	int num_bufqs = vport->num_bufqs_per_qgrp;
1184 	u32 num_req_txq_desc, num_req_rxq_desc;
1185 	u16 idx = vport->idx;
1186 	int i;
1187 
1188 	config_data =  &vport->adapter->vport_config[idx]->user_config;
1189 	num_req_txq_desc = config_data->num_req_txq_desc;
1190 	num_req_rxq_desc = config_data->num_req_rxq_desc;
1191 
1192 	vport->complq_desc_count = 0;
1193 	if (num_req_txq_desc) {
1194 		vport->txq_desc_count = num_req_txq_desc;
1195 		if (idpf_is_queue_model_split(vport->txq_model)) {
1196 			vport->complq_desc_count = num_req_txq_desc;
1197 			if (vport->complq_desc_count < IDPF_MIN_TXQ_COMPLQ_DESC)
1198 				vport->complq_desc_count =
1199 					IDPF_MIN_TXQ_COMPLQ_DESC;
1200 		}
1201 	} else {
1202 		vport->txq_desc_count =	IDPF_DFLT_TX_Q_DESC_COUNT;
1203 		if (idpf_is_queue_model_split(vport->txq_model))
1204 			vport->complq_desc_count =
1205 				IDPF_DFLT_TX_COMPLQ_DESC_COUNT;
1206 	}
1207 
1208 	if (num_req_rxq_desc)
1209 		vport->rxq_desc_count = num_req_rxq_desc;
1210 	else
1211 		vport->rxq_desc_count = IDPF_DFLT_RX_Q_DESC_COUNT;
1212 
1213 	for (i = 0; i < num_bufqs; i++) {
1214 		if (!vport->bufq_desc_count[i])
1215 			vport->bufq_desc_count[i] =
1216 				IDPF_RX_BUFQ_DESC_COUNT(vport->rxq_desc_count,
1217 							num_bufqs);
1218 	}
1219 }
1220 
1221 /**
1222  * idpf_vport_calc_total_qs - Calculate total number of queues
1223  * @adapter: private data struct
1224  * @vport_idx: vport idx to retrieve vport pointer
1225  * @vport_msg: message to fill with data
1226  * @max_q: vport max queue info
1227  *
1228  * Return 0 on success, error value on failure.
1229  */
1230 int idpf_vport_calc_total_qs(struct idpf_adapter *adapter, u16 vport_idx,
1231 			     struct virtchnl2_create_vport *vport_msg,
1232 			     struct idpf_vport_max_q *max_q)
1233 {
1234 	int dflt_splitq_txq_grps = 0, dflt_singleq_txqs = 0;
1235 	int dflt_splitq_rxq_grps = 0, dflt_singleq_rxqs = 0;
1236 	u16 num_req_tx_qs = 0, num_req_rx_qs = 0;
1237 	struct idpf_vport_config *vport_config;
1238 	u16 num_txq_grps, num_rxq_grps;
1239 	u32 num_qs;
1240 
1241 	vport_config = adapter->vport_config[vport_idx];
1242 	if (vport_config) {
1243 		num_req_tx_qs = vport_config->user_config.num_req_tx_qs;
1244 		num_req_rx_qs = vport_config->user_config.num_req_rx_qs;
1245 	} else {
1246 		int num_cpus;
1247 
1248 		/* Restrict num of queues to cpus online as a default
1249 		 * configuration to give best performance. User can always
1250 		 * override to a max number of queues via ethtool.
1251 		 */
1252 		num_cpus = num_online_cpus();
1253 
1254 		dflt_splitq_txq_grps = min_t(int, max_q->max_txq, num_cpus);
1255 		dflt_singleq_txqs = min_t(int, max_q->max_txq, num_cpus);
1256 		dflt_splitq_rxq_grps = min_t(int, max_q->max_rxq, num_cpus);
1257 		dflt_singleq_rxqs = min_t(int, max_q->max_rxq, num_cpus);
1258 	}
1259 
1260 	if (idpf_is_queue_model_split(le16_to_cpu(vport_msg->txq_model))) {
1261 		num_txq_grps = num_req_tx_qs ? num_req_tx_qs : dflt_splitq_txq_grps;
1262 		vport_msg->num_tx_complq = cpu_to_le16(num_txq_grps *
1263 						       IDPF_COMPLQ_PER_GROUP);
1264 		vport_msg->num_tx_q = cpu_to_le16(num_txq_grps *
1265 						  IDPF_DFLT_SPLITQ_TXQ_PER_GROUP);
1266 	} else {
1267 		num_txq_grps = IDPF_DFLT_SINGLEQ_TX_Q_GROUPS;
1268 		num_qs = num_txq_grps * (num_req_tx_qs ? num_req_tx_qs :
1269 					 dflt_singleq_txqs);
1270 		vport_msg->num_tx_q = cpu_to_le16(num_qs);
1271 		vport_msg->num_tx_complq = 0;
1272 	}
1273 	if (idpf_is_queue_model_split(le16_to_cpu(vport_msg->rxq_model))) {
1274 		num_rxq_grps = num_req_rx_qs ? num_req_rx_qs : dflt_splitq_rxq_grps;
1275 		vport_msg->num_rx_bufq = cpu_to_le16(num_rxq_grps *
1276 						     IDPF_MAX_BUFQS_PER_RXQ_GRP);
1277 		vport_msg->num_rx_q = cpu_to_le16(num_rxq_grps *
1278 						  IDPF_DFLT_SPLITQ_RXQ_PER_GROUP);
1279 	} else {
1280 		num_rxq_grps = IDPF_DFLT_SINGLEQ_RX_Q_GROUPS;
1281 		num_qs = num_rxq_grps * (num_req_rx_qs ? num_req_rx_qs :
1282 					 dflt_singleq_rxqs);
1283 		vport_msg->num_rx_q = cpu_to_le16(num_qs);
1284 		vport_msg->num_rx_bufq = 0;
1285 	}
1286 
1287 	return 0;
1288 }
1289 
1290 /**
1291  * idpf_vport_calc_num_q_groups - Calculate number of queue groups
1292  * @vport: vport to calculate q groups for
1293  */
1294 void idpf_vport_calc_num_q_groups(struct idpf_vport *vport)
1295 {
1296 	if (idpf_is_queue_model_split(vport->txq_model))
1297 		vport->num_txq_grp = vport->num_txq;
1298 	else
1299 		vport->num_txq_grp = IDPF_DFLT_SINGLEQ_TX_Q_GROUPS;
1300 
1301 	if (idpf_is_queue_model_split(vport->rxq_model))
1302 		vport->num_rxq_grp = vport->num_rxq;
1303 	else
1304 		vport->num_rxq_grp = IDPF_DFLT_SINGLEQ_RX_Q_GROUPS;
1305 }
1306 
1307 /**
1308  * idpf_vport_calc_numq_per_grp - Calculate number of queues per group
1309  * @vport: vport to calculate queues for
1310  * @num_txq: return parameter for number of TX queues
1311  * @num_rxq: return parameter for number of RX queues
1312  */
1313 static void idpf_vport_calc_numq_per_grp(struct idpf_vport *vport,
1314 					 u16 *num_txq, u16 *num_rxq)
1315 {
1316 	if (idpf_is_queue_model_split(vport->txq_model))
1317 		*num_txq = IDPF_DFLT_SPLITQ_TXQ_PER_GROUP;
1318 	else
1319 		*num_txq = vport->num_txq;
1320 
1321 	if (idpf_is_queue_model_split(vport->rxq_model))
1322 		*num_rxq = IDPF_DFLT_SPLITQ_RXQ_PER_GROUP;
1323 	else
1324 		*num_rxq = vport->num_rxq;
1325 }
1326 
1327 /**
1328  * idpf_rxq_set_descids - set the descids supported by this queue
1329  * @vport: virtual port data structure
1330  * @q: rx queue for which descids are set
1331  *
1332  */
1333 static void idpf_rxq_set_descids(const struct idpf_vport *vport,
1334 				 struct idpf_rx_queue *q)
1335 {
1336 	if (idpf_is_queue_model_split(vport->rxq_model)) {
1337 		q->rxdids = VIRTCHNL2_RXDID_2_FLEX_SPLITQ_M;
1338 	} else {
1339 		if (vport->base_rxd)
1340 			q->rxdids = VIRTCHNL2_RXDID_1_32B_BASE_M;
1341 		else
1342 			q->rxdids = VIRTCHNL2_RXDID_2_FLEX_SQ_NIC_M;
1343 	}
1344 }
1345 
1346 /**
1347  * idpf_txq_group_alloc - Allocate all txq group resources
1348  * @vport: vport to allocate txq groups for
1349  * @num_txq: number of txqs to allocate for each group
1350  *
1351  * Returns 0 on success, negative on failure
1352  */
1353 static int idpf_txq_group_alloc(struct idpf_vport *vport, u16 num_txq)
1354 {
1355 	bool split, flow_sch_en;
1356 	int i;
1357 
1358 	vport->txq_grps = kcalloc(vport->num_txq_grp,
1359 				  sizeof(*vport->txq_grps), GFP_KERNEL);
1360 	if (!vport->txq_grps)
1361 		return -ENOMEM;
1362 
1363 	split = idpf_is_queue_model_split(vport->txq_model);
1364 	flow_sch_en = !idpf_is_cap_ena(vport->adapter, IDPF_OTHER_CAPS,
1365 				       VIRTCHNL2_CAP_SPLITQ_QSCHED);
1366 
1367 	for (i = 0; i < vport->num_txq_grp; i++) {
1368 		struct idpf_txq_group *tx_qgrp = &vport->txq_grps[i];
1369 		struct idpf_adapter *adapter = vport->adapter;
1370 		struct idpf_txq_stash *stashes;
1371 		int j;
1372 
1373 		tx_qgrp->vport = vport;
1374 		tx_qgrp->num_txq = num_txq;
1375 
1376 		for (j = 0; j < tx_qgrp->num_txq; j++) {
1377 			tx_qgrp->txqs[j] = kzalloc(sizeof(*tx_qgrp->txqs[j]),
1378 						   GFP_KERNEL);
1379 			if (!tx_qgrp->txqs[j])
1380 				goto err_alloc;
1381 		}
1382 
1383 		if (split && flow_sch_en) {
1384 			stashes = kcalloc(num_txq, sizeof(*stashes),
1385 					  GFP_KERNEL);
1386 			if (!stashes)
1387 				goto err_alloc;
1388 
1389 			tx_qgrp->stashes = stashes;
1390 		}
1391 
1392 		for (j = 0; j < tx_qgrp->num_txq; j++) {
1393 			struct idpf_tx_queue *q = tx_qgrp->txqs[j];
1394 
1395 			q->dev = &adapter->pdev->dev;
1396 			q->desc_count = vport->txq_desc_count;
1397 			q->tx_max_bufs = idpf_get_max_tx_bufs(adapter);
1398 			q->tx_min_pkt_len = idpf_get_min_tx_pkt_len(adapter);
1399 			q->netdev = vport->netdev;
1400 			q->txq_grp = tx_qgrp;
1401 
1402 			if (!split) {
1403 				q->clean_budget = vport->compln_clean_budget;
1404 				idpf_queue_assign(CRC_EN, q,
1405 						  vport->crc_enable);
1406 			}
1407 
1408 			if (!flow_sch_en)
1409 				continue;
1410 
1411 			if (split) {
1412 				q->stash = &stashes[j];
1413 				hash_init(q->stash->sched_buf_hash);
1414 			}
1415 
1416 			idpf_queue_set(FLOW_SCH_EN, q);
1417 		}
1418 
1419 		if (!split)
1420 			continue;
1421 
1422 		tx_qgrp->complq = kcalloc(IDPF_COMPLQ_PER_GROUP,
1423 					  sizeof(*tx_qgrp->complq),
1424 					  GFP_KERNEL);
1425 		if (!tx_qgrp->complq)
1426 			goto err_alloc;
1427 
1428 		tx_qgrp->complq->desc_count = vport->complq_desc_count;
1429 		tx_qgrp->complq->txq_grp = tx_qgrp;
1430 		tx_qgrp->complq->netdev = vport->netdev;
1431 		tx_qgrp->complq->clean_budget = vport->compln_clean_budget;
1432 
1433 		if (flow_sch_en)
1434 			idpf_queue_set(FLOW_SCH_EN, tx_qgrp->complq);
1435 	}
1436 
1437 	return 0;
1438 
1439 err_alloc:
1440 	idpf_txq_group_rel(vport);
1441 
1442 	return -ENOMEM;
1443 }
1444 
1445 /**
1446  * idpf_rxq_group_alloc - Allocate all rxq group resources
1447  * @vport: vport to allocate rxq groups for
1448  * @num_rxq: number of rxqs to allocate for each group
1449  *
1450  * Returns 0 on success, negative on failure
1451  */
1452 static int idpf_rxq_group_alloc(struct idpf_vport *vport, u16 num_rxq)
1453 {
1454 	int i, k, err = 0;
1455 	bool hs;
1456 
1457 	vport->rxq_grps = kcalloc(vport->num_rxq_grp,
1458 				  sizeof(struct idpf_rxq_group), GFP_KERNEL);
1459 	if (!vport->rxq_grps)
1460 		return -ENOMEM;
1461 
1462 	hs = idpf_vport_get_hsplit(vport) == ETHTOOL_TCP_DATA_SPLIT_ENABLED;
1463 
1464 	for (i = 0; i < vport->num_rxq_grp; i++) {
1465 		struct idpf_rxq_group *rx_qgrp = &vport->rxq_grps[i];
1466 		int j;
1467 
1468 		rx_qgrp->vport = vport;
1469 		if (!idpf_is_queue_model_split(vport->rxq_model)) {
1470 			rx_qgrp->singleq.num_rxq = num_rxq;
1471 			for (j = 0; j < num_rxq; j++) {
1472 				rx_qgrp->singleq.rxqs[j] =
1473 						kzalloc(sizeof(*rx_qgrp->singleq.rxqs[j]),
1474 							GFP_KERNEL);
1475 				if (!rx_qgrp->singleq.rxqs[j]) {
1476 					err = -ENOMEM;
1477 					goto err_alloc;
1478 				}
1479 			}
1480 			goto skip_splitq_rx_init;
1481 		}
1482 		rx_qgrp->splitq.num_rxq_sets = num_rxq;
1483 
1484 		for (j = 0; j < num_rxq; j++) {
1485 			rx_qgrp->splitq.rxq_sets[j] =
1486 				kzalloc(sizeof(struct idpf_rxq_set),
1487 					GFP_KERNEL);
1488 			if (!rx_qgrp->splitq.rxq_sets[j]) {
1489 				err = -ENOMEM;
1490 				goto err_alloc;
1491 			}
1492 		}
1493 
1494 		rx_qgrp->splitq.bufq_sets = kcalloc(vport->num_bufqs_per_qgrp,
1495 						    sizeof(struct idpf_bufq_set),
1496 						    GFP_KERNEL);
1497 		if (!rx_qgrp->splitq.bufq_sets) {
1498 			err = -ENOMEM;
1499 			goto err_alloc;
1500 		}
1501 
1502 		for (j = 0; j < vport->num_bufqs_per_qgrp; j++) {
1503 			struct idpf_bufq_set *bufq_set =
1504 				&rx_qgrp->splitq.bufq_sets[j];
1505 			int swq_size = sizeof(struct idpf_sw_queue);
1506 			struct idpf_buf_queue *q;
1507 
1508 			q = &rx_qgrp->splitq.bufq_sets[j].bufq;
1509 			q->desc_count = vport->bufq_desc_count[j];
1510 			q->rx_buffer_low_watermark = IDPF_LOW_WATERMARK;
1511 
1512 			idpf_queue_assign(HSPLIT_EN, q, hs);
1513 
1514 			bufq_set->num_refillqs = num_rxq;
1515 			bufq_set->refillqs = kcalloc(num_rxq, swq_size,
1516 						     GFP_KERNEL);
1517 			if (!bufq_set->refillqs) {
1518 				err = -ENOMEM;
1519 				goto err_alloc;
1520 			}
1521 			for (k = 0; k < bufq_set->num_refillqs; k++) {
1522 				struct idpf_sw_queue *refillq =
1523 					&bufq_set->refillqs[k];
1524 
1525 				refillq->desc_count =
1526 					vport->bufq_desc_count[j];
1527 				idpf_queue_set(GEN_CHK, refillq);
1528 				idpf_queue_set(RFL_GEN_CHK, refillq);
1529 				refillq->ring = kcalloc(refillq->desc_count,
1530 							sizeof(*refillq->ring),
1531 							GFP_KERNEL);
1532 				if (!refillq->ring) {
1533 					err = -ENOMEM;
1534 					goto err_alloc;
1535 				}
1536 			}
1537 		}
1538 
1539 skip_splitq_rx_init:
1540 		for (j = 0; j < num_rxq; j++) {
1541 			struct idpf_rx_queue *q;
1542 
1543 			if (!idpf_is_queue_model_split(vport->rxq_model)) {
1544 				q = rx_qgrp->singleq.rxqs[j];
1545 				goto setup_rxq;
1546 			}
1547 			q = &rx_qgrp->splitq.rxq_sets[j]->rxq;
1548 			rx_qgrp->splitq.rxq_sets[j]->refillq[0] =
1549 			      &rx_qgrp->splitq.bufq_sets[0].refillqs[j];
1550 			if (vport->num_bufqs_per_qgrp > IDPF_SINGLE_BUFQ_PER_RXQ_GRP)
1551 				rx_qgrp->splitq.rxq_sets[j]->refillq[1] =
1552 				      &rx_qgrp->splitq.bufq_sets[1].refillqs[j];
1553 
1554 			idpf_queue_assign(HSPLIT_EN, q, hs);
1555 
1556 setup_rxq:
1557 			q->desc_count = vport->rxq_desc_count;
1558 			q->rx_ptype_lkup = vport->rx_ptype_lkup;
1559 			q->netdev = vport->netdev;
1560 			q->bufq_sets = rx_qgrp->splitq.bufq_sets;
1561 			q->idx = (i * num_rxq) + j;
1562 			q->rx_buffer_low_watermark = IDPF_LOW_WATERMARK;
1563 			q->rx_max_pkt_size = vport->netdev->mtu +
1564 							LIBETH_RX_LL_LEN;
1565 			idpf_rxq_set_descids(vport, q);
1566 		}
1567 	}
1568 
1569 err_alloc:
1570 	if (err)
1571 		idpf_rxq_group_rel(vport);
1572 
1573 	return err;
1574 }
1575 
1576 /**
1577  * idpf_vport_queue_grp_alloc_all - Allocate all queue groups/resources
1578  * @vport: vport with qgrps to allocate
1579  *
1580  * Returns 0 on success, negative on failure
1581  */
1582 static int idpf_vport_queue_grp_alloc_all(struct idpf_vport *vport)
1583 {
1584 	u16 num_txq, num_rxq;
1585 	int err;
1586 
1587 	idpf_vport_calc_numq_per_grp(vport, &num_txq, &num_rxq);
1588 
1589 	err = idpf_txq_group_alloc(vport, num_txq);
1590 	if (err)
1591 		goto err_out;
1592 
1593 	err = idpf_rxq_group_alloc(vport, num_rxq);
1594 	if (err)
1595 		goto err_out;
1596 
1597 	return 0;
1598 
1599 err_out:
1600 	idpf_vport_queue_grp_rel_all(vport);
1601 
1602 	return err;
1603 }
1604 
1605 /**
1606  * idpf_vport_queues_alloc - Allocate memory for all queues
1607  * @vport: virtual port
1608  *
1609  * Allocate memory for queues associated with a vport.  Returns 0 on success,
1610  * negative on failure.
1611  */
1612 int idpf_vport_queues_alloc(struct idpf_vport *vport)
1613 {
1614 	int err;
1615 
1616 	err = idpf_vport_queue_grp_alloc_all(vport);
1617 	if (err)
1618 		goto err_out;
1619 
1620 	err = idpf_tx_desc_alloc_all(vport);
1621 	if (err)
1622 		goto err_out;
1623 
1624 	err = idpf_rx_desc_alloc_all(vport);
1625 	if (err)
1626 		goto err_out;
1627 
1628 	err = idpf_vport_init_fast_path_txqs(vport);
1629 	if (err)
1630 		goto err_out;
1631 
1632 	return 0;
1633 
1634 err_out:
1635 	idpf_vport_queues_rel(vport);
1636 
1637 	return err;
1638 }
1639 
1640 /**
1641  * idpf_tx_handle_sw_marker - Handle queue marker packet
1642  * @tx_q: tx queue to handle software marker
1643  */
1644 static void idpf_tx_handle_sw_marker(struct idpf_tx_queue *tx_q)
1645 {
1646 	struct idpf_netdev_priv *priv = netdev_priv(tx_q->netdev);
1647 	struct idpf_vport *vport = priv->vport;
1648 	int i;
1649 
1650 	idpf_queue_clear(SW_MARKER, tx_q);
1651 	/* Hardware must write marker packets to all queues associated with
1652 	 * completion queues. So check if all queues received marker packets
1653 	 */
1654 	for (i = 0; i < vport->num_txq; i++)
1655 		/* If we're still waiting on any other TXQ marker completions,
1656 		 * just return now since we cannot wake up the marker_wq yet.
1657 		 */
1658 		if (idpf_queue_has(SW_MARKER, vport->txqs[i]))
1659 			return;
1660 
1661 	/* Drain complete */
1662 	set_bit(IDPF_VPORT_SW_MARKER, vport->flags);
1663 	wake_up(&vport->sw_marker_wq);
1664 }
1665 
1666 /**
1667  * idpf_tx_read_tstamp - schedule a work to read Tx timestamp value
1668  * @txq: queue to read the timestamp from
1669  * @skb: socket buffer to provide Tx timestamp value
1670  *
1671  * Schedule a work to read Tx timestamp value generated once the packet is
1672  * transmitted.
1673  */
1674 static void idpf_tx_read_tstamp(struct idpf_tx_queue *txq, struct sk_buff *skb)
1675 {
1676 	struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;
1677 	struct idpf_ptp_tx_tstamp_status *tx_tstamp_status;
1678 
1679 	tx_tstamp_caps = txq->cached_tstamp_caps;
1680 	spin_lock_bh(&tx_tstamp_caps->status_lock);
1681 
1682 	for (u32 i = 0; i < tx_tstamp_caps->num_entries; i++) {
1683 		tx_tstamp_status = &tx_tstamp_caps->tx_tstamp_status[i];
1684 		if (tx_tstamp_status->state != IDPF_PTP_FREE)
1685 			continue;
1686 
1687 		tx_tstamp_status->skb = skb;
1688 		tx_tstamp_status->state = IDPF_PTP_REQUEST;
1689 
1690 		/* Fetch timestamp from completion descriptor through
1691 		 * virtchnl msg to report to stack.
1692 		 */
1693 		queue_work(system_unbound_wq, txq->tstamp_task);
1694 		break;
1695 	}
1696 
1697 	spin_unlock_bh(&tx_tstamp_caps->status_lock);
1698 }
1699 
1700 /**
1701  * idpf_tx_clean_stashed_bufs - clean bufs that were stored for
1702  * out of order completions
1703  * @txq: queue to clean
1704  * @compl_tag: completion tag of packet to clean (from completion descriptor)
1705  * @cleaned: pointer to stats struct to track cleaned packets/bytes
1706  * @budget: Used to determine if we are in netpoll
1707  */
1708 static void idpf_tx_clean_stashed_bufs(struct idpf_tx_queue *txq,
1709 				       u16 compl_tag,
1710 				       struct libeth_sq_napi_stats *cleaned,
1711 				       int budget)
1712 {
1713 	struct idpf_tx_stash *stash;
1714 	struct hlist_node *tmp_buf;
1715 	struct libeth_cq_pp cp = {
1716 		.dev	= txq->dev,
1717 		.ss	= cleaned,
1718 		.napi	= budget,
1719 	};
1720 
1721 	/* Buffer completion */
1722 	hash_for_each_possible_safe(txq->stash->sched_buf_hash, stash, tmp_buf,
1723 				    hlist, compl_tag) {
1724 		if (unlikely(idpf_tx_buf_compl_tag(&stash->buf) != compl_tag))
1725 			continue;
1726 
1727 		hash_del(&stash->hlist);
1728 
1729 		if (stash->buf.type == LIBETH_SQE_SKB &&
1730 		    (skb_shinfo(stash->buf.skb)->tx_flags & SKBTX_IN_PROGRESS))
1731 			idpf_tx_read_tstamp(txq, stash->buf.skb);
1732 
1733 		libeth_tx_complete(&stash->buf, &cp);
1734 
1735 		/* Push shadow buf back onto stack */
1736 		idpf_buf_lifo_push(&txq->stash->buf_stack, stash);
1737 	}
1738 }
1739 
1740 /**
1741  * idpf_stash_flow_sch_buffers - store buffer parameters info to be freed at a
1742  * later time (only relevant for flow scheduling mode)
1743  * @txq: Tx queue to clean
1744  * @tx_buf: buffer to store
1745  */
1746 static int idpf_stash_flow_sch_buffers(struct idpf_tx_queue *txq,
1747 				       struct idpf_tx_buf *tx_buf)
1748 {
1749 	struct idpf_tx_stash *stash;
1750 
1751 	if (unlikely(tx_buf->type <= LIBETH_SQE_CTX))
1752 		return 0;
1753 
1754 	stash = idpf_buf_lifo_pop(&txq->stash->buf_stack);
1755 	if (unlikely(!stash)) {
1756 		net_err_ratelimited("%s: No out-of-order TX buffers left!\n",
1757 				    netdev_name(txq->netdev));
1758 
1759 		return -ENOMEM;
1760 	}
1761 
1762 	/* Store buffer params in shadow buffer */
1763 	stash->buf.skb = tx_buf->skb;
1764 	stash->buf.bytes = tx_buf->bytes;
1765 	stash->buf.packets = tx_buf->packets;
1766 	stash->buf.type = tx_buf->type;
1767 	stash->buf.nr_frags = tx_buf->nr_frags;
1768 	dma_unmap_addr_set(&stash->buf, dma, dma_unmap_addr(tx_buf, dma));
1769 	dma_unmap_len_set(&stash->buf, len, dma_unmap_len(tx_buf, len));
1770 	idpf_tx_buf_compl_tag(&stash->buf) = idpf_tx_buf_compl_tag(tx_buf);
1771 
1772 	/* Add buffer to buf_hash table to be freed later */
1773 	hash_add(txq->stash->sched_buf_hash, &stash->hlist,
1774 		 idpf_tx_buf_compl_tag(&stash->buf));
1775 
1776 	tx_buf->type = LIBETH_SQE_EMPTY;
1777 
1778 	return 0;
1779 }
1780 
1781 #define idpf_tx_splitq_clean_bump_ntc(txq, ntc, desc, buf)	\
1782 do {								\
1783 	if (unlikely(++(ntc) == (txq)->desc_count)) {		\
1784 		ntc = 0;					\
1785 		buf = (txq)->tx_buf;				\
1786 		desc = &(txq)->flex_tx[0];			\
1787 	} else {						\
1788 		(buf)++;					\
1789 		(desc)++;					\
1790 	}							\
1791 } while (0)
1792 
1793 /**
1794  * idpf_tx_splitq_clean - Reclaim resources from buffer queue
1795  * @tx_q: Tx queue to clean
1796  * @end: queue index until which it should be cleaned
1797  * @napi_budget: Used to determine if we are in netpoll
1798  * @cleaned: pointer to stats struct to track cleaned packets/bytes
1799  * @descs_only: true if queue is using flow-based scheduling and should
1800  * not clean buffers at this time
1801  *
1802  * Cleans the queue descriptor ring. If the queue is using queue-based
1803  * scheduling, the buffers will be cleaned as well. If the queue is using
1804  * flow-based scheduling, only the descriptors are cleaned at this time.
1805  * Separate packet completion events will be reported on the completion queue,
1806  * and the buffers will be cleaned separately. The stats are not updated from
1807  * this function when using flow-based scheduling.
1808  *
1809  * Furthermore, in flow scheduling mode, check to make sure there are enough
1810  * reserve buffers to stash the packet. If there are not, return early, which
1811  * will leave next_to_clean pointing to the packet that failed to be stashed.
1812  *
1813  * Return: false in the scenario above, true otherwise.
1814  */
1815 static bool idpf_tx_splitq_clean(struct idpf_tx_queue *tx_q, u16 end,
1816 				 int napi_budget,
1817 				 struct libeth_sq_napi_stats *cleaned,
1818 				 bool descs_only)
1819 {
1820 	union idpf_tx_flex_desc *next_pending_desc = NULL;
1821 	union idpf_tx_flex_desc *tx_desc;
1822 	u32 ntc = tx_q->next_to_clean;
1823 	struct libeth_cq_pp cp = {
1824 		.dev	= tx_q->dev,
1825 		.ss	= cleaned,
1826 		.napi	= napi_budget,
1827 	};
1828 	struct idpf_tx_buf *tx_buf;
1829 	bool clean_complete = true;
1830 
1831 	tx_desc = &tx_q->flex_tx[ntc];
1832 	next_pending_desc = &tx_q->flex_tx[end];
1833 	tx_buf = &tx_q->tx_buf[ntc];
1834 
1835 	while (tx_desc != next_pending_desc) {
1836 		u32 eop_idx;
1837 
1838 		/* If this entry in the ring was used as a context descriptor,
1839 		 * it's corresponding entry in the buffer ring is reserved. We
1840 		 * can skip this descriptor since there is no buffer to clean.
1841 		 */
1842 		if (tx_buf->type <= LIBETH_SQE_CTX)
1843 			goto fetch_next_txq_desc;
1844 
1845 		if (unlikely(tx_buf->type != LIBETH_SQE_SKB))
1846 			break;
1847 
1848 		eop_idx = tx_buf->rs_idx;
1849 
1850 		if (descs_only) {
1851 			if (IDPF_TX_BUF_RSV_UNUSED(tx_q) < tx_buf->nr_frags) {
1852 				clean_complete = false;
1853 				goto tx_splitq_clean_out;
1854 			}
1855 
1856 			idpf_stash_flow_sch_buffers(tx_q, tx_buf);
1857 
1858 			while (ntc != eop_idx) {
1859 				idpf_tx_splitq_clean_bump_ntc(tx_q, ntc,
1860 							      tx_desc, tx_buf);
1861 				idpf_stash_flow_sch_buffers(tx_q, tx_buf);
1862 			}
1863 		} else {
1864 			libeth_tx_complete(tx_buf, &cp);
1865 
1866 			/* unmap remaining buffers */
1867 			while (ntc != eop_idx) {
1868 				idpf_tx_splitq_clean_bump_ntc(tx_q, ntc,
1869 							      tx_desc, tx_buf);
1870 
1871 				/* unmap any remaining paged data */
1872 				libeth_tx_complete(tx_buf, &cp);
1873 			}
1874 		}
1875 
1876 fetch_next_txq_desc:
1877 		idpf_tx_splitq_clean_bump_ntc(tx_q, ntc, tx_desc, tx_buf);
1878 	}
1879 
1880 tx_splitq_clean_out:
1881 	tx_q->next_to_clean = ntc;
1882 
1883 	return clean_complete;
1884 }
1885 
1886 #define idpf_tx_clean_buf_ring_bump_ntc(txq, ntc, buf)	\
1887 do {							\
1888 	(buf)++;					\
1889 	(ntc)++;					\
1890 	if (unlikely((ntc) == (txq)->desc_count)) {	\
1891 		buf = (txq)->tx_buf;			\
1892 		ntc = 0;				\
1893 	}						\
1894 } while (0)
1895 
1896 /**
1897  * idpf_tx_clean_buf_ring - clean flow scheduling TX queue buffers
1898  * @txq: queue to clean
1899  * @compl_tag: completion tag of packet to clean (from completion descriptor)
1900  * @cleaned: pointer to stats struct to track cleaned packets/bytes
1901  * @budget: Used to determine if we are in netpoll
1902  *
1903  * Cleans all buffers associated with the input completion tag either from the
1904  * TX buffer ring or from the hash table if the buffers were previously
1905  * stashed. Returns the byte/segment count for the cleaned packet associated
1906  * this completion tag.
1907  */
1908 static bool idpf_tx_clean_buf_ring(struct idpf_tx_queue *txq, u16 compl_tag,
1909 				   struct libeth_sq_napi_stats *cleaned,
1910 				   int budget)
1911 {
1912 	u16 idx = compl_tag & txq->compl_tag_bufid_m;
1913 	struct idpf_tx_buf *tx_buf = NULL;
1914 	struct libeth_cq_pp cp = {
1915 		.dev	= txq->dev,
1916 		.ss	= cleaned,
1917 		.napi	= budget,
1918 	};
1919 	u16 ntc, orig_idx = idx;
1920 
1921 	tx_buf = &txq->tx_buf[idx];
1922 
1923 	if (unlikely(tx_buf->type <= LIBETH_SQE_CTX ||
1924 		     idpf_tx_buf_compl_tag(tx_buf) != compl_tag))
1925 		return false;
1926 
1927 	if (tx_buf->type == LIBETH_SQE_SKB) {
1928 		if (skb_shinfo(tx_buf->skb)->tx_flags & SKBTX_IN_PROGRESS)
1929 			idpf_tx_read_tstamp(txq, tx_buf->skb);
1930 
1931 		libeth_tx_complete(tx_buf, &cp);
1932 	}
1933 
1934 	idpf_tx_clean_buf_ring_bump_ntc(txq, idx, tx_buf);
1935 
1936 	while (idpf_tx_buf_compl_tag(tx_buf) == compl_tag) {
1937 		libeth_tx_complete(tx_buf, &cp);
1938 		idpf_tx_clean_buf_ring_bump_ntc(txq, idx, tx_buf);
1939 	}
1940 
1941 	/*
1942 	 * It's possible the packet we just cleaned was an out of order
1943 	 * completion, which means we can stash the buffers starting from
1944 	 * the original next_to_clean and reuse the descriptors. We need
1945 	 * to compare the descriptor ring next_to_clean packet's "first" buffer
1946 	 * to the "first" buffer of the packet we just cleaned to determine if
1947 	 * this is the case. Howevever, next_to_clean can point to either a
1948 	 * reserved buffer that corresponds to a context descriptor used for the
1949 	 * next_to_clean packet (TSO packet) or the "first" buffer (single
1950 	 * packet). The orig_idx from the packet we just cleaned will always
1951 	 * point to the "first" buffer. If next_to_clean points to a reserved
1952 	 * buffer, let's bump ntc once and start the comparison from there.
1953 	 */
1954 	ntc = txq->next_to_clean;
1955 	tx_buf = &txq->tx_buf[ntc];
1956 
1957 	if (tx_buf->type == LIBETH_SQE_CTX)
1958 		idpf_tx_clean_buf_ring_bump_ntc(txq, ntc, tx_buf);
1959 
1960 	/*
1961 	 * If ntc still points to a different "first" buffer, clean the
1962 	 * descriptor ring and stash all of the buffers for later cleaning. If
1963 	 * we cannot stash all of the buffers, next_to_clean will point to the
1964 	 * "first" buffer of the packet that could not be stashed and cleaning
1965 	 * will start there next time.
1966 	 */
1967 	if (unlikely(tx_buf != &txq->tx_buf[orig_idx] &&
1968 		     !idpf_tx_splitq_clean(txq, orig_idx, budget, cleaned,
1969 					   true)))
1970 		return true;
1971 
1972 	/*
1973 	 * Otherwise, update next_to_clean to reflect the cleaning that was
1974 	 * done above.
1975 	 */
1976 	txq->next_to_clean = idx;
1977 
1978 	return true;
1979 }
1980 
1981 /**
1982  * idpf_tx_handle_rs_completion - clean a single packet and all of its buffers
1983  * whether on the buffer ring or in the hash table
1984  * @txq: Tx ring to clean
1985  * @desc: pointer to completion queue descriptor to extract completion
1986  * information from
1987  * @cleaned: pointer to stats struct to track cleaned packets/bytes
1988  * @budget: Used to determine if we are in netpoll
1989  *
1990  * Returns bytes/packets cleaned
1991  */
1992 static void idpf_tx_handle_rs_completion(struct idpf_tx_queue *txq,
1993 					 struct idpf_splitq_tx_compl_desc *desc,
1994 					 struct libeth_sq_napi_stats *cleaned,
1995 					 int budget)
1996 {
1997 	u16 compl_tag;
1998 
1999 	if (!idpf_queue_has(FLOW_SCH_EN, txq)) {
2000 		u16 head = le16_to_cpu(desc->q_head_compl_tag.q_head);
2001 
2002 		idpf_tx_splitq_clean(txq, head, budget, cleaned, false);
2003 		return;
2004 	}
2005 
2006 	compl_tag = le16_to_cpu(desc->q_head_compl_tag.compl_tag);
2007 
2008 	/* If we didn't clean anything on the ring, this packet must be
2009 	 * in the hash table. Go clean it there.
2010 	 */
2011 	if (!idpf_tx_clean_buf_ring(txq, compl_tag, cleaned, budget))
2012 		idpf_tx_clean_stashed_bufs(txq, compl_tag, cleaned, budget);
2013 }
2014 
2015 /**
2016  * idpf_tx_clean_complq - Reclaim resources on completion queue
2017  * @complq: Tx ring to clean
2018  * @budget: Used to determine if we are in netpoll
2019  * @cleaned: returns number of packets cleaned
2020  *
2021  * Returns true if there's any budget left (e.g. the clean is finished)
2022  */
2023 static bool idpf_tx_clean_complq(struct idpf_compl_queue *complq, int budget,
2024 				 int *cleaned)
2025 {
2026 	struct idpf_splitq_tx_compl_desc *tx_desc;
2027 	s16 ntc = complq->next_to_clean;
2028 	struct idpf_netdev_priv *np;
2029 	unsigned int complq_budget;
2030 	bool complq_ok = true;
2031 	int i;
2032 
2033 	complq_budget = complq->clean_budget;
2034 	tx_desc = &complq->comp[ntc];
2035 	ntc -= complq->desc_count;
2036 
2037 	do {
2038 		struct libeth_sq_napi_stats cleaned_stats = { };
2039 		struct idpf_tx_queue *tx_q;
2040 		int rel_tx_qid;
2041 		u16 hw_head;
2042 		u8 ctype;	/* completion type */
2043 		u16 gen;
2044 
2045 		/* if the descriptor isn't done, no work yet to do */
2046 		gen = le16_get_bits(tx_desc->qid_comptype_gen,
2047 				    IDPF_TXD_COMPLQ_GEN_M);
2048 		if (idpf_queue_has(GEN_CHK, complq) != gen)
2049 			break;
2050 
2051 		/* Find necessary info of TX queue to clean buffers */
2052 		rel_tx_qid = le16_get_bits(tx_desc->qid_comptype_gen,
2053 					   IDPF_TXD_COMPLQ_QID_M);
2054 		if (rel_tx_qid >= complq->txq_grp->num_txq ||
2055 		    !complq->txq_grp->txqs[rel_tx_qid]) {
2056 			netdev_err(complq->netdev, "TxQ not found\n");
2057 			goto fetch_next_desc;
2058 		}
2059 		tx_q = complq->txq_grp->txqs[rel_tx_qid];
2060 
2061 		/* Determine completion type */
2062 		ctype = le16_get_bits(tx_desc->qid_comptype_gen,
2063 				      IDPF_TXD_COMPLQ_COMPL_TYPE_M);
2064 		switch (ctype) {
2065 		case IDPF_TXD_COMPLT_RE:
2066 			hw_head = le16_to_cpu(tx_desc->q_head_compl_tag.q_head);
2067 
2068 			idpf_tx_splitq_clean(tx_q, hw_head, budget,
2069 					     &cleaned_stats, true);
2070 			break;
2071 		case IDPF_TXD_COMPLT_RS:
2072 			idpf_tx_handle_rs_completion(tx_q, tx_desc,
2073 						     &cleaned_stats, budget);
2074 			break;
2075 		case IDPF_TXD_COMPLT_SW_MARKER:
2076 			idpf_tx_handle_sw_marker(tx_q);
2077 			break;
2078 		default:
2079 			netdev_err(tx_q->netdev,
2080 				   "Unknown TX completion type: %d\n", ctype);
2081 			goto fetch_next_desc;
2082 		}
2083 
2084 		u64_stats_update_begin(&tx_q->stats_sync);
2085 		u64_stats_add(&tx_q->q_stats.packets, cleaned_stats.packets);
2086 		u64_stats_add(&tx_q->q_stats.bytes, cleaned_stats.bytes);
2087 		tx_q->cleaned_pkts += cleaned_stats.packets;
2088 		tx_q->cleaned_bytes += cleaned_stats.bytes;
2089 		complq->num_completions++;
2090 		u64_stats_update_end(&tx_q->stats_sync);
2091 
2092 fetch_next_desc:
2093 		tx_desc++;
2094 		ntc++;
2095 		if (unlikely(!ntc)) {
2096 			ntc -= complq->desc_count;
2097 			tx_desc = &complq->comp[0];
2098 			idpf_queue_change(GEN_CHK, complq);
2099 		}
2100 
2101 		prefetch(tx_desc);
2102 
2103 		/* update budget accounting */
2104 		complq_budget--;
2105 	} while (likely(complq_budget));
2106 
2107 	/* Store the state of the complq to be used later in deciding if a
2108 	 * TXQ can be started again
2109 	 */
2110 	if (unlikely(IDPF_TX_COMPLQ_PENDING(complq->txq_grp) >
2111 		     IDPF_TX_COMPLQ_OVERFLOW_THRESH(complq)))
2112 		complq_ok = false;
2113 
2114 	np = netdev_priv(complq->netdev);
2115 	for (i = 0; i < complq->txq_grp->num_txq; ++i) {
2116 		struct idpf_tx_queue *tx_q = complq->txq_grp->txqs[i];
2117 		struct netdev_queue *nq;
2118 		bool dont_wake;
2119 
2120 		/* We didn't clean anything on this queue, move along */
2121 		if (!tx_q->cleaned_bytes)
2122 			continue;
2123 
2124 		*cleaned += tx_q->cleaned_pkts;
2125 
2126 		/* Update BQL */
2127 		nq = netdev_get_tx_queue(tx_q->netdev, tx_q->idx);
2128 
2129 		dont_wake = !complq_ok || IDPF_TX_BUF_RSV_LOW(tx_q) ||
2130 			    np->state != __IDPF_VPORT_UP ||
2131 			    !netif_carrier_ok(tx_q->netdev);
2132 		/* Check if the TXQ needs to and can be restarted */
2133 		__netif_txq_completed_wake(nq, tx_q->cleaned_pkts, tx_q->cleaned_bytes,
2134 					   IDPF_DESC_UNUSED(tx_q), IDPF_TX_WAKE_THRESH,
2135 					   dont_wake);
2136 
2137 		/* Reset cleaned stats for the next time this queue is
2138 		 * cleaned
2139 		 */
2140 		tx_q->cleaned_bytes = 0;
2141 		tx_q->cleaned_pkts = 0;
2142 	}
2143 
2144 	ntc += complq->desc_count;
2145 	complq->next_to_clean = ntc;
2146 
2147 	return !!complq_budget;
2148 }
2149 
2150 /**
2151  * idpf_tx_splitq_build_ctb - populate command tag and size for queue
2152  * based scheduling descriptors
2153  * @desc: descriptor to populate
2154  * @params: pointer to tx params struct
2155  * @td_cmd: command to be filled in desc
2156  * @size: size of buffer
2157  */
2158 void idpf_tx_splitq_build_ctb(union idpf_tx_flex_desc *desc,
2159 			      struct idpf_tx_splitq_params *params,
2160 			      u16 td_cmd, u16 size)
2161 {
2162 	desc->q.qw1.cmd_dtype =
2163 		le16_encode_bits(params->dtype, IDPF_FLEX_TXD_QW1_DTYPE_M);
2164 	desc->q.qw1.cmd_dtype |=
2165 		le16_encode_bits(td_cmd, IDPF_FLEX_TXD_QW1_CMD_M);
2166 	desc->q.qw1.buf_size = cpu_to_le16(size);
2167 	desc->q.qw1.l2tags.l2tag1 = cpu_to_le16(params->td_tag);
2168 }
2169 
2170 /**
2171  * idpf_tx_splitq_build_flow_desc - populate command tag and size for flow
2172  * scheduling descriptors
2173  * @desc: descriptor to populate
2174  * @params: pointer to tx params struct
2175  * @td_cmd: command to be filled in desc
2176  * @size: size of buffer
2177  */
2178 void idpf_tx_splitq_build_flow_desc(union idpf_tx_flex_desc *desc,
2179 				    struct idpf_tx_splitq_params *params,
2180 				    u16 td_cmd, u16 size)
2181 {
2182 	*(u32 *)&desc->flow.qw1.cmd_dtype = (u8)(params->dtype | td_cmd);
2183 	desc->flow.qw1.rxr_bufsize = cpu_to_le16((u16)size);
2184 	desc->flow.qw1.compl_tag = cpu_to_le16(params->compl_tag);
2185 }
2186 
2187 /**
2188  * idpf_tx_maybe_stop_splitq - 1st level check for Tx splitq stop conditions
2189  * @tx_q: the queue to be checked
2190  * @descs_needed: number of descriptors required for this packet
2191  *
2192  * Returns 0 if stop is not needed
2193  */
2194 static int idpf_tx_maybe_stop_splitq(struct idpf_tx_queue *tx_q,
2195 				     unsigned int descs_needed)
2196 {
2197 	if (idpf_tx_maybe_stop_common(tx_q, descs_needed))
2198 		goto out;
2199 
2200 	/* If there are too many outstanding completions expected on the
2201 	 * completion queue, stop the TX queue to give the device some time to
2202 	 * catch up
2203 	 */
2204 	if (unlikely(IDPF_TX_COMPLQ_PENDING(tx_q->txq_grp) >
2205 		     IDPF_TX_COMPLQ_OVERFLOW_THRESH(tx_q->txq_grp->complq)))
2206 		goto splitq_stop;
2207 
2208 	/* Also check for available book keeping buffers; if we are low, stop
2209 	 * the queue to wait for more completions
2210 	 */
2211 	if (unlikely(IDPF_TX_BUF_RSV_LOW(tx_q)))
2212 		goto splitq_stop;
2213 
2214 	return 0;
2215 
2216 splitq_stop:
2217 	netif_stop_subqueue(tx_q->netdev, tx_q->idx);
2218 
2219 out:
2220 	u64_stats_update_begin(&tx_q->stats_sync);
2221 	u64_stats_inc(&tx_q->q_stats.q_busy);
2222 	u64_stats_update_end(&tx_q->stats_sync);
2223 
2224 	return -EBUSY;
2225 }
2226 
2227 /**
2228  * idpf_tx_buf_hw_update - Store the new tail value
2229  * @tx_q: queue to bump
2230  * @val: new tail index
2231  * @xmit_more: more skb's pending
2232  *
2233  * The naming here is special in that 'hw' signals that this function is about
2234  * to do a register write to update our queue status. We know this can only
2235  * mean tail here as HW should be owning head for TX.
2236  */
2237 void idpf_tx_buf_hw_update(struct idpf_tx_queue *tx_q, u32 val,
2238 			   bool xmit_more)
2239 {
2240 	struct netdev_queue *nq;
2241 
2242 	nq = netdev_get_tx_queue(tx_q->netdev, tx_q->idx);
2243 	tx_q->next_to_use = val;
2244 
2245 	if (idpf_tx_maybe_stop_common(tx_q, IDPF_TX_DESC_NEEDED)) {
2246 		u64_stats_update_begin(&tx_q->stats_sync);
2247 		u64_stats_inc(&tx_q->q_stats.q_busy);
2248 		u64_stats_update_end(&tx_q->stats_sync);
2249 	}
2250 
2251 	/* Force memory writes to complete before letting h/w
2252 	 * know there are new descriptors to fetch.  (Only
2253 	 * applicable for weak-ordered memory model archs,
2254 	 * such as IA-64).
2255 	 */
2256 	wmb();
2257 
2258 	/* notify HW of packet */
2259 	if (netif_xmit_stopped(nq) || !xmit_more)
2260 		writel(val, tx_q->tail);
2261 }
2262 
2263 /**
2264  * idpf_tx_desc_count_required - calculate number of Tx descriptors needed
2265  * @txq: queue to send buffer on
2266  * @skb: send buffer
2267  *
2268  * Returns number of data descriptors needed for this skb.
2269  */
2270 unsigned int idpf_tx_desc_count_required(struct idpf_tx_queue *txq,
2271 					 struct sk_buff *skb)
2272 {
2273 	const struct skb_shared_info *shinfo;
2274 	unsigned int count = 0, i;
2275 
2276 	count += !!skb_headlen(skb);
2277 
2278 	if (!skb_is_nonlinear(skb))
2279 		return count;
2280 
2281 	shinfo = skb_shinfo(skb);
2282 	for (i = 0; i < shinfo->nr_frags; i++) {
2283 		unsigned int size;
2284 
2285 		size = skb_frag_size(&shinfo->frags[i]);
2286 
2287 		/* We only need to use the idpf_size_to_txd_count check if the
2288 		 * fragment is going to span multiple descriptors,
2289 		 * i.e. size >= 16K.
2290 		 */
2291 		if (size >= SZ_16K)
2292 			count += idpf_size_to_txd_count(size);
2293 		else
2294 			count++;
2295 	}
2296 
2297 	if (idpf_chk_linearize(skb, txq->tx_max_bufs, count)) {
2298 		if (__skb_linearize(skb))
2299 			return 0;
2300 
2301 		count = idpf_size_to_txd_count(skb->len);
2302 		u64_stats_update_begin(&txq->stats_sync);
2303 		u64_stats_inc(&txq->q_stats.linearize);
2304 		u64_stats_update_end(&txq->stats_sync);
2305 	}
2306 
2307 	return count;
2308 }
2309 
2310 /**
2311  * idpf_tx_dma_map_error - handle TX DMA map errors
2312  * @txq: queue to send buffer on
2313  * @skb: send buffer
2314  * @first: original first buffer info buffer for packet
2315  * @idx: starting point on ring to unwind
2316  */
2317 void idpf_tx_dma_map_error(struct idpf_tx_queue *txq, struct sk_buff *skb,
2318 			   struct idpf_tx_buf *first, u16 idx)
2319 {
2320 	struct libeth_sq_napi_stats ss = { };
2321 	struct libeth_cq_pp cp = {
2322 		.dev	= txq->dev,
2323 		.ss	= &ss,
2324 	};
2325 
2326 	u64_stats_update_begin(&txq->stats_sync);
2327 	u64_stats_inc(&txq->q_stats.dma_map_errs);
2328 	u64_stats_update_end(&txq->stats_sync);
2329 
2330 	/* clear dma mappings for failed tx_buf map */
2331 	for (;;) {
2332 		struct idpf_tx_buf *tx_buf;
2333 
2334 		tx_buf = &txq->tx_buf[idx];
2335 		libeth_tx_complete(tx_buf, &cp);
2336 		if (tx_buf == first)
2337 			break;
2338 		if (idx == 0)
2339 			idx = txq->desc_count;
2340 		idx--;
2341 	}
2342 
2343 	if (skb_is_gso(skb)) {
2344 		union idpf_tx_flex_desc *tx_desc;
2345 
2346 		/* If we failed a DMA mapping for a TSO packet, we will have
2347 		 * used one additional descriptor for a context
2348 		 * descriptor. Reset that here.
2349 		 */
2350 		tx_desc = &txq->flex_tx[idx];
2351 		memset(tx_desc, 0, sizeof(*tx_desc));
2352 		if (idx == 0)
2353 			idx = txq->desc_count;
2354 		idx--;
2355 	}
2356 
2357 	/* Update tail in case netdev_xmit_more was previously true */
2358 	idpf_tx_buf_hw_update(txq, idx, false);
2359 }
2360 
2361 /**
2362  * idpf_tx_splitq_bump_ntu - adjust NTU and generation
2363  * @txq: the tx ring to wrap
2364  * @ntu: ring index to bump
2365  */
2366 static unsigned int idpf_tx_splitq_bump_ntu(struct idpf_tx_queue *txq, u16 ntu)
2367 {
2368 	ntu++;
2369 
2370 	if (ntu == txq->desc_count) {
2371 		ntu = 0;
2372 		txq->compl_tag_cur_gen = IDPF_TX_ADJ_COMPL_TAG_GEN(txq);
2373 	}
2374 
2375 	return ntu;
2376 }
2377 
2378 /**
2379  * idpf_tx_splitq_map - Build the Tx flex descriptor
2380  * @tx_q: queue to send buffer on
2381  * @params: pointer to splitq params struct
2382  * @first: first buffer info buffer to use
2383  *
2384  * This function loops over the skb data pointed to by *first
2385  * and gets a physical address for each memory location and programs
2386  * it and the length into the transmit flex descriptor.
2387  */
2388 static void idpf_tx_splitq_map(struct idpf_tx_queue *tx_q,
2389 			       struct idpf_tx_splitq_params *params,
2390 			       struct idpf_tx_buf *first)
2391 {
2392 	union idpf_tx_flex_desc *tx_desc;
2393 	unsigned int data_len, size;
2394 	struct idpf_tx_buf *tx_buf;
2395 	u16 i = tx_q->next_to_use;
2396 	struct netdev_queue *nq;
2397 	struct sk_buff *skb;
2398 	skb_frag_t *frag;
2399 	u16 td_cmd = 0;
2400 	dma_addr_t dma;
2401 
2402 	skb = first->skb;
2403 
2404 	td_cmd = params->offload.td_cmd;
2405 
2406 	data_len = skb->data_len;
2407 	size = skb_headlen(skb);
2408 
2409 	tx_desc = &tx_q->flex_tx[i];
2410 
2411 	dma = dma_map_single(tx_q->dev, skb->data, size, DMA_TO_DEVICE);
2412 
2413 	tx_buf = first;
2414 	first->nr_frags = 0;
2415 
2416 	params->compl_tag =
2417 		(tx_q->compl_tag_cur_gen << tx_q->compl_tag_gen_s) | i;
2418 
2419 	for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
2420 		unsigned int max_data = IDPF_TX_MAX_DESC_DATA_ALIGNED;
2421 
2422 		if (dma_mapping_error(tx_q->dev, dma))
2423 			return idpf_tx_dma_map_error(tx_q, skb, first, i);
2424 
2425 		first->nr_frags++;
2426 		idpf_tx_buf_compl_tag(tx_buf) = params->compl_tag;
2427 		tx_buf->type = LIBETH_SQE_FRAG;
2428 
2429 		/* record length, and DMA address */
2430 		dma_unmap_len_set(tx_buf, len, size);
2431 		dma_unmap_addr_set(tx_buf, dma, dma);
2432 
2433 		/* buf_addr is in same location for both desc types */
2434 		tx_desc->q.buf_addr = cpu_to_le64(dma);
2435 
2436 		/* The stack can send us fragments that are too large for a
2437 		 * single descriptor i.e. frag size > 16K-1. We will need to
2438 		 * split the fragment across multiple descriptors in this case.
2439 		 * To adhere to HW alignment restrictions, the fragment needs
2440 		 * to be split such that the first chunk ends on a 4K boundary
2441 		 * and all subsequent chunks start on a 4K boundary. We still
2442 		 * want to send as much data as possible though, so our
2443 		 * intermediate descriptor chunk size will be 12K.
2444 		 *
2445 		 * For example, consider a 32K fragment mapped to DMA addr 2600.
2446 		 * ------------------------------------------------------------
2447 		 * |                    frag_size = 32K                       |
2448 		 * ------------------------------------------------------------
2449 		 * |2600		  |16384	    |28672
2450 		 *
2451 		 * 3 descriptors will be used for this fragment. The HW expects
2452 		 * the descriptors to contain the following:
2453 		 * ------------------------------------------------------------
2454 		 * | size = 13784         | size = 12K      | size = 6696     |
2455 		 * | dma = 2600           | dma = 16384     | dma = 28672     |
2456 		 * ------------------------------------------------------------
2457 		 *
2458 		 * We need to first adjust the max_data for the first chunk so
2459 		 * that it ends on a 4K boundary. By negating the value of the
2460 		 * DMA address and taking only the low order bits, we're
2461 		 * effectively calculating
2462 		 *	4K - (DMA addr lower order bits) =
2463 		 *				bytes to next boundary.
2464 		 *
2465 		 * Add that to our base aligned max_data (12K) and we have
2466 		 * our first chunk size. In the example above,
2467 		 *	13784 = 12K + (4096-2600)
2468 		 *
2469 		 * After guaranteeing the first chunk ends on a 4K boundary, we
2470 		 * will give the intermediate descriptors 12K chunks and
2471 		 * whatever is left to the final descriptor. This ensures that
2472 		 * all descriptors used for the remaining chunks of the
2473 		 * fragment start on a 4K boundary and we use as few
2474 		 * descriptors as possible.
2475 		 */
2476 		max_data += -dma & (IDPF_TX_MAX_READ_REQ_SIZE - 1);
2477 		while (unlikely(size > IDPF_TX_MAX_DESC_DATA)) {
2478 			idpf_tx_splitq_build_desc(tx_desc, params, td_cmd,
2479 						  max_data);
2480 
2481 			if (unlikely(++i == tx_q->desc_count)) {
2482 				tx_buf = tx_q->tx_buf;
2483 				tx_desc = &tx_q->flex_tx[0];
2484 				i = 0;
2485 				tx_q->compl_tag_cur_gen =
2486 					IDPF_TX_ADJ_COMPL_TAG_GEN(tx_q);
2487 			} else {
2488 				tx_buf++;
2489 				tx_desc++;
2490 			}
2491 
2492 			/* Since this packet has a buffer that is going to span
2493 			 * multiple descriptors, it's going to leave holes in
2494 			 * to the TX buffer ring. To ensure these holes do not
2495 			 * cause issues in the cleaning routines, we will clear
2496 			 * them of any stale data and assign them the same
2497 			 * completion tag as the current packet. Then when the
2498 			 * packet is being cleaned, the cleaning routines will
2499 			 * simply pass over these holes and finish cleaning the
2500 			 * rest of the packet.
2501 			 */
2502 			tx_buf->type = LIBETH_SQE_EMPTY;
2503 			idpf_tx_buf_compl_tag(tx_buf) = params->compl_tag;
2504 
2505 			/* Adjust the DMA offset and the remaining size of the
2506 			 * fragment.  On the first iteration of this loop,
2507 			 * max_data will be >= 12K and <= 16K-1.  On any
2508 			 * subsequent iteration of this loop, max_data will
2509 			 * always be 12K.
2510 			 */
2511 			dma += max_data;
2512 			size -= max_data;
2513 
2514 			/* Reset max_data since remaining chunks will be 12K
2515 			 * at most
2516 			 */
2517 			max_data = IDPF_TX_MAX_DESC_DATA_ALIGNED;
2518 
2519 			/* buf_addr is in same location for both desc types */
2520 			tx_desc->q.buf_addr = cpu_to_le64(dma);
2521 		}
2522 
2523 		if (!data_len)
2524 			break;
2525 
2526 		idpf_tx_splitq_build_desc(tx_desc, params, td_cmd, size);
2527 
2528 		if (unlikely(++i == tx_q->desc_count)) {
2529 			tx_buf = tx_q->tx_buf;
2530 			tx_desc = &tx_q->flex_tx[0];
2531 			i = 0;
2532 			tx_q->compl_tag_cur_gen = IDPF_TX_ADJ_COMPL_TAG_GEN(tx_q);
2533 		} else {
2534 			tx_buf++;
2535 			tx_desc++;
2536 		}
2537 
2538 		size = skb_frag_size(frag);
2539 		data_len -= size;
2540 
2541 		dma = skb_frag_dma_map(tx_q->dev, frag, 0, size,
2542 				       DMA_TO_DEVICE);
2543 	}
2544 
2545 	/* record SW timestamp if HW timestamp is not available */
2546 	skb_tx_timestamp(skb);
2547 
2548 	first->type = LIBETH_SQE_SKB;
2549 
2550 	/* write last descriptor with RS and EOP bits */
2551 	first->rs_idx = i;
2552 	td_cmd |= params->eop_cmd;
2553 	idpf_tx_splitq_build_desc(tx_desc, params, td_cmd, size);
2554 	i = idpf_tx_splitq_bump_ntu(tx_q, i);
2555 
2556 	tx_q->txq_grp->num_completions_pending++;
2557 
2558 	/* record bytecount for BQL */
2559 	nq = netdev_get_tx_queue(tx_q->netdev, tx_q->idx);
2560 	netdev_tx_sent_queue(nq, first->bytes);
2561 
2562 	idpf_tx_buf_hw_update(tx_q, i, netdev_xmit_more());
2563 }
2564 
2565 /**
2566  * idpf_tso - computes mss and TSO length to prepare for TSO
2567  * @skb: pointer to skb
2568  * @off: pointer to struct that holds offload parameters
2569  *
2570  * Returns error (negative) if TSO was requested but cannot be applied to the
2571  * given skb, 0 if TSO does not apply to the given skb, or 1 otherwise.
2572  */
2573 int idpf_tso(struct sk_buff *skb, struct idpf_tx_offload_params *off)
2574 {
2575 	const struct skb_shared_info *shinfo;
2576 	union {
2577 		struct iphdr *v4;
2578 		struct ipv6hdr *v6;
2579 		unsigned char *hdr;
2580 	} ip;
2581 	union {
2582 		struct tcphdr *tcp;
2583 		struct udphdr *udp;
2584 		unsigned char *hdr;
2585 	} l4;
2586 	u32 paylen, l4_start;
2587 	int err;
2588 
2589 	if (!skb_is_gso(skb))
2590 		return 0;
2591 
2592 	err = skb_cow_head(skb, 0);
2593 	if (err < 0)
2594 		return err;
2595 
2596 	shinfo = skb_shinfo(skb);
2597 
2598 	ip.hdr = skb_network_header(skb);
2599 	l4.hdr = skb_transport_header(skb);
2600 
2601 	/* initialize outer IP header fields */
2602 	if (ip.v4->version == 4) {
2603 		ip.v4->tot_len = 0;
2604 		ip.v4->check = 0;
2605 	} else if (ip.v6->version == 6) {
2606 		ip.v6->payload_len = 0;
2607 	}
2608 
2609 	l4_start = skb_transport_offset(skb);
2610 
2611 	/* remove payload length from checksum */
2612 	paylen = skb->len - l4_start;
2613 
2614 	switch (shinfo->gso_type & ~SKB_GSO_DODGY) {
2615 	case SKB_GSO_TCPV4:
2616 	case SKB_GSO_TCPV6:
2617 		csum_replace_by_diff(&l4.tcp->check,
2618 				     (__force __wsum)htonl(paylen));
2619 		off->tso_hdr_len = __tcp_hdrlen(l4.tcp) + l4_start;
2620 		break;
2621 	case SKB_GSO_UDP_L4:
2622 		csum_replace_by_diff(&l4.udp->check,
2623 				     (__force __wsum)htonl(paylen));
2624 		/* compute length of segmentation header */
2625 		off->tso_hdr_len = sizeof(struct udphdr) + l4_start;
2626 		l4.udp->len = htons(shinfo->gso_size + sizeof(struct udphdr));
2627 		break;
2628 	default:
2629 		return -EINVAL;
2630 	}
2631 
2632 	off->tso_len = skb->len - off->tso_hdr_len;
2633 	off->mss = shinfo->gso_size;
2634 	off->tso_segs = shinfo->gso_segs;
2635 
2636 	off->tx_flags |= IDPF_TX_FLAGS_TSO;
2637 
2638 	return 1;
2639 }
2640 
2641 /**
2642  * __idpf_chk_linearize - Check skb is not using too many buffers
2643  * @skb: send buffer
2644  * @max_bufs: maximum number of buffers
2645  *
2646  * For TSO we need to count the TSO header and segment payload separately.  As
2647  * such we need to check cases where we have max_bufs-1 fragments or more as we
2648  * can potentially require max_bufs+1 DMA transactions, 1 for the TSO header, 1
2649  * for the segment payload in the first descriptor, and another max_buf-1 for
2650  * the fragments.
2651  */
2652 static bool __idpf_chk_linearize(struct sk_buff *skb, unsigned int max_bufs)
2653 {
2654 	const struct skb_shared_info *shinfo = skb_shinfo(skb);
2655 	const skb_frag_t *frag, *stale;
2656 	int nr_frags, sum;
2657 
2658 	/* no need to check if number of frags is less than max_bufs - 1 */
2659 	nr_frags = shinfo->nr_frags;
2660 	if (nr_frags < (max_bufs - 1))
2661 		return false;
2662 
2663 	/* We need to walk through the list and validate that each group
2664 	 * of max_bufs-2 fragments totals at least gso_size.
2665 	 */
2666 	nr_frags -= max_bufs - 2;
2667 	frag = &shinfo->frags[0];
2668 
2669 	/* Initialize size to the negative value of gso_size minus 1.  We use
2670 	 * this as the worst case scenario in which the frag ahead of us only
2671 	 * provides one byte which is why we are limited to max_bufs-2
2672 	 * descriptors for a single transmit as the header and previous
2673 	 * fragment are already consuming 2 descriptors.
2674 	 */
2675 	sum = 1 - shinfo->gso_size;
2676 
2677 	/* Add size of frags 0 through 4 to create our initial sum */
2678 	sum += skb_frag_size(frag++);
2679 	sum += skb_frag_size(frag++);
2680 	sum += skb_frag_size(frag++);
2681 	sum += skb_frag_size(frag++);
2682 	sum += skb_frag_size(frag++);
2683 
2684 	/* Walk through fragments adding latest fragment, testing it, and
2685 	 * then removing stale fragments from the sum.
2686 	 */
2687 	for (stale = &shinfo->frags[0];; stale++) {
2688 		int stale_size = skb_frag_size(stale);
2689 
2690 		sum += skb_frag_size(frag++);
2691 
2692 		/* The stale fragment may present us with a smaller
2693 		 * descriptor than the actual fragment size. To account
2694 		 * for that we need to remove all the data on the front and
2695 		 * figure out what the remainder would be in the last
2696 		 * descriptor associated with the fragment.
2697 		 */
2698 		if (stale_size > IDPF_TX_MAX_DESC_DATA) {
2699 			int align_pad = -(skb_frag_off(stale)) &
2700 					(IDPF_TX_MAX_READ_REQ_SIZE - 1);
2701 
2702 			sum -= align_pad;
2703 			stale_size -= align_pad;
2704 
2705 			do {
2706 				sum -= IDPF_TX_MAX_DESC_DATA_ALIGNED;
2707 				stale_size -= IDPF_TX_MAX_DESC_DATA_ALIGNED;
2708 			} while (stale_size > IDPF_TX_MAX_DESC_DATA);
2709 		}
2710 
2711 		/* if sum is negative we failed to make sufficient progress */
2712 		if (sum < 0)
2713 			return true;
2714 
2715 		if (!nr_frags--)
2716 			break;
2717 
2718 		sum -= stale_size;
2719 	}
2720 
2721 	return false;
2722 }
2723 
2724 /**
2725  * idpf_chk_linearize - Check if skb exceeds max descriptors per packet
2726  * @skb: send buffer
2727  * @max_bufs: maximum scatter gather buffers for single packet
2728  * @count: number of buffers this packet needs
2729  *
2730  * Make sure we don't exceed maximum scatter gather buffers for a single
2731  * packet. We have to do some special checking around the boundary (max_bufs-1)
2732  * if TSO is on since we need count the TSO header and payload separately.
2733  * E.g.: a packet with 7 fragments can require 9 DMA transactions; 1 for TSO
2734  * header, 1 for segment payload, and then 7 for the fragments.
2735  */
2736 static bool idpf_chk_linearize(struct sk_buff *skb, unsigned int max_bufs,
2737 			       unsigned int count)
2738 {
2739 	if (likely(count < max_bufs))
2740 		return false;
2741 	if (skb_is_gso(skb))
2742 		return __idpf_chk_linearize(skb, max_bufs);
2743 
2744 	return count > max_bufs;
2745 }
2746 
2747 /**
2748  * idpf_tx_splitq_get_ctx_desc - grab next desc and update buffer ring
2749  * @txq: queue to put context descriptor on
2750  *
2751  * Since the TX buffer rings mimics the descriptor ring, update the tx buffer
2752  * ring entry to reflect that this index is a context descriptor
2753  */
2754 static union idpf_flex_tx_ctx_desc *
2755 idpf_tx_splitq_get_ctx_desc(struct idpf_tx_queue *txq)
2756 {
2757 	union idpf_flex_tx_ctx_desc *desc;
2758 	int i = txq->next_to_use;
2759 
2760 	txq->tx_buf[i].type = LIBETH_SQE_CTX;
2761 
2762 	/* grab the next descriptor */
2763 	desc = &txq->flex_ctx[i];
2764 	txq->next_to_use = idpf_tx_splitq_bump_ntu(txq, i);
2765 
2766 	return desc;
2767 }
2768 
2769 /**
2770  * idpf_tx_drop_skb - free the SKB and bump tail if necessary
2771  * @tx_q: queue to send buffer on
2772  * @skb: pointer to skb
2773  */
2774 netdev_tx_t idpf_tx_drop_skb(struct idpf_tx_queue *tx_q, struct sk_buff *skb)
2775 {
2776 	u64_stats_update_begin(&tx_q->stats_sync);
2777 	u64_stats_inc(&tx_q->q_stats.skb_drops);
2778 	u64_stats_update_end(&tx_q->stats_sync);
2779 
2780 	idpf_tx_buf_hw_update(tx_q, tx_q->next_to_use, false);
2781 
2782 	dev_kfree_skb(skb);
2783 
2784 	return NETDEV_TX_OK;
2785 }
2786 
2787 #if (IS_ENABLED(CONFIG_PTP_1588_CLOCK))
2788 /**
2789  * idpf_tx_tstamp - set up context descriptor for hardware timestamp
2790  * @tx_q: queue to send buffer on
2791  * @skb: pointer to the SKB we're sending
2792  * @off: pointer to the offload struct
2793  *
2794  * Return: Positive index number on success, negative otherwise.
2795  */
2796 static int idpf_tx_tstamp(struct idpf_tx_queue *tx_q, struct sk_buff *skb,
2797 			  struct idpf_tx_offload_params *off)
2798 {
2799 	int err, idx;
2800 
2801 	/* only timestamp the outbound packet if the user has requested it */
2802 	if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2803 		return -1;
2804 
2805 	if (!idpf_ptp_get_txq_tstamp_capability(tx_q))
2806 		return -1;
2807 
2808 	/* Tx timestamps cannot be sampled when doing TSO */
2809 	if (off->tx_flags & IDPF_TX_FLAGS_TSO)
2810 		return -1;
2811 
2812 	/* Grab an open timestamp slot */
2813 	err = idpf_ptp_request_ts(tx_q, skb, &idx);
2814 	if (err) {
2815 		u64_stats_update_begin(&tx_q->stats_sync);
2816 		u64_stats_inc(&tx_q->q_stats.tstamp_skipped);
2817 		u64_stats_update_end(&tx_q->stats_sync);
2818 
2819 		return -1;
2820 	}
2821 
2822 	off->tx_flags |= IDPF_TX_FLAGS_TSYN;
2823 
2824 	return idx;
2825 }
2826 
2827 /**
2828  * idpf_tx_set_tstamp_desc - Set the Tx descriptor fields needed to generate
2829  *			     PHY Tx timestamp
2830  * @ctx_desc: Context descriptor
2831  * @idx: Index of the Tx timestamp latch
2832  */
2833 static void idpf_tx_set_tstamp_desc(union idpf_flex_tx_ctx_desc *ctx_desc,
2834 				    u32 idx)
2835 {
2836 	ctx_desc->tsyn.qw1 = le64_encode_bits(IDPF_TX_DESC_DTYPE_CTX,
2837 					      IDPF_TX_CTX_DTYPE_M) |
2838 			     le64_encode_bits(IDPF_TX_CTX_DESC_TSYN,
2839 					      IDPF_TX_CTX_CMD_M) |
2840 			     le64_encode_bits(idx, IDPF_TX_CTX_TSYN_REG_M);
2841 }
2842 #else /* CONFIG_PTP_1588_CLOCK */
2843 static int idpf_tx_tstamp(struct idpf_tx_queue *tx_q, struct sk_buff *skb,
2844 			  struct idpf_tx_offload_params *off)
2845 {
2846 	return -1;
2847 }
2848 
2849 static void idpf_tx_set_tstamp_desc(union idpf_flex_tx_ctx_desc *ctx_desc,
2850 				    u32 idx)
2851 { }
2852 #endif /* CONFIG_PTP_1588_CLOCK */
2853 
2854 /**
2855  * idpf_tx_splitq_frame - Sends buffer on Tx ring using flex descriptors
2856  * @skb: send buffer
2857  * @tx_q: queue to send buffer on
2858  *
2859  * Returns NETDEV_TX_OK if sent, else an error code
2860  */
2861 static netdev_tx_t idpf_tx_splitq_frame(struct sk_buff *skb,
2862 					struct idpf_tx_queue *tx_q)
2863 {
2864 	struct idpf_tx_splitq_params tx_params = { };
2865 	union idpf_flex_tx_ctx_desc *ctx_desc;
2866 	struct idpf_tx_buf *first;
2867 	unsigned int count;
2868 	int tso, idx;
2869 
2870 	count = idpf_tx_desc_count_required(tx_q, skb);
2871 	if (unlikely(!count))
2872 		return idpf_tx_drop_skb(tx_q, skb);
2873 
2874 	tso = idpf_tso(skb, &tx_params.offload);
2875 	if (unlikely(tso < 0))
2876 		return idpf_tx_drop_skb(tx_q, skb);
2877 
2878 	/* Check for splitq specific TX resources */
2879 	count += (IDPF_TX_DESCS_PER_CACHE_LINE + tso);
2880 	if (idpf_tx_maybe_stop_splitq(tx_q, count)) {
2881 		idpf_tx_buf_hw_update(tx_q, tx_q->next_to_use, false);
2882 
2883 		return NETDEV_TX_BUSY;
2884 	}
2885 
2886 	if (tso) {
2887 		/* If tso is needed, set up context desc */
2888 		ctx_desc = idpf_tx_splitq_get_ctx_desc(tx_q);
2889 
2890 		ctx_desc->tso.qw1.cmd_dtype =
2891 				cpu_to_le16(IDPF_TX_DESC_DTYPE_FLEX_TSO_CTX |
2892 					    IDPF_TX_FLEX_CTX_DESC_CMD_TSO);
2893 		ctx_desc->tso.qw0.flex_tlen =
2894 				cpu_to_le32(tx_params.offload.tso_len &
2895 					    IDPF_TXD_FLEX_CTX_TLEN_M);
2896 		ctx_desc->tso.qw0.mss_rt =
2897 				cpu_to_le16(tx_params.offload.mss &
2898 					    IDPF_TXD_FLEX_CTX_MSS_RT_M);
2899 		ctx_desc->tso.qw0.hdr_len = tx_params.offload.tso_hdr_len;
2900 
2901 		u64_stats_update_begin(&tx_q->stats_sync);
2902 		u64_stats_inc(&tx_q->q_stats.lso_pkts);
2903 		u64_stats_update_end(&tx_q->stats_sync);
2904 	}
2905 
2906 	idx = idpf_tx_tstamp(tx_q, skb, &tx_params.offload);
2907 	if (idx != -1) {
2908 		ctx_desc = idpf_tx_splitq_get_ctx_desc(tx_q);
2909 		idpf_tx_set_tstamp_desc(ctx_desc, idx);
2910 	}
2911 
2912 	/* record the location of the first descriptor for this packet */
2913 	first = &tx_q->tx_buf[tx_q->next_to_use];
2914 	first->skb = skb;
2915 
2916 	if (tso) {
2917 		first->packets = tx_params.offload.tso_segs;
2918 		first->bytes = skb->len +
2919 			((first->packets - 1) * tx_params.offload.tso_hdr_len);
2920 	} else {
2921 		first->packets = 1;
2922 		first->bytes = max_t(unsigned int, skb->len, ETH_ZLEN);
2923 	}
2924 
2925 	if (idpf_queue_has(FLOW_SCH_EN, tx_q)) {
2926 		tx_params.dtype = IDPF_TX_DESC_DTYPE_FLEX_FLOW_SCHE;
2927 		tx_params.eop_cmd = IDPF_TXD_FLEX_FLOW_CMD_EOP;
2928 		/* Set the RE bit to catch any packets that may have not been
2929 		 * stashed during RS completion cleaning. MIN_GAP is set to
2930 		 * MIN_RING size to ensure it will be set at least once each
2931 		 * time around the ring.
2932 		 */
2933 		if (!(tx_q->next_to_use % IDPF_TX_SPLITQ_RE_MIN_GAP)) {
2934 			tx_params.eop_cmd |= IDPF_TXD_FLEX_FLOW_CMD_RE;
2935 			tx_q->txq_grp->num_completions_pending++;
2936 		}
2937 
2938 		if (skb->ip_summed == CHECKSUM_PARTIAL)
2939 			tx_params.offload.td_cmd |= IDPF_TXD_FLEX_FLOW_CMD_CS_EN;
2940 
2941 	} else {
2942 		tx_params.dtype = IDPF_TX_DESC_DTYPE_FLEX_L2TAG1_L2TAG2;
2943 		tx_params.eop_cmd = IDPF_TXD_LAST_DESC_CMD;
2944 
2945 		if (skb->ip_summed == CHECKSUM_PARTIAL)
2946 			tx_params.offload.td_cmd |= IDPF_TX_FLEX_DESC_CMD_CS_EN;
2947 	}
2948 
2949 	idpf_tx_splitq_map(tx_q, &tx_params, first);
2950 
2951 	return NETDEV_TX_OK;
2952 }
2953 
2954 /**
2955  * idpf_tx_start - Selects the right Tx queue to send buffer
2956  * @skb: send buffer
2957  * @netdev: network interface device structure
2958  *
2959  * Returns NETDEV_TX_OK if sent, else an error code
2960  */
2961 netdev_tx_t idpf_tx_start(struct sk_buff *skb, struct net_device *netdev)
2962 {
2963 	struct idpf_vport *vport = idpf_netdev_to_vport(netdev);
2964 	struct idpf_tx_queue *tx_q;
2965 
2966 	if (unlikely(skb_get_queue_mapping(skb) >= vport->num_txq)) {
2967 		dev_kfree_skb_any(skb);
2968 
2969 		return NETDEV_TX_OK;
2970 	}
2971 
2972 	tx_q = vport->txqs[skb_get_queue_mapping(skb)];
2973 
2974 	/* hardware can't handle really short frames, hardware padding works
2975 	 * beyond this point
2976 	 */
2977 	if (skb_put_padto(skb, tx_q->tx_min_pkt_len)) {
2978 		idpf_tx_buf_hw_update(tx_q, tx_q->next_to_use, false);
2979 
2980 		return NETDEV_TX_OK;
2981 	}
2982 
2983 	if (idpf_is_queue_model_split(vport->txq_model))
2984 		return idpf_tx_splitq_frame(skb, tx_q);
2985 	else
2986 		return idpf_tx_singleq_frame(skb, tx_q);
2987 }
2988 
2989 /**
2990  * idpf_rx_hash - set the hash value in the skb
2991  * @rxq: Rx descriptor ring packet is being transacted on
2992  * @skb: pointer to current skb being populated
2993  * @rx_desc: Receive descriptor
2994  * @decoded: Decoded Rx packet type related fields
2995  */
2996 static void
2997 idpf_rx_hash(const struct idpf_rx_queue *rxq, struct sk_buff *skb,
2998 	     const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc,
2999 	     struct libeth_rx_pt decoded)
3000 {
3001 	u32 hash;
3002 
3003 	if (!libeth_rx_pt_has_hash(rxq->netdev, decoded))
3004 		return;
3005 
3006 	hash = le16_to_cpu(rx_desc->hash1) |
3007 	       (rx_desc->ff2_mirrid_hash2.hash2 << 16) |
3008 	       (rx_desc->hash3 << 24);
3009 
3010 	libeth_rx_pt_set_hash(skb, hash, decoded);
3011 }
3012 
3013 /**
3014  * idpf_rx_csum - Indicate in skb if checksum is good
3015  * @rxq: Rx descriptor ring packet is being transacted on
3016  * @skb: pointer to current skb being populated
3017  * @csum_bits: checksum fields extracted from the descriptor
3018  * @decoded: Decoded Rx packet type related fields
3019  *
3020  * skb->protocol must be set before this function is called
3021  */
3022 static void idpf_rx_csum(struct idpf_rx_queue *rxq, struct sk_buff *skb,
3023 			 struct libeth_rx_csum csum_bits,
3024 			 struct libeth_rx_pt decoded)
3025 {
3026 	bool ipv4, ipv6;
3027 
3028 	/* check if Rx checksum is enabled */
3029 	if (!libeth_rx_pt_has_checksum(rxq->netdev, decoded))
3030 		return;
3031 
3032 	/* check if HW has decoded the packet and checksum */
3033 	if (unlikely(!csum_bits.l3l4p))
3034 		return;
3035 
3036 	ipv4 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV4;
3037 	ipv6 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV6;
3038 
3039 	if (unlikely(ipv4 && (csum_bits.ipe || csum_bits.eipe)))
3040 		goto checksum_fail;
3041 
3042 	if (unlikely(ipv6 && csum_bits.ipv6exadd))
3043 		return;
3044 
3045 	/* check for L4 errors and handle packets that were not able to be
3046 	 * checksummed
3047 	 */
3048 	if (unlikely(csum_bits.l4e))
3049 		goto checksum_fail;
3050 
3051 	if (!csum_bits.raw_csum_valid ||
3052 	    decoded.inner_prot == LIBETH_RX_PT_INNER_SCTP) {
3053 		skb->ip_summed = CHECKSUM_UNNECESSARY;
3054 		return;
3055 	}
3056 
3057 	skb->csum = csum_unfold((__force __sum16)~swab16(csum_bits.raw_csum));
3058 	skb->ip_summed = CHECKSUM_COMPLETE;
3059 
3060 	return;
3061 
3062 checksum_fail:
3063 	u64_stats_update_begin(&rxq->stats_sync);
3064 	u64_stats_inc(&rxq->q_stats.hw_csum_err);
3065 	u64_stats_update_end(&rxq->stats_sync);
3066 }
3067 
3068 /**
3069  * idpf_rx_splitq_extract_csum_bits - Extract checksum bits from descriptor
3070  * @rx_desc: receive descriptor
3071  *
3072  * Return: parsed checksum status.
3073  **/
3074 static struct libeth_rx_csum
3075 idpf_rx_splitq_extract_csum_bits(const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc)
3076 {
3077 	struct libeth_rx_csum csum = { };
3078 	u8 qword0, qword1;
3079 
3080 	qword0 = rx_desc->status_err0_qw0;
3081 	qword1 = rx_desc->status_err0_qw1;
3082 
3083 	csum.ipe = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_IPE_M,
3084 			     qword1);
3085 	csum.eipe = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EIPE_M,
3086 			      qword1);
3087 	csum.l4e = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_L4E_M,
3088 			     qword1);
3089 	csum.l3l4p = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_L3L4P_M,
3090 			       qword1);
3091 	csum.ipv6exadd = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_IPV6EXADD_M,
3092 				   qword0);
3093 	csum.raw_csum_valid =
3094 		!le16_get_bits(rx_desc->ptype_err_fflags0,
3095 			       VIRTCHNL2_RX_FLEX_DESC_ADV_RAW_CSUM_INV_M);
3096 	csum.raw_csum = le16_to_cpu(rx_desc->misc.raw_cs);
3097 
3098 	return csum;
3099 }
3100 
3101 /**
3102  * idpf_rx_rsc - Set the RSC fields in the skb
3103  * @rxq : Rx descriptor ring packet is being transacted on
3104  * @skb : pointer to current skb being populated
3105  * @rx_desc: Receive descriptor
3106  * @decoded: Decoded Rx packet type related fields
3107  *
3108  * Return 0 on success and error code on failure
3109  *
3110  * Populate the skb fields with the total number of RSC segments, RSC payload
3111  * length and packet type.
3112  */
3113 static int idpf_rx_rsc(struct idpf_rx_queue *rxq, struct sk_buff *skb,
3114 		       const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc,
3115 		       struct libeth_rx_pt decoded)
3116 {
3117 	u16 rsc_segments, rsc_seg_len;
3118 	bool ipv4, ipv6;
3119 	int len;
3120 
3121 	if (unlikely(libeth_rx_pt_get_ip_ver(decoded) ==
3122 		     LIBETH_RX_PT_OUTER_L2))
3123 		return -EINVAL;
3124 
3125 	rsc_seg_len = le16_to_cpu(rx_desc->misc.rscseglen);
3126 	if (unlikely(!rsc_seg_len))
3127 		return -EINVAL;
3128 
3129 	ipv4 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV4;
3130 	ipv6 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV6;
3131 
3132 	if (unlikely(!(ipv4 ^ ipv6)))
3133 		return -EINVAL;
3134 
3135 	rsc_segments = DIV_ROUND_UP(skb->data_len, rsc_seg_len);
3136 
3137 	NAPI_GRO_CB(skb)->count = rsc_segments;
3138 	skb_shinfo(skb)->gso_size = rsc_seg_len;
3139 
3140 	skb_reset_network_header(skb);
3141 
3142 	if (ipv4) {
3143 		struct iphdr *ipv4h = ip_hdr(skb);
3144 
3145 		skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
3146 
3147 		/* Reset and set transport header offset in skb */
3148 		skb_set_transport_header(skb, sizeof(struct iphdr));
3149 		len = skb->len - skb_transport_offset(skb);
3150 
3151 		/* Compute the TCP pseudo header checksum*/
3152 		tcp_hdr(skb)->check =
3153 			~tcp_v4_check(len, ipv4h->saddr, ipv4h->daddr, 0);
3154 	} else {
3155 		struct ipv6hdr *ipv6h = ipv6_hdr(skb);
3156 
3157 		skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
3158 		skb_set_transport_header(skb, sizeof(struct ipv6hdr));
3159 		len = skb->len - skb_transport_offset(skb);
3160 		tcp_hdr(skb)->check =
3161 			~tcp_v6_check(len, &ipv6h->saddr, &ipv6h->daddr, 0);
3162 	}
3163 
3164 	tcp_gro_complete(skb);
3165 
3166 	u64_stats_update_begin(&rxq->stats_sync);
3167 	u64_stats_inc(&rxq->q_stats.rsc_pkts);
3168 	u64_stats_update_end(&rxq->stats_sync);
3169 
3170 	return 0;
3171 }
3172 
3173 /**
3174  * idpf_rx_hwtstamp - check for an RX timestamp and pass up the stack
3175  * @rxq: pointer to the rx queue that receives the timestamp
3176  * @rx_desc: pointer to rx descriptor containing timestamp
3177  * @skb: skb to put timestamp in
3178  */
3179 static void
3180 idpf_rx_hwtstamp(const struct idpf_rx_queue *rxq,
3181 		 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc,
3182 		 struct sk_buff *skb)
3183 {
3184 	u64 cached_time, ts_ns;
3185 	u32 ts_high;
3186 
3187 	if (!(rx_desc->ts_low & VIRTCHNL2_RX_FLEX_TSTAMP_VALID))
3188 		return;
3189 
3190 	cached_time = READ_ONCE(rxq->cached_phc_time);
3191 
3192 	ts_high = le32_to_cpu(rx_desc->ts_high);
3193 	ts_ns = idpf_ptp_tstamp_extend_32b_to_64b(cached_time, ts_high);
3194 
3195 	*skb_hwtstamps(skb) = (struct skb_shared_hwtstamps) {
3196 		.hwtstamp = ns_to_ktime(ts_ns),
3197 	};
3198 }
3199 
3200 /**
3201  * idpf_rx_process_skb_fields - Populate skb header fields from Rx descriptor
3202  * @rxq: Rx descriptor ring packet is being transacted on
3203  * @skb: pointer to current skb being populated
3204  * @rx_desc: Receive descriptor
3205  *
3206  * This function checks the ring, descriptor, and packet information in
3207  * order to populate the hash, checksum, protocol, and
3208  * other fields within the skb.
3209  */
3210 static int
3211 idpf_rx_process_skb_fields(struct idpf_rx_queue *rxq, struct sk_buff *skb,
3212 			   const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc)
3213 {
3214 	struct libeth_rx_csum csum_bits;
3215 	struct libeth_rx_pt decoded;
3216 	u16 rx_ptype;
3217 
3218 	rx_ptype = le16_get_bits(rx_desc->ptype_err_fflags0,
3219 				 VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_M);
3220 	decoded = rxq->rx_ptype_lkup[rx_ptype];
3221 
3222 	/* process RSS/hash */
3223 	idpf_rx_hash(rxq, skb, rx_desc, decoded);
3224 
3225 	if (idpf_queue_has(PTP, rxq))
3226 		idpf_rx_hwtstamp(rxq, rx_desc, skb);
3227 
3228 	skb->protocol = eth_type_trans(skb, rxq->netdev);
3229 	skb_record_rx_queue(skb, rxq->idx);
3230 
3231 	if (le16_get_bits(rx_desc->hdrlen_flags,
3232 			  VIRTCHNL2_RX_FLEX_DESC_ADV_RSC_M))
3233 		return idpf_rx_rsc(rxq, skb, rx_desc, decoded);
3234 
3235 	csum_bits = idpf_rx_splitq_extract_csum_bits(rx_desc);
3236 	idpf_rx_csum(rxq, skb, csum_bits, decoded);
3237 
3238 	return 0;
3239 }
3240 
3241 /**
3242  * idpf_rx_add_frag - Add contents of Rx buffer to sk_buff as a frag
3243  * @rx_buf: buffer containing page to add
3244  * @skb: sk_buff to place the data into
3245  * @size: packet length from rx_desc
3246  *
3247  * This function will add the data contained in rx_buf->page to the skb.
3248  * It will just attach the page as a frag to the skb.
3249  * The function will then update the page offset.
3250  */
3251 void idpf_rx_add_frag(struct idpf_rx_buf *rx_buf, struct sk_buff *skb,
3252 		      unsigned int size)
3253 {
3254 	u32 hr = rx_buf->page->pp->p.offset;
3255 
3256 	skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buf->page,
3257 			rx_buf->offset + hr, size, rx_buf->truesize);
3258 }
3259 
3260 /**
3261  * idpf_rx_hsplit_wa - handle header buffer overflows and split errors
3262  * @hdr: Rx buffer for the headers
3263  * @buf: Rx buffer for the payload
3264  * @data_len: number of bytes received to the payload buffer
3265  *
3266  * When a header buffer overflow occurs or the HW was unable do parse the
3267  * packet type to perform header split, the whole frame gets placed to the
3268  * payload buffer. We can't build a valid skb around a payload buffer when
3269  * the header split is active since it doesn't reserve any head- or tailroom.
3270  * In that case, copy either the whole frame when it's short or just the
3271  * Ethernet header to the header buffer to be able to build an skb and adjust
3272  * the data offset in the payload buffer, IOW emulate the header split.
3273  *
3274  * Return: number of bytes copied to the header buffer.
3275  */
3276 static u32 idpf_rx_hsplit_wa(const struct libeth_fqe *hdr,
3277 			     struct libeth_fqe *buf, u32 data_len)
3278 {
3279 	u32 copy = data_len <= L1_CACHE_BYTES ? data_len : ETH_HLEN;
3280 	const void *src;
3281 	void *dst;
3282 
3283 	if (!libeth_rx_sync_for_cpu(buf, copy))
3284 		return 0;
3285 
3286 	dst = page_address(hdr->page) + hdr->offset + hdr->page->pp->p.offset;
3287 	src = page_address(buf->page) + buf->offset + buf->page->pp->p.offset;
3288 	memcpy(dst, src, LARGEST_ALIGN(copy));
3289 
3290 	buf->offset += copy;
3291 
3292 	return copy;
3293 }
3294 
3295 /**
3296  * idpf_rx_build_skb - Allocate skb and populate it from header buffer
3297  * @buf: Rx buffer to pull data from
3298  * @size: the length of the packet
3299  *
3300  * This function allocates an skb. It then populates it with the page data from
3301  * the current receive descriptor, taking care to set up the skb correctly.
3302  */
3303 struct sk_buff *idpf_rx_build_skb(const struct libeth_fqe *buf, u32 size)
3304 {
3305 	u32 hr = buf->page->pp->p.offset;
3306 	struct sk_buff *skb;
3307 	void *va;
3308 
3309 	va = page_address(buf->page) + buf->offset;
3310 	prefetch(va + hr);
3311 
3312 	skb = napi_build_skb(va, buf->truesize);
3313 	if (unlikely(!skb))
3314 		return NULL;
3315 
3316 	skb_mark_for_recycle(skb);
3317 
3318 	skb_reserve(skb, hr);
3319 	__skb_put(skb, size);
3320 
3321 	return skb;
3322 }
3323 
3324 /**
3325  * idpf_rx_splitq_test_staterr - tests bits in Rx descriptor
3326  * status and error fields
3327  * @stat_err_field: field from descriptor to test bits in
3328  * @stat_err_bits: value to mask
3329  *
3330  */
3331 static bool idpf_rx_splitq_test_staterr(const u8 stat_err_field,
3332 					const u8 stat_err_bits)
3333 {
3334 	return !!(stat_err_field & stat_err_bits);
3335 }
3336 
3337 /**
3338  * idpf_rx_splitq_is_eop - process handling of EOP buffers
3339  * @rx_desc: Rx descriptor for current buffer
3340  *
3341  * If the buffer is an EOP buffer, this function exits returning true,
3342  * otherwise return false indicating that this is in fact a non-EOP buffer.
3343  */
3344 static bool idpf_rx_splitq_is_eop(struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc)
3345 {
3346 	/* if we are the last buffer then there is nothing else to do */
3347 	return likely(idpf_rx_splitq_test_staterr(rx_desc->status_err0_qw1,
3348 						  IDPF_RXD_EOF_SPLITQ));
3349 }
3350 
3351 /**
3352  * idpf_rx_splitq_clean - Clean completed descriptors from Rx queue
3353  * @rxq: Rx descriptor queue to retrieve receive buffer queue
3354  * @budget: Total limit on number of packets to process
3355  *
3356  * This function provides a "bounce buffer" approach to Rx interrupt
3357  * processing. The advantage to this is that on systems that have
3358  * expensive overhead for IOMMU access this provides a means of avoiding
3359  * it by maintaining the mapping of the page to the system.
3360  *
3361  * Returns amount of work completed
3362  */
3363 static int idpf_rx_splitq_clean(struct idpf_rx_queue *rxq, int budget)
3364 {
3365 	int total_rx_bytes = 0, total_rx_pkts = 0;
3366 	struct idpf_buf_queue *rx_bufq = NULL;
3367 	struct sk_buff *skb = rxq->skb;
3368 	u16 ntc = rxq->next_to_clean;
3369 
3370 	/* Process Rx packets bounded by budget */
3371 	while (likely(total_rx_pkts < budget)) {
3372 		struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc;
3373 		struct libeth_fqe *hdr, *rx_buf = NULL;
3374 		struct idpf_sw_queue *refillq = NULL;
3375 		struct idpf_rxq_set *rxq_set = NULL;
3376 		unsigned int pkt_len = 0;
3377 		unsigned int hdr_len = 0;
3378 		u16 gen_id, buf_id = 0;
3379 		int bufq_id;
3380 		u8 rxdid;
3381 
3382 		/* get the Rx desc from Rx queue based on 'next_to_clean' */
3383 		rx_desc = &rxq->rx[ntc].flex_adv_nic_3_wb;
3384 
3385 		/* This memory barrier is needed to keep us from reading
3386 		 * any other fields out of the rx_desc
3387 		 */
3388 		dma_rmb();
3389 
3390 		/* if the descriptor isn't done, no work yet to do */
3391 		gen_id = le16_get_bits(rx_desc->pktlen_gen_bufq_id,
3392 				       VIRTCHNL2_RX_FLEX_DESC_ADV_GEN_M);
3393 
3394 		if (idpf_queue_has(GEN_CHK, rxq) != gen_id)
3395 			break;
3396 
3397 		rxdid = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_RXDID_M,
3398 				  rx_desc->rxdid_ucast);
3399 		if (rxdid != VIRTCHNL2_RXDID_2_FLEX_SPLITQ) {
3400 			IDPF_RX_BUMP_NTC(rxq, ntc);
3401 			u64_stats_update_begin(&rxq->stats_sync);
3402 			u64_stats_inc(&rxq->q_stats.bad_descs);
3403 			u64_stats_update_end(&rxq->stats_sync);
3404 			continue;
3405 		}
3406 
3407 		pkt_len = le16_get_bits(rx_desc->pktlen_gen_bufq_id,
3408 					VIRTCHNL2_RX_FLEX_DESC_ADV_LEN_PBUF_M);
3409 
3410 		bufq_id = le16_get_bits(rx_desc->pktlen_gen_bufq_id,
3411 					VIRTCHNL2_RX_FLEX_DESC_ADV_BUFQ_ID_M);
3412 
3413 		rxq_set = container_of(rxq, struct idpf_rxq_set, rxq);
3414 		refillq = rxq_set->refillq[bufq_id];
3415 
3416 		/* retrieve buffer from the rxq */
3417 		rx_bufq = &rxq->bufq_sets[bufq_id].bufq;
3418 
3419 		buf_id = le16_to_cpu(rx_desc->buf_id);
3420 
3421 		rx_buf = &rx_bufq->buf[buf_id];
3422 
3423 		if (!rx_bufq->hdr_pp)
3424 			goto payload;
3425 
3426 #define __HBO_BIT	VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_HBO_M
3427 #define __HDR_LEN_MASK	VIRTCHNL2_RX_FLEX_DESC_ADV_LEN_HDR_M
3428 		if (likely(!(rx_desc->status_err0_qw1 & __HBO_BIT)))
3429 			/* If a header buffer overflow, occurs, i.e. header is
3430 			 * too large to fit in the header split buffer, HW will
3431 			 * put the entire packet, including headers, in the
3432 			 * data/payload buffer.
3433 			 */
3434 			hdr_len = le16_get_bits(rx_desc->hdrlen_flags,
3435 						__HDR_LEN_MASK);
3436 #undef __HDR_LEN_MASK
3437 #undef __HBO_BIT
3438 
3439 		hdr = &rx_bufq->hdr_buf[buf_id];
3440 
3441 		if (unlikely(!hdr_len && !skb)) {
3442 			hdr_len = idpf_rx_hsplit_wa(hdr, rx_buf, pkt_len);
3443 			pkt_len -= hdr_len;
3444 
3445 			u64_stats_update_begin(&rxq->stats_sync);
3446 			u64_stats_inc(&rxq->q_stats.hsplit_buf_ovf);
3447 			u64_stats_update_end(&rxq->stats_sync);
3448 		}
3449 
3450 		if (libeth_rx_sync_for_cpu(hdr, hdr_len)) {
3451 			skb = idpf_rx_build_skb(hdr, hdr_len);
3452 			if (!skb)
3453 				break;
3454 
3455 			u64_stats_update_begin(&rxq->stats_sync);
3456 			u64_stats_inc(&rxq->q_stats.hsplit_pkts);
3457 			u64_stats_update_end(&rxq->stats_sync);
3458 		}
3459 
3460 		hdr->page = NULL;
3461 
3462 payload:
3463 		if (!libeth_rx_sync_for_cpu(rx_buf, pkt_len))
3464 			goto skip_data;
3465 
3466 		if (skb)
3467 			idpf_rx_add_frag(rx_buf, skb, pkt_len);
3468 		else
3469 			skb = idpf_rx_build_skb(rx_buf, pkt_len);
3470 
3471 		/* exit if we failed to retrieve a buffer */
3472 		if (!skb)
3473 			break;
3474 
3475 skip_data:
3476 		rx_buf->page = NULL;
3477 
3478 		idpf_rx_post_buf_refill(refillq, buf_id);
3479 		IDPF_RX_BUMP_NTC(rxq, ntc);
3480 
3481 		/* skip if it is non EOP desc */
3482 		if (!idpf_rx_splitq_is_eop(rx_desc) || unlikely(!skb))
3483 			continue;
3484 
3485 		/* pad skb if needed (to make valid ethernet frame) */
3486 		if (eth_skb_pad(skb)) {
3487 			skb = NULL;
3488 			continue;
3489 		}
3490 
3491 		/* probably a little skewed due to removing CRC */
3492 		total_rx_bytes += skb->len;
3493 
3494 		/* protocol */
3495 		if (unlikely(idpf_rx_process_skb_fields(rxq, skb, rx_desc))) {
3496 			dev_kfree_skb_any(skb);
3497 			skb = NULL;
3498 			continue;
3499 		}
3500 
3501 		/* send completed skb up the stack */
3502 		napi_gro_receive(rxq->napi, skb);
3503 		skb = NULL;
3504 
3505 		/* update budget accounting */
3506 		total_rx_pkts++;
3507 	}
3508 
3509 	rxq->next_to_clean = ntc;
3510 
3511 	rxq->skb = skb;
3512 	u64_stats_update_begin(&rxq->stats_sync);
3513 	u64_stats_add(&rxq->q_stats.packets, total_rx_pkts);
3514 	u64_stats_add(&rxq->q_stats.bytes, total_rx_bytes);
3515 	u64_stats_update_end(&rxq->stats_sync);
3516 
3517 	/* guarantee a trip back through this routine if there was a failure */
3518 	return total_rx_pkts;
3519 }
3520 
3521 /**
3522  * idpf_rx_update_bufq_desc - Update buffer queue descriptor
3523  * @bufq: Pointer to the buffer queue
3524  * @buf_id: buffer ID
3525  * @buf_desc: Buffer queue descriptor
3526  *
3527  * Return 0 on success and negative on failure.
3528  */
3529 static int idpf_rx_update_bufq_desc(struct idpf_buf_queue *bufq, u32 buf_id,
3530 				    struct virtchnl2_splitq_rx_buf_desc *buf_desc)
3531 {
3532 	struct libeth_fq_fp fq = {
3533 		.pp		= bufq->pp,
3534 		.fqes		= bufq->buf,
3535 		.truesize	= bufq->truesize,
3536 		.count		= bufq->desc_count,
3537 	};
3538 	dma_addr_t addr;
3539 
3540 	addr = libeth_rx_alloc(&fq, buf_id);
3541 	if (addr == DMA_MAPPING_ERROR)
3542 		return -ENOMEM;
3543 
3544 	buf_desc->pkt_addr = cpu_to_le64(addr);
3545 	buf_desc->qword0.buf_id = cpu_to_le16(buf_id);
3546 
3547 	if (!idpf_queue_has(HSPLIT_EN, bufq))
3548 		return 0;
3549 
3550 	fq.pp = bufq->hdr_pp;
3551 	fq.fqes = bufq->hdr_buf;
3552 	fq.truesize = bufq->hdr_truesize;
3553 
3554 	addr = libeth_rx_alloc(&fq, buf_id);
3555 	if (addr == DMA_MAPPING_ERROR)
3556 		return -ENOMEM;
3557 
3558 	buf_desc->hdr_addr = cpu_to_le64(addr);
3559 
3560 	return 0;
3561 }
3562 
3563 /**
3564  * idpf_rx_clean_refillq - Clean refill queue buffers
3565  * @bufq: buffer queue to post buffers back to
3566  * @refillq: refill queue to clean
3567  *
3568  * This function takes care of the buffer refill management
3569  */
3570 static void idpf_rx_clean_refillq(struct idpf_buf_queue *bufq,
3571 				  struct idpf_sw_queue *refillq)
3572 {
3573 	struct virtchnl2_splitq_rx_buf_desc *buf_desc;
3574 	u16 bufq_nta = bufq->next_to_alloc;
3575 	u16 ntc = refillq->next_to_clean;
3576 	int cleaned = 0;
3577 
3578 	buf_desc = &bufq->split_buf[bufq_nta];
3579 
3580 	/* make sure we stop at ring wrap in the unlikely case ring is full */
3581 	while (likely(cleaned < refillq->desc_count)) {
3582 		u32 buf_id, refill_desc = refillq->ring[ntc];
3583 		bool failure;
3584 
3585 		if (idpf_queue_has(RFL_GEN_CHK, refillq) !=
3586 		    !!(refill_desc & IDPF_RX_BI_GEN_M))
3587 			break;
3588 
3589 		buf_id = FIELD_GET(IDPF_RX_BI_BUFID_M, refill_desc);
3590 		failure = idpf_rx_update_bufq_desc(bufq, buf_id, buf_desc);
3591 		if (failure)
3592 			break;
3593 
3594 		if (unlikely(++ntc == refillq->desc_count)) {
3595 			idpf_queue_change(RFL_GEN_CHK, refillq);
3596 			ntc = 0;
3597 		}
3598 
3599 		if (unlikely(++bufq_nta == bufq->desc_count)) {
3600 			buf_desc = &bufq->split_buf[0];
3601 			bufq_nta = 0;
3602 		} else {
3603 			buf_desc++;
3604 		}
3605 
3606 		cleaned++;
3607 	}
3608 
3609 	if (!cleaned)
3610 		return;
3611 
3612 	/* We want to limit how many transactions on the bus we trigger with
3613 	 * tail writes so we only do it in strides. It's also important we
3614 	 * align the write to a multiple of 8 as required by HW.
3615 	 */
3616 	if (((bufq->next_to_use <= bufq_nta ? 0 : bufq->desc_count) +
3617 	    bufq_nta - bufq->next_to_use) >= IDPF_RX_BUF_POST_STRIDE)
3618 		idpf_rx_buf_hw_update(bufq, ALIGN_DOWN(bufq_nta,
3619 						       IDPF_RX_BUF_POST_STRIDE));
3620 
3621 	/* update next to alloc since we have filled the ring */
3622 	refillq->next_to_clean = ntc;
3623 	bufq->next_to_alloc = bufq_nta;
3624 }
3625 
3626 /**
3627  * idpf_rx_clean_refillq_all - Clean all refill queues
3628  * @bufq: buffer queue with refill queues
3629  * @nid: ID of the closest NUMA node with memory
3630  *
3631  * Iterates through all refill queues assigned to the buffer queue assigned to
3632  * this vector.  Returns true if clean is complete within budget, false
3633  * otherwise.
3634  */
3635 static void idpf_rx_clean_refillq_all(struct idpf_buf_queue *bufq, int nid)
3636 {
3637 	struct idpf_bufq_set *bufq_set;
3638 	int i;
3639 
3640 	page_pool_nid_changed(bufq->pp, nid);
3641 	if (bufq->hdr_pp)
3642 		page_pool_nid_changed(bufq->hdr_pp, nid);
3643 
3644 	bufq_set = container_of(bufq, struct idpf_bufq_set, bufq);
3645 	for (i = 0; i < bufq_set->num_refillqs; i++)
3646 		idpf_rx_clean_refillq(bufq, &bufq_set->refillqs[i]);
3647 }
3648 
3649 /**
3650  * idpf_vport_intr_clean_queues - MSIX mode Interrupt Handler
3651  * @irq: interrupt number
3652  * @data: pointer to a q_vector
3653  *
3654  */
3655 static irqreturn_t idpf_vport_intr_clean_queues(int __always_unused irq,
3656 						void *data)
3657 {
3658 	struct idpf_q_vector *q_vector = (struct idpf_q_vector *)data;
3659 
3660 	q_vector->total_events++;
3661 	napi_schedule(&q_vector->napi);
3662 
3663 	return IRQ_HANDLED;
3664 }
3665 
3666 /**
3667  * idpf_vport_intr_napi_del_all - Unregister napi for all q_vectors in vport
3668  * @vport: virtual port structure
3669  *
3670  */
3671 static void idpf_vport_intr_napi_del_all(struct idpf_vport *vport)
3672 {
3673 	u16 v_idx;
3674 
3675 	for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++)
3676 		netif_napi_del(&vport->q_vectors[v_idx].napi);
3677 }
3678 
3679 /**
3680  * idpf_vport_intr_napi_dis_all - Disable NAPI for all q_vectors in the vport
3681  * @vport: main vport structure
3682  */
3683 static void idpf_vport_intr_napi_dis_all(struct idpf_vport *vport)
3684 {
3685 	int v_idx;
3686 
3687 	for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++)
3688 		napi_disable(&vport->q_vectors[v_idx].napi);
3689 }
3690 
3691 /**
3692  * idpf_vport_intr_rel - Free memory allocated for interrupt vectors
3693  * @vport: virtual port
3694  *
3695  * Free the memory allocated for interrupt vectors  associated to a vport
3696  */
3697 void idpf_vport_intr_rel(struct idpf_vport *vport)
3698 {
3699 	for (u32 v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) {
3700 		struct idpf_q_vector *q_vector = &vport->q_vectors[v_idx];
3701 
3702 		kfree(q_vector->complq);
3703 		q_vector->complq = NULL;
3704 		kfree(q_vector->bufq);
3705 		q_vector->bufq = NULL;
3706 		kfree(q_vector->tx);
3707 		q_vector->tx = NULL;
3708 		kfree(q_vector->rx);
3709 		q_vector->rx = NULL;
3710 	}
3711 
3712 	kfree(vport->q_vectors);
3713 	vport->q_vectors = NULL;
3714 }
3715 
3716 /**
3717  * idpf_vport_intr_rel_irq - Free the IRQ association with the OS
3718  * @vport: main vport structure
3719  */
3720 static void idpf_vport_intr_rel_irq(struct idpf_vport *vport)
3721 {
3722 	struct idpf_adapter *adapter = vport->adapter;
3723 	int vector;
3724 
3725 	for (vector = 0; vector < vport->num_q_vectors; vector++) {
3726 		struct idpf_q_vector *q_vector = &vport->q_vectors[vector];
3727 		int irq_num, vidx;
3728 
3729 		/* free only the irqs that were actually requested */
3730 		if (!q_vector)
3731 			continue;
3732 
3733 		vidx = vport->q_vector_idxs[vector];
3734 		irq_num = adapter->msix_entries[vidx].vector;
3735 
3736 		kfree(free_irq(irq_num, q_vector));
3737 	}
3738 }
3739 
3740 /**
3741  * idpf_vport_intr_dis_irq_all - Disable all interrupt
3742  * @vport: main vport structure
3743  */
3744 static void idpf_vport_intr_dis_irq_all(struct idpf_vport *vport)
3745 {
3746 	struct idpf_q_vector *q_vector = vport->q_vectors;
3747 	int q_idx;
3748 
3749 	for (q_idx = 0; q_idx < vport->num_q_vectors; q_idx++)
3750 		writel(0, q_vector[q_idx].intr_reg.dyn_ctl);
3751 }
3752 
3753 /**
3754  * idpf_vport_intr_buildreg_itr - Enable default interrupt generation settings
3755  * @q_vector: pointer to q_vector
3756  */
3757 static u32 idpf_vport_intr_buildreg_itr(struct idpf_q_vector *q_vector)
3758 {
3759 	u32 itr_val = q_vector->intr_reg.dyn_ctl_intena_m;
3760 	int type = IDPF_NO_ITR_UPDATE_IDX;
3761 	u16 itr = 0;
3762 
3763 	if (q_vector->wb_on_itr) {
3764 		/*
3765 		 * Trigger a software interrupt when exiting wb_on_itr, to make
3766 		 * sure we catch any pending write backs that might have been
3767 		 * missed due to interrupt state transition.
3768 		 */
3769 		itr_val |= q_vector->intr_reg.dyn_ctl_swint_trig_m |
3770 			   q_vector->intr_reg.dyn_ctl_sw_itridx_ena_m;
3771 		type = IDPF_SW_ITR_UPDATE_IDX;
3772 		itr = IDPF_ITR_20K;
3773 	}
3774 
3775 	itr &= IDPF_ITR_MASK;
3776 	/* Don't clear PBA because that can cause lost interrupts that
3777 	 * came in while we were cleaning/polling
3778 	 */
3779 	itr_val |= (type << q_vector->intr_reg.dyn_ctl_itridx_s) |
3780 		   (itr << (q_vector->intr_reg.dyn_ctl_intrvl_s - 1));
3781 
3782 	return itr_val;
3783 }
3784 
3785 /**
3786  * idpf_update_dim_sample - Update dim sample with packets and bytes
3787  * @q_vector: the vector associated with the interrupt
3788  * @dim_sample: dim sample to update
3789  * @dim: dim instance structure
3790  * @packets: total packets
3791  * @bytes: total bytes
3792  *
3793  * Update the dim sample with the packets and bytes which are passed to this
3794  * function. Set the dim state appropriately if the dim settings gets stale.
3795  */
3796 static void idpf_update_dim_sample(struct idpf_q_vector *q_vector,
3797 				   struct dim_sample *dim_sample,
3798 				   struct dim *dim, u64 packets, u64 bytes)
3799 {
3800 	dim_update_sample(q_vector->total_events, packets, bytes, dim_sample);
3801 	dim_sample->comp_ctr = 0;
3802 
3803 	/* if dim settings get stale, like when not updated for 1 second or
3804 	 * longer, force it to start again. This addresses the frequent case
3805 	 * of an idle queue being switched to by the scheduler.
3806 	 */
3807 	if (ktime_ms_delta(dim_sample->time, dim->start_sample.time) >= HZ)
3808 		dim->state = DIM_START_MEASURE;
3809 }
3810 
3811 /**
3812  * idpf_net_dim - Update net DIM algorithm
3813  * @q_vector: the vector associated with the interrupt
3814  *
3815  * Create a DIM sample and notify net_dim() so that it can possibly decide
3816  * a new ITR value based on incoming packets, bytes, and interrupts.
3817  *
3818  * This function is a no-op if the queue is not configured to dynamic ITR.
3819  */
3820 static void idpf_net_dim(struct idpf_q_vector *q_vector)
3821 {
3822 	struct dim_sample dim_sample = { };
3823 	u64 packets, bytes;
3824 	u32 i;
3825 
3826 	if (!IDPF_ITR_IS_DYNAMIC(q_vector->tx_intr_mode))
3827 		goto check_rx_itr;
3828 
3829 	for (i = 0, packets = 0, bytes = 0; i < q_vector->num_txq; i++) {
3830 		struct idpf_tx_queue *txq = q_vector->tx[i];
3831 		unsigned int start;
3832 
3833 		do {
3834 			start = u64_stats_fetch_begin(&txq->stats_sync);
3835 			packets += u64_stats_read(&txq->q_stats.packets);
3836 			bytes += u64_stats_read(&txq->q_stats.bytes);
3837 		} while (u64_stats_fetch_retry(&txq->stats_sync, start));
3838 	}
3839 
3840 	idpf_update_dim_sample(q_vector, &dim_sample, &q_vector->tx_dim,
3841 			       packets, bytes);
3842 	net_dim(&q_vector->tx_dim, &dim_sample);
3843 
3844 check_rx_itr:
3845 	if (!IDPF_ITR_IS_DYNAMIC(q_vector->rx_intr_mode))
3846 		return;
3847 
3848 	for (i = 0, packets = 0, bytes = 0; i < q_vector->num_rxq; i++) {
3849 		struct idpf_rx_queue *rxq = q_vector->rx[i];
3850 		unsigned int start;
3851 
3852 		do {
3853 			start = u64_stats_fetch_begin(&rxq->stats_sync);
3854 			packets += u64_stats_read(&rxq->q_stats.packets);
3855 			bytes += u64_stats_read(&rxq->q_stats.bytes);
3856 		} while (u64_stats_fetch_retry(&rxq->stats_sync, start));
3857 	}
3858 
3859 	idpf_update_dim_sample(q_vector, &dim_sample, &q_vector->rx_dim,
3860 			       packets, bytes);
3861 	net_dim(&q_vector->rx_dim, &dim_sample);
3862 }
3863 
3864 /**
3865  * idpf_vport_intr_update_itr_ena_irq - Update itr and re-enable MSIX interrupt
3866  * @q_vector: q_vector for which itr is being updated and interrupt enabled
3867  *
3868  * Update the net_dim() algorithm and re-enable the interrupt associated with
3869  * this vector.
3870  */
3871 void idpf_vport_intr_update_itr_ena_irq(struct idpf_q_vector *q_vector)
3872 {
3873 	u32 intval;
3874 
3875 	/* net_dim() updates ITR out-of-band using a work item */
3876 	idpf_net_dim(q_vector);
3877 
3878 	intval = idpf_vport_intr_buildreg_itr(q_vector);
3879 	q_vector->wb_on_itr = false;
3880 
3881 	writel(intval, q_vector->intr_reg.dyn_ctl);
3882 }
3883 
3884 /**
3885  * idpf_vport_intr_req_irq - get MSI-X vectors from the OS for the vport
3886  * @vport: main vport structure
3887  */
3888 static int idpf_vport_intr_req_irq(struct idpf_vport *vport)
3889 {
3890 	struct idpf_adapter *adapter = vport->adapter;
3891 	const char *drv_name, *if_name, *vec_name;
3892 	int vector, err, irq_num, vidx;
3893 
3894 	drv_name = dev_driver_string(&adapter->pdev->dev);
3895 	if_name = netdev_name(vport->netdev);
3896 
3897 	for (vector = 0; vector < vport->num_q_vectors; vector++) {
3898 		struct idpf_q_vector *q_vector = &vport->q_vectors[vector];
3899 		char *name;
3900 
3901 		vidx = vport->q_vector_idxs[vector];
3902 		irq_num = adapter->msix_entries[vidx].vector;
3903 
3904 		if (q_vector->num_rxq && q_vector->num_txq)
3905 			vec_name = "TxRx";
3906 		else if (q_vector->num_rxq)
3907 			vec_name = "Rx";
3908 		else if (q_vector->num_txq)
3909 			vec_name = "Tx";
3910 		else
3911 			continue;
3912 
3913 		name = kasprintf(GFP_KERNEL, "%s-%s-%s-%d", drv_name, if_name,
3914 				 vec_name, vidx);
3915 
3916 		err = request_irq(irq_num, idpf_vport_intr_clean_queues, 0,
3917 				  name, q_vector);
3918 		if (err) {
3919 			netdev_err(vport->netdev,
3920 				   "Request_irq failed, error: %d\n", err);
3921 			goto free_q_irqs;
3922 		}
3923 	}
3924 
3925 	return 0;
3926 
3927 free_q_irqs:
3928 	while (--vector >= 0) {
3929 		vidx = vport->q_vector_idxs[vector];
3930 		irq_num = adapter->msix_entries[vidx].vector;
3931 		kfree(free_irq(irq_num, &vport->q_vectors[vector]));
3932 	}
3933 
3934 	return err;
3935 }
3936 
3937 /**
3938  * idpf_vport_intr_write_itr - Write ITR value to the ITR register
3939  * @q_vector: q_vector structure
3940  * @itr: Interrupt throttling rate
3941  * @tx: Tx or Rx ITR
3942  */
3943 void idpf_vport_intr_write_itr(struct idpf_q_vector *q_vector, u16 itr, bool tx)
3944 {
3945 	struct idpf_intr_reg *intr_reg;
3946 
3947 	if (tx && !q_vector->tx)
3948 		return;
3949 	else if (!tx && !q_vector->rx)
3950 		return;
3951 
3952 	intr_reg = &q_vector->intr_reg;
3953 	writel(ITR_REG_ALIGN(itr) >> IDPF_ITR_GRAN_S,
3954 	       tx ? intr_reg->tx_itr : intr_reg->rx_itr);
3955 }
3956 
3957 /**
3958  * idpf_vport_intr_ena_irq_all - Enable IRQ for the given vport
3959  * @vport: main vport structure
3960  */
3961 static void idpf_vport_intr_ena_irq_all(struct idpf_vport *vport)
3962 {
3963 	bool dynamic;
3964 	int q_idx;
3965 	u16 itr;
3966 
3967 	for (q_idx = 0; q_idx < vport->num_q_vectors; q_idx++) {
3968 		struct idpf_q_vector *qv = &vport->q_vectors[q_idx];
3969 
3970 		/* Set the initial ITR values */
3971 		if (qv->num_txq) {
3972 			dynamic = IDPF_ITR_IS_DYNAMIC(qv->tx_intr_mode);
3973 			itr = vport->tx_itr_profile[qv->tx_dim.profile_ix];
3974 			idpf_vport_intr_write_itr(qv, dynamic ?
3975 						  itr : qv->tx_itr_value,
3976 						  true);
3977 		}
3978 
3979 		if (qv->num_rxq) {
3980 			dynamic = IDPF_ITR_IS_DYNAMIC(qv->rx_intr_mode);
3981 			itr = vport->rx_itr_profile[qv->rx_dim.profile_ix];
3982 			idpf_vport_intr_write_itr(qv, dynamic ?
3983 						  itr : qv->rx_itr_value,
3984 						  false);
3985 		}
3986 
3987 		if (qv->num_txq || qv->num_rxq)
3988 			idpf_vport_intr_update_itr_ena_irq(qv);
3989 	}
3990 }
3991 
3992 /**
3993  * idpf_vport_intr_deinit - Release all vector associations for the vport
3994  * @vport: main vport structure
3995  */
3996 void idpf_vport_intr_deinit(struct idpf_vport *vport)
3997 {
3998 	idpf_vport_intr_dis_irq_all(vport);
3999 	idpf_vport_intr_napi_dis_all(vport);
4000 	idpf_vport_intr_napi_del_all(vport);
4001 	idpf_vport_intr_rel_irq(vport);
4002 }
4003 
4004 /**
4005  * idpf_tx_dim_work - Call back from the stack
4006  * @work: work queue structure
4007  */
4008 static void idpf_tx_dim_work(struct work_struct *work)
4009 {
4010 	struct idpf_q_vector *q_vector;
4011 	struct idpf_vport *vport;
4012 	struct dim *dim;
4013 	u16 itr;
4014 
4015 	dim = container_of(work, struct dim, work);
4016 	q_vector = container_of(dim, struct idpf_q_vector, tx_dim);
4017 	vport = q_vector->vport;
4018 
4019 	if (dim->profile_ix >= ARRAY_SIZE(vport->tx_itr_profile))
4020 		dim->profile_ix = ARRAY_SIZE(vport->tx_itr_profile) - 1;
4021 
4022 	/* look up the values in our local table */
4023 	itr = vport->tx_itr_profile[dim->profile_ix];
4024 
4025 	idpf_vport_intr_write_itr(q_vector, itr, true);
4026 
4027 	dim->state = DIM_START_MEASURE;
4028 }
4029 
4030 /**
4031  * idpf_rx_dim_work - Call back from the stack
4032  * @work: work queue structure
4033  */
4034 static void idpf_rx_dim_work(struct work_struct *work)
4035 {
4036 	struct idpf_q_vector *q_vector;
4037 	struct idpf_vport *vport;
4038 	struct dim *dim;
4039 	u16 itr;
4040 
4041 	dim = container_of(work, struct dim, work);
4042 	q_vector = container_of(dim, struct idpf_q_vector, rx_dim);
4043 	vport = q_vector->vport;
4044 
4045 	if (dim->profile_ix >= ARRAY_SIZE(vport->rx_itr_profile))
4046 		dim->profile_ix = ARRAY_SIZE(vport->rx_itr_profile) - 1;
4047 
4048 	/* look up the values in our local table */
4049 	itr = vport->rx_itr_profile[dim->profile_ix];
4050 
4051 	idpf_vport_intr_write_itr(q_vector, itr, false);
4052 
4053 	dim->state = DIM_START_MEASURE;
4054 }
4055 
4056 /**
4057  * idpf_init_dim - Set up dynamic interrupt moderation
4058  * @qv: q_vector structure
4059  */
4060 static void idpf_init_dim(struct idpf_q_vector *qv)
4061 {
4062 	INIT_WORK(&qv->tx_dim.work, idpf_tx_dim_work);
4063 	qv->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
4064 	qv->tx_dim.profile_ix = IDPF_DIM_DEFAULT_PROFILE_IX;
4065 
4066 	INIT_WORK(&qv->rx_dim.work, idpf_rx_dim_work);
4067 	qv->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
4068 	qv->rx_dim.profile_ix = IDPF_DIM_DEFAULT_PROFILE_IX;
4069 }
4070 
4071 /**
4072  * idpf_vport_intr_napi_ena_all - Enable NAPI for all q_vectors in the vport
4073  * @vport: main vport structure
4074  */
4075 static void idpf_vport_intr_napi_ena_all(struct idpf_vport *vport)
4076 {
4077 	int q_idx;
4078 
4079 	for (q_idx = 0; q_idx < vport->num_q_vectors; q_idx++) {
4080 		struct idpf_q_vector *q_vector = &vport->q_vectors[q_idx];
4081 
4082 		idpf_init_dim(q_vector);
4083 		napi_enable(&q_vector->napi);
4084 	}
4085 }
4086 
4087 /**
4088  * idpf_tx_splitq_clean_all- Clean completion queues
4089  * @q_vec: queue vector
4090  * @budget: Used to determine if we are in netpoll
4091  * @cleaned: returns number of packets cleaned
4092  *
4093  * Returns false if clean is not complete else returns true
4094  */
4095 static bool idpf_tx_splitq_clean_all(struct idpf_q_vector *q_vec,
4096 				     int budget, int *cleaned)
4097 {
4098 	u16 num_complq = q_vec->num_complq;
4099 	bool clean_complete = true;
4100 	int i, budget_per_q;
4101 
4102 	if (unlikely(!num_complq))
4103 		return true;
4104 
4105 	budget_per_q = DIV_ROUND_UP(budget, num_complq);
4106 
4107 	for (i = 0; i < num_complq; i++)
4108 		clean_complete &= idpf_tx_clean_complq(q_vec->complq[i],
4109 						       budget_per_q, cleaned);
4110 
4111 	return clean_complete;
4112 }
4113 
4114 /**
4115  * idpf_rx_splitq_clean_all- Clean completion queues
4116  * @q_vec: queue vector
4117  * @budget: Used to determine if we are in netpoll
4118  * @cleaned: returns number of packets cleaned
4119  *
4120  * Returns false if clean is not complete else returns true
4121  */
4122 static bool idpf_rx_splitq_clean_all(struct idpf_q_vector *q_vec, int budget,
4123 				     int *cleaned)
4124 {
4125 	u16 num_rxq = q_vec->num_rxq;
4126 	bool clean_complete = true;
4127 	int pkts_cleaned = 0;
4128 	int i, budget_per_q;
4129 	int nid;
4130 
4131 	/* We attempt to distribute budget to each Rx queue fairly, but don't
4132 	 * allow the budget to go below 1 because that would exit polling early.
4133 	 */
4134 	budget_per_q = num_rxq ? max(budget / num_rxq, 1) : 0;
4135 	for (i = 0; i < num_rxq; i++) {
4136 		struct idpf_rx_queue *rxq = q_vec->rx[i];
4137 		int pkts_cleaned_per_q;
4138 
4139 		pkts_cleaned_per_q = idpf_rx_splitq_clean(rxq, budget_per_q);
4140 		/* if we clean as many as budgeted, we must not be done */
4141 		if (pkts_cleaned_per_q >= budget_per_q)
4142 			clean_complete = false;
4143 		pkts_cleaned += pkts_cleaned_per_q;
4144 	}
4145 	*cleaned = pkts_cleaned;
4146 
4147 	nid = numa_mem_id();
4148 
4149 	for (i = 0; i < q_vec->num_bufq; i++)
4150 		idpf_rx_clean_refillq_all(q_vec->bufq[i], nid);
4151 
4152 	return clean_complete;
4153 }
4154 
4155 /**
4156  * idpf_vport_splitq_napi_poll - NAPI handler
4157  * @napi: struct from which you get q_vector
4158  * @budget: budget provided by stack
4159  */
4160 static int idpf_vport_splitq_napi_poll(struct napi_struct *napi, int budget)
4161 {
4162 	struct idpf_q_vector *q_vector =
4163 				container_of(napi, struct idpf_q_vector, napi);
4164 	bool clean_complete;
4165 	int work_done = 0;
4166 
4167 	/* Handle case where we are called by netpoll with a budget of 0 */
4168 	if (unlikely(!budget)) {
4169 		idpf_tx_splitq_clean_all(q_vector, budget, &work_done);
4170 
4171 		return 0;
4172 	}
4173 
4174 	clean_complete = idpf_rx_splitq_clean_all(q_vector, budget, &work_done);
4175 	clean_complete &= idpf_tx_splitq_clean_all(q_vector, budget, &work_done);
4176 
4177 	/* If work not completed, return budget and polling will return */
4178 	if (!clean_complete) {
4179 		idpf_vport_intr_set_wb_on_itr(q_vector);
4180 		return budget;
4181 	}
4182 
4183 	work_done = min_t(int, work_done, budget - 1);
4184 
4185 	/* Exit the polling mode, but don't re-enable interrupts if stack might
4186 	 * poll us due to busy-polling
4187 	 */
4188 	if (likely(napi_complete_done(napi, work_done)))
4189 		idpf_vport_intr_update_itr_ena_irq(q_vector);
4190 	else
4191 		idpf_vport_intr_set_wb_on_itr(q_vector);
4192 
4193 	/* Switch to poll mode in the tear-down path after sending disable
4194 	 * queues virtchnl message, as the interrupts will be disabled after
4195 	 * that
4196 	 */
4197 	if (unlikely(q_vector->num_txq && idpf_queue_has(POLL_MODE,
4198 							 q_vector->tx[0])))
4199 		return budget;
4200 	else
4201 		return work_done;
4202 }
4203 
4204 /**
4205  * idpf_vport_intr_map_vector_to_qs - Map vectors to queues
4206  * @vport: virtual port
4207  *
4208  * Mapping for vectors to queues
4209  */
4210 static void idpf_vport_intr_map_vector_to_qs(struct idpf_vport *vport)
4211 {
4212 	bool split = idpf_is_queue_model_split(vport->rxq_model);
4213 	u16 num_txq_grp = vport->num_txq_grp;
4214 	struct idpf_rxq_group *rx_qgrp;
4215 	struct idpf_txq_group *tx_qgrp;
4216 	u32 i, qv_idx, q_index;
4217 
4218 	for (i = 0, qv_idx = 0; i < vport->num_rxq_grp; i++) {
4219 		u16 num_rxq;
4220 
4221 		if (qv_idx >= vport->num_q_vectors)
4222 			qv_idx = 0;
4223 
4224 		rx_qgrp = &vport->rxq_grps[i];
4225 		if (split)
4226 			num_rxq = rx_qgrp->splitq.num_rxq_sets;
4227 		else
4228 			num_rxq = rx_qgrp->singleq.num_rxq;
4229 
4230 		for (u32 j = 0; j < num_rxq; j++) {
4231 			struct idpf_rx_queue *q;
4232 
4233 			if (split)
4234 				q = &rx_qgrp->splitq.rxq_sets[j]->rxq;
4235 			else
4236 				q = rx_qgrp->singleq.rxqs[j];
4237 			q->q_vector = &vport->q_vectors[qv_idx];
4238 			q_index = q->q_vector->num_rxq;
4239 			q->q_vector->rx[q_index] = q;
4240 			q->q_vector->num_rxq++;
4241 
4242 			if (split)
4243 				q->napi = &q->q_vector->napi;
4244 		}
4245 
4246 		if (split) {
4247 			for (u32 j = 0; j < vport->num_bufqs_per_qgrp; j++) {
4248 				struct idpf_buf_queue *bufq;
4249 
4250 				bufq = &rx_qgrp->splitq.bufq_sets[j].bufq;
4251 				bufq->q_vector = &vport->q_vectors[qv_idx];
4252 				q_index = bufq->q_vector->num_bufq;
4253 				bufq->q_vector->bufq[q_index] = bufq;
4254 				bufq->q_vector->num_bufq++;
4255 			}
4256 		}
4257 
4258 		qv_idx++;
4259 	}
4260 
4261 	split = idpf_is_queue_model_split(vport->txq_model);
4262 
4263 	for (i = 0, qv_idx = 0; i < num_txq_grp; i++) {
4264 		u16 num_txq;
4265 
4266 		if (qv_idx >= vport->num_q_vectors)
4267 			qv_idx = 0;
4268 
4269 		tx_qgrp = &vport->txq_grps[i];
4270 		num_txq = tx_qgrp->num_txq;
4271 
4272 		for (u32 j = 0; j < num_txq; j++) {
4273 			struct idpf_tx_queue *q;
4274 
4275 			q = tx_qgrp->txqs[j];
4276 			q->q_vector = &vport->q_vectors[qv_idx];
4277 			q->q_vector->tx[q->q_vector->num_txq++] = q;
4278 		}
4279 
4280 		if (split) {
4281 			struct idpf_compl_queue *q = tx_qgrp->complq;
4282 
4283 			q->q_vector = &vport->q_vectors[qv_idx];
4284 			q->q_vector->complq[q->q_vector->num_complq++] = q;
4285 		}
4286 
4287 		qv_idx++;
4288 	}
4289 }
4290 
4291 /**
4292  * idpf_vport_intr_init_vec_idx - Initialize the vector indexes
4293  * @vport: virtual port
4294  *
4295  * Initialize vector indexes with values returened over mailbox
4296  */
4297 static int idpf_vport_intr_init_vec_idx(struct idpf_vport *vport)
4298 {
4299 	struct idpf_adapter *adapter = vport->adapter;
4300 	struct virtchnl2_alloc_vectors *ac;
4301 	u16 *vecids, total_vecs;
4302 	int i;
4303 
4304 	ac = adapter->req_vec_chunks;
4305 	if (!ac) {
4306 		for (i = 0; i < vport->num_q_vectors; i++)
4307 			vport->q_vectors[i].v_idx = vport->q_vector_idxs[i];
4308 
4309 		return 0;
4310 	}
4311 
4312 	total_vecs = idpf_get_reserved_vecs(adapter);
4313 	vecids = kcalloc(total_vecs, sizeof(u16), GFP_KERNEL);
4314 	if (!vecids)
4315 		return -ENOMEM;
4316 
4317 	idpf_get_vec_ids(adapter, vecids, total_vecs, &ac->vchunks);
4318 
4319 	for (i = 0; i < vport->num_q_vectors; i++)
4320 		vport->q_vectors[i].v_idx = vecids[vport->q_vector_idxs[i]];
4321 
4322 	kfree(vecids);
4323 
4324 	return 0;
4325 }
4326 
4327 /**
4328  * idpf_vport_intr_napi_add_all- Register napi handler for all qvectors
4329  * @vport: virtual port structure
4330  */
4331 static void idpf_vport_intr_napi_add_all(struct idpf_vport *vport)
4332 {
4333 	int (*napi_poll)(struct napi_struct *napi, int budget);
4334 	u16 v_idx, qv_idx;
4335 	int irq_num;
4336 
4337 	if (idpf_is_queue_model_split(vport->txq_model))
4338 		napi_poll = idpf_vport_splitq_napi_poll;
4339 	else
4340 		napi_poll = idpf_vport_singleq_napi_poll;
4341 
4342 	for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) {
4343 		struct idpf_q_vector *q_vector = &vport->q_vectors[v_idx];
4344 		qv_idx = vport->q_vector_idxs[v_idx];
4345 		irq_num = vport->adapter->msix_entries[qv_idx].vector;
4346 
4347 		netif_napi_add_config(vport->netdev, &q_vector->napi,
4348 				      napi_poll, v_idx);
4349 		netif_napi_set_irq(&q_vector->napi, irq_num);
4350 	}
4351 }
4352 
4353 /**
4354  * idpf_vport_intr_alloc - Allocate memory for interrupt vectors
4355  * @vport: virtual port
4356  *
4357  * We allocate one q_vector per queue interrupt. If allocation fails we
4358  * return -ENOMEM.
4359  */
4360 int idpf_vport_intr_alloc(struct idpf_vport *vport)
4361 {
4362 	u16 txqs_per_vector, rxqs_per_vector, bufqs_per_vector;
4363 	struct idpf_q_vector *q_vector;
4364 	u32 complqs_per_vector, v_idx;
4365 
4366 	vport->q_vectors = kcalloc(vport->num_q_vectors,
4367 				   sizeof(struct idpf_q_vector), GFP_KERNEL);
4368 	if (!vport->q_vectors)
4369 		return -ENOMEM;
4370 
4371 	txqs_per_vector = DIV_ROUND_UP(vport->num_txq_grp,
4372 				       vport->num_q_vectors);
4373 	rxqs_per_vector = DIV_ROUND_UP(vport->num_rxq_grp,
4374 				       vport->num_q_vectors);
4375 	bufqs_per_vector = vport->num_bufqs_per_qgrp *
4376 			   DIV_ROUND_UP(vport->num_rxq_grp,
4377 					vport->num_q_vectors);
4378 	complqs_per_vector = DIV_ROUND_UP(vport->num_txq_grp,
4379 					  vport->num_q_vectors);
4380 
4381 	for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) {
4382 		q_vector = &vport->q_vectors[v_idx];
4383 		q_vector->vport = vport;
4384 
4385 		q_vector->tx_itr_value = IDPF_ITR_TX_DEF;
4386 		q_vector->tx_intr_mode = IDPF_ITR_DYNAMIC;
4387 		q_vector->tx_itr_idx = VIRTCHNL2_ITR_IDX_1;
4388 
4389 		q_vector->rx_itr_value = IDPF_ITR_RX_DEF;
4390 		q_vector->rx_intr_mode = IDPF_ITR_DYNAMIC;
4391 		q_vector->rx_itr_idx = VIRTCHNL2_ITR_IDX_0;
4392 
4393 		q_vector->tx = kcalloc(txqs_per_vector, sizeof(*q_vector->tx),
4394 				       GFP_KERNEL);
4395 		if (!q_vector->tx)
4396 			goto error;
4397 
4398 		q_vector->rx = kcalloc(rxqs_per_vector, sizeof(*q_vector->rx),
4399 				       GFP_KERNEL);
4400 		if (!q_vector->rx)
4401 			goto error;
4402 
4403 		if (!idpf_is_queue_model_split(vport->rxq_model))
4404 			continue;
4405 
4406 		q_vector->bufq = kcalloc(bufqs_per_vector,
4407 					 sizeof(*q_vector->bufq),
4408 					 GFP_KERNEL);
4409 		if (!q_vector->bufq)
4410 			goto error;
4411 
4412 		q_vector->complq = kcalloc(complqs_per_vector,
4413 					   sizeof(*q_vector->complq),
4414 					   GFP_KERNEL);
4415 		if (!q_vector->complq)
4416 			goto error;
4417 	}
4418 
4419 	return 0;
4420 
4421 error:
4422 	idpf_vport_intr_rel(vport);
4423 
4424 	return -ENOMEM;
4425 }
4426 
4427 /**
4428  * idpf_vport_intr_init - Setup all vectors for the given vport
4429  * @vport: virtual port
4430  *
4431  * Returns 0 on success or negative on failure
4432  */
4433 int idpf_vport_intr_init(struct idpf_vport *vport)
4434 {
4435 	int err;
4436 
4437 	err = idpf_vport_intr_init_vec_idx(vport);
4438 	if (err)
4439 		return err;
4440 
4441 	idpf_vport_intr_map_vector_to_qs(vport);
4442 	idpf_vport_intr_napi_add_all(vport);
4443 
4444 	err = vport->adapter->dev_ops.reg_ops.intr_reg_init(vport);
4445 	if (err)
4446 		goto unroll_vectors_alloc;
4447 
4448 	err = idpf_vport_intr_req_irq(vport);
4449 	if (err)
4450 		goto unroll_vectors_alloc;
4451 
4452 	return 0;
4453 
4454 unroll_vectors_alloc:
4455 	idpf_vport_intr_napi_del_all(vport);
4456 
4457 	return err;
4458 }
4459 
4460 void idpf_vport_intr_ena(struct idpf_vport *vport)
4461 {
4462 	idpf_vport_intr_napi_ena_all(vport);
4463 	idpf_vport_intr_ena_irq_all(vport);
4464 }
4465 
4466 /**
4467  * idpf_config_rss - Send virtchnl messages to configure RSS
4468  * @vport: virtual port
4469  *
4470  * Return 0 on success, negative on failure
4471  */
4472 int idpf_config_rss(struct idpf_vport *vport)
4473 {
4474 	int err;
4475 
4476 	err = idpf_send_get_set_rss_key_msg(vport, false);
4477 	if (err)
4478 		return err;
4479 
4480 	return idpf_send_get_set_rss_lut_msg(vport, false);
4481 }
4482 
4483 /**
4484  * idpf_fill_dflt_rss_lut - Fill the indirection table with the default values
4485  * @vport: virtual port structure
4486  */
4487 static void idpf_fill_dflt_rss_lut(struct idpf_vport *vport)
4488 {
4489 	struct idpf_adapter *adapter = vport->adapter;
4490 	u16 num_active_rxq = vport->num_rxq;
4491 	struct idpf_rss_data *rss_data;
4492 	int i;
4493 
4494 	rss_data = &adapter->vport_config[vport->idx]->user_config.rss_data;
4495 
4496 	for (i = 0; i < rss_data->rss_lut_size; i++) {
4497 		rss_data->rss_lut[i] = i % num_active_rxq;
4498 		rss_data->cached_lut[i] = rss_data->rss_lut[i];
4499 	}
4500 }
4501 
4502 /**
4503  * idpf_init_rss - Allocate and initialize RSS resources
4504  * @vport: virtual port
4505  *
4506  * Return 0 on success, negative on failure
4507  */
4508 int idpf_init_rss(struct idpf_vport *vport)
4509 {
4510 	struct idpf_adapter *adapter = vport->adapter;
4511 	struct idpf_rss_data *rss_data;
4512 	u32 lut_size;
4513 
4514 	rss_data = &adapter->vport_config[vport->idx]->user_config.rss_data;
4515 
4516 	lut_size = rss_data->rss_lut_size * sizeof(u32);
4517 	rss_data->rss_lut = kzalloc(lut_size, GFP_KERNEL);
4518 	if (!rss_data->rss_lut)
4519 		return -ENOMEM;
4520 
4521 	rss_data->cached_lut = kzalloc(lut_size, GFP_KERNEL);
4522 	if (!rss_data->cached_lut) {
4523 		kfree(rss_data->rss_lut);
4524 		rss_data->rss_lut = NULL;
4525 
4526 		return -ENOMEM;
4527 	}
4528 
4529 	/* Fill the default RSS lut values */
4530 	idpf_fill_dflt_rss_lut(vport);
4531 
4532 	return idpf_config_rss(vport);
4533 }
4534 
4535 /**
4536  * idpf_deinit_rss - Release RSS resources
4537  * @vport: virtual port
4538  */
4539 void idpf_deinit_rss(struct idpf_vport *vport)
4540 {
4541 	struct idpf_adapter *adapter = vport->adapter;
4542 	struct idpf_rss_data *rss_data;
4543 
4544 	rss_data = &adapter->vport_config[vport->idx]->user_config.rss_data;
4545 	kfree(rss_data->cached_lut);
4546 	rss_data->cached_lut = NULL;
4547 	kfree(rss_data->rss_lut);
4548 	rss_data->rss_lut = NULL;
4549 }
4550